Program recording device and its current protection detection method

Abstract

This invention provides a program recording device and its current protection detection method. The program recording device is used to read or write to a program recording interface. The program recording device includes a microprocessor, a programming drive circuit, and an overcurrent protection circuit. The microprocessor outputs a first or a second test signal. The programming drive circuit outputs a high drive voltage or a low drive voltage to the program recording interface. After the programming drive circuit outputs a low drive voltage for a predetermined time, it outputs a high drive voltage, causing the program recording interface to form a high impedance. After the program recording interface forms a high impedance, the overcurrent protection circuit receives the first test signal to trigger overcurrent protection, and then receives the second test signal to trigger low current protection. If the overcurrent protection and low current protection fail to trigger consecutively more than a predetermined number of times, the microprocessor determines that the current protection has failed.

Description

Technical Field

[0001] This case relates to a program recording device and a current protection detection method thereof, and more particularly to a program recording device and a current protection detection method thereof that can determine whether the current protection is normal. Background Technology

[0002] In existing technologies, traditional program recording devices rely on external fixtures to record data to the controller, and these fixtures are typically equipped with auxiliary independent components (such as current sensors and Hall effect sensors). To save space, an increasing number of integrated products combine these auxiliary independent components, the program recording device, and the controller into one unit. However, such integrated products often only trigger the overcurrent protection circuit when there is a hardware malfunction (such as an external motor failure), and under normal circumstances, the overcurrent protection circuit is inactive. Therefore, after long-term use, if the overcurrent protection circuit malfunctions, it may not be detected in time, resulting in the overcurrent protection circuit failing to function when a hardware failure occurs.

[0003] Therefore, developing a program recording device and its current protection detection method that can improve upon the existing technology to detect the condition of overcurrent protection circuits is an urgent need. Summary of the Invention

[0004] The purpose of this invention is to provide a program recording device and its current protection detection method, which can actively test the overcurrent protection circuit to ensure that the overcurrent protection circuit operates normally.

[0005] To achieve the above objectives, this invention provides a program recording device for reading or writing to a program recording interface. The program recording device includes a microprocessor, a programming driver circuit, and an overcurrent protection circuit. The microprocessor outputs a first test signal or a second test signal, wherein the first test signal has a high voltage level and the second test signal has a low voltage level. The microprocessor controls the programming driver circuit to output a high drive voltage or a low drive voltage to the program recording interface. The overcurrent protection circuit is coupled to the first and second test signals to trigger overcurrent protection or undercurrent protection via the microprocessor. After the programming driver circuit outputs a low drive voltage for a predetermined time, it outputs a high drive voltage, causing the program recording interface to form a high impedance. After the program recording interface forms a high impedance, the overcurrent protection circuit receives the first test signal to trigger overcurrent protection, and after triggering overcurrent protection, it receives the second test signal to trigger undercurrent protection. If the number of consecutive failures to trigger overcurrent protection and undercurrent protection exceeds a predetermined number, the microprocessor determines that the current protection has failed.

[0006] To achieve the above objectives, this application provides a current protection detection method for a program recording device, wherein the program recording device is used to read or write to a program recording interface. The current protection detection method includes: providing a first test signal or a second test signal via a microprocessor, wherein the first test signal has a high voltage level and the second test signal has a low voltage level; controlling a programming drive circuit via the microprocessor to provide a high drive voltage or a low drive voltage; receiving the first and second test signals via an overcurrent protection circuit to trigger overcurrent protection or undercurrent protection via the microprocessor; providing a low drive voltage to the program recording interface for a predetermined time; providing a high drive voltage to the program recording interface after the predetermined time, causing the program recording interface to form a high impedance; and after forming the high impedance, receiving the first test signal via the overcurrent protection circuit to trigger overcurrent protection, and after triggering overcurrent protection, receiving the second test signal via the overcurrent protection circuit to trigger undercurrent protection, wherein if the number of consecutive failures to trigger overcurrent protection and undercurrent protection exceeds a predetermined number, the current protection is determined to have failed. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of the architecture of a program recording device according to an embodiment of this case;

[0008] Figure 2 This is a flowchart illustrating a current protection detection method according to an embodiment of this case;

[0009] Figure 3 for Figure 1 A schematic diagram of the circuit structure of the programming driver circuit;

[0010] Figure 4 for Figure 3 A schematic diagram of the circuit structure of a voltage regulator;

[0011] Figure 5 An equivalent circuit diagram illustrating the working principle of a voltage regulator is shown.

[0012] Figure 6 for Figure 1 A schematic diagram of the overcurrent protection circuit.

[0013] Explanation of icon numbers:

[0014] 1: Program burning device

[0015] 2: Program burning interface

[0016] 11: Microprocessor

[0017] 12: Programmable driver circuit

[0018] 13: Overcurrent protection circuit

[0019] Ix1: First test signal

[0020] Ix2: Second test signal

[0021] OCH: Overcurrent Protection

[0022] OCL: Low Current Protection

[0023] S1, S2, S3, S4, S5: Steps

[0024] 121: Voltage Regulator

[0025] K: Negative Extreme

[0026] A: Positive extreme

[0027] R: Reference end

[0028] Vref: Reference voltage

[0029] Q1: NPN transistor

[0030] R1: First resistor

[0031] R2: Second resistor

[0032] R3: Third resistor

[0033] Q2: Field-Effect Transistor

[0034] VCS: Driver Output Terminal

[0035] ProgEN: Enable Programming Signal

[0036] PowerEN: Enable power signal

[0037] R4: Resistor

[0038] Q3: Transistor

[0039] 122: Amplifier

[0040] 123: Reference Source

[0041] 124: Transistor

[0042] Vo: Output voltage

[0043] R120, R121: Resistors

[0044] Vin: Input voltage

[0045] 131: First comparator

[0046] 132: Second comparator

[0047] VD: Detection voltage

[0048] VH: High Voltage Limit

[0049] VL: Low Voltage Limit

[0050] 133: Detect input terminal Detailed Implementation

[0051] Some typical embodiments embodying the features and advantages of this invention will be described in detail in the following description. It should be understood that this invention can have various variations in different embodiments, all of which do not depart from the scope of this invention, and the descriptions and illustrations herein are for illustrative purposes only and not intended to limit this invention.

[0052] Figure 1 This is a schematic diagram of the architecture of a program recording device 1 according to an embodiment of this case. Figure 1 As shown, the program recording device 1 is used to read from or write to the program recording interface 2, wherein the program recording interface 2 may be, for example, but not limited to, a Hall sensor or a current sensor. The program recording device 1 includes a microprocessor 11, a programming drive circuit 12, and an overcurrent protection circuit 13, wherein the programming drive circuit 12 is electrically coupled between the microprocessor 11 and the program recording interface 2, and the overcurrent protection circuit 13 is electrically coupled between the microprocessor 11 and the program recording interface 2. The microprocessor 11 is used to output a first test signal Ix1 or a second test signal Ix2, wherein the first test signal Ix1 has a high voltage level, and the second test signal Ix2 has a low voltage level, with the high voltage level being higher than the low voltage level.

[0053] The microprocessor 11 controls the programming drive circuit 12 to output a high drive voltage (e.g., 9V) or a low drive voltage (e.g., 5V) to the program recording interface 2, wherein the high drive voltage is greater than the low drive voltage. The overcurrent protection circuit 13 is coupled to the first test signal Ix1 and the second test signal Ix2, so that the microprocessor 11 can trigger the overcurrent protection OCH and the undercurrent protection OCL respectively. Figure 1 As shown, the microprocessor 11 outputs an enable power signal PowerEN and an enable programming signal ProgEN to control the programming drive circuit 12. In this embodiment, the enable power signal PowerEN is used to start or stop the programming drive circuit 12 (or whether to provide power to the programming drive circuit 12). The enable programming signal ProgEN is used to control the programming drive circuit 12 to output a high drive voltage (e.g., 9V) or a low drive voltage (e.g., 5V).

[0054] Figure 2 This is a flowchart illustrating a current protection detection method according to an embodiment of this case, wherein the current protection detection method is used in the program recording device 1, and therefore the following is combined with... Figure 1 and Figure 2This method for detecting current protection is explained.

[0055] First, in step S1, a microprocessor 11, a programming drive circuit 12, and an overcurrent protection circuit 13 are provided. As described above, the microprocessor 11 provides a first test signal Ix1 or a second test signal Ix2; the microprocessor 11 controls the programming drive circuit 12 to provide a high drive voltage or a low drive voltage; the overcurrent protection circuit 13 receives the first test signal Ix1 and the second test signal Ix2 to trigger the overcurrent protection OCH or the low current protection OCL via the microprocessor 11.

[0056] Next, in step S2, after the programming drive circuit 12 outputs a low drive voltage to the program recording interface 2 for a predetermined time (e.g., 10ms), the programming drive circuit 12 outputs a high drive voltage to the program recording interface 2, so that the program recording interface 2 forms a high impedance.

[0057] After the program recording interface 2 forms a high impedance, in step S3, the overcurrent protection circuit 13 receives the first test signal Ix1 to trigger the overcurrent protection OCH, and after triggering the overcurrent protection OCH, the overcurrent protection circuit 13 receives the second test signal Ix2 to trigger the low current protection OCL.

[0058] Since triggering the overcurrent protection OCH and undercurrent protection OCL in step S3 may succeed or fail, in step S4, the microprocessor 11 determines whether the overcurrent protection OCH and undercurrent protection OCL have been successfully triggered. If the result of step S4 is yes, the microprocessor 11 determines that the current protection (i.e., including overcurrent protection OCH and undercurrent protection OCL) is normal. When the microprocessor 11 determines that the current protection is normal, the program recording device 1 begins to read or write data to the program recording interface 2 normally. If the result of step S4 is no, it means that triggering the overcurrent protection OCH and undercurrent protection OCL has failed, and then step S5 is executed.

[0059] In step S5, the microprocessor 11 determines whether the number of consecutive failures to trigger the overcurrent protection OCH and undercurrent protection OCL has exceeded a predetermined number (e.g., but not limited to two). If the result of step S5 is negative, step S3 is executed again to attempt to trigger the overcurrent protection OCH and undercurrent protection OCL again. Conversely, if the result of step S5 is positive, the microprocessor 11 determines that the current protection has failed.

[0060] Therefore, when the number of consecutive failed triggers of the overcurrent protection OCH and undercurrent protection OCL exceeds a predetermined number, the microprocessor 11 determines that the current protection has failed. When the microprocessor 11 determines that the current protection has failed, it issues a warning and can also issue a corresponding warning to the user. Furthermore, when the number of consecutive failed triggers of the overcurrent protection OCH and undercurrent protection OCL is less than a predetermined number, if the overcurrent protection OCH and undercurrent protection OCL are successfully triggered, the microprocessor 11 will still determine that the current protection is normal. Therefore, through the program recording device 1 and the current protection detection method of this invention, the overcurrent protection circuit 13 can be actively tested to ensure that the overcurrent protection circuit 13 operates normally and to avoid the failure of the overcurrent protection circuit 13 to provide current protection in the event of a fault.

[0061] Figure 3 for Figure 1 A schematic diagram of the circuit structure of the programming driver circuit. In some embodiments, such as... Figure 3 As shown, the programming driver circuit 12 includes a voltage regulator 121, an NPN transistor Q1, a first resistor R1, a second resistor R2, a third resistor R3, and a field-effect transistor Q2. The voltage regulator 121 includes a cathode K, an anode A, and a reference terminal R, wherein the anode A is connected to ground, and the reference terminal R provides a reference voltage Vref. The collector of the NPN transistor Q1 is coupled to a high-voltage source (e.g., 12V), and the base of the NPN transistor Q1 is coupled to the cathode K. The first terminal of the first resistor R1 is connected to the emitter of the NPN transistor Q1 to form the drive output terminal VCS of the programming driver circuit 12, and the second terminal of the first resistor R1 is connected to the reference terminal R. The programming driver circuit 12 provides a high drive voltage or a low drive voltage to the program recording interface 2 via the drive output terminal VCS. The first terminal of the second resistor R2 is connected to the reference terminal R, and the second terminal of the second resistor R2 is connected to ground. The first terminal of the third resistor R3 is connected to the reference terminal R. The drain terminal of the field-effect transistor Q2 is connected to the second terminal of the third resistor R3, the source terminal of the field-effect transistor Q2 is connected to ground, and the gate terminal of the field-effect transistor Q2 is coupled to the enable programming signal ProgEN of the microprocessor 11. Furthermore, the programming drive circuit 12 is also coupled to the enable power signal PowerEN of the microprocessor 11.

[0062] The microprocessor 11 controls the programming drive circuit 12 to read or write data to the program recording interface 2. A specific control method is illustrated below. When the microprocessor 11 briefly turns on transistor Q3 and turns off the power to the drive output terminal VCS, when the microprocessor 11 turns on the field-effect transistor Q2, the programming drive circuit 12 provides a high drive voltage via the drive output terminal VCS. When the program recording interface 2 receives the high drive voltage, the microprocessor 11 reads or writes data to the program recording interface 2. When the microprocessor 11 turns off the field-effect transistor Q2, the programming drive circuit 12 provides a low drive voltage via the drive output terminal VCS. When the program recording interface 2 receives the low drive voltage, the microprocessor 11 completes the read or write operation on the program recording interface 2, and the program recording interface 2 outputs a voltage signal, which the microprocessor 11 then reads.

[0063] At Figure 3 In the circuit structure shown, the operating current required by the voltage regulator 121 is provided to the voltage regulator 121 through resistor R4, and resistors R1, R2, and R3 form a feedback circuit. The voltage on the drive output terminal VCS is divided by resistors R1, R2, and R3 and enters the reference terminal R of the voltage regulator 121. The voltage regulator 121 controls the voltage at the cathode terminal K to drive the NPN transistor Q1, thereby achieving voltage regulation control of the drive output terminal VCS.

[0064] Furthermore, the power enable signal PowerEN controls whether the voltage at the drive output VCS is zero, while the programming enable signal ProgEN controls whether the drive output VCS provides a high or low drive voltage, as explained below. Figure 3 As shown, the PowerEN enable signal drives the gate voltage of transistor Q3, and the ProgEN enable programming signal drives the gate voltage of field-effect transistor Q2. When transistor Q3 is turned on by the PowerEN enable signal, the voltage at the drive output terminal VCS is zero; when transistor Q3 is turned off by the PowerEN enable signal, the ProgEN enable programming signal can turn on or off field-effect transistor Q2, thereby affecting the voltage division ratio of the feedback circuit composed of resistors R1, R2, and R3, thereby controlling whether the drive output terminal VCS provides a high drive voltage or a low drive voltage.

[0065] Figure 4 for Figure 3 A schematic diagram of the circuit structure of the voltage regulator 121. In some embodiments, such as... Figure 4As shown, the voltage regulator 121 includes an amplifier 122, a reference source 123, and a transistor 124. The positive and negative terminals of the amplifier 122 are coupled to the reference terminal R and the reference source 123, respectively. The collector, emitter, and base terminals of the transistor 124 are coupled to the cathode terminal K, the anode terminal A, and the output terminal of the amplifier 122, respectively. According to the amplifier characteristics, a stable unsaturated current flows through the transistor 124 only when the reference voltage Vref at the reference terminal R is approximately equal to the voltage of the reference source 123. Furthermore, with small changes in the reference voltage Vref at the reference terminal R, the current flowing through the transistor 124 will also change accordingly.

[0066] Figure 5 An equivalent circuit diagram illustrating the working principle of a voltage regulator is shown. Figure 3 The resistors R1, R2, and R3 used for shunt current can be equivalent to Figure 5 Medium resistors R120 and R121. For example... Figure 5 As shown, voltage regulator 121 is equivalent to an adjustable Zener diode. The magnitude of the output voltage Vo provided at its cathode K depends on the voltage division ratio of resistors R120 and R121. When the resistance values ​​of resistors R120 and R121 are fixed, they divide the output voltage Vo and feed it back to voltage regulator 121. When the input voltage Vin increases, the output voltage Vo increases, and the feedback also increases, causing the shunt current in voltage regulator 121 to increase, thereby causing the output voltage Vo to decrease. Thus, the output voltage Vo will stabilize when the reference voltage Vref is equal to the reference source 123 of voltage regulator 121, at which point Vo = (1 + R120 / R121)Vref.

[0067] Figure 6 for Figure 1 A schematic diagram of the overcurrent protection circuit. In some embodiments, such as... Figure 6 As shown, the overcurrent protection circuit 13 includes a first comparator 131 and a second comparator 132. The positive terminal of the first comparator 131 is coupled to a high voltage limit VH, and the output terminal of the first comparator 131 is coupled to a detection voltage VD of the microprocessor 11. The negative terminal of the second comparator 132 is coupled to a low voltage limit VL, and the output terminal of the second comparator 132 is coupled to the detection voltage VD. The positive terminal of the second comparator 132 is connected to the negative terminal of the first comparator 131 to form a detection input terminal 133. The detection input terminal 133 is used to receive a write test signal from the microprocessor 11 or a read voltage signal from the program recording interface 2.

[0068] When the write test signal is received from the microprocessor 11 at the detection input terminal 133, if the write test signal is higher than the high voltage limit VH, the first comparator 131 outputs a first low voltage, wherein a first trigger current is formed between the first low voltage and the detection voltage VD, and the microprocessor 11 receives the first trigger current to trigger the overcurrent protection OCH; if the write test signal is lower than the low voltage limit VL, the second comparator 132 outputs a second low voltage, wherein a second trigger current is formed between the second low voltage and the detection voltage VD, and the microprocessor 11 receives the second trigger current to trigger the low current protection OCL.

[0069] When the detection input terminal 133 receives a read voltage signal from the program recording interface 2, if the read voltage signal is higher than the high voltage limit VH, the first comparator 131 outputs a first low voltage, wherein a first trigger current is formed between the first low voltage and the detection voltage VD, and the microprocessor 11 receives the first trigger current to trigger the overcurrent protection OCH; if the read voltage signal is lower than the low voltage limit VL, the second comparator 132 outputs a second low voltage, wherein a second trigger current is formed between the second low voltage and the detection voltage VD, and the microprocessor 11 receives the second trigger current to trigger the low current protection OCL.

[0070] In summary, this invention provides a program recording device and a current protection detection method. It utilizes a programming driver circuit coupled with a microprocessor to actively test the overcurrent protection circuit, ensuring its proper operation and preventing it from failing to provide current protection in the event of a fault. Whenever the system starts up, the program recording device executes the current protection detection method to check the overcurrent protection circuit. When an abnormality is detected in the overcurrent protection circuit, the program recording device will issue a system warning.

[0071] It should be noted that the above are merely preferred embodiments for illustrating this case, and this case is not limited to the described embodiments. The scope of this case is determined by the scope of the appended claims. Furthermore, this case can be modified in various ways by those skilled in the art, but all such modifications will not depart from the scope of protection sought by the appended claims.

Claims

1. A program burning device for reading or writing to a program burning interface, wherein the program burning device comprises: A microprocessor for outputting a first test signal or a second test signal, wherein the first test signal has a high voltage level and the second test signal has a low voltage level; The programming driver circuit, under the control of the microprocessor, outputs a high driving voltage or a low driving voltage to the program recording interface. as well as An overcurrent protection circuit is coupled to the first test signal and the second test signal to trigger overcurrent protection or undercurrent protection via the microprocessor. After the programming driver circuit outputs the low driving voltage for a predetermined time, the programming driver circuit outputs the high driving voltage, causing the program recording interface to form a high impedance. After the high impedance is formed at the program recording interface, the overcurrent protection circuit receives the first test signal to trigger the overcurrent protection, and after the overcurrent protection is triggered, the overcurrent protection circuit receives the second test signal to trigger the low current protection. If the number of consecutive failures of the overcurrent protection and the undercurrent protection exceeds a predetermined number, the microprocessor determines that the current protection has failed.

2. The program recording device according to claim 1, wherein if the number of consecutive failures of the overcurrent protection and the low current protection is less than the predetermined number, the microprocessor determines that the current protection is normal.

3. The program recording device according to claim 2, wherein when the microprocessor determines that the current protection is normal, the microprocessor controls the programming drive circuit to read or write to the program recording interface.

4. The program recording device according to claim 1, wherein the programming drive circuit comprises: A voltage regulator includes a cathode, an anode, and a reference terminal, wherein the anode is connected to ground voltage and the reference terminal provides a reference voltage; An NPN transistor, wherein the collector of the NPN transistor is coupled to a high voltage source, and the base of the NPN transistor is coupled to the cathode. A first resistor, wherein a first end of the first resistor is connected to the emitter of the NPN transistor to form the drive output terminal of the programming drive circuit, and a second end of the first resistor is connected to the reference terminal. A second resistor, wherein a first end of the second resistor is connected to the reference terminal, and a second end of the second resistor is connected to the ground voltage; A third resistor, wherein the first end of the third resistor is connected to the reference end; as well as A field-effect transistor, wherein the drain terminal of the field-effect transistor is connected to the second terminal of the third resistor, the source terminal of the field-effect transistor is connected to the ground voltage, and the gate terminal of the field-effect transistor is coupled to the microprocessor.

5. The program recording device according to claim 4, wherein the programming drive circuit provides the high drive voltage or the low drive voltage to the program recording interface via the drive output terminal.

6. The program recording apparatus according to claim 5, wherein when the microprocessor turns on the field-effect transistor, the programming drive circuit provides the high drive voltage via the drive output terminal; When the program recording interface receives the high driving voltage, the microprocessor reads or writes data to the program recording interface.

7. The program recording apparatus according to claim 5, wherein when the microprocessor turns off the field-effect transistor, the programming drive circuit provides the low drive voltage via the drive output terminal; When the program recording interface receives the low drive voltage, the microprocessor reads the voltage signal from the program recording interface.

8. The program recording device according to claim 1, wherein the overcurrent protection circuit comprises: A first comparator, wherein the positive terminal of the first comparator is coupled to a high voltage limit, and the output terminal of the first comparator is coupled to the detection voltage of the microprocessor; as well as A second comparator, wherein the cathode of the second comparator is coupled to a low voltage limit, the output of the second comparator is coupled to the detection voltage, and the positive terminal of the second comparator is connected to the cathode of the first comparator to form a detection input terminal; The detection input terminal is used to receive a write test signal from the microprocessor or a read voltage signal from the program recording interface.

9. The program recording apparatus according to claim 8, wherein when the write test signal is higher than the high voltage limit, the first comparator outputs a first low voltage, a first trigger current is formed between the first low voltage and the detection voltage, and the microprocessor receives the first trigger current to trigger the overcurrent protection; When the write test signal is lower than the low voltage limit, the second comparator outputs a second low voltage, and a second trigger current is formed between the second low voltage and the detection voltage. The microprocessor receives the second trigger current to trigger the low current protection.

10. The program recording apparatus according to claim 8, wherein when the read voltage signal is higher than the high voltage limit, the first comparator outputs a first low voltage, a first trigger current is formed between the first low voltage and the detection voltage, and the microprocessor receives the first trigger current to trigger the overcurrent protection; When the read voltage signal is lower than the low voltage limit, the second comparator outputs a second low voltage, and a second trigger current is formed between the second low voltage and the detected voltage. The microprocessor receives the second trigger current to trigger the low current protection.

11. A current protection detection method for a program recording device, wherein the program recording device is used to read or write to a program recording interface, wherein the current protection detection method includes: A first test signal or a second test signal is provided by a microprocessor, wherein the first test signal has a high voltage level and the second test signal has a low voltage level; The microprocessor controls the programming drive circuit to provide high or low drive voltage. The overcurrent protection circuit receives the first test signal and the second test signal to trigger overcurrent protection or undercurrent protection via the microprocessor. The low drive voltage is provided to the program recording interface for a predetermined time; After the predetermined time, the high driving voltage is provided to the program recording interface, causing the program recording interface to form a high impedance; After the high impedance is formed, the first test signal is received through the overcurrent protection circuit to trigger the overcurrent protection; as well as After the overcurrent protection is triggered, the second test signal is received through the overcurrent protection circuit to trigger the low current protection; If the number of consecutive failures of the overcurrent protection and the undercurrent protection exceeds a predetermined number, the current protection is deemed to have failed.

12. The current protection detection method according to claim 11, wherein if the failure to continuously trigger the overcurrent protection and the undercurrent protection is less than the predetermined number, the current protection is determined to be normal.

13. The current protection detection method according to claim 12, wherein when the current protection is determined to be normal, the microprocessor controls the programming drive circuit to read or write to the program recording interface.

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