A translation type sorting machine, a chip testing method and a chip testing device

Abstract

Embodiments of the present disclosure provide a translation type sorting machine, comprising: a machine table having a feeding area and a plurality of unloading areas, and a plurality of trays; at least one of the trays is provided with a retest prevention part; and at least one of the unloading areas is configured as a retest prevention unloading area; wherein the tray provided with the retest prevention part is configured in the corresponding retest prevention unloading area, and the remaining trays are configured in the feeding area and other unloading areas. Embodiments of the present disclosure prevent the non-retestable chips on the tray placed in the retest prevention unloading area from entering the feeding area for repeated testing by setting the retest prevention part on the tray, configuring the unloading area as the retest prevention unloading area, and allowing the tray to be configured in the retest prevention unloading area only.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure belong to the field of chip testing, and particularly relate to a translation type handler, a chip testing method and a chip testing device. BACKGROUND

[0002] Nowadays, the application field of semiconductor chips is very wide, and the demand for chips is very large. Many products require to ensure that their functions meet the chip design requirements before use, which requires each product to undergo electrical performance (function) testing. The main equipment for testing is a tester responsible for electrical performance testing and a handler responsible for product handling and classification. According to the packaging type of the product, the handler used for product testing can be roughly divided into turret type, gravity type and translation type handlers. The translation type handler generally uses JEDEC standard trays of the same size for feeding and discharging, and the tray storage area in the handler can be divided into a feeding area and a discharging area.

[0003] In order to improve the recovery rate, defective products usually need to be placed in the feeding area for retesting. As products become more and more complex, the requirements during testing are also increasing, and some products require that specific defective products in the initial test cannot be placed in the feeding area for retesting. At this time, if the conventional translation type handler is continued to be used, the tray that cannot be retested will be mistakenly placed in the feeding area, resulting in repeated testing of the products that cannot be retested. SUMMARY

[0004] Embodiments of the present disclosure aim to at least solve one of the technical problems existing in the prior art, and provide a translation type handler, a chip testing method and a chip testing device.

[0005] An aspect of the present disclosure provides a translation type handler, which comprises a handler having a feeding area and a plurality of discharging areas, and a plurality of trays.

[0006] At least one of the trays is provided with a retest prevention part, and at least one of the discharging areas is configured as a retest prevention discharging area; wherein

[0007] The tray provided with the retest prevention part is configured in the corresponding retest prevention discharging area, and the remaining trays are configured in the feeding area and other discharging areas.

[0008] Optionally, the translation type handler further comprises a plurality of positioning mechanisms arranged in the handler, each of the positioning mechanisms being used for fixing a corresponding tray; wherein the retest prevention part is arranged on a side of the corresponding tray away from the positioning mechanism.

[0009] Optionally, the retest prevention part adopts a foolproof block.

[0010] Optionally, the translation sorting machine further comprises a processing module, a plurality of first proximity sensors and at least one second proximity sensor.

[0011] Each of the first proximity sensors is arranged in a corresponding unloading area, and the second proximity sensor is arranged in a corresponding anti-duplication unloading area and corresponds to the position of the anti-duplication part.

[0012] The processing module is electrically connected with the first proximity sensors and the second proximity sensor, and is configured to determine whether the tray in the anti-duplication unloading area is correctly arranged according to signals of the first proximity sensors and the second proximity sensor.

[0013] Preferably, the first proximity sensor and the second proximity sensor are both photoelectric sensors.

[0014] Optionally, the first proximity sensor and the second proximity sensor are both NPN type photoelectric sensors; and the processing module is specifically configured to perform an OR operation on signals of the first sensor and the second sensor, and determine that the tray in the anti-duplication unloading area is incorrectly arranged when the operation result is a high level.

[0015] Optionally, the first proximity sensor and the second proximity sensor are both PNP type photoelectric sensors; and the processing module is specifically configured to perform an AND operation on signals of the first sensor and the second sensor, and determine that the tray in the anti-duplication unloading area is incorrectly arranged when the operation result is a low level.

[0016] Optionally, the translation sorting machine further comprises an alarm module.

[0017] The alarm module is electrically connected with the processing module, and is configured to output an alarm signal when the tray in the anti-duplication unloading area is incorrectly arranged.

[0018] Another aspect of the present disclosure provides a chip testing method, which employs the translation sorting machine described above; the method comprises:

[0019] Placing non-retestable chips with unqualified electrical performance in the tray of the anti-duplication unloading area;

[0020] Placing other chips with unqualified electrical performance in the tray of the unloading area;

[0021] Placing chips with qualified electrical performance in the tray of the unloading area.

[0022] Another aspect of the present disclosure provides a chip testing device, which comprises the translation sorting machine described above.

[0023] The embodiments of the present disclosure set the anti-retest part on the tray, and configure the unloading area as an anti-retest unloading area, and make the tray correspond to the anti-retest unloading area, so as to prevent the non-retestable chip on the tray from being put into the anti-retest unloading area and entering the loading area for repeated testing by using manual removal and the like. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 A structure schematic diagram of a translation sorting machine according to an embodiment of the present disclosure;

[0025] Figure 2 A standard tray schematic diagram according to another embodiment of the present disclosure;

[0026] Figure 3 A tray schematic diagram provided with an anti-retest part according to another embodiment of the present disclosure;

[0027] Figure 4 A circuit diagram in a signal processing module according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the present disclosure will be further described in detail below in combination with the drawings and specific embodiments.

[0029] As shown in Figure 1 , the embodiments of the present disclosure provide a translation sorting machine, which comprises a machine table 100 with a loading area 110 and a plurality of unloading areas 120, and a plurality of trays 200.

[0030] At least one of the trays 200 is provided with an anti-retest part 210, and at least one of the unloading areas 120 is configured as an anti-retest unloading area 121.

[0031] The tray 200 provided with the anti-retest part 210 is configured in the corresponding anti-retest unloading area 121, and the remaining trays 200 are configured in the loading area 110 and other unloading areas 120.

[0032] Specifically, as shown in Figure 1 , taking a translation sorting machine with three loading areas 110 and six unloading areas 120 (three automatic unloading areas and three manual unloading areas) as an example, generally, each loading area 110 and unloading area 120 can be fixed with one tray 200 as shown in Figure 2The tray 200 shown is a standard tray in terms of size. Now a tray 200 is provided with a retest prevention part 210, and the positioning mechanism of one of the manual unloading areas 120 is adjusted to be able to just fix one tray 200 provided with a retest prevention part 210, becoming a retest prevention unloading area 121, so that the tray 200 provided with a retest prevention part 210 can only be fixed in the retest prevention unloading area 121.

[0033] In the process of chip detection, the chips that cannot be detected again are put into the tray 200 in the retest prevention unloading area 121 after being detected, and then the operator can manually remove the tray 200, so that the chips that cannot be detected again will not be reloaded into the loading area 110 for retesting.

[0034] The embodiments of the present disclosure prevent the chips that cannot be tested again on the tray put into the retest prevention unloading area from entering the loading area for repeated testing by providing a retest prevention part on the tray, configuring the unloading area as a retest prevention unloading area, and making the tray correspond to the retest prevention unloading area, and using manual removal and the like.

[0035] Exemplarily, the translational sorting machine further comprises a plurality of positioning mechanisms arranged on the machine table, each of the positioning mechanisms being used for fixing a corresponding tray; wherein the retest prevention part is arranged on a side of the corresponding tray away from the positioning mechanisms.

[0036] Specifically, each positioning mechanism can just fix the corresponding tray in the corresponding loading area or unloading area; the positioning mechanism of the retest prevention unloading area is pulled backward so as to just be able to fix the tray with the retest prevention part. Since the positioning mechanisms of the other unloading areas and loading areas are used for fixing the trays without the retest prevention part, the tray with the retest prevention part cannot be placed in the other unloading areas and loading areas.

[0037] The embodiments of the present disclosure make the tray with the retest prevention part that needs to be put into the retest prevention unloading area unable to be put into other areas by cooperation between the retest prevention part and the positioning mechanism, so as to ensure that the tray with the retest prevention part is correctly configured.

[0038] Exemplarily, as shown in Figure 3 The retest prevention part 210 is a foolproof block.

[0039] Specifically, as shown in Figure 3 The retest prevention part 210 is a mechanical foolproof block, arranged on the outer edge of the standard tray 200 and protruding outward. Due to the presence of the retest prevention part 210, the tray cannot be put into the loading area or unloading area usually used for fixing the standard tray, but can only be put into the retest prevention unloading area whose fixing mechanism has been adjusted.

[0040] The embodiment of the present disclosure changes the size of the tray by setting the anti-retest part on the outer edge of the tray, so that the tray cannot be put into the normal feeding area or unloading area, thereby preventing the misloading of the non-retestable chip. The anti-retest part is set on the original standard tray, so that a new tray does not need to be made, and the modification is convenient and fast, the modification process is reversible, and the cost is saved.

[0041] Exemplarily, as shown in Figure 1 The translational sorting machine further comprises a processing module, a plurality of first proximity sensors 310 and at least one second proximity sensor 320;

[0042] Each of the first proximity sensors 310 is arranged in the corresponding unloading area 120, and the second proximity sensor 320 is arranged in the corresponding anti-retest unloading area 121 and corresponds to the position of the anti-retest part 210;

[0043] The processing module is electrically connected with the first proximity sensors 310 and the second proximity sensor 320, and is used for determining whether the tray 200 in the anti-retest unloading area 121 is correctly arranged according to the signals of the first proximity sensors 310 and the second proximity sensor 320.

[0044] Specifically, as shown in Figure 1 The first proximity sensors 310 are arranged in each unloading area 120, respectively, for detecting whether the tray 200 is put in, and the second proximity sensor 320 is arranged in the anti-retest unloading area 121 and corresponds to the position of the anti-retest part 210, for detecting whether the tray 200 put in the anti-retest unloading area 121 has the anti-retest part 210. Meanwhile, a processing module is further arranged to process the signals of the two sensors, and if both sensors are triggered, it can be judged that the tray in the anti-retest unloading area 121 is correctly arranged; otherwise, it is incorrectly arranged.

[0045] The embodiment of the present disclosure sets the sensor for the anti-retest part, ensures that the type of the tray put in the anti-retest unloading area is correct, prevents the standard tray without the anti-retest part from being put into the anti-retest unloading area, and enables the sorting machine to normally implement the anti-retest function.

[0046] Preferably, the first proximity sensor and the second proximity sensor both adopt photoelectric sensors.

[0047] The embodiment of the present disclosure adopts the photoelectric sensor as the sensor for detecting the tray, which is mature in technology, cheap and easy to obtain, and the signal thereof can be processed by simply designing a circuit, so that the two sensors are used to ensure the correct arrangement of the tray.

[0048] Exemplarily, the first proximity sensor and the second proximity sensor are both NPN type photoelectric sensors; and the processing module is specifically further configured to: perform an OR operation on signals of the first sensor and the second sensor, and determine that the tray in the anti-repeated feeding area is incorrectly arranged when the operation result is a high level.

[0049] Specifically, the NPN type photoelectric sensor outputs a low level when triggered, and outputs a high level otherwise. When the tray in the anti-repeated feeding area is correctly arranged, i.e., a standard tray with an anti-repeated feeding part is arranged, both the first proximity sensor and the second proximity sensor are triggered, and the OR operation result of the outputs of the two sensors is a low level. When the tray arranged in the anti-repeated feeding area does not have an anti-repeated feeding part, the first proximity sensor is triggered, while the second proximity sensor is not triggered, and the output levels are low and high respectively, and the OR operation result of the outputs of the two sensors is a high level. When no tray is arranged in the anti-repeated feeding area, both the first proximity sensor and the second proximity sensor are not triggered, and the OR operation result of the outputs of the two sensors is also a high level. In summary, for the NPN type photoelectric sensor, when the OR operation result is a high level, it indicates that the tray in the anti-repeated feeding area is incorrectly arranged.

[0050] As shown in FIG. 1, the anti-repeated feeding area is provided with a first proximity sensor and a second proximity sensor. Figure 4 FIG. 2 shows a specific circuit for performing the OR operation in the embodiment of the present disclosure, where CN2 is a connector, pin 1 is grounded, pin 2 is connected to a power supply (DC 24V) of a machine, pin 3 is an output pin, pins 4 and 5 are input pins connected to the two proximity sensors respectively; U1 is a voltage stabilizer; U2 is an OR gate operation device, ports A and B are input ports, port GND is grounded, port Y is an output port, and port VCC is connected to the voltage stabilizer U1; D1 and D2 are diodes; R1 to R6 are resistors; F1 is a fuse; C1 and C2 are capacitors; and Q1 and Q2 are triodes.

[0051] When pins 4 and 5 both input a high level, D1 and D2 are not conductive, the input ports A and B of U2 are isolated from the two proximity sensors, and the voltage of the voltage stabilizer U1 is directly input, so the output port Y outputs a high level, and the triodes Q1 and Q2 do not work, and at this time the output port 3 of CN2 outputs a high level.

[0052] When pins 4 and 5 input a low level and a high level respectively, the output port Y of U2 still outputs a high level, and the output port 3 of CN2 outputs a high level.

[0053] When pins 4 and 5 both input a low level, D1 and D2 are conductive, the input ports A and B of U2 both input a low level of the sensor, the output port Y outputs a low level, and the triodes Q1 and Q2 work, and at this time the output port 3 of CN2 outputs a low level.

[0054] Exemplarily, the first proximity sensor and the second proximity sensor are both PNP type photoelectric sensors; and the processing module is further configured to perform an AND operation on the signals of the first proximity sensor and the second proximity sensor, and determine that the tray in the anti-repeated measurement unloading area is incorrectly arranged when the result of the operation is low.

[0055] Specifically, the PNP type photoelectric sensor outputs high level when triggered, and outputs low level otherwise. When the tray in the anti-repeated measurement unloading area is correctly arranged, i.e., a standard tray with an anti-repeated measurement part is arranged, both the first proximity sensor and the second proximity sensor are triggered, and the result of the AND operation on the outputs of the two sensors is high. When the tray arranged in the anti-repeated measurement unloading area does not have an anti-repeated measurement part, the first proximity sensor is triggered, while the second proximity sensor is not triggered, and the output levels are low and high respectively, and the result of the AND operation on the outputs of the two sensors is low. When no tray is arranged in the anti-repeated measurement unloading area, both the first proximity sensor and the second proximity sensor are not triggered, and the result of the AND operation on the outputs of the two sensors is also low. In summary, for the PNP type photoelectric sensor, when the result of the AND operation is low, it indicates that the tray in the anti-repeated measurement unloading area is incorrectly arranged.

[0056] Similarly, when the proximity sensor is a PNP type photoelectric sensor, the corresponding circuit with an AND gate operation device is used to implement the logical operation, which can be easily implemented by those skilled in the art, and thus the embodiments of the present disclosure will not be described here in detail.

[0057] The embodiments of the present disclosure make the tray in the anti-repeated measurement unloading area detectable by performing logical operation on the outputs of the two proximity sensors and providing a specific operation process and determination method, and prevent the tray in the anti-repeated measurement unloading area from being incorrectly arranged or not arranged.

[0058] Exemplarily, the translational sorting machine further comprises an alarm module; the alarm module is electrically connected with the processing module, and is configured to output an alarm signal when the tray in the anti-repeated measurement unloading area is incorrectly arranged.

[0059] Specifically, the processing module outputs a signal to the alarm module, and according to the determination method described above, the alarm module outputs an alarm signal when the signal indicates that the tray is incorrectly arranged; otherwise, the alarm module does not output an alarm signal.

[0060] The embodiments of the present disclosure electrically connect the processing module with the alarm module, so that the alarm module can output an alarm signal when the operation result output by the processing module indicates that the tray is incorrectly arranged, so that the translational sorting machine of the embodiments can timely inform the relevant operators when corresponding faults occur.

[0061] Exemplarily, the signal processing module comprises a circuit board, and a circuit in the circuit board is configured to implement one of the two functions of the signal processing module.

[0062] Another embodiment of the present disclosure provides a chip testing method, which employs the translation-type handler in the above embodiment, and comprises the following steps of:

[0063] Placing the non-retestable chips with unqualified electrical performance test in the tray of the anti-retest unloading area;

[0064] Placing other chips with unqualified electrical performance test in the tray of the loading area;

[0065] Placing the chips with qualified electrical performance test in the tray of the other unloading area.

[0066] Specifically, during the chip testing process, the chips are usually placed in the tray of the loading area, grabbed by the mechanical arm to the testing device for electrical performance test, and the chips with qualified test are placed in the tray of the unloading area by the mechanical arm, while the chips with unqualified test are grabbed to the tray of the loading area for retesting. For the non-retestable chips, if the electrical performance test is qualified, the chips are placed in the tray of the unloading area, and if the electrical performance test is unqualified, the chips are placed in the tray of the anti-retest unloading area. The anti-retest unloading area can be the original manual unloading area, and the non-retestable chips with unqualified test are unloaded by manually taking out the tray.

[0067] The embodiment of the present disclosure places the non-retestable chips with unqualified test in the anti-retest unloading area, and prevents the non-retestable chips on the tray in the anti-retest unloading area from entering the loading area for repeated test by using manual removal and the like.

[0068] Another embodiment of the present disclosure provides a chip testing device, which comprises the translation-type handler in the above embodiment.

[0069] Specifically, the chip testing device usually further comprises a testing module, and after the chips are sorted by the translation-type handler, the chips enter the testing module for electrical performance test, and then enter the translation-type handler again according to the test results of each chip to wait for retesting or move out of the translation-type handler, so as to complete a complete chip testing process.

[0070] The chip testing device of the embodiment of the present disclosure employs the translation-type handler described above, can realize the differential sorting of different chips, and prevents the non-retestable chips from entering the loading area to be retested.

[0071] It is understood that the above embodiments are only exemplary for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Various modifications and improvements can be made by those of ordinary skill in the art without departing from the spirit and essence of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A translational sorter characterized by, The translation sorting machine comprises a machine table having a loading area and a plurality of unloading areas, and a plurality of trays; At least one of the trays is provided with a retest prevention part, and at least one of the unloading areas is configured as a retest prevention unloading area; wherein The tray provided with the retest prevention part is configured in the corresponding retest prevention unloading area for placing chips that have been tested and cannot be tested again, and the remaining trays are configured in the loading area and other unloading areas; The translation sorting machine further comprises a plurality of positioning mechanisms arranged on the machine table, each of which is used to fix a corresponding tray in a corresponding loading area or unloading area; wherein The retest prevention part is arranged on the side of the corresponding tray away from the positioning mechanism; The translation sorting machine further comprises a processing module, a plurality of first proximity sensors, and at least one second proximity sensor; Each of the first proximity sensors is arranged in a corresponding unloading area, and the second proximity sensor is arranged in the corresponding retest prevention unloading area and corresponds to the position of the retest prevention part; The processing module is electrically connected to the first proximity sensors and the second proximity sensor, and is used to determine whether the tray in the retest prevention unloading area is correctly configured according to the signals of the first proximity sensors and the second proximity sensor.

2. The translation sorting machine of claim 1, wherein, The retest prevention part adopts a foolproof block.

3. The translation sorting machine of claim 1, wherein, The first proximity sensor and the second proximity sensor both adopt photoelectric sensors.

4. The translation sorting machine of claim 3, wherein, The first proximity sensor and the second proximity sensor are both NPN type photoelectric sensors; the processing module is specifically further used for performing an OR operation on the signals of the first proximity sensor and the second proximity sensor, and determining that the tray in the retest prevention unloading area is incorrectly configured when the operation result is a high level.

5. The translation sorting machine of claim 3, wherein, The first proximity sensor and the second proximity sensor are both PNP type photoelectric sensors; the processing module is specifically further used for performing an AND operation on the signals of the first proximity sensor and the second proximity sensor, and determining that the tray in the retest prevention unloading area is incorrectly configured when the operation result is a low level.

6. The translation-based sorter of claim 1, wherein, The translation sorting machine further comprises an alarm module; The alarm module is electrically connected to the processing module and is used to output an alarm signal when the tray in the retest prevention unloading area is incorrectly configured.

7. A method of testing a chip, characterized by, The translation sorting machine of any one of claims 1 to 6; the method comprises: Placing non-testable chips that fail the electrical performance test in the tray of the retest prevention unloading area; Placing other chips that fail the electrical performance test in the tray of the loading area; Placing chips that pass the electrical performance test in the tray of other unloading areas.

8. A chip testing apparatus characterized by comprising: The translation sorting machine of any one of claims 1 to 6.

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