A mutual inductance isolation superconducting interface circuit

Abstract

The present invention belongs to the field of superconducting integrated circuits, and specifically relates to a mutual inductance isolation type superconducting interface circuit. The present invention uses a superconducting quantum interference device (SQUID) to preliminarily amplify the tiny output of a front-stage single flux quantum (SFQ) circuit, and the output signal generated under the DC bias of the SQUID is further amplified by a Suzuki Stack, and finally generates an output voltage that can be recognized by a rear-stage CMOS amplifier under the AC bias of the Suzuki Stack; the present invention can recognize a tiny input signal of tens of microamperes by adjusting the number of turns of the coupled inductance coil in the SQUID; through the isolation of the mutual inductance coil, the circuit can be packaged separately, which greatly avoids the influence of the AC bias of the Suzuki Stack on the DC bias of the front and rear stage circuits, and has higher flexibility and practicality than the traditional superconducting interface circuit.

Description

Technical Field

[0001] The invention belongs to the field of superconducting integrated circuits, and in particular relates to a mutual inductance isolation type superconducting interface circuit. Background Art

[0002] The development of the traditional semiconductor industry has reached a bottleneck due to the limitation of the physical size of the device. In order to further improve the performance of chips to meet people's growing needs, many new materials and technologies have been widely used and developed in recent years, including superconducting Josephson digital circuits based on niobium materials. Superconducting digital circuits use single flux quantum (SFQ) circuits as their basic logic gates, which have the characteristics of low power consumption and high speed, and can complete complex functional operations. At present, existing research has explored large-scale single flux quantum processors and energy-saving circuits and achieved certain results, but continuous efforts are still needed to truly apply them in practice.

[0003] A key drawback of SFQ circuits is the lack of large-scale memory. Currently, the mainstream implementation methods are roughly divided into two categories. One is to form memory through Josephson circuits, but due to the low integration and low driving capability of Josephson circuits, it is difficult to build large-scale, high-density low-temperature memory using only superconducting technology; another method to achieve large-scale superconducting memory is to use superconducting-CMOS hybrid circuits. This method not only has the characteristics of high frequency and low power consumption of SFQ circuits, but also can improve the working performance of CMOS circuits because it works at 4K temperature.

[0004] Since there is a huge difference in the working voltage level between superconducting circuits and CMOS circuits, it is necessary to add an interface circuit to amplify the output of the superconducting circuit to achieve the minimum level that the CMOS circuit can recognize. Since the 1960s, in order to realize the signal transmission of superconducting-CMOS circuits, many studies on interface circuits have been carried out, among which there are two mainstream methods: one method is to amplify through a superconducting quantum interference device (SQUID) circuit, and the other method is to amplify through a Suzuki Stack. The former uses a static bias and can output a level signal of several millivolts, so it is usually used as an interface circuit to transmit the signal from a high-speed single flux quantum (RSFQ) circuit to a CMOS circuit, but its biggest disadvantage is that the required layout area is large when outputting a higher voltage. The latter must use an AC bias due to its circuit working characteristics. The Suzuki Stack triggers very quickly, can stably generate an output voltage of more than tens of millivolts, and can adjust the output voltage of the Suzuki Stack by adjusting the number of Josephson Junctions (JJ) in a double-row series structure, but it is difficult to amplify tiny input signals, and the AC bias is easy to affect the front and rear circuits.

[0005] In actual application scenarios, traditional superconducting interface circuits have exposed obvious shortcomings, and it is necessary to propose a circuit that compromises between area and performance to achieve amplification of tiny inputs and isolation between circuits at each level. Summary of the invention

[0006] The present invention proposes a mutual inductance isolation type superconducting interface circuit, such as Figure 1 As shown. This invention uses a mutual inductance coil to isolate the front and rear stages of the circuit, avoiding the influence of the AC bias of the Suzuki Stack on the front and rear stage circuits. The resistance value range of the mutual inductance coil in series is large, which solves the resistance problem caused by cross-chip bonding during independent packaging; it combines the advantages of the SQUID circuit and the Suzuki stack, performs the first stage amplification of the input signal through a two-terminal superconducting quantum interference device (SQUID), and then achieves further amplification through the Suzuki Stack, which has higher flexibility and practicality than the traditional superconducting interface circuit.

[0007] The technical solution of the present invention is:

[0008] A mutual inductance isolation type superconducting interface circuit, comprising a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first Josephson junction J1, a second Josephson junction J2, a third Josephson junction J3 and a double-row series structure formed by 2n Josephson junctions in a Suzuki stack;

[0009] The first connection end of the first inductor L1 is connected to the second connection end of the first resistor R1, the second connection end of the first inductor L1 is connected to the first connection end of the second inductor L2, and the first inductor L1 and the third inductor L3 are coupled to each other;

[0010] A first connection end of the second inductor L2 is connected to a second connection end of the first inductor L1, a second connection end of the second inductor L2 is connected to a ground terminal GND, and the second inductor L2 and the fourth inductor L4 are coupled to each other;

[0011] A first connection end of the third inductor L3 is connected to a first connection end of the first Josephson junction J1, a second connection end of the third inductor L3 is connected to a second connection end of the fourth inductor L4 and a first connection end of the fifth inductor L5, and the third inductor L3 and the first inductor L1 are coupled to each other;

[0012] A first connection end of the fourth inductor L4 is connected to a first end of the second Josephson junction J2, a second connection end of the fourth inductor L4 is connected to a second connection end of the third inductor L3 and a first connection end of the fifth inductor L5, and the fourth inductor L4 and the second inductor L2 are coupled to each other;

[0013] A first connection end of the fifth inductor L5 is connected to a second connection end of the third inductor L3 and a second connection end of the fourth inductor L4, and a second connection end of the fifth inductor L5 is connected to a second connection end of the sixth inductor L6 and a first connection end of the seventh inductor L7;

[0014] A first end of the sixth inductor L6 is connected to the second connection end of the second resistor R2, and a second connection end of the sixth inductor L6 is connected to the second connection end of the fifth inductor L5 and the first connection end of the seventh inductor L7;

[0015] A first connection end of the seventh inductor L7 is connected to a second connection end of the sixth inductor L6 and a second connection end of the fifth inductor L5, and a second connection end of the seventh inductor L7 is connected to a first connection end of the third resistor R3;

[0016] The first connection end of the first resistor R1 is the input end of the mutual inductance isolation type superconducting interface circuit, and the second connection end of the first resistor R1 is connected to the first connection end of the first inductor L1;

[0017] A first connection end of the second resistor R2 is connected to a DC bias of the quantum interference device, and a second connection end of the second resistor R2 is connected to a first connection end of a sixth inductor L6;

[0018] A first connection end of the third resistor R3 is connected to a second connection end of the seventh inductor L7, and a second connection end of the third resistor R3 is connected to a first connection end of the fourth resistor R4 and a first connection end of the third Josephson junction J3;

[0019] A first connection end of the fourth resistor R4 is connected to the second connection end of the third resistor R3 and the first connection end of the third Josephson junction J3, and a second connection end of the fourth resistor R4 is connected to the ground end GND;

[0020] A first connection end of the fifth resistor R5 is connected to a first connection end of the fourth Josephson junction J4, and a second connection end of the fifth resistor R5 is connected to a first connection end of the sixth resistor R6, a second connection end of the seventh resistor R7, and a first connection end of the eighth resistor R8;

[0021] A first connection end of the sixth resistor R6 is connected to a second connection end of the fifth resistor R5, a second connection end of the seventh resistor R7, and a first connection end of the eighth resistor R8, and a second connection end of the sixth resistor R6 is connected to a first connection end of the n+4th Josephson junction Jn+4;

[0022] A first connection end of the seventh resistor R7 is connected to the AC bias of the Suzuki stack, and a second connection end of the seventh resistor R7 is connected to the second connection end of the fifth resistor R5, the first connection end of the sixth resistor R6 and the first connection end of the eighth resistor R8;

[0023] The first connection end of the eighth resistor R8 is connected to the second connection end of the fifth resistor R5, the first connection end of the sixth resistor R6 and the second connection end of the seventh resistor R7, and the second connection end of the eighth resistor R8 is the output end of the mutual inductance isolation type superconducting interface circuit;

[0024] A first connection end of the first Josephson junction J1 is connected to a first connection end of the third inductor L3, and a second connection end of the first Josephson junction J1 is connected to a ground end GND;

[0025] A first connection end of the second Josephson junction J2 is connected to a first connection end of the fourth inductor L4, and a second connection end of the second Josephson junction J2 is connected to a ground end GND;

[0026] A first connection end of the third Josephson junction J3 is connected to a second connection end of the third resistor R3 and a first connection end of the fourth resistor R4, and a second connection end of the third Josephson junction J3 is connected to a first connection end of the n+2 th Josephson junction and a second connection end of the n+1 th Josephson junction Jn+1;

[0027] The double-row series structure in the Suzuki stack is composed of 2n Josephson junctions and a fifth resistor R5 and a sixth resistor R6, wherein the first row of series structures is composed of the fifth resistor R5, the fourth Josephson junction J4 to the n+3rd Josephson junction Jn+3 connected in series and then grounded from top to bottom, and the second row of series structures is composed of the sixth resistor R6, the n+4th Josephson junction Jn+4 to the 2n+3rd Josephson junction J2n+3 connected in series and then grounded from top to bottom;

[0028] The first connection end of the n+1th Josephson node Jn+1 at the input end of the Suzuki stack is connected to the second connection end of the nth Josephson node Jn, and the second connection end of the n+1th Josephson node Jn+1 is connected to the first connection end of the n+2th Josephson node Jn+2 and the second connection end of the third Josephson node J3;

[0029] A first connection end of the n+2 th Josephson junction Jn+2 at the input end of the Suzuki stack is connected to a second connection end of the n+1 th Josephson junction Jn+1 and a second connection end of the third Josephson junction J3.

[0030] In the above scheme, the superconducting quantum interference device is used to receive an input current of about 10uA and generate an output signal under the action of DC bias power supply; the Suzuki stack further amplifies the output signal of the superconducting quantum interference device under the action of AC bias to generate a larger output signal for driving the subsequent circuit.

[0031] Based on the above technical solutions:

[0032] The two pairs of mutually coupled inductors of the superconducting quantum interference device play an isolation role. If a direct connection method is adopted, when the Suzuki stack is triggered to work, the AC bias may flow back to the ground terminal of the previous stage circuit through the output terminal of the previous stage circuit, thereby affecting the effect of its DC bias power supply.

[0033] The superconducting quantum interference device is used to receive an input current of about 10uA and generate a larger output signal under the action of a DC bias power supply. As the first-stage amplification circuit of the mutual inductance isolation superconducting circuit, the amplitude of the output signal depends on the number of mutually coupled coils in the superconducting quantum interference device.

[0034] The main function of the third Josephson junction J3 is to prevent the backflow after the Suzuki stack is triggered from interfering with the normal operation of the previous superconducting quantum interference device.

[0035] The output voltage of the Suzuki stack can be determined by the number of Josephson junctions in the double-row series structure of the Suzuki stack. The more Josephson junctions there are, the higher the output voltage will be, but the stability of the Suzuki stack will be reduced.

[0036] The two resistors closest to the connection point of the dual series structure are used to shunt the AC bias.

[0037] The output end of the Suzuki stack can be connected to a larger inductor and then grounded, and then coupled with the output inductor of the Suzuki stack through an inductor and output to the next stage circuit, which can achieve mutual inductance isolation from the subsequent stage circuit.

[0038] Furthermore, an inductor of several nanohenries is connected in series to the output end of the mutual inductance isolation type superconducting interface circuit and then grounded, so as to perform mutual inductance isolation on the subsequent circuit.

[0039] Due to the mutual inductance isolation, the resistance in series with the mutual inductance has a larger variable range. Therefore, the additional resistance problem caused by wire bonding that needs to be considered when connecting across chips can be ignored. The mutual inductance isolation superconducting interface circuit can be packaged separately on an independent chip.

[0040] Beneficial effects of the present invention: The present invention adopts mutual inductance isolation to avoid the influence of the AC bias of the Suzuki stack on the front and rear circuits, increases the recognition sensitivity of the output signal of the front circuit, successfully realizes the amplification of a small current of about 10uA, and the mutual inductance isolation superconducting interface circuit can be packaged separately, which greatly improves the flexibility and practicality of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1This is the schematic diagram of the invented mutual inductance isolation superconducting circuit. DETAILED DESCRIPTION

[0042] The following will be combined with the attached Figure 1 The present invention is described in detail. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] It should be noted that, in the present invention, relational terms such as first and second are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. For example, the first connection terminal and the second connection terminal of an inductor and a resistor merely represent two connection terminals of an inductor and a resistor, and the first connection terminal and the second connection terminal can be interchangeable.

[0044] The present invention provides a mutual inductance isolation type superconducting interface circuit, comprising a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first Josephson junction J1, a second Josephson junction J2, a third Josephson junction J3 and a double-row series structure formed by 2n Josephson junctions in a Suzuki stack; a first connection end of the first inductor L1 is connected to a second connection end of the first resistor R1, a second connection end is connected to a first connection end of the second inductor L2, and the first inductor L1 is connected to a second connection end of the first resistor R1. L1 and the third inductor L3 are coupled to each other; the first connection end of the second inductor L2 is connected to the second connection end of the first inductor L1, the second connection end is connected to the ground terminal GND, and the second inductor L2 and the fourth inductor L4 are coupled to each other; the first connection end of the third inductor L3 is connected to the first connection end of the first Josephson junction J1, the second connection end is connected to the second connection end of the fourth inductor L4 and the first connection end of the fifth inductor L5, and the third inductor L3 and the first inductor L1 are coupled to each other; the first connection end of the fourth inductor L4 is connected to the first end of the second Josephson junction J2, the second connection end is connected to the second connection end of the third inductor L3 and the first connection end of the fifth inductor L5, and the fourth inductor L4 and the second inductor L2 are coupled to each other; the fifth inductor L5 The first connection end is connected to the second connection end of the third inductor L3 and the second connection end of the fourth inductor L4, and the second connection end is connected to the second connection end of the sixth inductor L6 and the first connection end of the seventh inductor L7; the first end of the sixth inductor L6 is connected to the second connection end of the second resistor R2, and the second connection end is connected to the second connection end of the fifth inductor L5 and the first connection end of the seventh inductor L7; the first connection end of the seventh inductor L7 is connected to the second connection end of the sixth inductor L6 and the second connection end of the fifth inductor L5, and the second connection end is connected to the first connection end of the third resistor R3; the first connection end of the first resistor R1 is the input end of the mutual inductance isolation type superconducting interface circuit, and the second connection end is connected to the first connection end of the first inductor L1; the second resistor R 2 is connected to the DC bias of the quantum interference device, and the second connection end is connected to the first connection end of the sixth inductor L6; the first connection end of the third resistor R3 is connected to the second connection end of the seventh inductor L7, and the second connection end is connected to the first connection end of the fourth resistor R4 and the first connection end of the third Josephson junction J3; the first connection end of the fourth resistor R4 is connected to the second connection end of the third resistor R3 and the first connection end of the third Josephson junction J3, and the second connection end is connected to the ground terminal GND; the first connection end of the fifth resistor R5 is connected to the first connection end of the fourth Josephson junction J4, and the second connection end is connected to the first connection end of the sixth resistor R6, the second connection end of the seventh resistor R7 and the first connection end of the eighth resistor R8;The first connection end of the sixth resistor R6 is connected to the second connection end of the fifth resistor R5, the second connection end of the seventh resistor R7 and the first connection end of the eighth resistor R8, and the second connection end is connected to the first connection end of the n+4th Josephson junction Jn+4; the first connection end of the seventh resistor R7 is connected to the AC bias of the Suzuki stack, and the second connection end is connected to the second connection end of the fifth resistor R5, the first connection end of the sixth resistor R6 and the first connection end of the eighth resistor R8; the first connection end of the eighth resistor R8 is connected to the second connection end of the fifth resistor R5, the first connection end of the sixth resistor R6 and the second connection end of the seventh resistor R7, and the second connection end is the output end of the mutual inductance isolation type superconducting interface circuit; the first connection end of the first Josephson junction J1 is connected to the first connection end of the third inductor L3, and the second connection end is connected to the ground terminal GND; the first connection end of the second Josephson junction J2 is connected to the first connection end of the fourth inductor L4, and the second connection end is connected to the ground terminal GND; the first connection end of the third Josephson junction J3 is connected to the second connection end of the third resistor R3 and the first connection end of the fourth resistor R4 a first connection end, and a second connection end connected to the first connection end of the n+2 Josephson junction and the second connection end of the n+1 Josephson junction Jn+1; the double-row series structure in the Suzuki stack is composed of 2n Josephson junctions and a fifth resistor R5 and a sixth resistor R6, wherein the first row of series structure is composed of the fifth resistor R5, the fourth Josephson junction J4 to the n+3 Josephson junction Jn+3 connected in series and then grounded from top to bottom, and the second row of series structure is composed of the sixth resistor R6, the n+4 Josephson junction Jn+4 to the 2n +3 Josephson junctions J2n+3 are connected in series and then grounded; the first connection end of the n+1th Josephson junction Jn+1 at the input end of the Suzuki stack is connected to the second connection end of the nth Josephson junction Jn, and the second connection end is connected to the first connection end of the n+2th Josephson junction Jn+2 and the second connection end of the third Josephson junction J3; the first connection end of the n+2th Josephson junction Jn+2 at the input end of the Suzuki stack is connected to the second connection end of the n+1th Josephson junction Jn+1 and the second connection end of the third Josephson junction J3;

[0045] Attached Figure 1 In the mutual inductance isolation type superconducting interface circuit, the superconducting quantum interference device (SQUID) is used as the first stage amplifier circuit of the present invention, wherein the mutually coupled first inductor L1 and third inductor L3 satisfy the following equation, and the second inductor L2 and fourth inductor L4 also satisfy the following formula:

[0046]

[0047] In the above formula, M is the mutual inductance coefficient of the two mutually coupled inductors, N is the number of turns of the first inductor L1 and the second inductor L2, the number of turns of the third inductor L3 and the fourth inductor L4 is 1 by default, Lshape is the inductance value of the first inductor L1 extracted from the layout using the InductEx software, k is the coupling coefficient of the mutually coupled inductors, and the input current I1 is initially amplified by the mutual inductance coil to generate the output current I3.

[0048] After the input signal at the input end of the superconducting quantum interference device is coupled to the output end through the mutual inductance coil, the first Josephson junction J1 and the second Josephson junction J2 at the output end are triggered under the combined action of the induced current and the SQUID static bias, thereby generating a stable output signal;

[0049] The main function of the Suzuki Stack is to detect the output signal of the superconducting quantum interference device (SQUID). When the signal output by the SQUID circuit reaches the input end of the Suzuki Stack, the n+2 Josephson junction Jn+2 and the n+3 Josephson junction Jn+3 are triggered by the output signal of the SQUID circuit and the AC bias of the Suzuki Stack. Since the Josephson junction will be converted into a resistive state after being triggered, the current of the two columns of Josephson junctions in the Suzuki Stack will be redistributed. The column without the triggered Josephson junctions will remain in the superconducting state, and the column containing the triggered Josephson junctions will become a resistive state. At this time, the AC bias will all flow to the column of Josephson junctions that maintain the superconducting state. Due to the hysteresis response of the AC Josephson current, the two columns of Josephson junctions will be triggered alternately, and finally a stable output voltage signal will be generated. The output signal is reset only when the AC bias is zero.

[0050] Optionally, the third Josephson junction J3 has the same trigger current as the Josephson junction in the Suzuki stack, and its main function is to avoid backflow after the Suzuki stack is triggered. When the Suzuki stack is triggered, if a large backflow is generated, the third Josephson junction J3 will be triggered to become a resistance state, thereby reducing the backflow.

[0051] Optionally, the output end of the Suzuki stack can be connected in series with an inductor of several nanohenries and then grounded, and then isolated from the next stage circuit through a mutual inductance coil to prevent the AC bias of the Suzuki stack from affecting the DC bias of the subsequent stage circuit.

[0052] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles described in the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A mutual inductance isolation superconducting interface circuit, characterized in that: A double-row series structure comprising a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first Josephson junction J1, a second Josephson junction J2, a third Josephson junction J3 and 2n Josephson junctions in a Suzuki stack; The first connection end of the first inductor L1 is connected to the second connection end of the first resistor R1, the second connection end of the first inductor L1 is connected to the first connection end of the second inductor L2, and the first inductor L1 and the third inductor L3 are coupled to each other; A first connection end of the second inductor L2 is connected to a second connection end of the first inductor L1, a second connection end of the second inductor L2 is connected to a ground terminal GND, and the second inductor L2 and the fourth inductor L4 are coupled to each other; A first connection end of the third inductor L3 is connected to a first connection end of the first Josephson junction J1, and a second connection end of the third inductor L3 is connected to a second connection end of the fourth inductor L4 and a first connection end of the fifth inductor L5; A first connection end of the fourth inductor L4 is connected to a first end of the second Josephson junction J2, and a second connection end of the fourth inductor L4 is connected to a second connection end of the third inductor L3 and a first connection end of the fifth inductor L5; A first connection end of the fifth inductor L5 is connected to a second connection end of the third inductor L3 and a second connection end of the fourth inductor L4, and a second connection end of the fifth inductor L5 is connected to a second connection end of the sixth inductor L6 and a first connection end of the seventh inductor L7; A first end of the sixth inductor L6 is connected to the second connection end of the second resistor R2, and a second connection end of the sixth inductor L6 is connected to the second connection end of the fifth inductor L5 and the first connection end of the seventh inductor L7; A first connection end of the seventh inductor L7 is connected to a second connection end of the sixth inductor L6 and a second connection end of the fifth inductor L5, and a second connection end of the seventh inductor L7 is connected to a first connection end of the third resistor R3; The first connection end of the first resistor R1 is the input end of the mutual inductance isolation type superconducting interface circuit, and the second connection end of the first resistor R1 is connected to the first connection end of the first inductor L1; A first connection end of the second resistor R2 is connected to a DC bias of a superconducting quantum interference device, and a second connection end of the second resistor R2 is connected to a first connection end of a sixth inductor L6; A first connection end of the third resistor R3 is connected to a second connection end of the seventh inductor L7, and a second connection end of the third resistor R3 is connected to a first connection end of the fourth resistor R4 and a first connection end of the third Josephson junction J3; A first connection end of the fourth resistor R4 is connected to the second connection end of the third resistor R3 and the first connection end of the third Josephson junction J3, and a second connection end of the fourth resistor R4 is connected to the ground end GND; A first connection end of the fifth resistor R5 is connected to a first connection end of the fourth Josephson junction J4, and a second connection end of the fifth resistor R5 is connected to a first connection end of the sixth resistor R6, a second connection end of the seventh resistor R7, and a first connection end of the eighth resistor R8; A first connection end of the sixth resistor R6 is connected to a second connection end of the fifth resistor R5, a second connection end of the seventh resistor R7, and a first connection end of the eighth resistor R8, and a second connection end of the sixth resistor R6 is connected to a first connection end of the n+4th Josephson junction Jn+4; A first connection end of the seventh resistor R7 is connected to the AC bias of the Suzuki stack, and a second connection end of the seventh resistor R7 is connected to the second connection end of the fifth resistor R5, the first connection end of the sixth resistor R6 and the first connection end of the eighth resistor R8; The first connection end of the eighth resistor R8 is connected to the second connection end of the fifth resistor R5, the first connection end of the sixth resistor R6 and the second connection end of the seventh resistor R7, and the second connection end of the eighth resistor R8 is the output end of the mutual inductance isolation type superconducting interface circuit; A first connection end of the first Josephson junction J1 is connected to a first connection end of the third inductor L3, and a second connection end of the first Josephson junction J1 is connected to a ground end GND; A first connection end of the second Josephson junction J2 is connected to a first connection end of the fourth inductor L4, and a second connection end of the second Josephson junction J2 is connected to a ground end GND; A first connection end of the third Josephson junction J3 is connected to a second connection end of the third resistor R3 and a first connection end of the fourth resistor R4, and a second connection end of the third Josephson junction J3 is connected to a first connection end of the n+2 th Josephson junction and a second connection end of the n+1 th Josephson junction Jn+1; The double-row series structure in the Suzuki stack is composed of 2n Josephson junctions and a fifth resistor R5 and a sixth resistor R6, wherein the first row of series structures is composed of the fifth resistor R5, the fourth Josephson junction J4 to the n+3rd Josephson junction Jn+3 connected in series and then grounded from top to bottom, and the second row of series structures is composed of the sixth resistor R6, the n+4th Josephson junction Jn+4 to the 2n+3rd Josephson junction J2n+3 connected in series and then grounded from top to bottom; The first connection end of the n+1th Josephson node Jn+1 at the input end of the Suzuki stack is connected to the second connection end of the nth Josephson node Jn, and the second connection end of the n+1th Josephson node Jn+1 is connected to the first connection end of the n+2th Josephson node Jn+2 and the second connection end of the third Josephson node J3; A first connection end of the n+2 th Josephson junction Jn+2 at the input end of the Suzuki stack is connected to a second connection end of the n+1 th Josephson junction Jn+1 and a second connection end of the third Josephson junction J3.

2. A mutual inductance isolation type superconducting interface circuit according to claim 1, characterized in that: An inductor is connected in series at the output end of the mutual inductance isolation type superconducting interface circuit and then grounded, so as to perform mutual inductance isolation on the subsequent circuit.

3. A mutual inductance isolation type superconducting interface circuit according to claim 2, characterized in that: The mutual inductance isolation type superconducting interface circuit is packaged separately.

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