Preparation Method of Self-Quenching Ring Structure of Indium Gallium Arsenide Geiger Avalanche Diode

Abstract

The present invention belongs to the technical field of semiconductor optoelectronic devices, and discloses a preparation method for an indium gallium arsenide Geiger avalanche diode self-quenching ring structure. By using a surface shallow Zn diffusion process, shallow Zn diffusion is directly carried out on the i InP top layer on the surface of the indium gallium arsenide Geiger avalanche diode to prepare a Zn-doped self-quenching ring structure, which serves as the passive quenching resistance of the indium gallium arsenide Geiger avalanche diode itself. The present invention solves the problems of high after-pulses and long dead time existing in indium gallium arsenide Geiger avalanche diodes for free-mode photon counting. By realizing in-situ passive quenching with low parasitic effects, the maximum counting rate of indium gallium arsenide Geiger avalanche diodes is effectively improved, meeting the requirements of single-photon counting detection.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor optoelectronic devices, and relates to an indium gallium arsenide Geiger avalanche diode, specifically to a preparation method for the self-quenching ring structure of an indium gallium arsenide Geiger avalanche diode. Background Art

[0002] The indium gallium arsenide Geiger avalanche diode is a single-photon sensitive all-solid-state semiconductor device, which has the characteristics of high near-infrared sensitivity, low dark count, small after-pulse, fast response speed, high integration, good reliability, strong anti-interference ability, and strong environmental adaptability. It has very wide application requirements in the fields of ultra-long-distance detection, quantum information regulation, space communication networking, environmental situation awareness, etc.

[0003] When the indium gallium arsenide Geiger avalanche diode is used in applications such as free-mode single-photon counting, due to large after-pulses and long dead times, it is restricted in many application fields. In order to improve the problems existing in the traditional indium gallium arsenide Geiger avalanche diode, the main solution for the current low-noise indium gallium arsenide Geiger avalanche diode is to adopt the scheme of integrating the Geiger avalanche diode with a quenching resistor to form an integrated quenching indium gallium arsenide Geiger avalanche diode. At this time, the parasitic capacitance can be almost ignored, which can greatly accelerate the quenching of the indium gallium arsenide Geiger avalanche diode and suppress the occurrence of after-pulse phenomena caused by the capture of photo-generated carriers or dark carriers by the material trap capture centers.

[0004] The currently adopted technical solutions include: one is to introduce a transient carrier buffer layer as a quenching resistor in the heteroepitaxial material of the indium gallium arsenide Geiger avalanche diode, and use the energy band barrier of the heterojunction structure to modulate the carrier transport process of the device to achieve self-quenching and self-recovery, which has a relatively fast quenching speed, but the recovery time is very long. At the same time, due to the very difficult epitaxial growth of the material of the transient carrier buffer layer, the dark count rate of the device is often very high; the other is to integrate a thin-film resistor on the surface of the indium gallium arsenide Geiger avalanche diode as a quenching resistor. By introducing a high-resistance thin-film resistor, passive self-quenching and self-recovery can also be achieved. At the same time, because the thin-film resistor is integrated near the surface of the indium gallium arsenide Geiger avalanche diode, the length of the interconnection leads is reduced, and its parasitic parameters such as distributed inductance and capacitance are smaller, which has the characteristics of faster quenching speed and greatly reduced avalanche charge. However, the disadvantage is that the thin-film resistor preparation process needs to be added on the basis of the standard semiconductor chip preparation process. Since the thin-film resistor preparation process is relatively complex and the process temperature is relatively high, it may cause thermal degradation of the indium gallium arsenide Geiger avalanche diode, so it is also very difficult to implement technically. Summary of the Invention

[0005] (1) Object of the Invention

[0006] The object of the present invention is to provide a preparation method for the self - quenching ring structure of an indium gallium arsenide Geiger avalanche diode, so as to solve the problems of high after - pulse and long dead time existing in indium gallium arsenide Geiger avalanche diodes for free - mode photon counting. By realizing in - situ passive quenching with low parasitic effects, the maximum counting rate of indium gallium arsenide Geiger avalanche diodes is effectively improved to meet the requirements of single - photon counting detection.

[0007] (II) Technical solution

[0008] To solve the above - mentioned technical problems, the present invention provides a preparation method for the self - quenching ring structure of an indium gallium arsenide Geiger avalanche diode, which includes the following steps:

[0009] First, adopt the metal - organic chemical vapor deposition (MOCVD) hetero - epitaxial growth process to epitaxially grow an n + InP buffer layer 2, an i InGaAs absorption layer 3, an i InGaAsP transition layer 4, an n + InP charge layer 5, and an i InP top layer 6 on an n + InP substrate 1 in sequence.

[0010] Second, adopt the photolithography combined with selective area doping process to prepare a convex PN - junction high - concentration diffusion region 7 on the i InP top layer 6 through two - step diffusion;

[0011] Third, adopt the photolithography combined with selective area doping process to prepare a Zn - doped self - quenching ring 8 structure corresponding to the convex PN - junction high - concentration diffusion region 7 on the i InP top layer 6 through low - temperature diffusion;

[0012] Fourth, adopt the plasma - enhanced chemical vapor deposition (PECVD) passivation process to prepare a SiNx passivation layer, which covers the i InP top layer 6, leaving an electrical connection channel for easy connection with the convex PN - junction high - concentration diffusion region 7 and the Zn - doped self - quenching ring 8 to electrodes;

[0013] Fifth, adopt the magnetron sputtering metal film deposition process to prepare a p - electrode 10, which forms an ohmic contact with the convex PN - junction high - concentration diffusion region 7 and the Zn - doped self - quenching ring 8.

[0014] Sixth, adopt the magnetron sputtering metal film deposition process to prepare an electrode pad 11, so that the p - electrode 10 of the Geiger avalanche diode is connected through the Zn - doped self - quenching ring 8 structure to the electrode pad 11, serving as a series resistance at the p - output end of a Geiger avalanche diode.

[0015] Seventh, adopt processes such as electron - beam evaporation metal film deposition, PECVD passivation film deposition, and ICP antireflection film deposition to prepare a light - incident hole on the back of the chip that precisely corresponds to the position of the convex PN - junction high - concentration diffusion region 7.

[0016] (III) Beneficial effects

[0017] The preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure provided by the above technical solution adopts a surface shallow Zn diffusion process, directly performs shallow Zn diffusion on the i InP top layer on the surface of the indium gallium arsenide Geiger avalanche diode to prepare a Zn-doped self-quenching ring structure, which serves as the passive quenching resistance of the indium gallium arsenide Geiger avalanche diode itself, solves the problems of high after-pulse and long dead time existing in the indium gallium arsenide Geiger avalanche diode for free-mode photon counting, and effectively improves the maximum counting rate of the indium gallium arsenide Geiger avalanche diode by realizing in-situ passive quenching with low parasitic effects, meeting the single-photon counting detection requirements. Brief Description of the Drawings

[0018] Figures 1 to 3 They are respectively diagrams showing the preparation process of the method of the present invention. Detailed Embodiments

[0019] To make the objectives, contents and advantages of the present invention clearer, the following further describes in detail the specific embodiments of the present invention with reference to the drawings and embodiments.

[0020] According to the preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure of the present invention, the MOCVD heteroepitaxial process is adopted, a 2-inch InP wafer is used as the substrate, and an indium gallium arsenide / indium phosphide heterojunction epitaxial material with an absorption multiplication separation (SACGM) structure is epitaxially grown. The surface shallow Zn diffusion process is adopted to directly perform shallow Zn diffusion on the iInP top layer on the surface of the indium gallium arsenide Geiger avalanche diode to prepare a Zn-doped self-quenching ring structure, which serves as the passive quenching resistance of the indium gallium arsenide Geiger avalanche diode itself. A very small physical distance is maintained between this structure and the high-concentration diffusion region of the convex PN junction formed by two diffusions, so as to realize in-situ passive quenching with low parasitic effects, and prepare an indium gallium arsenide Geiger avalanche diode with an integrated passive quenching resistance.

[0021] Based on this material, a self-quenching indium gallium arsenide Geiger avalanche diode is developed. As an embodiment of the present invention, it includes the following steps:

[0022] In the first step, using an MOCVD deposition device, on an n+InP substrate 1 with a thickness of 350 μm and a doping concentration of 3 - 8E18 cm -3 , through the material epitaxial growth process, an n+InP buffer layer 2 with a thickness of 0.5 μm and a doping concentration of 1E18 cm -3 , an unintentionally doped i InGaAs absorption layer 3 with a thickness of 1.5 μm, an unintentionally doped i InGaAsP transition layer 4 with a thickness of 0.1 μm, an n+InP charge layer 5 with a thickness of 0.2 μm and a doping concentration of 1E17 cm -3 , and an I InP top layer 6 with a thickness of 3 μm and unintentional doping are sequentially epitaxially grown. See the appendix Figure 1 .

[0023] In the second step, a photolithography combined with selective area doping process is adopted. Through two selective area high-temperature diffusion doping processes, a convex PN junction high-concentration diffusion region 7 is prepared on the i InP top layer 6. The diameter of the deep doping region of the convex PN junction is 10 μm, the doping depth is 2 μm, the diameter of the shallow doping region is 15 μm, and the doping depth is 1.5 μm. See the appendix Figure 2 .

[0024] In the third step, a photolithography combined with selective area doping process is adopted. Through a low-temperature diffusion process, a ring concentric with the pattern of the circular convex PN junction high-concentration diffusion region 7 is prepared on the i InP top layer 6, that is, the corresponding Zn-doped self-quenching ring 8 structure. The outer diameter of the Zn-doped self-quenching ring 8 is 35 μm, the inner diameter is 25 μm, and the doping depth is 0.3 μm. See the appendix Figure 2 .

[0025] In the fourth step, a plasma-enhanced chemical vapor deposition (PECVD) passivation process is adopted to prepare a 0.3-μm-thick SiNx passivation layer 9, which covers the i InP top layer 6, leaving an electrical connection channel for easy connection with the convex PN junction high-concentration diffusion region 7 and the Zn-doped self-quenching ring 8 to the electrodes. See the appendix Figure 2 .

[0026] In the fifth step, a magnetron sputtering metal film deposition process is adopted to prepare a 0.5-μm-thick titanium-platinum p electrode 10, which forms an ohmic contact with the convex PN junction high-concentration diffusion region 7 and the Zn-doped self-quenching ring 8. See the appendix Figure 2 .

[0027] In the sixth step, a magnetron sputtering metal film deposition process is adopted to prepare an electrode pad 11 for metal wire bonding, so that the p electrode 10 of the Geiger avalanche diode is connected to the electrode pad 11 through the Zn-doped self-quenching ring 8 structure, serving as a series resistance at the p output end of a Geiger avalanche diode. See the appendix Figure 3 .

[0028] The doping depth of the Zn-doped self-quenching ring 8 structure is 0.2 μm to 0.5 μm; the resistance of the Zn-doped self-quenching ring 8 structure is 300 kΩ to 400 kΩ.

[0029] In the seventh step, processes such as electron beam evaporation metal film deposition, PECVD passivation film deposition, and ICP antireflection film deposition are adopted to prepare a light incident hole on the back of the chip that corresponds precisely to the position of the convex PN junction high-concentration diffusion region 7.

[0030] After testing and evaluation, according to the preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure described in the present invention, a self-quenching indium gallium arsenide Geiger avalanche diode is prepared, and the quenching resistance formed by the shallow Zn diffusion therein is 300 kΩ to 350 kΩ. The indium gallium arsenide Geiger avalanche diode realizes an ultra-low noise self-quenching Geiger avalanche with a dark count rate of less than 1000 Hz.

[0031] It can be seen from the above technical solutions that the present invention has the following remarkable features:

[0032] (1) An indium gallium arsenide / indium phosphide heterojunction epitaxial material with an absorption multiplication separation (SACGM) structure is epitaxially grown on an InP wafer substrate. Shallow Zn diffusion is directly carried out on the surface of the indium gallium arsenide Geiger avalanche diode to form a Zn-doped self-quenching ring structure, which serves as the passive quenching resistance of the indium gallium arsenide Geiger avalanche diode itself, realizing in-situ passive quenching with low parasitic effects and effectively improving the suppression effect on the afterpulse of the device.

[0033] (2) Based on the MOCVD heteroepitaxial technology, shallow Zn diffusion is directly carried out on the i InP top layer on the surface of the indium gallium arsenide Geiger avalanche diode, and a Zn-doped self-quenching ring structure is formed through low-temperature diffusion. The physical distance between this structure and the high-concentration diffusion region of the convex PN junction formed by two diffusions is very small, realizing in-situ passive quenching with low parasitic effects, solving the problem that the traditional non-integrated passive quenching resistance introduces too large a parasitic resistance and reduces the response characteristics of the device, and effectively improving the suppression effect on the afterpulse of the device.

[0034] (3) Innovatively, it is proposed to directly carry out shallow Zn diffusion on the surface of the indium gallium arsenide Geiger avalanche diode to form a Zn-doped self-quenching ring structure, which serves as the passive quenching resistance of the indium gallium arsenide Geiger avalanche diode itself, realizing in-situ passive quenching with low parasitic effects.

[0035] (4) The method of the present invention can provide a reference for the design and preparation of indium gallium arsenide Geiger avalanche diodes. The indium gallium arsenide Geiger avalanche diode prepared according to the method of the present invention realizes the optoelectronic performance of the device with an ultra-low dark count rate of 1000 Hz and an ultra-low afterpulse of 10% @ 1 μs, and the method is practical and feasible.

[0036] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.

Claims

1. A preparation method for the self-quenching ring structure of an indium gallium arsenide Geiger avalanche diode, characterized in that, It includes the following steps: First step: Adopt the metalorganic chemical vapor deposition (MOCVD) heteroepitaxial growth process to epitaxially grow an n+InP buffer layer (2), an i InGaAs absorption layer (3), an i InGaAsP transition layer (4), an n+InP charge layer (5), and an i InP top layer (6) in sequence on an n+InP substrate (1). Second step: Adopt the photolithography combined with selective area doping process to prepare a convex PN junction high-concentration diffusion region (7) on the i InP top layer (6) through two diffusions. Third step: Adopt the photolithography combined with selective area doping process to prepare a Zn-doped self-quenching ring (8) structure corresponding to the convex PN junction high-concentration diffusion region (7) on the i InP top layer (6) through low-temperature diffusion. Fourth step: Adopt the plasma-enhanced chemical vapor deposition (PECVD) passivation process to prepare a SiNx passivation layer, covering the i InP top layer (6), leaving an electrical connection channel for facilitating the connection of the convex PN junction high-concentration diffusion region (7) and the Zn-doped self-quenching ring (8) with electrodes. Fifth step: Adopt the magnetron sputtering metal film deposition process to prepare a p electrode (10), and form an ohmic contact with the convex PN junction high-concentration diffusion region (7) and the Zn-doped self-quenching ring (8). Sixth step: Adopt the magnetron sputtering metal film deposition process to prepare an electrode pad (11), so that the p electrode (10) of the Geiger avalanche diode is connected through the Zn-doped self-quenching ring (8) structure to the electrode pad (11), serving as a series resistance of the p output terminal of a Geiger avalanche diode. Seventh step: Adopt the electron beam evaporation metal film deposition, PECVD passivation film deposition, and ICP antireflection film deposition processes to prepare a light incident hole corresponding to the position of the convex PN junction high-concentration diffusion region (7) on the back of the chip.

2. The preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 1, characterized in that, In the first step, the thickness of the n+ InP substrate (1) is 350 μm, and the doping concentration is 3 - 8E18 cm -3 , and an n+ InP buffer layer (2) with a thickness of 0.5 μm and a doping concentration of 1E18 cm -3 , an unintentionally doped iInGaAs absorption layer (3) with a thickness of 1.5 μm, an unintentionally doped iInGaAsP transition layer (4) with a thickness of 0.1 μm, and an n+ InP charge layer (5) with a thickness of 0.2 μm and a doping concentration of 1E17 cm -3 are sequentially epitaxially grown on the n+ InP substrate (1), and an unintentionally doped I InP top layer (6) with a thickness of 3 μm.

3. The method for preparing the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 2, wherein, In the second step, the diameter of the convex PN junction high-concentration diffusion region (7) is 10 μm, the doping depth is 2 μm, the diameter of the lightly doped region is 15 μm, and the doping depth is 1.5 μm.

4. The method for preparing the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 3, characterized in that, In the third step, the outer diameter of the Zn-doped self-quenching ring (8) structure is 35 μm, the inner diameter is 25 μm, and the doping depth is 0.3 μm.

5. The method for preparing the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 4, characterized in that, In the fourth step, the thickness of the SiNx passivation layer (9) is 0.3 μm.

6. The preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 5, characterized in that, In the fifth step, the p electrode (10) is a titanium-platinum electrode with a thickness of 0.5 μm.

7. The preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 6, characterized in that, In the sixth step, the doping depth of the Zn-doped self-quenching ring (8) structure is 0.2 μm to 0.5 μm.

8. The preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to claim 7, wherein, In the sixth step, the resistance of the Zn-doped self-quenching ring (8) structure is 300 kΩ to 400 kΩ.

9. An indium gallium arsenide Geiger avalanche diode self-quenching ring structure, characterized in that, It is obtained by the preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to any one of claims 1-8.

10. An application of the preparation method of the indium gallium arsenide Geiger avalanche diode self-quenching ring structure according to any one of claims 1-8 in the technical field of semiconductor optoelectronic devices.

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