1701results about "Circuit precursor manufacture" patented technology

A method for electrophoretic deposition of ceramic particles as a green body shaped as a dental appliance, the method comprising the steps of (a) forming a suspension of the ceramic particles in a first polar solvent, the ceramic particles constituting at least about 5% of the first suspension by weight; (b) passing a direct electrical current through the first suspension, using a deposition electrode shaped as the dental appliance to form a green body; (c) coating the green body with glass particles; and (d) sintering the resultant coated body for obtaining a glass coated all-ceramic dental appliance.

A printed wiring board is manufactured by a method in which an alignment mark is formed in a metal foil, a bump is formed on the metal foil at a position determined based on the alignment mark, an electronic component is aligned with the bump based on the alignment mark, the electronic component is connected with the bump, and an insulation layer is formed over the electronic component.

The present invention provides a substrate for flexible wiring comprises a liquid crystalline polyester layer and a copper foil with a thickness of 5 μm or less. The substrate has a large adhesion between the resin layer and the copper foil, and is sufficient in water absorbing property and electrical properties.

The invention discloses a resin composition and a use thereof. The resin composition comprises modified polyphenyl ether and organic silicon compound containing an unsaturated double bond. The invention further discloses a manufacturing method for a high frequency circuit base plate by the resin composition and a high frequency circuit base plate manufactured by the manufacturing method. The high frequency circuit base plate has a high glass transition temperature, a high thermal decomposition temperature, high interlayer bonding force, a low dielectric constant and tangent low-medium loss, and is very suitable for being used as a circuit base plate of a high frequency electronic device.

The halogen-free resin composition comprises (A)100 parts by weight of cyanate ester resin; (B) 5 to 50 parts by weight of styrene-maleic anhydride; (C) 5 to 100 parts by weight of polyphenylene oxide resin; (D) 5 to 100 parts by weight of maleimide; (E) 10 to 150 parts by weight of phosphazene; and (F) 10 to 1000 parts by weight of inorganic filler. By using specific components at specific proportions, the halogen-free resin composition of the invention offers the features of low dielectric constant, low dissipation factor, high heat resistance and high flame retardancy, and can be made into prepreg or resin film, and thereby used in copper clad laminate or printed circuit board.

A circuit substrate manufacturing method of the present invention includes the steps of preparing a substrate on which a metallic foil made of a first metal (copper) is formed in a releasable state, forming a build-up wiring including a metal layer made of a second metal (solder) on the metallic foil, obtaining a circuit member having a structure that the build-up wiring is formed on the metallic foil by releasing the metallic foil from the substrate, and exposing the metal layer by removing selectively the metallic foil of the circuit member with respect to the metal layer.

Process to improve adhesion of dielectric materials to a metal layer, including providing an unpatterned metal layer having a first major surface; micro-roughening the first major surface to form a micro-roughened surface; and etching the metal layer to form a circuit pattern in the metal layer, in which the micro-roughening is carried out prior to the etching.

A circuit substrate manufacturing method including the steps of preparing a substrate on which a metallic foil is formed in a releasable state, forming a build-up wiring on the metallic foil, obtaining a circuit member having a structure that the build-up wiring is formed on the metallic foil by releasing the metallic foil from the substrate, and exposing a lowest wiring layer of the build-up wiring by removing the metallic foil of the circuit member.

In a method of manufacturing a wiring substrate of the present invention, first, a structure in which an underlying layer is arranged in a wiring forming area of a temporary substrate and a peelable multi-layer metal foil that is larger in size than the underlying layer is arranged on the underlying layer and is adhered partially to an outer peripheral portion of the wiring forming area of the temporary substrate, and the peelable multi-layer metal foil is constructed by temporary adhering a first metal foil and a second metal foil with peelable. Then, a built-up wiring layer is formed on the peelable multi-layer metal foil, and the peelable multi-layer metal foil is separated from the temporary substrate by cutting a portion of such a structure that the underlying layer, the peelable multi-layer metal foil, and the built-up wiring layer are formed on the temporary substrate, the portion corresponding to a peripheral portion the underlying layer, whereby a wiring member in which the built-up wiring layer is formed on the peelable multi-layer metal foil is obtained.

A metal-foil-clad composite ceramic board produced by impregnating a sintered substrate (II) of an inorganic continuously porous sintered body (I) having a true porosity of 12 to 50% and an open porosity of at least 10%, with a thermosetting resin (R) under vacuum, to form a resin-imprgnated sintered substrate (IIR), stacking a metal foil on the resin-impregnated sintered substrate (IIR) and press-forming the resultant laminate, wherein the stacked metal foil has a 10-point average surface roughness Rz of 10 mu m or less, and the resin-impregnated sintered substrate (IIR) and the metal foil have substantially no adhesive layer therebetween or have an adhesive layer having a thickness of 10 mu m or less therebetween.

A method of manufacturing according to an embodiment of the present invention includes forming a seed metal layer 20a on a supporting substrate 70, forming an interconnect layer 10 including an interconnect 18 on the seed metal layer 20a, removing the supporting substrate 70 after forming the interconnect layer 10, and patterning the seed metal layer 20a thus to form an interconnect 20 after removing the supporting substrate.

An object of the present invention is to produce an ultra-thin copper foil with a carrier which has few pinholes and small surface roughness and which has an the thickness of less than 5 μm, and to produce the method of producing the foil, and further to produce a printed circuit board for fine pattern, a multilayer printed circuit board and a chip on film circuit board by using the ultra-thin copper foil with a carrier. The present invention provides an ultra-thin copper foil with a carrier produced by stacking a peeling layer and an ultra thin copper foil in order on the surface of a carrier copper foil which is made smooth so that the mean surface roughness of at least one side is Rz of 0.01 to 2.0 μm by the chemical polishing, the electrochemical dissolution, or the smoothing plating processing method independently, combining two or more, or further combining the mechanical polishing.

A multi-layer wiring board without a core substrate includes: a multi-layer laminated structure; first terminals provided on a front surface of the multi-layer laminated structure; second terminals provided on a rear surface of the multi-layer laminated structure; terminal pins bonded to a corresponding one of the second terminals, wherein each of the terminal pins is formed in a nailhead shape that includes a shaft portion and a head portion, and a diameter of the head portion is larger than that of the shaft portion; and a reinforcing plate which has pin insertion openings formed at positions corresponding to the terminal pins and which is fixed to the rear surface, wherein the diameter of the pin insertion openings is smaller than the diameter of the head portion and is larger than the diameter of the shaft portion.

The present invention is to provide an ultra-thin copper foil with a carrier which comprises a release layer, a diffusion preventive layer and a copper electroplating layer laminated in this order, or a diffusion preventive layer, a release layer and a copper electroplating layer laminated in this order on the surface of a carrier foil, wherein a surface of the copper electroplating layer is roughened; a copper-clad laminated board comprising the ultra-thin copper foil with a carrier being laminated on a resin substrate; a printed wiring board comprising the copper-clad laminated board on the ultra-thin copper foil of which is formed a wiring pattern; and a multi-layered printed wiring board which comprising a plural number of the above printed wiring board being laminated.

A method is provided for fabricating a double-sided wiring board for mounting an electronic component thereon having metal wiring patterns formed both on upper and lower sides of an electrically-insulating board. The metal wiring patterns are electrically connected each other through a through-hole and / or a blind via-hole. The method has the steps of: laminating a metal layer with a support substrate on at least one side of the electrically-insulating board; removing the support substrate from the metal layer so that the metal layer is left on the electrically-insulating board; and forming the through-hole and / or the blind via-hole in the electrically-insulating board.

A multi-layer wiring board without a core substrate includes: a multi-layer laminated structure; first terminals provided on a front surface of the multi-layer laminated structure; second terminals provided on a rear surface of the multi-layer laminated structure; a solder resist which covers the rear surface and which has solder resist openings formed at positions corresponding to the second terminals; a reinforcing plate which is made of a non-metal material and which has reinforcing plate openings formed at positions corresponding to the second terminals; and an adhesive layer interposed between the solder resist and the reinforcing plate to fix the reinforcing plate to the solder resist and which includes adhesive layer openings formed at positions corresponding to the second terminals. A diameter of the solder resist openings and a diameter of the reinforcing plate openings are smaller than that of the adhesive layer openings.

The present invention provides a method for producing a laminate suitable for a flexible circuit board which is free from visual defects such as wrinkles and curls that appear when a plurality of laminating materials containing a thermally fusible laminating material are formed by thermally laminating these materials each other using a thermal-press forming device, which comprises the steps of: arranging a heat resistant protective material between a pressing surface and the laminating materials, laminating the materials by thermal pressure at not lower than 200° C., wherein the bonded laminating materials are in contact with the protective material, cooling the bonded laminating materials, and peeling off the protective material from the bonded laminating materials, whereby the laminate with less nonuniformity in pressurization, a uniform surface, and a good inter-layer adhesion, and the method and device for producing the laminate can be provided, more particularly, the thermal pressure and forming is performed by a thermal-press forming device having at least a pair of metal rolls.

Methods for minimizing warpage of a welded foil carrier structure used in the packaging of integrated circuits are described. Portions of a metallic foil are ultrasonically welded to a carrier to form a foil carrier structure. The ultrasonic welding helps define a panel in the metallic foil that is suitable for packaging integrated circuits. Warpage of the thin foil can be limited in various ways. By way of example, an intermittent welding pattern that extends along the edges of the panel may be formed. Slots may be cut to define sections in the foil carrier structure. Materials for the metallic foil and the carrier may be selected to have similar coefficients of thermal expansion. An appropriate thickness for the metallic foil and the carrier may be selected, such that the warpage of the welded foil carrier structure is limited when the foil carrier structure is subjected to large increases in temperature. Foil carrier structures for use in the above methods are also described.

The invention relates to a steel plate clad cutting device, in particular to a steel plate clad cutting device for circuit board production. The steel plate clad cutting device for the circuit board production aims to achieve the technical effects of being light, handy, high in cutting precision and good in cutting effect. The steel plate clad cutting device for the circuit board production comprises a base plate, a left frame, a first sliding block, a first sliding rail, a lifting device, a top plate, a moving device, a lifting rod, an installation rod, a second motor, a blade, a first support and the like. The left frame is welded to the left side of the top of the base plate. A right frame is welded to the right side of the top of the base plate. The top plate is welded to the top ends of the left frame and the right frame. The lifting device is arranged in the middle of the bottom of the top plate. According to the steel plate clad cutting device for the circuit board production, a worker manually shakes a rocker bar, the lifting device is controlled to move up and down, the height of the blade is controlled to be more appropriate, the cutting effect is better, and the blade is driven to move leftwards and rightwards through the moving device.

A wiring board includes: a flexible insulating base 1; a plurality of conductive wirings 2 arranged on the flexible insulating base 1; protruding electrodes 3 provided respectively at an end portion of the same side of each of the conductive wirings; external terminals 4, 5 formed respectively at the other end portions of each of the conductive wirings; metal plating layers applied on the conductive wirings, the protruding electrodes and the external terminals; and solder resist layers 7 formed respectively by coating the conductive wirings in regions between the end portions at which the protruding electrodes are provided and the external terminals. In the regions where the solder resist layers are formed, no metal plating layers are formed on the conductive wirings, and the surfaces of the conductive wirings to be contacted with the flexible insulating base are rougher than the surfaces not to be contacted with the flexible insulating base. Even when a film base is thin, bending stress applied to the conductive wirings is relieved sufficiently, and thus breaks in the wirings are suppressed.

The halogen-free resin composition comprises (A) 100 parts by weight of cyanate ester resin; (B) 5 to 50 parts by weight of styrene-maleic anhydride; (C) 5 to 100 parts by weight of polyphenylene oxide resin; (D) 10 to 150 parts by weight of phosphazene; and (E) 10 to 1000 parts by weight of inorganic filler. By using specific components at specific proportions, the halogen-free resin composition offers the features of low dielectric constant, low dissipation factor, high heat resistance and high flame retardancy, and can be made into prepreg or resin film, and thereby used in copper clad laminate or printed circuit board.

An object of the present invention is to provide a copper foil with carrier sheet which permits releasing of the carrier sheet from the copper foil layer even when hot pressing at a temperature exceeding 300° C. is applied in the production of a printed wiring board. In order to achieve the object, a copper foil with physically releasable carrier sheet having a copper foil layer on the surface of the carrier sheet through a bonding interface layer, characterized in that the bonding interface layer is composed of a metal layer and a carbon layer. It is preferable for the bonding interface layer to be composed of a metal layer of 1 nm to 50 nm thick and a carbon layer of 1 nm to 20 nm thick.

A method of manufacturing according to an embodiment of the present invention includes forming a seed metal layer 20a on a supporting substrate 70, forming an interconnect layer 10 including an interconnect 18 on the seed metal layer 20a, removing the supporting substrate 70 after forming the interconnect layer 10, and patterning the seed metal layer 20a thus to form an interconnect 20 after removing the supporting substrate.

The invention discloses a preparation method of PTFE (Polytetrafluoroethylene) copper clad laminate. The method comprises the following steps: 1, uniformly mixing raw material components of ceramic powder, silane coupling agents, deionized water and PTFE emulsion to form a PTFE glue solution; 2, soaking glass fiber cloth in the PTFE glue solution at a constant speed, and drying to obtain pretreated cloth; 3, superimposing the obtained pretreated cloth and a fluorine resin membrane into a raw substrate with specified thickness, covering the two sides of the raw substrate with copper foil, thenperforming sintering, maintaining pressure and then cooling to room temperature to prepare the PTFE copper clad laminate. The preparation method disclosed by the invention is simple, easy to operate,good in filler dispersion effect, uniform in mixing and good in product size stability. Through reasonable proportion, the prepared PTFE copper clad laminate has different dielectric constants within2.6-8.6 MHz; the dielectric loss factor is smaller than or equal to 0.003; the peeling strength is greater than or equal to 2.2 kN / m, and the comprehensive property meets use requirements and industrialized mass production requirements.

A multilayer wiring substrate includes a center wiring layer arranged in a center of the substrate in a thickness direction, and wiring layers stacked on one side of the center wiring layer and the other side of the center wiring layer via an insulating layer. The wiring layers on one side of the center wiring layer and the wiring layers on the other side are provided in a same layer number. The insulating layers on one side of the center wiring layer and the insulating layers on the other side are provided in a same layer number.

The present invention is to provide an ultra-thin copper foil with a carrier which comprises a release layer, a diffusion preventive layer and a copper electroplating layer laminated in this order, or a diffusion preventive layer, a release layer and a copper electroplating layer laminated in this order on the surface of a carrier foil, wherein a surface of the copper electroplating layer is roughened; a copper-clad laminated board comprising the ultra-thin copper foil with a carrier being laminated on a resin substrate; a printed wiring board comprising the copper-clad laminated board on the ultra-thin copper foil of which is formed a wiring pattern; and a multi-layered printed wiring board which comprising a plural number of the above printed wiring board being laminated.

A copper-clad board suitable for making a hole with a carbon dioxide gas laser, which copper-clad board is obtained by disposing a double-side-treated copper foil provided with a metallic-treatment layer having a high absorption rate of a carbon dioxide gas laser energy on at least one surface, at least on an outer layer of a thermosetting resin composition layer such that the metallic-treatment layer is formed on a shiny surface of the copper foil which shiny surface is to be a surface layer, and laminate-forming the double-side-treated copper foil and the thermosetting resin composition layer under heat and pressure, to make an alloy of the metallic-treatment layer and the copper by the above heating, a method of making hole in the above copper-clad board and a printed wiring board comprising the above copper-clad board.

Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.