Power supply modulation device, power supply modulation method, and power supply modulation amplifier

Abstract

The power modulation device (1) is configured to include: a detection unit (12) that detects a first amplitude of the amplitude of a first analog signal provided to a first amplifier (4) based on a first digital signal, and a second amplitude of the amplitude of a second analog signal provided to a second amplifier (5) based on a second digital signal; a load modulation determination unit (15) that calculates the time derivative of the ratio of the first amplitude to the sum of the first amplitude detected by the detection unit (12) and the second amplitude detected by the detection unit (12), and determines whether the output impedance of the synthesis circuit (6) changes with the power change of the signal synthesized by the synthesis circuit (6), which synthesizes the first analog signal amplified by the first amplifier (4) and the second analog signal amplified by the second amplifier (5); and a power supply voltage control unit (18) that controls the power supply voltages supplied to the first amplifier (4) and the second amplifier (5) respectively based on the determination result of the load modulation determination unit (15).

Description

Technical Field

[0001] This invention relates to a power modulation device, a power modulation method, and a power modulation amplifier. Background Technology

[0002] Doherty amplifiers typically have two amplifiers, a 90-degree line, and a combining circuit. One of the amplifiers is a carrier amplifier that amplifies the first analog signal regardless of its signal level. The other amplifier is a peak amplifier that amplifies the second analog signal when its signal level is above a specified level.

[0003] Doherty amplifiers exist in the following manner (hereinafter referred to as "existing Doherty amplifiers"): not only does one amplifier operate as a carrier amplifier, but another amplifier operates as a peak amplifier. For example, sometimes the carrier amplifier and the peak amplifier are switched depending on the power of the signal to be amplified, with one amplifier operating as a peak amplifier and the other operating as a carrier amplifier.

[0004] In existing Doherty amplifiers, high-efficiency operation can be achieved if the signal level of the amplified signal is within the range where the Doherty amplifier generates load modulation. Load modulation refers to the change in the output impedance of the synthesizing circuit as the power of the output signal changes.

[0005] However, there are Doherty amplifiers with a power modulation section that detects the envelope of the signal to be amplified and controls the power supply voltage of the carrier amplifier based on the envelope (for example, see Patent Document 1).

[0006] Prior art literature

[0007] Patent documents

[0008] Patent Document 1: International Publication No. 2010-084544 Summary of the Invention

[0009] The problem that the invention aims to solve

[0010] In existing Doherty amplifiers, it is impossible to detect the presence or absence of load modulation. Therefore, existing Doherty amplifiers suffer from the following problem: it is impossible to achieve an operation that can suppress the efficiency degradation when the signal level of the amplified signal is a low level that does not produce load modulation.

[0011] Even if the power modulation section of the Doherty amplifier described in Patent Document 1 is applied to an existing Doherty amplifier, it is still impossible to detect the backoff level based on the presence or absence of load modulation when the carrier amplifier and peak amplifier are swapped. Therefore, the power modulation section cannot apply power modulation at an accurate backoff level, and thus, it cannot improve efficiency below the backoff level.

[0012] The present invention was made to solve the above-mentioned problems, and its purpose is to provide a power supply modulation device, a power supply modulation method and a power supply modulation type amplifier that can suppress efficiency degradation even when no load modulation is generated.

[0013] Methods for solving problems

[0014] The power modulation apparatus of the present invention comprises: a detection unit that detects a first amplitude, which is the amplitude of a first analog signal supplied to a first amplifier, based on a first digital signal, and a second amplitude, which is the amplitude of a second analog signal supplied to a second amplifier, based on a second digital signal; a load modulation determination unit that calculates the time derivative of the ratio of the first amplitude to the sum of the first amplitude detected by the detection unit and the second amplitude detected by the detection unit, and determines, based on the time derivative of the ratio, whether the output impedance of the synthesis circuit changes with the power variation of the signal synthesized by the synthesis circuit, the synthesis circuit synthesizing the first analog signal amplified by the first amplifier and the second analog signal amplified by the second amplifier; and a power supply voltage control unit that controls the power supply voltages supplied to the first amplifier and the second amplifier respectively, based on the determination result of the load modulation determination unit.

[0015] Invention Effects

[0016] According to the present invention, efficiency degradation can be suppressed even when no load modulation is generated. Attached Figure Description

[0017] [ Figure 1 [Illustration 1] is a structural diagram showing a power modulation type amplifier including the power modulation device 1 of Embodiment 1.

[0018] [ Figure 2 [Illustration 1] is a hardware structure diagram showing the hardware of the power modulation device 1 according to Embodiment 1.

[0019] [ Figure 3 [Illustration of a computer hardware structure diagram in which a power modulation device 1 is implemented by software or firmware, etc.]

[0020] [ Figure 4 [Illustration 1] is a structural diagram showing the internal structure of the first time differential calculation unit 16.

[0021] [ Figure 5[ ] is an explanatory diagram showing the operating modes of a power-modulated amplifier.

[0022] [ Figure 6 ] is shown as Figure 1 A flowchart of the power modulation method for the processing of the power modulation device 1 shown.

[0023] [ Figure 7 [This is an explanatory diagram showing an example of the voltage setting unit 20 controlling the power supply voltage V.]

[0024] [ Figure 8 ] Figure 8 A is an explanatory graph showing the relationship between the output power of the power-modulated amplifier and the first amplitude Mag1 of the first analog signal and the second amplitude Mag2 of the second analog signal. Figure 8 B represents the ratio of the output power of the power-modulated amplifier to the first amplitude Mag1 relative to the amplitude and ΣMag. ratio A diagram illustrating the relationship. Figure 8 C represents the output power and ratio of the power-modulated amplifier. ratio A diagram illustrating the relationship between the time derivative value Del1. Figure 8 D is an explanatory diagram showing the relationship between the output power of the power-modulated amplifier and the first phase θ1 of the first analog signal and the second phase θ2 of the second analog signal. Figure 8 E is a diagram illustrating the relationship between the output power of a power-modulated amplifier and the phase difference Δθ. Figure 8 F is an explanatory graph showing the relationship between the output power of a power-modulated amplifier and the time derivative of the phase difference Δθ, Del2.

[0025] [ Figure 9 ] is to show Figure 1 The output power of the power-modulated amplifier shown is the same as the output power of the Doherty operation. Figure 1 The diagram illustrates the relationship between the efficiency of the power-modulated amplifier.

[0026] [ Figure 10 [Illustration 1] is a structural diagram showing a power modulation type amplifier including the power modulation device 1 of Embodiment 2.

[0027] [ Figure 11 [Illustration 1] is a hardware structure diagram showing the hardware of the power modulation device 1 according to Embodiment 2.

[0028] [ Figure 12 [Illustration 54] is a structural diagram showing the internal structure of the second time differential calculation unit 54.

[0029] [ Figure 13 ] Figure 13A is an explanatory graph showing the relationship between the output power of the power-modulated amplifier and the first amplitude Mag1 of the first analog signal and the second amplitude Mag2 of the second analog signal. Figure 13 B represents the ratio of the output power of the power-modulated amplifier to the first amplitude Mag1 relative to the amplitude and ΣMag. ratio A diagram illustrating the relationship. Figure 13 C represents the output power and ratio of the power-modulated amplifier. ratio A diagram illustrating the relationship between the time derivative value Del1. Figure 13 D is an explanatory diagram showing the relationship between the output power of the power-modulated amplifier and the first phase θ1 of the first analog signal and the second phase θ2 of the second analog signal. Figure 13 E is a diagram illustrating the relationship between the output power of a power-modulated amplifier and the phase difference Δθ. Figure 13 F is an explanatory graph showing the relationship between the output power of a power-modulated amplifier and the time derivative of the phase difference Δθ, Del2.

[0030] [ Figure 14 [Illustration 1] is a structural diagram showing a power modulation type amplifier including the power modulation device 1 of embodiment 3.

[0031] [ Figure 15 [Illustration 1] is a hardware structure diagram showing the hardware of the power modulation device 1 according to Embodiment 3. Detailed Implementation

[0032] Hereinafter, in order to illustrate the present invention in more detail, the embodiments for carrying out the present invention will be described with reference to the accompanying drawings.

[0033] Implementation Method 1

[0034] Figure 1 This is a structural diagram showing a power modulation type amplifier including the power modulation device 1 of Embodiment 1.

[0035] Figure 2 This is a hardware structure diagram showing the hardware of the power modulation device 1 according to Embodiment 1.

[0036] Figure 1 The power modulation amplifier shown has a power modulation device 1, a first digital-to-analog converter (hereinafter referred to as "first DAC") 2, a second digital-to-analog converter (hereinafter referred to as "second DAC") 3, a first amplifier 4, a second amplifier 5, a synthesis circuit 6, an output terminal 7, and a variable power supply 8.

[0037] The power modulation device 1 includes a first analog signal input terminal 10, a second analog signal input terminal 11, a detection unit 12, a load modulation determination unit 15, a power supply voltage control unit 18, and a fixed voltage power supply 21.

[0038] Power modulation device 1 determination Figure 1 The power supply modulation type amplifier shown has no-load modulation. Based on the presence or absence of load modulation, the power supply voltage supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 is controlled.

[0039] The power supply modulation device 1 controls the power supply voltages supplied to the first amplifier 4 and the second amplifier 5 respectively according to whether there is load modulation. Therefore, it can suppress the decrease in efficiency not only when the signal level of the signal to be amplified is a high level that generates load modulation, but also when it is a low level that does not generate load modulation.

[0040] exist Figure 1 In the power modulation amplifier shown, not only does amplifier 4 operate as a carrier amplifier and amplifier 5 operate as a peak amplifier, but the carrier amplifier and peak amplifier are also switched depending on the power of the signal to be amplified. That is, in Figure 1 In the power modulation amplifier shown, sometimes the first amplifier 4 operates as a peak amplifier and the second amplifier 5 operates as a carrier amplifier.

[0041] The first DAC 2 converts the first digital signal, which is the signal to be amplified, into a first analog signal, and outputs the first analog signal to the first amplifier 4.

[0042] The second DAC 3 converts the second digital signal, which is the signal to be amplified, into a second analog signal, and outputs the second analog signal to the second amplifier 5.

[0043] The first amplifier 4 is implemented, for example, by a FET (Field Effect Transistor), an HBT (Heterojunction Bipolar Transistor), or a HEMT (High Electron Mobility Transistor).

[0044] The first amplifier 4 amplifies the first analog signal output from the first DAC 2 and outputs the amplified first analog signal to the synthesis circuit 6.

[0045] The second amplifier 5 is implemented, for example, by a FET, HBT, or HEMT.

[0046] The second amplifier 5 amplifies the second analog signal output from the second DAC 3 and outputs the amplified second analog signal to the synthesis circuit 6.

[0047] For example, if the power of the first analog signal is greater than the power of the second analog signal, then the first amplifier 4 operates as a carrier amplifier and the second amplifier 5 operates as a peak amplifier. If the power of the first analog signal is less than the power of the second analog signal, then the first amplifier 4 operates as a peak amplifier and the second amplifier 5 operates as a carrier amplifier.

[0048] The synthesis circuit 6 combines the first analog signal amplified by the first amplifier 4 with the second analog signal amplified by the second amplifier 5, and outputs the synthesized signal to the output terminal 7.

[0049] Output terminal 7 is used to output the signal synthesized by the synthesis circuit 6 to the outside.

[0050] The variable power supply 8 supplies power voltage to the first amplifier 4 and the second amplifier 5 respectively.

[0051] The first analog signal input terminal 10 is a terminal that provides the first digital signal as the signal to be amplified.

[0052] The second analog signal input terminal 11 is a terminal that provides a second digital signal as the signal to be amplified.

[0053] For example, the detection unit 12 is through Figure 2 The detection circuit 30 shown is implemented.

[0054] The detection unit 12 has a first amplitude detection unit 13 and a second amplitude detection unit 14.

[0055] The detection unit 12 detects the first amplitude of the first analog signal provided to the first analog signal input terminal 10, based on the first digital signal provided to the first analog signal input terminal 10.

[0056] The detection unit 12 detects the second amplitude of the second analog signal provided to the second analog signal input terminal 11, which is the amplitude of the second analog signal provided to the second amplifier 5.

[0057] The first amplitude detection unit 13 detects the first amplitude based on the first digital signal provided to the first analog signal input terminal 10, and outputs the first amplitude signal representing the first amplitude to the first time differential calculation unit 16 (described later) and the amplitude comparison unit 19 (described later).

[0058] The second amplitude detection unit 14 detects the second amplitude based on the second digital signal provided to the second analog signal input terminal 11, and outputs the second amplitude signal representing the second amplitude to the first time differential calculation unit 16 and the amplitude comparison unit 19 respectively.

[0059] The load modulation determination unit 15, for example, through... Figure 2The load modulation determination circuit 31 shown is implemented.

[0060] The load modulation determination unit 15 includes a first time differential calculation unit 16 and a load modulation determination processing unit 17.

[0061] Load modulation determination unit 15 determines Figure 1 Does the power supply modulation amplifier shown generate load modulation?

[0062] That is, the load modulation determination unit 15 calculates the time derivative of the ratio of the first amplitude to the sum of the first amplitude detected by the detection unit 12 and the second amplitude detected by the detection unit 12.

[0063] The load modulation determination unit 15 determines, based on the time derivative of the ratio, whether the output impedance of the synthesis circuit 6 changes with the power change of the signal synthesized by the synthesis circuit 6.

[0064] The load modulation determination unit 15 outputs the determination result indicating whether the output impedance of the synthesis circuit 6 has changed to the power supply voltage control unit 18, which will be described later.

[0065] The first time differential calculation unit 16 calculates the sum of the first amplitude represented by the first amplitude signal output from the first amplitude detection unit 13 and the second amplitude represented by the second amplitude signal output from the second amplitude detection unit 14 (hereinafter referred to as "amplitude sum").

[0066] The first time differential calculation unit 16 calculates the ratio of the first amplitude to the sum of amplitudes, and calculates the time differential value of the ratio.

[0067] The first time differential calculation unit 16 outputs the time differential value of the ratio to the load modulation determination processing unit 17.

[0068] If the time differential value calculated by the first time differential calculation unit 16 is 0, the load modulation determination processing unit 17 determines that no load modulation is generated. That is, it determines that the output impedance of the synthesis circuit 6 does not change.

[0069] If the time differential value calculated by the first time differential calculation unit 16 is not 0, the load modulation determination processing unit 17 determines that load modulation has occurred. That is, it determines that the output impedance of the synthesis circuit 6 has changed.

[0070] The load modulation determination processing unit 17 outputs the determination result indicating whether the output impedance of the synthesis circuit 6 has changed to the voltage setting unit 20, which will be described later.

[0071] The power supply voltage control unit 18, for example, via Figure 2 The power supply voltage control circuit 32 shown is implemented.

[0072] The power supply voltage control unit 18 includes an amplitude comparison unit 19 and a voltage setting unit 20.

[0073] The power supply voltage control unit 18 controls the power supply voltages supplied to the first amplifier 4 and the second amplifier 5 respectively, based on the determination result of the load modulation determination unit 15.

[0074] That is, when the load modulation determination unit 15 determines that the output impedance has changed, the power supply voltage control unit 18 fixes the power supply voltage supplied from the variable power supply 8.

[0075] If the load modulation determination unit 15 determines that the output impedance does not change, the power supply voltage control unit 18 controls the power supply voltage supplied from the variable power supply 8 based on the larger of the first amplitude and the second amplitude.

[0076] The amplitude comparison unit 19 compares the first amplitude represented by the first amplitude signal output from the first amplitude detection unit 13 with the second amplitude represented by the second amplitude signal output from the second amplitude detection unit 14.

[0077] If the first amplitude is greater than or equal to the second amplitude, the amplitude comparison unit 19 outputs the first amplitude signal to the voltage setting unit 20.

[0078] If the first amplitude is smaller than the second amplitude, the amplitude comparison unit 19 outputs the second amplitude signal to the voltage setting unit 20.

[0079] If the determination result output from the load modulation determination processing unit 17 indicates a change in output impedance, the voltage setting unit 20 will fix the power supply voltage supplied from the variable power supply 8 to the voltage output from the fixed voltage power supply 21.

[0080] If the determination result output from the load modulation determination processing unit 17 indicates that the output impedance does not change, the voltage setting unit 20 controls the power supply voltage supplied from the variable power supply 8 according to the first amplitude represented by the first amplitude signal output from the amplitude comparison unit 19, or the second amplitude represented by the second amplitude signal.

[0081] The fixed voltage power supply 21 outputs a fixed voltage to the voltage setting unit 20.

[0082] exist Figure 1 In this context, it is assumed that the detection unit 12, load modulation determination unit 15, power supply voltage control unit 18, and fixed voltage power supply 21, which are structural elements of the power supply modulation device 1, are respectively controlled by... Figure 2 The dedicated hardware implementation shown is as follows. That is, it is assumed that the power modulation device 1 is implemented through a detection circuit 30, a load modulation determination circuit 31, a power supply voltage control circuit 32, and a fixed voltage power supply 21.

[0083] The detection circuit 30, the load modulation determination circuit 31, and the power supply voltage control circuit 32 are, for example, single circuits, composite circuits, programmable processors, parallel programmable processors, ASICs (Application Specific Integrated Circuits), FPGAs (Field Programmable Gate Arrays), or components combining them.

[0084] The structural elements of the power modulation device 1 are not limited to being implemented through dedicated hardware; they can also be implemented through software, firmware, or a combination of software and firmware.

[0085] Software or firmware is stored as a program in the computer's memory. A computer refers to the hardware that executes programs, such as a CPU (Central Processing Unit), central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, or DSP (Digital Signal Processor).

[0086] Figure 3 This is a hardware structure diagram of a computer in the case where a power modulation device 1 is implemented through software or firmware.

[0087] When a portion of the power modulation device 1 is implemented via software or firmware, a program for causing the computer to execute the processing procedures of the detection unit 12, the load modulation determination unit 15, and the power voltage control unit 18 is stored in the memory 41. Furthermore, the computer's processor 42 executes the program stored in the memory 41.

[0088] In addition, Figure 2 The diagram shows an example where the structural elements of the power modulation device 1 are implemented using dedicated hardware. Figure 3 The example shown is a portion of the power modulation device 1 implemented by software or firmware. However, this is only one example; it is also possible that a portion of the detection unit 12, load modulation determination unit 15, and power supply voltage control unit 18, which are structural elements of the power modulation device 1, are implemented by dedicated hardware, while the remaining portions are implemented by software or firmware.

[0089] Figure 4 This is a structural diagram showing the internal structure of the first time differential calculation unit 16.

[0090] The first time differential calculation unit 16 has an addition unit 16a, a division unit 16b, and a differential calculation processing unit 16c.

[0091] The addition unit 16a calculates the amplitude and ΣMag by adding the first amplitude Mag1 represented by the first amplitude signal output from the first amplitude detection unit 13 and the second amplitude Mag2 represented by the second amplitude signal output from the second amplitude detection unit 14.

[0092] The addition unit 16a outputs the amplitude and ΣMag to the division unit 16b.

[0093] Division unit 16b calculates the ratio P of the first amplitude Mag1 to the amplitude output from addition unit 16a and ΣMag. ratio .

[0094] Division 16b will be more than P ratio The output is sent to the differential calculation and processing unit 16c.

[0095] Differential calculation processing unit 16c calculates the ratio P output from division unit 16b. ratio The time derivative value Del1.

[0096] The differential calculation processing unit 16c outputs the time differential value Del1 to the load modulation determination processing unit 17.

[0097] Next, regarding Figure 1 The operation of the power supply modulation amplifier shown will be explained.

[0098] Figure 5 This is an explanatory diagram showing the operating modes of a power-modulated amplifier.

[0099] Figure 5 The following situation is shown: if the frequencies f of the first analog signal and the second analog signal are respectively in the range of above the fundamental frequency f0 and below twice the frequency 2f0, the power supply modulation amplifier performs Doherty operation.

[0100] also, Figure 5 The following situation is shown: if the frequency f is greater than twice the frequency 2f0 and less than three times the frequency 3f0, the power supply modulation amplifier will operate out of phase.

[0101] Figure 1 The power modulation device 1 shown can suppress the efficiency drop during the Doherty operation.

[0102] Figure 6 It is shown as Figure 1 A flowchart of the power modulation method for the processing of the power modulation device 1 shown.

[0103] The first amplitude detection unit 13 acquires the first digital signal provided to the first analog signal input terminal 10.

[0104] The first amplitude detection unit 13 detects the first amplitude Mag1, which is the amplitude of the first analog signal output from the first DAC 2 to the first amplifier 4, based on the first digital signal. Figure 6 Step ST1). The process of detecting the first amplitude based on the first digital signal is itself a known technique, therefore, detailed description is omitted.

[0105] The first amplitude detection unit 13 outputs the first amplitude signal, representing the first amplitude Mag1, to the first time differential calculation unit 16 and the amplitude comparison unit 19, respectively.

[0106] The second amplitude detection unit 14 acquires the second digital signal provided to the second analog signal input terminal 11.

[0107] The second amplitude detection unit 14 detects the second amplitude Mag2, which is the amplitude of the second analog signal output from the second DAC 3 to the second amplifier 5, based on the second digital signal. Figure 6 Step ST2).

[0108] The second amplitude detection unit 14 outputs the second amplitude signal, representing the second amplitude Mag2, to the first time differential calculation unit 16 and the amplitude comparison unit 19, respectively.

[0109] Load modulation determination unit 15 determines Figure 1 Does the power-modulated amplifier shown produce load modulation? That is, determine whether the output impedance of the synthesizing circuit 6 changes with the power of the output signal of the synthesizing circuit 6. Figure 6 Step ST3).

[0110] The following is a detailed explanation of the determination process of the load modulation determination unit 15.

[0111] First, the addition unit 16a obtains the first amplitude signal from the first amplitude detection unit 13 and the second amplitude signal from the second amplitude detection unit 14.

[0112] As shown in Equation (1) below, the addition unit 16a calculates the amplitude and ΣMag by adding the first amplitude Mag1 represented by the first amplitude signal and the second amplitude Mag2 represented by the second amplitude signal.

[0113] ∑Mag=Mag1+Mag2 (1)

[0114] The addition unit 16a outputs the amplitude and ΣMag to the division unit 16b.

[0115] The division unit 16b obtains the first amplitude signal from the first amplitude detection unit 13 and obtains the amplitude and ΣMag from the addition unit 16a.

[0116] As shown in equation (2) below, the division unit 16b calculates the ratio P of the first amplitude Mag1 to the amplitude output from the addition unit 16a and ΣMag. ratio .

[0117]

[0118] Division 16b will be more than P ratio The output is sent to the differential calculation and processing unit 16c.

[0119] Differential calculation processing unit 16c obtains ratio P from division unit 16b. ratio .

[0120] Differential calculation processing unit 16c calculates P ratio The time derivative value Del1. The calculation and processing of the time derivative value Del1 is a well-known technique, therefore, detailed explanation is omitted.

[0121] The differential calculation processing unit 16c outputs the time differential value Del1 to the load modulation determination processing unit 17.

[0122] If the time differential value Del1 calculated by the first time differential calculation unit 16 is 0, the load modulation determination processing unit 17 determines that no load modulation is generated. That is, it determines that the output impedance of the synthesis circuit 6 does not change.

[0123] If the time differential value Del1 calculated by the first time differential calculation unit 16 is not 0, the load modulation determination processing unit 17 determines that load modulation has occurred. That is, it determines that the output impedance of the synthesis circuit 6 has changed.

[0124] The load modulation determination processing unit 17 outputs the determination result J, indicating whether the output impedance of the synthesis circuit 6 has changed, to the voltage setting unit 20.

[0125] The amplitude comparison unit 19 obtains the first amplitude signal from the first amplitude detection unit 13 and the second amplitude signal from the second amplitude detection unit 14.

[0126] The amplitude comparison unit 19 compares the first amplitude Mag1 represented by the first amplitude signal with the second amplitude Mag2 represented by the second amplitude signal.

[0127] If the first amplitude Mag1 is greater than or equal to the second amplitude Mag2, the amplitude comparison unit 19 outputs the first amplitude signal to the voltage setting unit 20.

[0128] If the first amplitude Mag1 is smaller than the second amplitude Mag2, the amplitude comparison unit 19 outputs the second amplitude signal to the voltage setting unit 20.

[0129] The voltage setting unit 20 obtains the determination result J from the load modulation determination processing unit 17.

[0130] The voltage setting unit 20 obtains the first amplitude signal or the second amplitude signal from the amplitude comparison unit 19.

[0131] When the determination result J indicates that the output impedance does not change ( Figure 6 Step ST4: If the obtained amplitude signal is the first amplitude signal (in the case of "yes") Figure 6 In step ST5 (if "Yes"), the voltage setting unit 20 controls the power supply voltage V supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 according to the first amplitude Mag1 represented by the first amplitude signal. Figure 6 Step ST6).

[0132] That is, such as Figure 7 As shown, the voltage setting unit 20 controls the power supply voltage V such that the amplitude of the power supply voltage V supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 is a first amplitude Mag1.

[0133] When the determination result J indicates that the output impedance does not change ( Figure 6 Step ST4: If the obtained amplitude signal is the second amplitude signal (in the case of "yes") Figure 6 In step ST5 (if "No"), the voltage setting unit 20 controls the power supply voltage V supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 according to the second amplitude Mag2 represented by the second amplitude signal. Figure 6 Step ST7).

[0134] That is, such as Figure 7 As shown, the voltage setting unit 20 controls the power supply voltage V such that the amplitude of the power supply voltage V supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 is a second amplitude Mag2.

[0135] Figure 7 This is an explanatory diagram showing an example of the voltage setting unit 20 controlling the power supply voltage V. Figure 7 In the diagram, the amplitude of the power supply voltage V (shown by the dashed line) is either the first amplitude Mag1 or the second amplitude Mag2.

[0136] If the determination result J indicates a change in output impedance ( Figure 6 In step ST4 (if "No"), the voltage setting unit 20 fixes the power supply voltage V supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 to the voltage output from the fixed voltage power supply 21. Figure 6 Step ST8).

[0137] That is, such as Figure 7As shown, the voltage setting unit 20 controls the power supply voltage V such that the power supply voltage V supplied from the variable power supply 8 to the first amplifier 4 and the second amplifier 5 is the voltage output from the fixed voltage power supply 21.

[0138] The amplitudes of the voltages output from the fixed voltage power supply 21 are larger than both the first amplitude Mag1 and the second amplitude Mag2. Figure 7 In the diagram, the solid line represents the power supply voltage V, which is the voltage output from the fixed voltage power supply 21.

[0139] The first DAC 2 converts the first digital signal provided to the first analog signal input terminal 10 into a first analog signal, and outputs the first analog signal to the first amplifier 4.

[0140] The second DAC 3 converts the second digital signal provided to the second analog signal input terminal 11 into a second analog signal, and outputs the second analog signal to the second amplifier 5.

[0141] The power supply voltage V output from the variable power supply 8 is applied as a bias voltage to the drain terminal of the first amplifier 4.

[0142] When the drain terminal of the first amplifier 4 is supplied with a power supply voltage V, it amplifies the first analog signal output from the first DAC 2 and outputs the amplified first analog signal to the synthesis circuit 6.

[0143] The power supply voltage V output from the variable power supply 8 is applied as a bias voltage to the drain terminal of the second amplifier 5.

[0144] When the drain terminal of the second amplifier 5 is supplied with a power supply voltage V, it amplifies the second analog signal output from the second DAC 3 and outputs the amplified second analog signal to the synthesis circuit 6.

[0145] The synthesis circuit 6 combines the first analog signal amplified by the first amplifier 4 with the second analog signal amplified by the second amplifier 5, and outputs the synthesized signal to the output terminal 7.

[0146] Figure 8 It is shown Figure 1 The diagram illustrates the relationship between the output power of the power-modulated amplifier during Doherty operation and the amplitude and phase of the first and second analog signals, respectively.

[0147] exist Figure 8 In this process, the output power is normalized and varies within the range of 0 to 1. The rollback point is when the output power is 0.5.

[0148] Figure 8A shows the relationship between the output power of the power-modulated amplifier and the first amplitude Mag1 of the first analog signal and the second amplitude Mag2 of the second analog signal.

[0149] At low output levels where the output power is lower than the backoff point, such as Figure 8 As shown in Figure A, a power supply voltage V with the same amplitude as the first amplitude Mag1 or the same amplitude as the second amplitude Mag2 is applied to the respective drain terminals of the first amplifier 4 and the second amplifier 5. Furthermore, at high output power (higher than the backoff point), such as... Figure 8 As shown in Figure A, the same power supply voltage V as the voltage output from the fixed voltage power supply 21 is applied to the respective drain terminals of the first amplifier 4 and the second amplifier 5.

[0150] The first amplifier 4 amplifies the first analog signal at both low and high output levels.

[0151] The second amplifier 5 amplifies the second analog signal only when the output is high, and does not amplify the second analog signal when the output is low.

[0152] Figure 8 B shows the ratio of the output power of the power-modulated amplifier to the first amplitude Mag1 relative to the amplitude and ΣMag. ratio relationship.

[0153] At low output levels where the output power is lower than the backoff point, such as Figure 8 As shown in B, compared to P ratio It is fixed.

[0154] At high output levels where the output power is higher than the backoff point, such as Figure 8 As shown in B, compared to P ratio Things have changed.

[0155] Figure 8 C shows the output power of the power-modulated amplifier and the ratio P. ratio The relationship between the time differential value Del1.

[0156] At low output levels where the output power is lower than the backoff point, such as Figure 8 As shown in C, the time derivative value Del1 is 0, and no load modulation is generated.

[0157] At high output levels where the output power is higher than the backoff point, such as Figure 8 As shown in C, the time derivative value Del1 is not 0, resulting in load modulation.

[0158] Figure 8 D shows the relationship between the output power of the power-modulated amplifier and the first phase θ1 of the first analog signal and the second phase θ2 of the second analog signal.

[0159] Even if the output power of the power-modulated amplifier changes, such as Figure 8 As shown in D, the first phase θ1 and the second phase θ2 are also fixed.

[0160] Figure 8 E shows the relationship between the output power of the power-modulated amplifier and the phase difference Δθ.

[0161] Even if the output power of the power-modulated amplifier changes, such as Figure 8 As shown in E, the phase difference Δθ between the first phase θ1 and the second phase θ2 is also fixed.

[0162] Figure 8 F shows the relationship between the output power of the power-modulated amplifier and the time derivative of the phase difference Δθ, Del2.

[0163] Even if the output power of the power-modulated amplifier changes, such as Figure 8 As shown in F, the time derivative of the phase difference Δθ, Del2, is also 0.

[0164] Figure 9 It is shown Figure 1 The output power of the power-modulated amplifier shown is the same as the output power of the Doherty operation. Figure 1 The diagram illustrates the relationship between the efficiency of the power-modulated amplifier.

[0165] exist Figure 9 In addition to Figure 1 In addition to the efficiency of the power supply modulation amplifier shown, the efficiency of the existing Doherty amplifier described in the background section is also recorded.

[0166] At high output power, where the output power is higher than the backoff point Figure 1 The power-modulated amplifier shown has an efficiency that is approximately the same as that of the existing Doherty amplifier.

[0167] At low output (output power below the backoff point), the efficiency of existing Doherty amplifiers drops significantly compared to at high output (output power above the backoff point). Figure 1 In the power supply modulation amplifier shown, the power supply voltage V is controlled according to the larger of the first amplitude Mag1 and the second amplitude Mag2. Therefore, compared with the existing Doherty amplifier, it is able to suppress the efficiency drop at low output.

[0168] In Embodiment 1 described above, the power modulation device 1 is configured to include: a detection unit 12 that detects a first amplitude, which is the amplitude of a first analog signal supplied to a first amplifier 4, based on a first digital signal, and a second amplitude, which is the amplitude of a second analog signal supplied to a second amplifier 5, based on a second digital signal; a load modulation determination unit 15 that calculates the time derivative of the ratio of the first amplitude to the sum of the first amplitude detected by the detection unit 12 and the second amplitude detected by the detection unit 12, and determines whether the output impedance of the synthesis circuit 6 changes with the power variation of the signal synthesized by the synthesis circuit 6, which synthesizes the first analog signal amplified by the first amplifier 4 and the second analog signal amplified by the second amplifier 5; and a power supply voltage control unit 18 that controls the power supply voltages supplied to the first amplifier 4 and the second amplifier 5, respectively, based on the determination result of the load modulation determination unit 15. Therefore, the power modulation device 1 can suppress efficiency degradation even when no load modulation occurs.

[0169] exist Figure 1 In the power modulation device 1 shown, digital signal processing is performed by the load modulation determination unit 15 and the power supply voltage control unit 18 to control the power supply voltages supplied to the first amplifier 4 and the second amplifier 5, respectively. However, this is only one example; it is also possible to perform analog signal processing by the load modulation determination unit 15 and the power supply voltage control unit 18 to control the power supply voltages supplied to the first amplifier 4 and the second amplifier 5, respectively.

[0170] Implementation Method 2

[0171] In Embodiment 2, a power modulation amplifier having a load modulation determination unit 53 will be described. The load modulation determination unit 53 determines whether the output impedance of the synthesis circuit 6 changes with the power change of the signal synthesized by the synthesis circuit 6 based on the phase of the first analog signal and the second analog signal, respectively.

[0172] Figure 10 This is a structural diagram showing a power modulation type amplifier including the power modulation device 1 of Embodiment 2. Figure 10 In, with Figure 1 The same labels indicate the same or corresponding parts, so the description is omitted.

[0173] Figure 11 This is a hardware structure diagram showing the hardware of the power modulation device 1 according to Embodiment 2. Figure 11 In, with Figure 2 The same labels indicate the same or corresponding parts, so the description is omitted.

[0174] For example, the detection unit 50 passes through Figure 11 The detection circuit 33 shown is implemented.

[0175] The detection unit 50 has a first amplitude phase detection unit 51 and a second amplitude phase detection unit 52.

[0176] In addition to detecting the first amplitude based on the first digital signal provided to the first analog signal input terminal 10, the detection unit 50 also detects the first phase, which is the phase of the first analog signal.

[0177] In addition to detecting the second amplitude based on the second digital signal provided to the second analog signal input terminal 11, the detection unit 50 also detects the second phase, which is the phase of the second analog signal.

[0178] The first amplitude and phase detection unit 51 detects the amplitude and phase in the first analog signal based on the first digital signal provided to the first analog signal input terminal 10.

[0179] The first amplitude phase detection unit 51 outputs the first amplitude signal representing the first amplitude to the amplitude comparison unit 19, and outputs the first phase signal representing the first phase to the second time differential calculation unit 54.

[0180] The second amplitude and phase detection unit 52 detects the amplitude and phase in the second analog signal based on the second digital signal provided to the second analog signal input terminal 11.

[0181] The second amplitude phase detection unit 52 outputs the second amplitude signal representing the second amplitude to the amplitude comparison unit 19, and outputs the second phase signal representing the second phase to the second time differential calculation unit 54.

[0182] Load modulation determination unit 53 passes through Figure 11 The load modulation determination circuit 34 shown is implemented.

[0183] The load modulation determination unit 53 includes a second time differential calculation unit 54 and a load modulation determination processing unit 55.

[0184] Load modulation determination unit 53 determines Figure 10 Does the power supply modulation amplifier shown generate load modulation?

[0185] That is, the load modulation determination unit 53 calculates the time differential value of the phase difference between the first phase detected by the detection unit 50 and the second phase detected by the detection unit 50.

[0186] The load modulation determination unit 53 determines whether the output impedance of the synthesis circuit 6 changes with the power change of the signal synthesized by the synthesis circuit 6 based on the time derivative of the phase difference.

[0187] The load modulation determination unit 53 outputs the determination result indicating whether the output impedance of the synthesis circuit 6 has changed to the power supply voltage control unit 18.

[0188] The second time differential calculation unit 54 calculates the phase difference between the first phase represented by the first phase signal output from the first amplitude phase detection unit 51 and the second phase represented by the second phase signal output from the second amplitude phase detection unit 52.

[0189] The second time differential calculation unit 54 calculates the time differential value of the calculated phase difference.

[0190] The second time differential calculation unit 54 outputs the time differential value of the phase difference to the load modulation determination processing unit 55.

[0191] If the time differential value calculated by the second time differential calculation unit 54 is 0, the load modulation determination processing unit 55 determines that no load modulation is generated. That is, it determines that the output impedance of the synthesis circuit 6 does not change.

[0192] If the time differential value calculated by the second time differential calculation unit 54 is not 0, the load modulation determination processing unit 55 determines that load modulation has occurred. That is, it determines that the output impedance of the synthesis circuit 6 has changed.

[0193] The load modulation determination processing unit 55 outputs the determination result indicating whether the output impedance of the synthesis circuit 6 has changed to the voltage setting unit 20.

[0194] exist Figure 10 In this context, it is assumed that the detection unit 50, load modulation determination unit 53, power supply voltage control unit 18, and fixed voltage power supply 21, which are structural elements of the power supply modulation device 1, are respectively connected via, as shown in the example below. Figure 11 The dedicated hardware implementation shown is as follows. That is, it is assumed that the power modulation device 1 is implemented through the detection circuit 33, the load modulation determination circuit 34, the power supply voltage control circuit 32, and the fixed voltage power supply 21.

[0195] The detection circuit 33, the load modulation determination circuit 34, and the power supply voltage control circuit 32 are, for example, single circuits, composite circuits, programmed processors, parallel programmed processors, ASICs, FPGAs, or components composed of these.

[0196] The structural elements of the power modulation device 1 are not limited to being implemented by dedicated hardware. Alternatively, a part of the power modulation device 1 may be implemented by software, firmware, or a combination of software and firmware.

[0197] When a portion of the power modulation device 1 is implemented via software or firmware, the program for causing the computer to execute the respective processing procedures of the detection unit 50, the load modulation determination unit 53, and the power voltage control unit 18 is stored in... Figure 3 The memory 41 shown. Furthermore, Figure 3 The processor 42 shown executes the program stored in the memory 41.

[0198] In addition, Figure 11 The diagram shows an example where the structural elements of the power modulation device 1 are implemented using dedicated hardware. Figure 3 The example shown is a portion of the power modulation device 1 implemented by software or firmware. However, this is only one example; it is also possible that a portion of the detection unit 50, load modulation determination unit 53, and power supply voltage control unit 18, which are structural elements of the power modulation device 1, are implemented by dedicated hardware, while the remaining portions are implemented by software or firmware.

[0199] Figure 12 This is a structural diagram showing the internal structure of the second time differential calculation unit 54.

[0200] The second time differential calculation unit 54 has a subtraction unit 54a and a differential calculation processing unit 54b.

[0201] The subtraction unit 54a calculates the phase difference Δθ between the first phase θ1 represented by the first phase signal output from the first amplitude phase detection unit 51 and the second phase θ2 represented by the second phase signal output from the second amplitude phase detection unit 52.

[0202] The subtraction unit 54a outputs the phase difference Δθ to the differential calculation processing unit 54b.

[0203] The differential calculation processing unit 54b calculates the time differential value Del2 of the phase difference Δθ output from the subtraction unit 54a.

[0204] The differential calculation processing unit 54b outputs the time differential value Del2 to the load modulation determination processing unit 55.

[0205] Next, regarding Figure 10 The operation of the power supply modulation amplifier shown will be explained.

[0206] Except for the detection unit 50 and the load modulation determination unit 53, all others are related to Figure 1 Since the power modulation type amplifier shown is the same, only the operation of the detection unit 50 and the load modulation determination unit 53 will be described here.

[0207] Figure 10 The power modulation device 1 shown can suppress the occurrence of Figure 5 The efficiency decreases during the out-of-phase operation shown.

[0208] The first amplitude phase detection unit 51 acquires the first digital signal provided to the first analog signal input terminal 10.

[0209] The first amplitude phase detection unit 51 and Figure 1 Similarly, the first amplitude detection unit 13 shown detects the first amplitude Mag1, which is the amplitude of the first analog signal output from the first DAC 2 to the first amplifier 4, based on the first digital signal.

[0210] Furthermore, the first amplitude phase detection unit 51 detects the first phase θ1, which is the phase of the first analog signal, based on the first digital signal. The process of detecting the first phase θ1 based on the first digital signal is itself a known technique, therefore, a detailed description is omitted.

[0211] The first amplitude phase detection unit 51 outputs the first amplitude signal representing the first amplitude Mag1 to the amplitude comparison unit 19, and outputs the first phase signal representing the first phase θ1 to the second time differential calculation unit 54.

[0212] The second amplitude phase detection unit 52 acquires the second digital signal provided to the second analog signal input terminal 11.

[0213] The second amplitude phase detection unit 52 and Figure 1 Similarly, the second amplitude detection unit 14 shown detects the second amplitude Mag2, which is the amplitude of the second analog signal output from the second DAC 3 to the second amplifier 5, based on the second digital signal.

[0214] Furthermore, the second amplitude phase detection unit 52 detects the second phase θ2, which is the phase of the second analog signal, based on the second digital signal.

[0215] The second amplitude phase detection unit 52 outputs the second amplitude signal representing the second amplitude Mag2 to the amplitude comparison unit 19, and outputs the second phase signal representing the second phase θ2 to the second time differential calculation unit 54.

[0216] The subtraction unit 54a obtains the first phase signal from the first amplitude phase detection unit 51 and the second phase signal from the second amplitude phase detection unit 52.

[0217] As shown in equation (3) below, the subtraction unit 54a calculates the phase difference Δθ between phase θ1 and phase θ2 by subtracting the first phase θ1 represented by the first phase signal from the second phase θ2 represented by the second phase signal.

[0218] Δθ=θ2-θ1 (3)

[0219] The subtraction unit 54a outputs the phase difference Δθ to the differential calculation processing unit 54b.

[0220] The differential calculation processing unit 54b obtains the phase difference Δθ output from the subtraction unit 54a.

[0221] The differential calculation processing unit 54b calculates the time differential value Del2 of the phase difference Δθ. The calculation processing of the time differential value Del2 is itself a known technique, therefore, detailed description is omitted.

[0222] The differential calculation processing unit 54b outputs the time differential value Del2 to the load modulation determination processing unit 55.

[0223] If the time differential value Del2 calculated by the second time differential calculation unit 54 is 0, the load modulation determination processing unit 55 determines that no load modulation is generated. That is, it determines that the output impedance of the synthesis circuit 6 does not change.

[0224] If the time differential value Del2 calculated by the second time differential calculation unit 54 is not 0, the load modulation determination processing unit 55 determines that load modulation has occurred. That is, it determines that the output impedance of the synthesis circuit 6 has changed.

[0225] The load modulation determination processing unit 55 outputs the determination result J, indicating whether the output impedance of the synthesis circuit 6 has changed, to the voltage setting unit 20.

[0226] Figure 13 It is shown Figure 10 The diagram illustrates the relationship between the output power of the power-modulated amplifier operating out of phase and the amplitude and phase of the first and second analog signals, respectively.

[0227] exist Figure 13 In this process, the output power is normalized and varies within the range of 0 to 1. The rollback point is when the output power is 0.5.

[0228] Figure 13 A shows the relationship between the output power of the power-modulated amplifier and the first amplitude Mag1 of the first analog signal and the second amplitude Mag2 of the second analog signal.

[0229] Even if the output power of the power-modulated amplifier changes, such as Figure 13 As shown in A, the first amplitude Mag1 and the second amplitude Mag2 are also the same amplitude.

[0230] Figure 13 B shows the ratio of the output power of the power-modulated amplifier to the first amplitude Mag1 relative to the amplitude and ΣMag. ratio relationship.

[0231] Even if the output power of the power-modulated amplifier changes, such as Figure 13 As shown in B, compared to P ratio It is also fixed.

[0232] Figure 13C shows the output power of the power-modulated amplifier and the ratio P. ratio The relationship between the time differential value Del1.

[0233] Even if the output power of the power-modulated amplifier changes, such as Figure 13 As shown in C, compared to P ratio The time derivative value Del1 is also 0.

[0234] Figure 13 D shows the relationship between the output power of the power-modulated amplifier and the first phase θ1 of the first analog signal and the second phase θ2 of the second analog signal.

[0235] At low output levels where the output power is lower than the backoff point, such as Figure 13 As shown in D, the first phase θ1 and the second phase θ2 are fixed.

[0236] At high output levels where the output power is higher than the backoff point, such as Figure 13 As shown in D, the first phase θ1 increases, and the second phase θ2 decreases.

[0237] Figure 13 E shows the relationship between the output power of the power-modulated amplifier and the phase difference Δθ.

[0238] At low output levels where the output power is lower than the backoff point, such as Figure 13 As shown in E, the phase difference Δθ between the first phase θ1 and the second phase θ2 is fixed.

[0239] At high output levels where the output power is higher than the backoff point, such as Figure 13 As shown in E, the phase difference Δθ between the first phase θ1 and the second phase θ2 changes.

[0240] Figure 13 F shows the relationship between the output power of the power-modulated amplifier and the time derivative of the phase difference Δθ, Del2.

[0241] At low output levels where the output power is lower than the backoff point, such as Figure 13 As shown in F, the time derivative of the phase difference Δθ, Del2, is 0, and no load modulation is generated.

[0242] At high output levels where the output power is higher than the backoff point, such as Figure 13 As shown in F, the time derivative of the phase difference Δθ, Del2, is not 0, resulting in load modulation.

[0243] In Embodiment 2 described above, the power modulation device 1 is configured to include: a detection unit 50, which detects a first phase as the phase of a first analog signal in addition to detecting a first amplitude based on a first digital signal, and a second phase as the phase of a second analog signal in addition to detecting a second amplitude based on a second digital signal; a load modulation determination unit 53, which calculates the time derivative of the phase difference between the first phase detected by the detection unit 50 and the second phase detected by the detection unit 50, and determines whether the output impedance of the synthesis circuit 6 changes with the power variation of the signal synthesized by the synthesis circuit 6 based on the time derivative of the phase difference; and a power supply voltage control unit 18, which controls the power supply voltages supplied to the first amplifier 4 and the second amplifier 5 respectively based on the determination result of the load modulation determination unit 53. Therefore, the power modulation device 1 can suppress efficiency degradation even when no load modulation is generated.

[0244] Implementation Method 3

[0245] In Embodiment 3, a power modulation device 1 having both a first time differential calculation unit 16 and a second time differential calculation unit 54 will be described.

[0246] Figure 14 This is a structural diagram showing a power modulation type amplifier including the power modulation device 1 of Embodiment 3. Figure 14 In, with Figure 1 and Figure 10 The same labels indicate the same or corresponding parts, so the description is omitted.

[0247] Figure 15 This is a hardware structure diagram showing the hardware of the power modulation device 1 according to Embodiment 3. Figure 15 In, with Figure 2 and Figure 11 The same labels indicate the same or corresponding parts, so the description is omitted.

[0248] Load modulation determination unit 61 via Figure 15 The load modulation determination circuit 35 shown is implemented.

[0249] The load modulation determination unit 61 includes a first time differential calculation unit 16, a second time differential calculation unit 54, and a load modulation determination processing unit 62.

[0250] Load modulation determination unit 61 determines Figure 14 Does the power supply modulation amplifier shown generate load modulation?

[0251] That is, the load modulation determination unit 61 determines whether the output impedance of the synthesis circuit 6 changes due to the power change of the signal synthesized by the synthesis circuit 6 based on the first amplitude Mag1 and the second amplitude Mag2 or the first phase θ1 and the second phase θ2.

[0252] The load modulation determination unit 61 outputs the determination result indicating whether the output impedance of the synthesis circuit 6 has changed to the power supply voltage control unit 18.

[0253] When the frequencies f of the first and second analog signals are the frequencies at which the first amplifier 4 and the second amplifier 5 perform Doherty operation, if the time differential value Del1 calculated by the first time differential calculation unit 16 is 0, the load modulation determination processing unit 62 determines that no load modulation occurs. That is, it determines that the output impedance of the synthesizing circuit 6 does not change. The frequency f of the Doherty operation is in the range of the fundamental frequency f0 and above, and twice the frequency 2f0 and below. If the time differential value Del1 calculated by the first time differential calculation unit 16 is not 0, the load modulation determination processing unit 62 determines that load modulation occurs. That is, it determines that the output impedance of the synthesizing circuit 6 changes.

[0254] When the frequencies f of the first and second analog signals are the frequencies at which the first amplifier 4 and the second amplifier 5 operate out of phase, if the time differential value Del2 calculated by the second time differential calculation unit 54 is 0, the load modulation determination processing unit 62 determines that no load modulation occurs. That is, it determines that the output impedance of the synthesizing circuit 6 does not change. The frequency f at which the out-of-phase operation occurs is in the range greater than twice the frequency 2f0 and less than three times the frequency 3f0. If the time differential value Del2 calculated by the second time differential calculation unit 54 is not 0, the load modulation determination processing unit 62 determines that load modulation occurs. That is, it determines that the output impedance of the synthesizing circuit 6 changes.

[0255] Next, regarding Figure 14 The operation of the power supply modulation amplifier shown will be explained.

[0256] exist Figure 14 The power modulation device 1 shown performs Figure 5 When the Doherty operation is shown, the load modulation determination processing unit 62 determines whether load modulation occurs based on the time differential value Del1 calculated by the first time differential calculation unit 16.

[0257] exist Figure 14 The power modulation device 1 shown performs Figure 5 When the out-of-phase operation is shown, the load modulation determination processing unit 62 determines whether load modulation occurs based on the time differential value Del2 calculated by the second time differential calculation unit 54.

[0258] The load modulation determination processing unit 62 obtains information from the outside representing the frequency f of the first analog signal and the second analog signal, respectively.

[0259] If the frequency f is within the range of the fundamental frequency f0 to twice the frequency 2f0, then the load modulation determination processing unit 62 obtains the ratio P from the first time differential calculation unit 16. ratio The time derivative value Del1.

[0260] If the frequency f is in the range of 2 times the frequency 2f0 to 3 times the frequency 3f0, the load modulation determination processing unit 62 obtains the time differential value Del2 of the phase difference Δθ from the second time differential calculation unit 54.

[0261] exist Figure 14 In the power supply modulation type amplifier shown, the load modulation determination processing unit 62 obtains information representing the frequency f from an external source. However, this is only one example; it is also possible that the load modulation determination processing unit 62 detects the frequency f of the first analog signal or the frequency f of the second analog signal.

[0262] When the frequency f is in the range of above the fundamental frequency f0 and below twice the frequency 2f0, if the time differential value Del1 calculated by the first time differential calculation unit 16 is 0, the load modulation determination processing unit 62 determines that no load modulation is generated. That is, it determines that the output impedance of the synthesis circuit 6 does not change.

[0263] When the frequency f is in the range of above the fundamental frequency f0 and below twice the frequency 2f0, if the time differential value Del1 calculated by the first time differential calculation unit 16 is not 0, the load modulation determination processing unit 62 determines that load modulation has occurred. That is, it determines that the output impedance of the synthesis circuit 6 has changed.

[0264] The load modulation determination processing unit 62 outputs the determination result J, indicating whether the output impedance of the synthesis circuit 6 has changed, to the voltage setting unit 20.

[0265] When the frequency f is in the range of being greater than twice the frequency 2f0 but less than three times the frequency 3f0, if the time differential value Del2 calculated by the second time differential calculation unit 54 is 0, then the load modulation determination processing unit 62 determines that no load modulation is generated. That is, it determines that the output impedance of the synthesis circuit 6 does not change.

[0266] When the frequency f is in the range of being greater than twice the frequency 2f0 but less than three times the frequency 3f0, if the time differential value Del2 calculated by the second time differential calculation unit 54 is not 0, the load modulation determination processing unit 62 determines that load modulation has occurred. That is, it determines that the output impedance of the synthesis circuit 6 has changed.

[0267] The load modulation determination processing unit 62 outputs the determination result J, indicating whether the output impedance of the synthesis circuit 6 has changed, to the voltage setting unit 20.

[0268] In the above-described embodiment 3, the power modulation device 1 is configured to include: a load modulation determination unit 61, which determines whether the output impedance of the synthesis circuit 6 changes with the power variation of the signal synthesized by the synthesis circuit 6 based on the first amplitude and the second amplitude or the first phase and the second phase; and a power supply voltage control unit 18, which controls the power supply voltages supplied to the first amplifier 4 and the second amplifier 5 respectively based on the determination result of the load modulation determination unit 61. Therefore, the power modulation device 1 can suppress efficiency degradation even when no load modulation occurs during Doherty operation, and furthermore, it can suppress efficiency degradation even when no load modulation occurs during out-of-phase operation.

[0269] Furthermore, the present invention can realize free combination of various embodiments, or modification of any structural elements of various embodiments, or omission of any structural elements in various embodiments.

[0270] Industrial availability

[0271] This invention is applicable to power modulation devices, power modulation methods, and power modulation amplifiers.

[0272] Label Explanation

[0273] 1: Power modulation device; 2: First DAC; 3: Second DAC; 4: First amplifier; 5: Second amplifier; 6: Synthesis circuit; 7: Output terminal; 8: Variable power supply; 10: First analog signal input terminal; 11: Second analog signal input terminal; 12: Detection unit; 13: First amplitude detection unit; 14: Second amplitude detection unit; 15: Load modulation determination unit; 16: First time differential calculation unit; 16a: Addition unit; 16b: Division unit; 16c: Differential calculation processing unit; 17: Load modulation determination processing unit; 18: Power supply voltage control unit; 19: Amplitude comparison unit; 20: 21: Voltage setting unit; 30: Fixed voltage power supply; 31: Detection circuit; 32: Load modulation determination circuit; 33: Power supply voltage control circuit; 34: Detection circuit; 35: Load modulation determination circuit; 41: Memory; 42: Processor; 50: Detection unit; 51: First amplitude phase detection unit; 52: Second amplitude phase detection unit; 53: Load modulation determination unit; 54: Second time differential calculation unit; 54a: Subtraction unit; 54b: Differential calculation processing unit; 55: Load modulation determination processing unit; 61: Load modulation determination unit; 62: Load modulation determination processing unit.

Claims

1. A power modulation device, the power modulation device comprising: The detection unit detects a first amplitude as the amplitude of a first analog signal supplied to a first amplifier based on a first digital signal, and a second amplitude as the amplitude of a second analog signal supplied to a second amplifier based on a second digital signal; A load modulation determination unit calculates the time derivative of the ratio of the first amplitude to the sum of the first amplitude detected by the detection unit and the second amplitude detected by the detection unit. Based on the time derivative of the ratio, it determines whether the output impedance of the synthesis circuit changes with the power variation of the signal synthesized by the synthesis circuit. This synthesis circuit synthesizes a first analog signal amplified by the first amplifier and a second analog signal amplified by the second amplifier. When the time derivative of the ratio is 0, the load modulation determination unit determines that the output impedance of the synthesis circuit does not change and no load modulation occurs; when the time derivative of the ratio is not 0, the load modulation determination unit determines that the output impedance of the synthesis circuit changes and load modulation occurs. The power supply voltage control unit controls the power supply voltages supplied to the first amplifier and the second amplifier respectively, based on the determination result of the load modulation determination unit. Specifically, when the load modulation determination unit determines that the output impedance has changed, the power supply voltage control unit fixes the power supply voltages supplied to the first amplifier and the second amplifier respectively. When the load modulation determination unit determines that the output impedance has not changed, the power supply voltage control unit controls the power supply voltages supplied to the first amplifier and the second amplifier respectively based on the larger of the first amplitude and the second amplitude.

2. The power modulation device according to claim 1, characterized in that, In addition to detecting the first amplitude and the second amplitude respectively, the detection unit also detects a first phase, which is the phase of the first analog signal provided to the first amplifier, based on the first digital signal, and a second phase, which is the phase of the second analog signal provided to the second amplifier, based on the second digital signal. The load modulation determination unit calculates the time derivative of the phase difference between the first phase detected by the detection unit and the second phase detected by the detection unit instead of calculating the time derivative of the ratio. Based on the time derivative of the phase difference, it determines whether the output impedance of the synthesis circuit changes with the power change of the signal synthesized by the synthesis circuit.

3. The power modulation device according to claim 1, characterized in that, In addition to detecting the first amplitude and the second amplitude respectively, the detection unit also detects a first phase, which is the phase of the first analog signal provided to the first amplifier, based on the first digital signal, and a second phase, which is the phase of the second analog signal provided to the second amplifier, based on the second digital signal. In addition to calculating the time derivative of the ratio, the load modulation determination unit also calculates the time derivative of the phase difference between the first phase detected by the detection unit and the second phase detected by the detection unit. When the frequencies of the first analog signal and the second analog signal are respectively the frequencies at which the first amplifier and the second amplifier perform Doherty operation, the load modulation determination unit determines, based on the time derivative of the ratio, whether the output impedance of the synthesis circuit changes with the power variation of the signal synthesized by the synthesis circuit. When the frequencies of the first analog signal and the second analog signal are respectively the frequencies at which the first amplifier and the second amplifier operate out of phase, the load modulation determination unit determines, based on the time derivative of the phase difference, whether the output impedance of the synthesis circuit changes with the power variation of the signal synthesized by the synthesis circuit.

4. The power modulation device according to claim 1, characterized in that, When the load modulation determination unit determines that the output impedance has changed, the power supply voltage control unit fixes the power supply voltage supplied to the first amplifier and the second amplifier to a voltage greater than the power supply voltage supplied to the first amplifier and the second amplifier, respectively, based on the amplitude of the larger one.

5. A power supply modulation method, wherein, The detection unit detects a first amplitude, which is the amplitude of a first analog signal supplied to a first amplifier, based on the first digital signal, and a second amplitude, which is the amplitude of a second analog signal supplied to a second amplifier, based on the second digital signal. The load modulation determination unit calculates the time derivative of the ratio of the first amplitude to the sum of the first amplitude detected by the detection unit and the second amplitude detected by the detection unit. Based on the time derivative of the ratio, it determines whether the output impedance of the synthesis circuit changes with the power variation of the signal synthesized by the synthesis circuit. This synthesis circuit synthesizes a first analog signal amplified by the first amplifier and a second analog signal amplified by the second amplifier. When the time derivative of the ratio is 0, the load modulation determination unit determines that the output impedance of the synthesis circuit does not change and no load modulation occurs. When the time derivative of the ratio is not 0, the load modulation determination unit determines that the output impedance of the synthesis circuit changes and load modulation occurs. The power supply voltage control unit controls the power supply voltages supplied to the first amplifier and the second amplifier respectively based on the determination result of the load modulation determination unit. Specifically, when the load modulation determination unit determines that the output impedance has changed, the power supply voltage control unit keeps the power supply voltages supplied to the first amplifier and the second amplifier fixed. When the load modulation determination unit determines that the output impedance has not changed, the power supply voltage control unit controls the power supply voltages supplied to the first amplifier and the second amplifier respectively based on the larger of the first amplitude and the second amplitude.

6. A power-modulated amplifier, the power-modulated amplifier having: The first amplifier amplifies the signal associated with the first digital signal; The second amplifier amplifies the signal associated with the second digital signal; A combining circuit that combines the signal amplified by the first amplifier with the signal amplified by the second amplifier; A variable power supply, which supplies power voltage to the first amplifier and the second amplifier respectively; and The power modulation device according to any one of claims 1 to 4.

7. The power modulation amplifier according to claim 6, characterized in that, This power-modulated amplifier has the following features: A first digital-to-analog converter converts the first digital signal into a first analog signal and outputs the first analog signal as a signal associated with the first digital signal to the first amplifier; as well as The second digital-to-analog converter converts the second digital signal into a second analog signal and outputs the second analog signal as a signal associated with the second digital signal to the second amplifier.

Images