Display panel, driving method of display panel, and display device

Abstract

The application relates to a display panel, a driving method of the display panel and a display device, wherein the wiring of a gate driving circuit to a gate line in the display panel is no longer uniformly distributed, the resistance-capacitance impedance delay of the gate driving circuit to the gate line in the display panel is no longer uniformly changed, so that even if display unevenness occurs, the display unevenness will not be connected as a whole and a split-screen ripple will not be formed, thereby avoiding the problem that due to the uniform distribution of the wiring connected to the gate line and the uniform change of the resistance-capacitance impedance delay of the gate driving circuit to each gate line, the split-screen ripple is distributed along the wiring connection direction connected to the gate line, and the screen display effect is affected.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display panels, and in particular to a display panel, a driving method of the display panel, and a display device. BACKGROUND

[0002] With the continuous development of display technology, liquid crystal displays (LCDs) with low power consumption, low radiation, soft display pictures, thin bodies, and the like have been widely applied. At present, LCD displays are developing towards higher resolution, higher display quality, and larger size.

[0003] In the related art, a gate driving side uses a gate driver less (GDL) technology, and signals are sequentially output after conversion by a gate driving circuit. Due to the existence of the gate driving circuit, the frame of the gate driving side inevitably needs a certain width. The width of the gate driving side of the current LCD application product is usually 5 mm / 5.9 mm / 6.0 mm, and the like. Therefore, for consumers, the LCD display still has a large black frame, which affects the visual sense of the product. In order to reduce the frame of the gate driving side and affect the visual sense of the product, a frameless product is proposed. The gate driving circuit is directly placed in a non-display area, which can reduce the width of the side and improve the performance of the product. The output (scanning signal) of the gate driving circuit is sequentially output from the non-display area side. Since the distribution of the wires connected to the gate lines is uniform, the resistance-capacitance impedance delay of the gate driving circuit to each gate line changes uniformly, and screen ripples distributed along the connection direction of the wires connected to the gate lines will obviously appear, which affects the screen display effect. SUMMARY

[0004] The present application provides a display panel, a driving method of the display panel, and a display device, to solve the problem in the related art that since the distribution of the wires connected to the gate lines is uniform, the resistance-capacitance impedance delay of the gate driving circuit to each gate line changes uniformly, and screen ripples distributed along the connection direction of the wires connected to the gate lines will obviously appear, which affects the screen display effect.

[0005] In a first aspect, the present application provides a display panel, comprising: a display area and a non-display area, the display area comprising a plurality of rows of gate lines arranged in sequence, the non-display area being provided with a gate drive circuit, the gate drive circuit being arranged on a side of the non-display area close to the display area; wherein each row of the gate lines is provided with a connection point, different gate lines are provided with different positions of the connection points, and the positions of the connection points of at least N rows of the gate lines arranged in sequence are not adjacent, N being an integer not less than 2; and the gate drive circuit is connected to each of the gate lines through the connection point on the gate line.

[0006] In some examples, the gate drive circuit comprises: a plurality of gate drive interfaces arranged in sequence, each of the gate drive interfaces corresponding to a row of the gate lines, and each of the gate drive interfaces being connected to the corresponding gate line through the connection point on the gate line.

[0007] In some examples, the gate drive circuit further comprises: connection lines and cross lines, the cross lines being arranged in a cross output conversion region, and each of the cross lines corresponding to a gate drive interface; each of the connection lines corresponding to a row of the gate lines, and the connection line being perpendicular to the gate line, one end of the connection line being used to connect the connection point on the corresponding gate line, and the other end of the connection line being connected to the cross line corresponding to the gate drive interface matched with the corresponding gate line.

[0008] In some examples, the resistances of at least N cross lines are different and / or the resistances of at least N connection lines are different.

[0009] In some examples, the resistive-capacitive impedance delays of different gate lines to the corresponding gate drive interfaces are the same.

[0010] In some examples, the display area further comprises a plurality of data lines; and the non-display area further comprises: a chip on film arranged on a side of the non-display area away from the display area, wherein a source drive circuit is arranged in the chip on film, the source drive circuit being connected to the data lines and used to transmit a data signal to the data lines.

[0011] In some examples, the positions of the connection points of any two adjacent rows of the gate lines are not adjacent.

[0012] In some examples, the display panel further comprises: pixels connected to the gate lines; and the pixels comprise: red light pixels, green light pixels, and blue light pixels.

[0013] In a second aspect, the present application provides a driving method of a display panel, the driving method comprising: receiving a scanning signal output by a gate driving circuit to a gate line, wherein one connection point is arranged on each row of the gate lines, different gate lines are arranged with different positions of the connection points, and the positions of the connection points of at least N rows of sequentially arranged gate lines are not adjacent, N being an integer not less than 2, and the gate driving circuit is connected to the gate lines through the connection points on each of the gate lines; receiving a data signal transmitted by a source driving circuit through a data line, and controlling a pixel to emit light according to the data signal.

[0014] In a third aspect, a display device is provided, comprising a frame and the display panel according to any one of the above aspects, and the display panel is arranged on the frame.

[0015] Compared with the prior art, the above technical solutions provided by the embodiments of the present application have the following advantages:

[0016] The display panel provided by the embodiments of the present application comprises a display area and a non-display area, the display area comprises a plurality of rows of sequentially arranged gate lines, and is characterized in that the non-display area is provided with a gate driving circuit, and the gate driving circuit is arranged on a side of the non-display area close to the display area; wherein one connection point is arranged on each row of the gate lines, different gate lines are arranged with different positions of the connection points, and the positions of the connection points of at least N rows of sequentially arranged gate lines are not adjacent, N being an integer not less than 2; the gate driving circuit is connected to the gate lines through the connection points on each of the gate lines, at this time, the wiring of the gate driving circuit to the gate lines in the display panel is no longer uniformly distributed, the resistance-capacitance impedance delay of the gate driving circuit to the gate lines in the display panel is no longer uniformly changed, so that even if display unevenness occurs, a split-screen ripple is not formed when being connected into a whole, thereby avoiding the problem that due to the uniform distribution of the wiring connected to the gate lines, the resistance-capacitance impedance delay of the gate driving circuit to each gate line is uniformly changed, a split-screen ripple is distributed along the connection direction of the wiring connected to the gate lines, and the screen display effect is affected.

[0017] Additional aspects and advantages of the present application will be made apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application.

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, for those of ordinary skill in the art, other drawings can be obtained based on these drawings without any creative effort.

[0020] Figure 1 A basic structure schematic diagram of a display panel provided by Embodiment One of the present application;

[0021] Figure 2 A basic structure schematic diagram of a gate line provided by Embodiment One of the present application;

[0022] Figure 3 A basic schematic diagram of a split-screen wave along the gate drive circuit to the adjacent gate line provided by Embodiment One of the present application;

[0023] Figure 4 A basic structure schematic diagram of an optional display panel provided by Embodiment One of the present application;

[0024] Figure 5 A basic schematic diagram of equivalent input of a display panel provided by Embodiment Two of the present application;

[0025] Figure 6 A basic schematic diagram of a driving method of a display panel provided by Embodiment Three of the present application;

[0026] Figure 7 A basic schematic diagram of a display device provided by Embodiment Four of the present application;

[0027] Explanation of reference signs

[0028] 1 - display area; 2 - non-display area; 3 - gate line; 4 - gate drive circuit; 41 - connection line; 42 - cross line; 43 - cross output conversion area; 44 - gate drive interface; 5 - chip on film; 6 - display panel; 7 - frame; 8, connection point. DETAILED DESCRIPTION

[0029] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the following will combine the drawings in the embodiments of the present application to make a clear and complete description of the technical solutions in the embodiments of the present application. Obviously, the described embodiments are a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without any creative effort fall within the protection scope of the present application.

[0030] Embodiment One

[0031] In order to solve the problem that in the related art, due to the uniform distribution of the wire connected to the gate line, the RC delay of the gate drive circuit to each gate line changes uniformly, the split screen ripple is distributed along the wire connected to the gate line, and the screen display effect is affected, please refer to Figure 1 , Figure 1 A display panel provided by the embodiment of the present application, the display panel comprises a display area 1 and a non-display area 2, the display area 1 comprises a plurality of rows of sequentially arranged gate lines 3, characterized in that the non-display area 2 is provided with a gate drive circuit 4, the gate drive circuit 4 is arranged on the side of the non-display area 2 close to the display area 1; wherein one connection point 8 is arranged on each row of the gate lines 3, the positions of the connection points 8 of different gate lines 3 are different, and the positions of the connection points 8 of at least N rows of sequentially arranged gate lines 3 are not adjacent, N is an integer not less than 2; the gate drive circuit 4 is connected with the gate lines 3 through the connection points 8 on each gate line 3.

[0032] It can be understood that the non-display area 2 is arranged at the tail of the sequential arrangement direction of the gate lines 3 in the display area 1, specifically, taking the display area 1 comprising 1-N rows of gate lines 3 as an example, the side of the display area 1 close to the first row of gate lines 3 is the upper side, the side of the display area 1 close to the Nth row of gate lines 3 is the lower side, and the non-display area 2 is arranged on the lower side of the display area 1.

[0033] It can be understood that, as shown in Figure 2 , there are resistance and capacitance on each gate line 3, and the resistance and capacitance on the gate lines 3 in the display area 1 tend to be the same, and the gate drive circuit 4 connected to the gate lines 3 also has resistance and capacitance, if the positions of the connection points 8 on the adjacent gate lines 3 are adjacent, then at this time the wire distribution of the gate drive circuit 4 to the adjacent gate lines 3 is uniform, the RC delay of the gate drive circuit 4 to the adjacent gate lines 3 changes uniformly, thereby causing the split screen ripple to be obviously uniformly distributed along the wire distribution of the gate drive circuit 4 to the adjacent gate lines 3, as shown in Figure 3 , as shown in Figure 3 is a schematic diagram of the uniform distribution of the split screen ripple along the wire of the gate drive circuit to the adjacent gate lines in an example;

[0034] In the scheme provided by the present example, one connection point 8 is arranged on each row of the gate lines 3, the positions of the connection points 8 of different gate lines 3 are different, and the positions of the connection points 8 of at least N rows of sequentially arranged gate lines 3 are not adjacent, N is an integer not less than 2; specifically, as shown in Figure 1As shown, taking the case that there are K rows of gate lines 3, K connection points 8 can be divided on one row of gate lines 3, and the connection points 8 are sequentially numbered from left to right as 1-K connection points 8. The positions of the connection points 8 of each row of gate lines 3 are different, and the positions of the connection points 8 of at least N rows of sequentially arranged gate lines 3 are not adjacent. Taking the case that N is 2 and the positions of the Xth row and the X+1th row are not adjacent, if the position of the connection point 8 of the Xth row of gate lines 3 is i (i+1 and i-1 are both within the range of K), then the position of the connection point 8 of the X+1th row of gate lines 3 is not i+1 or i-1. At this time, the wires of the gate drive circuit 4 to the Xth and X+1th rows of gate lines 3 are no longer uniformly distributed, the resistance-capacitance impedance delay of the gate drive circuit 4 to adjacent gate lines 3 is not uniformly changed, thereby avoiding the occurrence of screen ripples, and improving the display effect. It can be understood that the positions of the connection points 8 of at least N rows of sequentially arranged gate lines 3 are not adjacent, N is an integer not less than 2, and N is less than the number of gate lines 3. In some examples, on the basis that the positions of the connection points 8 of at least N rows of sequentially arranged gate lines 3 are not adjacent, there can be a case that the positions of the connection points 8 of adjacent gate lines 3 are adjacent.

[0035] In some examples of the embodiment, the gate drive circuit 4 comprises: a plurality of sequentially arranged gate drive interfaces 44, each of the gate drive interfaces 44 corresponds to one row of the gate lines 3, and each of the gate drive interfaces 44 is connected with the gate lines 3 through the connection points 8 on the corresponding gate lines 3. Each of the gate drive interfaces 44 corresponds to one row of the gate lines 3, that is, if there are N rows of gate lines 3, the gate drive circuit 4 comprises N gate drive interfaces 44, and the GNth gate drive interface 44 corresponds to the GNth gate line 3.

[0036] Taking the above example, for example, as shown in Figure 4 Taking the case that the display area 1 contains 11 rows of gate lines 3, the gate drive circuit 4 comprises 11 gate drive interfaces 44 (G1-G11), the gate drive interfaces 44 are sequentially arranged, and the G1 gate drive circuit 4 corresponds to the G1 gate line 3, the G2 gate drive circuit 4 corresponds to the G2 gate line 3, and so on, and the G11 gate drive circuit 4 corresponds to the G11 gate line 3. At this time, as shown in Figure 4 The connection points 8 of the 11 rows of gate lines 3 are not the same, and the connection points 8 of at least 2 rows of gate lines 3 are not adjacent. The gate drive interfaces 44 are connected with the corresponding gate lines 3 through the connection points 8, so that the resistance-capacitance impedance delay of the gate drive interfaces 44 to the gate lines 3 is not uniformly changed, thereby avoiding the occurrence of screen ripples, and improving the display effect.

[0037] In some examples of the present embodiment, the gate drive circuit 4 further comprises connection lines 41 and cross lines 42, the cross lines 42 are arranged in cross output conversion areas 43, and each of the cross lines 42 corresponds to one of the gate drive interfaces 44; each of the connection lines 41 corresponds to a row of the gate lines 3, and the connection lines 41 are perpendicular to the gate lines 3, one end of the connection line 41 is used to connect the connection point 8 on the corresponding gate line 3, and the other end of the connection line 41 is connected to the cross line 42 corresponding to the gate drive interface 44 matched with the corresponding gate line 3. Wherein, the connection line 41 and the cross line 42 jointly transmit the scan signal transmitted by the gate drive interface 44 to the corresponding gate line 3, in addition, the cross line 42 and the connection line 41 jointly make the wiring of the gate drive circuit 4 to the gate line 3 in the display area 1 no longer uniformly distributed, and the R-C impedance delay of the gate drive circuit 4 to the adjacent gate line 3 is no longer uniformly changed, thereby avoiding the occurrence of split screen ripples and improving the display effect.

[0038] Taking the above example, specifically, as shown in Figure 4 the display area 1 includes 11 gate lines 3, at this time, the gate drive circuit 4 includes 11 gate drive interfaces 44 (G1 to G11), at this time, the G1 gate drive interface 44 is connected to the cross line 42 and the connection line 41, the connection line 41 is connected to the G1 gate line 3 through the connection point 8 on the G1 gate line 3; the G2 gate drive interface 44 is connected to the cross line 42 and the connection line 41, the connection line 41 is connected to the G2 gate line 3 through the connection point 8 on the G2 gate line 3; and so on, the G11 gate drive interface 44 is connected to the cross line 42 and the connection line 41, the connection line 41 is connected to the G11 gate line 3 through the connection point 8 on the G11 gate line 3, thereby making the connection of the gate drive interface 44 to the connection line 41 no longer uniformly distributed, and the R-C impedance delay of each gate drive interface 44 to the adjacent gate line 3 no longer uniformly changed, thereby avoiding the occurrence of split screen ripples and improving the display effect.

[0039] In some examples of the present embodiment, the resistances of at least N cross lines 42 are different and / or the resistances of at least N connection lines 41 are different. In order to make the connection of the gate drive interface 44 to the connection line 41 no longer uniformly distributed, and the R-C impedance delay of each gate drive interface 44 to the adjacent gate line 3 no longer uniformly changed, the resistances of the cross line 42 and / or the connection line 41 can be changed to make the R-C impedance delay of each gate drive interface 44 to the adjacent gate line 3 further changed, thereby making the connection of the gate drive interface 44 to the connection line 41 no longer uniformly distributed, and the R-C impedance delay of each gate drive interface 44 to the adjacent gate line 3 no longer uniformly changed, thereby avoiding the occurrence of split screen ripples and improving the display effect.

[0040] In some examples of this embodiment, the RC delay from different gate lines 3 to the corresponding gate drive interface 44 is the same. Specifically, in order to improve the display panel's display effect, the RC delay from the gate line 3 to the corresponding gate drive interface 44 can be set. Specifically, this can be achieved by adjusting the RC values ​​of each cross line 42 and / or connecting line 41, thereby making the RC delay from different gate lines 3 to the corresponding gate drive interface 44 the same.

[0041] Continuing from the previous example, specifically, such as Figure 4 As shown, taking a display area 1 containing 11 gate lines 3 as an example, the gate driving circuit 4 includes 11 gate driving interfaces 44 (G1 to G11). The G1 gate driving interface 44 is connected to the connecting line 41 via a crossover line 42. This connecting line 41 is connected to the G1 gate line 3 via a connection point 8 on the G1 gate line 3. Similarly, the G2 gate driving interface 44 is connected to the connecting line 41 via a crossover line 42. This connecting line 41 is connected to the G2 gate line 3 via a connection point 8 on the G2 gate line 3. And so on, the G11 gate driving interface 44 is connected to the connecting line 41 via a crossover line 42. This connecting line 41 is connected to the G11 gate line 3 via a connection point 8 on the G11 gate line 3. The impedance, capacitance, and reactance of the connecting line 41 and the crossover line 42 between the G1 gate driving interface 44 and the G1 gate line 3 can be adjusted. The delay (achieved by adjusting the resistance and / or capacitance of the cross line 42 and / or the connecting line 41 to adjust the RC reaction delay) is adjusted by adjusting the resistance of the connecting line 41 and the cross line 42 between the G2 gate drive interface 44 and the G2 gate line 3... and adjusting the resistance of the connecting line 41 and the cross line 42 between the G11 gate drive interface 44 and the G11 gate line 3, so that the RC reaction delay of the connecting line 41 and the cross line 42 between the G1 gate drive interface 44 and the G1 gate line 3 is equal to the RC reaction delay of the connecting line 41 and the cross line 42 between the G1 gate drive interface 44 and the G1 gate line 3... and equal to the RC reaction delay of the connecting line 41 and the cross line 42 between the G11 gate drive interface 44 and the G11 gate line 3, thereby making the RC reaction delay of different gate lines 3 to the corresponding gate drive interface 44 the same.

[0042] In some examples of this embodiment, the display area 1 further includes multiple rows of data lines; the non-display area 2 further includes a flip-chip film 5, which is disposed on the side of the non-display area 2 away from the display area 1. The flip-chip film 5 contains a source-level driving circuit, which is connected to the data lines and used to transmit data signals to the data lines. The source-level driving circuit is directly disposed on the flip-chip film 5, avoiding the need for separate placement space for the source-level driving circuit, further reducing the area of ​​the non-display area 2, increasing the screen-to-body ratio of the display area 1, and thus improving the display effect.

[0043] Continuing from the previous example, such as Figure 1 As shown, the flip-chip film 5 is disposed on the side of the non-display area 2 away from the display area 1. It can be understood that multiple flip-chip films 5 can be disposed in the non-display area 2, and each flip-chip film 5 is provided with a source-level driving circuit. The source-level driving circuit is connected to the data line and is used to transmit data signals to the data line.

[0044] In some examples of this embodiment, the connection points 8 of any two adjacent rows of gate lines 3 are not adjacent. The routing of the gate lines 3 from the gate driving circuit 4 to the display area 1 is no longer uniformly distributed, and the RC reactance delay of the gate lines 3 from the gate driving circuit 4 to the display area 1 is no longer uniformly varied, thereby avoiding screen splitting ripples and improving the display effect.

[0045] In some examples of this embodiment, the display panel further includes: pixels connected to the gate line 3; the pixels include: red light pixels, green light pixels and blue light pixels; or, the pixels include red light pixels, green light pixels, blue light pixels and yellow light pixels; or, the pixels include red light pixels, green light pixels, blue light pixels and white light pixels; it is understood that each pixel is connected to a row of gate lines 3 and a column of data lines.

[0046] The display panel provided in the embodiment comprises a display area 1 and a non-display area 2, the display area 1 comprises a plurality of rows of sequentially arranged gate lines 3, and the non-display area 2 is provided with a gate drive circuit 4, the gate drive circuit 4 is arranged on the side of the non-display area 2 close to the display area 1, wherein one connection point 8 is arranged on each row of the gate lines 3, the positions of the connection points 8 of different gate lines 3 are different, and the positions of the connection points 8 of at least N rows of sequentially arranged gate lines 3 are not adjacent, N is an integer greater than or equal to 2, and the gate drive circuit 4 is connected with the gate lines 3 through the connection points 8 on each gate line 3, at this time, the wire distribution of the gate drive circuit 4 to the gate lines 3 in the display panel is no longer uniform, the resistance-capacitance impedance delay of the gate drive circuit 4 to the gate lines 3 in the display panel is no longer uniformly changed, so that even if the display uneven phenomenon occurs, the split screen wave is not formed by being connected into a whole, and the problem that the split screen wave is distributed along the wire connection direction to the gate lines 3 due to the uniform wire distribution of the gate drive circuit 4 to each gate line 3 and the uniform change of the resistance-capacitance impedance delay of the gate drive circuit 4 to each gate line 3, thereby affecting the screen display effect is avoided.

[0047] Embodiment two

[0048] In order to better understand the present application, a more specific example is provided in the embodiment for description.

[0049] Specifically, the present example provides a display panel, the display panel comprises a display area and a non-display area, wherein a GDL circuit is arranged in the non-display area, and a cross output conversion area is added in the non-display area, so that the GDL signal input to the gate lines of the display area has been positionally converted.

[0050] As shown in the equivalent input diagram, Figure 5 the input positions of G1-G2160 are not fixed, the difference (<1us) in falling time of a plurality of positions is determined according to the actual simulation result, the optimal input signal position of each gate line is obtained, since the input signal has changed in position at this time, the RC on each output will also change, through the cross output signal, the difference between the adjacent gate drive lines will not change uniformly, the pixel charging difference caused by the uniform difference between the gate drive lines can be avoided, the split screen wave can be avoided, and the product quality is improved.

[0051] Embodiment three

[0052] Based on the same concept, the present embodiment provides a driving method of a display panel, as shown in the equivalent input diagram, Figure 6 the driving method of the display panel comprises:

[0053] S101, receive a scanning signal output by a gate driving circuit to a gate line, wherein one connection point is arranged on each of the gate lines, the positions of the connection points arranged on different gate lines are different, and the positions of the connection points of at least N rows of sequentially arranged gate lines are not adjacent, N is an integer not less than 2, and the gate driving circuit is connected to the gate lines through the connection points on each of the gate lines;

[0054] S102, receive a data signal transmitted by a source driving circuit through a data line, and control a pixel to emit light according to the data signal.

[0055] The display panel comprises a display area and a non-display area, the display area comprises a plurality of rows of sequentially arranged gate lines, and the non-display area is provided with a gate driving circuit, which is arranged on a side of the non-display area close to the display area; wherein one connection point is arranged on each of the gate lines, the positions of the connection points arranged on different gate lines are different, and the positions of the connection points of at least N rows of sequentially arranged gate lines are not adjacent, N is an integer not less than 2; and the gate driving circuit is connected to the gate lines through the connection points on each of the gate lines.

[0056] In some examples, the gate driving circuit comprises a plurality of sequentially arranged gate driving interfaces, each of which corresponds to one row of the gate lines, and each of the gate driving interfaces is connected to the gate line through the connection point on the corresponding gate line.

[0057] In some examples, the gate driving circuit further comprises connection lines and cross lines, the cross lines are arranged in a cross output conversion region, and each of the cross lines corresponds to one of the gate driving interfaces; each of the connection lines corresponds to one row of the gate lines, and the connection line is perpendicular to the gate line, one end of the connection line is used to connect the connection point on the corresponding gate line, and the other end of the connection line is connected to the cross line corresponding to the gate driving interface matched with the corresponding gate line.

[0058] In some examples, the resistances of at least N cross lines are different and / or the resistances of at least N connection lines are different.

[0059] In some examples, the resistances-capacitance impedance delays of different gate lines to corresponding gate driving interfaces are the same.

[0060] In some examples, the display region further comprises a plurality of data lines; and the non-display region further comprises: a chip on film, disposed on a side of the non-display region away from the display region, wherein a source level driving circuit is disposed in the chip on film, and the source level driving circuit is connected with the data lines, and is configured to transmit a data signal to the data lines.

[0061] In some examples, positions of the connection points of any two adjacent rows of the gate lines are not adjacent.

[0062] In some examples, the display panel further comprises: a pixel connected to the gate line; the pixel comprises: a red light pixel, a green light pixel and a blue light pixel; or, the pixel comprises a red light pixel, a green light pixel, a blue light pixel and a yellow light pixel; or, the pixel comprises a red light pixel, a green light pixel, a blue light pixel and a white light pixel.

[0063] Embodiment four

[0064] Based on the same concept, the present embodiment provides a display device, such as Figure 7 As shown, the display device comprises a frame 7 and a display panel 6 as claimed in any one of the above, and the display panel 6 is disposed on the frame 7.

[0065] It should be noted that, in the present text, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any such actual relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover non-exclusive inclusions, so that a process, method, article, or apparatus that comprises a list of elements does not only include those elements, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the phrase "comprising a" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0066] The above description is merely one specific implementation of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application shall not be limited to the embodiments shown herein, but shall be consistent with the widest scope consistent with the principles and novel features set forth herein.

Claims

1. A display panel, the display panel comprising: A display area and a non-display area, wherein the display area includes multiple rows of sequentially arranged gate lines, characterized in that the non-display area is provided with a gate driving circuit, the gate driving circuit being disposed on the side of the non-display area closer to the display area; wherein... Each row of the gate line is provided with a connection point. The connection points of different gate lines are located at different positions, and the connection points of at least N rows of gate lines are not adjacent, where N is an integer not less than 2. The gate drive circuit is connected to the gate line through the connection point on each of the gate lines. The gate driving circuit further includes: connecting lines, cross lines, and a plurality of gate driving interfaces arranged in sequence. The cross lines are disposed in the cross output conversion area, and each cross line corresponds to one gate driving interface. Each connecting line corresponds to a row of gate lines, and the connecting line is perpendicular to the gate lines. One end of the connecting line is used to connect to the connection point on the corresponding gate line, and the other end of the connecting line is connected to the cross line corresponding to the gate driving interface matched by the corresponding gate line. At least N of the said cross lines have different resistances and / or at least N of the said connecting lines have different resistances; The display panel is used to: adjust the resistance values ​​of each cross line and / or connecting line so that the RC delay from different gate lines to the corresponding gate drive interface is the same.

2. The display panel according to claim 1, characterized in that, Each of the gate drive interfaces corresponds to a row of gate lines, and each of the gate drive interfaces is connected to the gate line through the connection point on the corresponding gate line.

3. The display panel according to claim 1, characterized in that, The display area further includes multiple rows of data lines; the non-display area further includes a flip-chip film, which is disposed on the side of the non-display area away from the display area, wherein the flip-chip film contains a source-level driving circuit, which is connected to the data lines and is used to transmit data signals to the data lines.

4. The display panel according to claim 1, characterized in that, The connection points of any two adjacent rows of gate lines are not adjacent.

5. The display panel according to claim 1, characterized in that, The display panel further includes pixels connected to the gate line; the pixels include red pixels, green pixels and blue pixels.

6. A driving method for a display panel, applied to the display panel as described in any one of claims 1 to 5, characterized in that, The driving method for the display panel includes: The gate driving circuit receives a scan signal output to the gate line, wherein each row of the gate line is provided with a connection point, the connection points of different gate lines are located at different positions, and the connection points of at least N rows of gate lines are not adjacent, where N is an integer not less than 2. The gate driving circuit is connected to the gate line through the connection point of each gate line. The source-level driving circuit receives data signals transmitted via data lines and controls the pixels to emit light based on the data signals.

7. A display device, characterized in that, The display device includes a frame and a display panel as described in any one of claims 1-5, the display panel being disposed on the frame.

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