PLC control module input and output integrated interface and method

Abstract

The PLC control module input and output integrated interface and method described in the present invention propose an integrated interface compatible with four different functional types: NPN input, PNP input, NPN output, and PNP output, so as to achieve adaptive modification of the interface function through online configuration without changing the control module hardware and device wiring, so as to meet the changes of peripheral devices. The integrated interface includes at least one group of peripheral device interfaces including a peripheral device signal terminal, and a first single-pole double-throw relay and a second single-pole double-throw relay are connected in series with the peripheral device signal terminal; the switching of the working states of the first single-pole double-throw relay and the second single-pole double-throw relay is selected by the main control chip of the PLC control module.

Description

Technical Field

[0001] The invention discloses an integrated input-output interface applied to a PLC control module and a control method thereof, belonging to the field of information data and electrical technology. Background Art

[0002] With the rapid development of the domestic economy, more and more information technology and automation equipment have been widely used in the fields of industrial production and logistics transportation.

[0003] Existing intelligent and automated equipment generally uses PLC modules as the main control unit of the control system. The input and output interface structures of PLC modules are generally independent and decentralized. Each type of input and output interface usually only supports one structure type, NPN or PNP, and there are few integrated interfaces with compatible functions.

[0004] The above-mentioned existing technical characteristics require that only external devices that match their interface structures can be selected during the early design and selection of equipment. For example, during the later after-sales maintenance and upkeep of the equipment, due to the limitations of the interface structure type, a large number of cables need to be changed when replacing other types of equipment, which not only has a high update cost, but also a high failure rate, which is not conducive to improving the equipment operation efficiency of the overall control system.

[0005] In view of this, this patent application is proposed. Summary of the invention

[0006] The PLC control module input-output integrated interface and method described in the present invention aims to solve the problems existing in the above-mentioned prior art and propose an integrated interface compatible with four different functional types: NPN input, PNP input, NPN output, and PNP output. This allows the interface function to be adaptively modified through online configuration without changing the control module hardware and device wiring to meet changes in peripheral devices.

[0007] To achieve the above design objectives, the PLC control module input-output integrated interface includes at least one group of peripheral device interfaces including a peripheral device signal terminal, and a first single-pole double-throw relay and a second single-pole double-throw relay are connected in series with the peripheral device signal terminal; the switching of the working states of the first single-pole double-throw relay and the second single-pole double-throw relay is selected by the main control chip of the PLC control module; the normally closed end of the first single-pole double-throw relay is connected in parallel with two input signal processing circuits, one of which includes a first diode and an optocoupler, the positive pole of the receiving end of the optocoupler is connected to a 24V power supply, the negative pole of the optocoupler is connected to a current-limiting first resistor, the current-limiting first resistor is connected in series with a diode to form an NPN input loop, the emitter of the optocoupler is grounded, the emitter collector of the optocoupler is connected to the input signal terminal, and the input signal terminal is connected to a subsequent processing circuit; the other circuit includes a second diode and a first transistor, The base of the first transistor is connected to the second current-limiting resistor, the second current-limiting resistor is connected in series with the second diode to form a PNP input circuit, and the emitter of the first transistor is grounded; the normally-open end of the first single-pole double-throw relay is connected to the second single-pole double-throw relay, the normally-closed end of the second single-pole double-throw relay is connected in series with the third transistor and the fourth transistor, the emitter of the third transistor is connected to the 24V power supply, the collector of the third transistor is connected to the normally-closed end of the second single-pole double-throw relay, the base of the third transistor is connected to the collector of the fourth transistor, the emitter of the fourth transistor is grounded, the base of the fourth transistor is connected to the output signal end, and the output signal end is connected to the subsequent processing circuit; the normally-open end of the second single-pole double-throw relay is connected to the collector of the second transistor, the emitter of the second transistor is grounded, the base of the second transistor is connected to the output signal end, and the output signal end is connected to the subsequent processing circuit.

[0008] Based on the inventive concept of the above-mentioned PLC control module input and output integrated interface, the present application also implements the following PLC control module input and output integrated interface control method: that is, through the PLC controlling the switching of the normally open and normally closed states of the first single-pole double-throw relay and the second single-pole double-throw relay, thereby realizing the conversion between PNP and NPN input and output control modes; when the first single-pole double-throw relay is in the normally closed state, it is the input mode, and the NPN input circuit is formed by the optocoupler in series with the first diode, and the PNP input circuit is formed by the first transistor in series with the second diode; when the first single-pole double-throw relay is in the normally open state, it is the output mode, and the second single-pole double-throw relay is in the normally closed state to form a PNP output circuit, and when the second single-pole double-throw relay is in the normally open state, it forms an NPN output circuit.

[0009] Furthermore, when the connected peripheral device is an NPN input device, the first single-pole double-throw relay is set to a normally closed state; when there is a signal trigger, the signal end of the peripheral device is at a low level, the first diode is turned on, and the second diode and the first transistor are cut off. At this time, the current passes through the internal 24V power supply through the transmitting end of the optocoupler, the first resistor and the first diode to the signal end of the peripheral device to form a signal loop; at this time, the output transistor of the optocoupler is turned on, and the input signal end is at a low level; when there is no signal trigger, the signal end of the peripheral device is in a floating state, and the optocoupler is turned on. When there is no current flowing through the emitter of the optocoupler, the transistor at the output end of the optocoupler is cut off, and the input signal end is at a high level; when the connected peripheral device is a PNP input device, the first single-pole double-throw relay is set to a normally closed state; when there is a signal trigger, the signal end of the peripheral device is at a 24V high level, and after being stabilized by the second diode, the first transistor is turned on, and the current passes through the internal 24V power supply, the emitter of the optocoupler, the fourth resistor and the first transistor to form a complete loop, and the output transistor of the optocoupler is turned on, and the input signal end is at a low level; when there is no signal trigger , the peripheral device signal end is in a suspended state, no current flows through the emitter end of the optocoupler, the transistor at the output end of the optocoupler is cut off, and the input signal end is at a high level; when the connected peripheral device is in NPN output control mode, the first single-pole double-throw relay is set to a normally open state, and the second single-pole double-throw relay is set to a normally open state; when external output is required, the output signal end outputs a high level, and the second transistor control end is turned on, and the peripheral device signal end is at a low level; when external output is not required, the output signal end outputs a low level, and the second transistor control end is cut off, and the peripheral device signal end is in a suspended state; when the connected peripheral device is in PNP output control mode, the first single-pole double-throw relay is set to a normally open state, and the second single-pole double-throw relay is set to a normally closed state; when external output is required, the output signal end outputs a high level, and the third and fourth transistors are turned on, and the peripheral device signal end is at a high level; when external output is not required, the output signal end outputs a low level, and the third and fourth transistors are cut off, and the peripheral device signal end is in a suspended state.

[0010] In summary, the advantages of the PLC control module input-output integrated interface and method are that the interface circuit is compatible with both NPN and PNP input-output structures, and the PLC controls the opening and closing states of two relays in series to achieve switching of four functional types of interface modes to cope with changes in the type of external device. The interface type configuration is relatively simple, which is not only conducive to improving the operating efficiency of the interface circuit, but also effectively saves the number of cable connections, and the interface circuit is also highly adaptable. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a structural diagram of the integrated input and output interface of the PLC control module; Implementation

[0012] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0013] Embodiment 1, as Figure 1 As shown, the integrated input and output interface of the PLC control module of the present application has at least one group of peripheral device interfaces including a positive electrode A of a peripheral device, a negative electrode C of a peripheral device and a signal terminal B of a peripheral device, and a first single-pole double-throw relay S1 and a second single-pole double-throw relay S2 are connected in series with the signal terminal B of the peripheral device; wherein the first single-pole double-throw relay S1 is used to switch the input and output mode, and the second single-pole double-throw relay S2 is used to switch the output state of NPN and PNP, and the switching of the working states of S1 and S2 is selected by the main control chip of the PLC control module; the normally closed end of the first single-pole double-throw relay S1 is connected in parallel with the two The input signal processing circuit comprises a first diode D1 and an optocoupler IC1, the positive electrode of the receiving end of the optocoupler IC1 is connected to a 24V power supply, the negative electrode of the optocoupler IC1 is connected to a current-limiting first resistor R1 and a current-limiting fourth resistor R4, the current-limiting first resistor R1 is connected in series with the diode D1 to form an NPN input loop, the emitter of the optocoupler IC1 is grounded, the emitter collector of the optocoupler IC1 is connected to the input signal D terminal through a pull-up sixth resistor R6, and the input signal D terminal is connected to a subsequent processing circuit; the other path comprises a second diode D2 and a first transistor Q1, the collector of the first transistor Q1 is connected to the current-limiting fourth resistor R4, and the collector of the first transistor Q1 is connected to the current-limiting fourth resistor R5. Resistor R4, the base of the first transistor Q1 is connected to the current-limiting second resistor R2 and the pull-down third resistor R3, the current-limiting second resistor R2 is connected in series with the second diode D2 to form a PNP input circuit, and the emitter of the first transistor Q1 is grounded; the normally open end of the first single-pole double-throw relay is connected to the second single-pole double-throw relay S2, the normally closed end of the second single-pole double-throw relay S2 is connected in series with the third transistor Q3 and the fourth transistor Q4, the emitter of the third transistor Q3 is connected to a 24V power supply, the collector of the third transistor Q3 is connected to the normally closed end of the second single-pole double-throw relay S2, and the base of the third transistor Q3 is connected to the 24V power supply. The ninth resistor R9 and the current-limiting tenth resistor R10 are connected to the collector of the fourth triode Q4, the emitter of the fourth triode Q4 is grounded, the base of the fourth triode Q4 is connected to the output signal E end through the current-limiting twelfth resistor R12 and the pull-down eleventh resistor R11, and the output signal E end is connected to the subsequent processing circuit; the normally open end of the second single-pole double-throw relay S2 is connected to the collector of the second triode Q2, the emitter of the second triode Q2 is grounded, the base of the second triode Q2 is connected to the output signal E end through the current-limiting seventh resistor R7 and the pull-down eighth resistor R8, and the output signal E end is connected to the subsequent processing circuit.

[0014] As the structural design of the integrated interface mentioned above, the present application controls the switching of the normally open and normally closed states of the first single-pole double-throw relay S1 and the second single-pole double-throw relay S2 through PLC, thereby realizing the conversion between PNP and NPN input and output control modes.

[0015] That is, when the first single-pole double-throw relay S1 is in a normally closed state, it is in input mode, the optocoupler IC1 is connected in series with the first diode D1 to form an NPN input circuit, and the first transistor Q1 is connected in series with the second diode D2 to form a PNP input circuit; when the first single-pole double-throw relay S1 is in a normally open state, it is in output mode, specifically, when the second single-pole double-throw relay S2 is in a normally closed state, it forms a PNP output circuit, and when the second single-pole double-throw relay S2 is in a normally open state, it forms an NPN output circuit.Based on the design of the above-mentioned PLC control module input and output integrated interface, the present application also proposes the following PLC control module input and output integrated interface control method: when the connected peripheral device is an NPN input device (the signal is low level when triggered, and the signal is floating when not triggered), the first single-pole double-throw relay S1 is set to a normally closed state; when a signal is triggered, the peripheral device signal terminal B is low level, the first diode D1 is turned on, the second diode D2 and the first transistor Q1 are cut off, and at this time the current passes through the internal 24V power supply through the emitter end of the optocoupler IC1, the first resistor R1 and the first diode D1 to the peripheral device signal terminal B to form a signal loop; at this time, the output transistor of the optocoupler IC1 is turned on, and the input signal terminal D is low level. When there is no signal trigger, the signal terminal B of the peripheral device is suspended, no current flows through the emitter of the optocoupler IC1, and the transistor at the output end of the optocoupler IC1 is cut off. At this time, the input signal terminal D is high level; when the connected peripheral device is a PNP input device (the signal is high level when triggered, and the signal is suspended when not triggered), the first single-pole double-throw relay S1 is set to the normally closed state; when there is a signal trigger, the signal terminal B of the peripheral device is 24V high level, and after being stabilized by the second diode D2 (the model can be MM3Z15VT1G, and its voltage regulation value is 15V), the positive pole of the second diode D2 is 9V, which can meet the conduction condition of the first transistor Q1. The first transistor Q1 is turned on, and the current passes through the internal 24V power supply and the emitter of the optocoupler IC1. The fourth resistor R4 and the first transistor Q1 form a complete loop, the output transistor of the optocoupler IC1 is turned on, and the input signal D is at a low level; when there is no signal trigger, the peripheral device signal terminal B is suspended, no current flows through the emitter of the optocoupler IC1, the output transistor of the optocoupler IC1 is cut off, and the input signal D is at a high level; when the connected peripheral device is in NPN output control mode (low level when output is required, suspended when output is not required), the first single-pole double-throw relay S1 is set to a normally open state, and the second single-pole double-throw relay S2 is set to a normally open state; when external output is required, the output signal E outputs a high level, and the control terminal of the second transistor Q2 is turned on, and the peripheral device signal terminal B is low. When the external output is not required, the output signal E terminal outputs a low level, at which time the control terminal of the second transistor Q2 is cut off, and the peripheral device signal terminal B is in a floating state; when the connected peripheral device is in PNP output control mode (high level when output is required, and floating when output is not required), the first single-pole double-throw relay S1 is set to a normally open state, and the second single-pole double-throw relay S2 is set to a normally closed state; when external output is required, the output signal E terminal outputs a high level, at which time the third transistor Q3 and the fourth transistor Q4 are turned on, and the peripheral device signal terminal B is a high level; when external output is not required, the output signal E terminal outputs a low level, at which time the third transistor Q3 and the fourth transistor Q4 are cut off, and the peripheral device signal terminal B is in a floating state.

[0016] As mentioned above, similar technical solutions can be derived from the scheme contents given in the drawings and descriptions. However, any modification, equivalent change and modification of any component shape, size, connection mode and installation structure made to the above description according to the technical essence of the present invention, as well as slight adjustment of the position and structure of each component, which do not deviate from the scheme contents of the structure of the present invention, still fall within the scope of rights of the technical solution of the present invention.

Claims

1. A PLC control module input and output integrated interface, characterized in that: The device comprises at least one set of peripheral device interfaces including a peripheral device signal terminal, a first single-pole double-throw relay and a second single-pole double-throw relay being connected in series with the peripheral device signal terminal; The switching of the working states of the first single-pole double-throw relay and the second single-pole double-throw relay is selected by the main control chip of the PLC control module; The normally closed end of the first single-pole double-throw relay is connected in parallel with two input signal processing circuits, one of which includes a first diode and an optocoupler, the positive electrode of the receiving end of the optocoupler is connected to a 24V power supply, the negative electrode of the optocoupler is connected to a current-limiting first resistor, the first current-limiting resistor is connected in series with a diode to form an NPN input loop, the emitter of the optocoupler is grounded, the collector of the emitter of the optocoupler is connected to the input signal end, and the input signal end is connected to a subsequent processing circuit; the other includes a second diode and a first transistor, the base of the first transistor is connected to a current-limiting second resistor, the second current-limiting resistor is connected in series with a second diode to form a PNP input circuit, and the emitter of the first transistor is grounded; The normally open end of the first single-pole double-throw relay is connected to the second single-pole double-throw relay, the normally closed end of the second single-pole double-throw relay is connected in series with the third transistor and the fourth transistor, the emitter of the third transistor is connected to the 24V power supply, the collector of the third transistor is connected to the normally closed end of the second single-pole double-throw relay, the base of the third transistor is connected to the collector of the fourth transistor, the emitter of the fourth transistor is grounded, the base of the fourth transistor is connected to the output signal end, and the output signal end is connected to the subsequent processing circuit; the normally open end of the second single-pole double-throw relay is connected to the collector of the second transistor, the emitter of the second transistor is grounded, the base of the second transistor is connected to the output signal end, and the output signal end is connected to the subsequent processing circuit.

2. A control method using the PLC control module input-output integrated interface as claimed in claim 1, characterized in that: The switching between the normally open and normally closed states of the first single-pole double-throw relay and the second single-pole double-throw relay is controlled by PLC, thereby realizing the switching between the PNP and NPN input and output control modes; When the first single-pole double-throw relay is in a normally closed state, it is in input mode, and the optocoupler is connected in series with the first diode to form an NPN input circuit, and the first transistor is connected in series with the second diode to form a PNP input circuit; When the first single-pole double-throw relay is in the normally open state, it is in the output mode; when the second single-pole double-throw relay is in the normally closed state, it forms a PNP output circuit; when the second single-pole double-throw relay is in the normally open state, it forms an NPN output circuit.

3. The control method of the PLC control module input-output integrated interface according to claim 2, characterized in that: When the connected peripheral device is an NPN input device, the first single-pole double-throw relay is set to a normally closed state; when there is a signal trigger, the peripheral device signal end is at a low level, the first diode is turned on, the second diode and the first transistor are turned off, and at this time, the current passes through the internal 24V power supply through the emitter end of the optocoupler, the first resistor and the first diode to the peripheral device signal end to form a signal loop; at this time, the output transistor of the optocoupler is turned on, and the input signal end is at a low level; when there is no signal trigger, the peripheral device signal end is in a suspended state, no current flows through the emitter end of the optocoupler, the optocoupler output transistor is turned off, and the input signal end is at a high level; When the connected peripheral device is a PNP input device, the first single-pole double-throw relay is set to a normally closed state; when there is a signal trigger, the peripheral device signal end is 24V high level, after being stabilized by the second diode, the first transistor is turned on, and the current passes through the internal 24V power supply, the emitter of the optocoupler, the fourth resistor and the first transistor to form a complete loop, and the output transistor of the optocoupler is turned on. At this time, the input signal end is a low level; when there is no signal trigger, the peripheral device signal end is in a suspended state, no current flows through the emitter of the optocoupler, and the optocoupler output transistor is cut off. At this time, the input signal end is a high level; When the connected peripheral device is in NPN output control mode, the first single-pole double-throw relay is set to the normally open state, and the second single-pole double-throw relay is set to the normally open state; when external output is required, the output signal end outputs a high level, at which time the second transistor control end is turned on, and the peripheral device signal end is a low level; when external output is not required, the output signal end outputs a low level, at which time the second transistor control end is turned off, and the peripheral device signal end is in a suspended state; When the connected peripheral device is in PNP output control mode, the first single-pole double-throw relay is set to the normally open state, and the second single-pole double-throw relay is set to the normally closed state; when external output is required, the output signal end outputs a high level, at this time the third transistor and the fourth transistor are turned on, and the peripheral device signal end is a high level; when external output is not required, the output signal end outputs a low level, at this time the third transistor and the fourth transistor are turned off, and the peripheral device signal end is in a floating state.

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