Method and device for generating multi-thread test case, electronic equipment and storage medium

By selecting multiple basic test cases from single-threaded test cases, compiling and generating isolated basic binary files, and combining them with scheduling binary files, the problem of low efficiency in generating multi-threaded test cases is solved, and efficient multi-threaded test case generation is achieved.

CN116048903BActive Publication Date: 2025-12-30HYGON INFORMATION TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202210482345.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-05
Publication Date
2025-12-30
Estimated Expiration
2042-05-05

AI Technical Summary

Technical Problem

In existing technologies, the problem of how to efficiently generate multi-threaded test cases is particularly evident after the introduction of CPU hyper-threading technology, as traditional single-threaded test cases are difficult to meet the needs of multi-threaded verification.

Method used

Select multiple base test cases from single-threaded test cases, compile their source files and scheduling code to generate isolated base binary files, and combine them with the scheduling binary files to form multi-threaded test case binary files, thus avoiding modification of the source code of single-threaded test cases.

Benefits of technology

It improves the efficiency of generating multi-threaded test cases, reduces code modification, compilation and verification operations, and saves time and manpower.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN116048903B_ABST
    Figure CN116048903B_ABST
Patent Text Reader

Abstract

The embodiment of the application discloses a multi-thread test case generation method and device, electronic equipment and computer readable storage medium, relates to the technical field of computers, and can effectively improve the generation efficiency of multi-thread test cases. The method comprises the following steps: selecting a first number of single-thread test cases as basic test cases from single-thread test cases, wherein the first number is greater than one; compiling source files of each basic test case and a preset test case scheduling code to obtain a basic binary file corresponding to each basic test case and a scheduling binary file corresponding to the test case scheduling code; wherein the physical memory spaces where the basic binary files corresponding to each basic test case are located are isolated from each other; and generating a binary file of a target test case according to the basic binary files and the scheduling binary file. The application can be used for generating multi-thread test cases.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method and apparatus for generating multi-threaded test cases, an electronic device, and a storage medium. Background Technology

[0002] The development and design of a CPU (central processing unit) involves modifications and updates to the instruction set. Therefore, a complete set of ISA (Instruction Set Architecture) test cases is needed to verify the CPU's functionality at the ISA level and ensure compatibility between different versions of the CPU's ISA-based features.

[0003] Traditionally, many test cases are written using single-threaded techniques. However, with the introduction of CPU hyper-threading technology, especially SMT (Simultaneous Multithreading), there is an increasing demand for multi-threaded test cases. Currently, there is no effective solution in existing technologies for efficiently generating a large number of multi-threaded test cases. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a method and apparatus for generating multi-threaded test cases, an electronic device, and a computer-readable storage medium, which can effectively improve the efficiency of generating multi-threaded test cases.

[0005] In a first aspect, embodiments of the present invention provide a method for generating multi-threaded test cases, comprising: selecting a first number of single-threaded test cases as basic test cases from single-threaded test cases, wherein the first number is greater than one; compiling the source files of each basic test case and a preset test case scheduling code to obtain a basic binary file corresponding to each basic test case and a scheduling binary file corresponding to the test case scheduling code; wherein the physical memory spaces where the basic binary files corresponding to each basic test case are located are isolated from each other; and generating a binary file of a target test case based on the basic binary file and the scheduling binary file.

[0006] In one implementation, before compiling the source files of each of the basic test cases and the preset test case scheduling code, the method further includes: setting the test case scheduling code as header files in the source files of each of the basic test cases to obtain corresponding extended source files.

[0007] In one implementation, compiling the source files of each basic test case and the preset test case scheduling code to obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code includes: compiling the extended source files corresponding to each basic test case to obtain the corresponding extended binary files, wherein the physical memory spaces where the basic test case parts of each extended binary file are located are isolated from each other, the physical memory spaces where the test case scheduling parts of each extended binary file are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each extended binary file is located are not isolated from each other; generating the binary file of the target test case based on the basic binary file and the scheduling binary file includes: generating the binary file of the target test case based on each extended binary file.

[0008] In one implementation, generating the binary file of the target test case based on each of the extended binary files includes: merging each of the extended binary files into a merged file, and deleting multiple scheduling binary files corresponding to the scheduling code of each test case in the merged file until only one is retained, thereby obtaining the binary file of the target test case.

[0009] In one implementation, compiling the source files of each basic test case and the preset test case scheduling code to obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code includes: compiling the extended source files corresponding to each basic test case to obtain the corresponding extended binary files, wherein the test case scheduling code, which is repeated multiple times in each extended source file, is only compiled once; the physical memory spaces where the basic test case parts in each extended binary file are located are isolated from each other, the physical memory spaces where the test case scheduling parts in each extended binary file are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each extended binary file is located are not isolated from each other; generating the binary file of the target test case based on the basic binary file and the scheduling binary file includes: merging each extended binary file into a merged file to obtain the binary file of the target test case.

[0010] In one implementation, the method further includes setting the test case scheduling code as a header file after the source files of each of the basic test cases, and using a macro mechanism to isolate the test case scheduling code from the source files of each of the basic test cases, so that when a preset condition is met, the test case scheduling code and the source files of the basic test cases are compiled, and when the preset condition is not met, only the source files of the basic test cases are compiled.

[0011] In one implementation, compiling the source files of each of the basic test cases includes: for each source file of the basic test case, calling a first preset function to generate a configuration file corresponding to the basic test case, the configuration file including randomly initialized system environment variables; initializing the system runtime environment according to the configuration file and pre-set loading rules; compiling and converting the source file of each basic test case and the corresponding configuration file to obtain the basic binary file corresponding to each basic test case.

[0012] In one implementation, initializing the system operating environment according to the configuration file and pre-set loading rules includes: performing at least one of the following operations according to the configuration file and pre-set loading rules: specifying the current operating mode, specifying the current page table mode, initializing the initial value of the control register, creating the user segment, system segment, and segment selector, creating the GDT (Global Descriptor Table), LDT (Local Descriptor Table), IDT (Interrupt Descriptor Table), and TSS (task state segment), creating the memory page table mapping required for program execution within the specified virtual address and physical address range, and switching the system mode.

[0013] In one implementation, the test case scheduling code is used to: control the program to jump to different thread code when it starts; and / or control the program's exit process, and to detect the running results of each thread in real time and synchronize them to other threads.

[0014] In one implementation, the scheduling binary file corresponding to the test case scheduling code is stored in the common code segment of the binary file of the target test case, and the data that needs to be interacted between different threads is stored in the common data segment of the binary file of the target test case.

[0015] In one implementation, before compiling the source files of each of the basic test cases and the preset test case scheduling code, the method further includes: determining a first number based on the number of test threads corresponding to the target test cases to be generated, wherein the number of test threads is greater than or equal to two; and dividing the total physical memory space of the computer into a second number of isolated physical memory spaces, wherein the second number is greater than or equal to the first number.

[0016] In one implementation, the basic test cases may be the same or different.

[0017] Secondly, embodiments of the present invention also provide a multi-threaded test case generation apparatus, the apparatus comprising: a selection unit, configured to select a first number of single-threaded test cases as basic test cases from single-threaded test cases, wherein the first number is greater than one; a compilation unit, configured to compile the source files of each of the basic test cases and a preset test case scheduling code to obtain a basic binary file corresponding to each of the basic test cases and a scheduling binary file corresponding to the test case scheduling code; wherein the physical memory spaces of the basic binary files corresponding to each of the basic test cases are isolated from each other; and a generation unit, configured to generate a binary file of a target test case based on the basic binary file and the scheduling binary file.

[0018] In one embodiment, the apparatus further includes a setting unit, configured to set the test case scheduling code as a header file in the source files of each of the basic test cases before compiling the source files of each of the basic test cases and the preset test case scheduling code, thereby obtaining corresponding extended source files.

[0019] In one implementation, the compilation unit is specifically used to compile the extended source files corresponding to each of the basic test cases to obtain corresponding extended binary files. The physical memory spaces where the basic test case parts of each of the extended binary files are located are isolated from each other, the physical memory spaces where the test case scheduling parts of each of the extended binary files are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each of the extended binary files are located are not isolated from each other. The generation unit is specifically used to generate the binary file of the target test case based on each of the extended binary files.

[0020] In one implementation, the generation unit is specifically used to merge each of the extended binary files into a merged file, and delete multiple scheduling binary files corresponding to each of the test case scheduling codes in the merged file until only one is retained, thereby obtaining the binary file of the target test case.

[0021] In one implementation, the compilation unit is specifically used to compile the extended source files corresponding to each of the basic test cases to obtain corresponding extended binary files. Specifically, for the test case scheduling code that is repeated multiple times in each of the extended source files, only one copy is compiled. The physical memory spaces where the basic test case portions of each of the extended binary files reside are isolated from each other, while the physical memory spaces where the test case scheduling portions of each of the extended binary files reside are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each of the extended binary files reside are not isolated from each other. The generation unit is specifically used to merge each of the extended binary files into a single merged file to obtain the binary file of the target test case.

[0022] In one embodiment, the apparatus further includes an isolation unit, configured to isolate the test case scheduling code from the source files of each of the basic test cases through a macro mechanism after the test case scheduling code is set as a header file in the source files of each of the basic test cases, so that the test case scheduling code and the source files of the basic test cases are compiled when the preset conditions are met, and only the source files of the basic test cases are compiled when the preset conditions are not met.

[0023] In one embodiment, the compilation unit includes: a calling module, configured to call a first preset function on the source file of each basic test case to generate a configuration file corresponding to the basic test case, the configuration file including randomly initialized system environment variables; an initialization module, configured to initialize the system runtime environment according to the configuration file and preset loading rules; and a compilation and conversion module, configured to compile and convert the source file of each basic test case and the corresponding configuration file to obtain the basic binary file corresponding to each basic test case.

[0024] In one implementation, the initialization module is specifically used to perform at least one of the following operations according to the configuration file and pre-set loading rules: specifying the current operating mode, specifying the current page table mode, initializing the initial value of the control register, creating the user segment, system segment, and segment selector, creating the Global Descriptor Table (GDT), Local Descriptor Table (LDT), Interrupt Descriptor Table (IDT), and Task Status Segment (TSS), creating the memory page table mapping required for program execution within the specified virtual and physical address range, and switching the system mode.

[0025] In one implementation, the test case scheduling code is used to: control the program to jump to different thread code when it starts; and / or control the program's exit process, and to detect the running results of each thread in real time and synchronize them to other threads.

[0026] In one implementation, the scheduling binary file corresponding to the test case scheduling code is stored in the common code segment of the binary file of the target test case, and the data that needs to be interacted between different threads is stored in the common data segment of the binary file of the target test case.

[0027] In one embodiment, the apparatus further includes: a determining unit, configured to determine a first number based on the number of test threads corresponding to the target test cases to be generated, wherein the number of test threads is greater than or equal to two, before compiling the source files of each of the basic test cases and the preset test case scheduling code; and a partitioning unit, configured to divide the total physical memory space of the computer into a second number of mutually isolated physical memory spaces, wherein the second number is greater than or equal to the first number.

[0028] In one implementation, the basic test cases may be the same or different.

[0029] Thirdly, embodiments of the present invention also provide an electronic device, comprising: a housing, at least one processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed within a space enclosed by the housing, and the processor and memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the at least one processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing any of the multi-threaded test case generation methods provided by embodiments of the present invention.

[0030] Fourthly, embodiments of the present invention also provide a computer-readable storage medium storing one or more programs that can be executed by one or more processors to implement any of the multi-threaded test case generation methods provided in the embodiments of the present invention.

[0031] The multi-threaded test case generation method, apparatus, electronic device, and computer-readable storage medium provided in the embodiments of the present invention can select a first number of single-threaded test cases as basic test cases from single-threaded test cases, compile the source files of each basic test case and a preset test case scheduling code, obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code, and generate the binary file of the target test case based on the basic binary file and the scheduling binary file. Since the physical memory spaces of the basic binary files corresponding to each basic test case are isolated from each other, the compilation operations of each basic test case can be independent and do not affect each other, thus forming independent basic binary files. After adding the scheduling binary file formed by compiling the test case scheduling code, each basic binary file can be combined with the scheduling binary file. Under the scheduling of the scheduling binary file, each basic test case can apply different test cases to different threads. Thus, without modifying the source code of the single-threaded test cases and generating the corresponding multi-threaded test case source code, the binary file of the multi-threaded test cases can be obtained directly, saving a lot of code modification, compilation, verification and other operations, thereby effectively improving the generation efficiency of multi-threaded test cases. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A flowchart illustrating a method for generating multi-threaded test cases according to an embodiment of the present invention;

[0034] Figure 2 This is a schematic diagram illustrating the memory usage of a single-threaded test case in an embodiment of the present invention;

[0035] Figure 3 This is a schematic diagram illustrating the memory usage of dual-threaded test cases in an embodiment of the present invention;

[0036] Figure 4 This is a flowchart illustrating detection and data synchronization between different threads in an embodiment of the present invention;

[0037] Figure 5 A detailed flowchart of a method for generating multi-threaded test cases provided in an embodiment of the present invention;

[0038] Figure 6A schematic diagram of a multi-threaded test case generation device provided for an embodiment of the present invention;

[0039] Figure 7 A schematic diagram of an electronic device provided as an embodiment of the present invention. Detailed Implementation

[0040] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0041] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0042] To enable those skilled in the art to better understand the technical concept, implementation scheme and beneficial technical effects of the embodiments of the present invention, detailed descriptions are provided below through specific embodiments.

[0043] As mentioned in the background section, CPU development and design involve modifications and updates to the instruction set. Therefore, a complete set of ISA test cases is needed to verify the CPU's functionality at the ISA level and ensure compatibility between different versions of the CPU's ISA-level features. However, traditionally, many test cases are written based on single-threaded technology. With the introduction of CPU hyper-threading technology, especially SMT technology, there is an increasing demand for multi-threaded test cases.

[0044] To address this, the source code of each single-threaded test case can be modified individually, adding multiple sets of different basic environment variable configurations used by multiple CPUs. Simultaneously, different CPUs can be controlled to execute different test code paths at necessary entry points. Finally, the modified source code is recompiled to generate a binary executable file. This approach is suitable for a small number of test cases, but for CPUs with particularly complex instruction sets, such as the x86 architecture's CISC instruction set, the number of ISA test case sets is typically enormous. Modifying, recompiling, and re-verifying pre-developed test cases consumes significant time and manpower, severely reducing the efficiency of generating multi-threaded test cases.

[0045] To address the aforementioned issues, the inventors discovered that multiple identical or different single-threaded test case source files can be directly compiled and combined into a single multi-threaded test case binary file without modifying the source test code file, thereby effectively improving the generation efficiency of multi-threaded test cases.

[0046] To enable those skilled in the art to better understand the technical concept, implementation scheme and beneficial effects of the embodiments of the present invention, detailed descriptions are provided below through specific embodiments.

[0047] In a first aspect, embodiments of the present invention provide a method for generating multi-threaded test cases, which can effectively improve the efficiency of generating multi-threaded test cases.

[0048] like Figure 1 As shown, the method for generating multi-threaded test cases provided in the embodiments of the present invention may include:

[0049] S11, Select a first number of single-threaded test cases as basic test cases from the single-threaded test cases, where the first number is greater than one;

[0050] Single-threaded test cases can be test cases written to verify the instruction set architecture of a CPU that operates in a single-threaded manner. Multiple single-threaded test cases can form a set of single-threaded test cases. Since multi-threaded test cases are generated using single-threaded test cases, the number of single-threaded test cases selected as the base test cases in this step can be greater than one, that is, the first number can be greater than 1. For example, the first number can be 2, 3, 8, etc., and can be set and adjusted according to the number of threads of the instruction set architecture to be tested.

[0051] S12, compile the source files of each basic test case and the preset test case scheduling code to obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code; wherein, the physical memory space where the basic binary file corresponding to each basic test case is located is isolated from each other.

[0052] After selecting the basic test cases, this step involves compiling the source files of each basic test case and the preset test case scheduling code. Each basic test case's source file is compiled into a corresponding basic binary file, and the test case scheduling code is compiled into a corresponding scheduling binary file. Since the physical memory spaces of the basic binary files corresponding to each basic test case are isolated from each other, the resulting basic binary files are also independent. The test case scheduling code is essentially a rule description of how different threads call different basic test cases. Its specific form is not limited; for example, the test case scheduling code can be a standalone file or a component of a file coupled with the source files of one or more basic test cases, such as a piece of code. Correspondingly, the specific form of the scheduling binary file obtained after compiling the test case scheduling code is also not limited. For example, the scheduling binary file can be a standalone file or a component of a file coupled with one or more basic binary files, such as a piece of binary data. Furthermore, in the embodiments of this invention, the order in which the test case scheduling code and the source files of the basic test cases are compiled is not limited.

[0053] S13, Generate the binary file of the target test case based on the base binary file and the scheduling binary file.

[0054] After compiling the corresponding basic binary file and scheduling binary file in step S12, this step uses these files to generate the target test case binary file. The target test case is the multi-threaded test case to be generated. In this step, it is not necessary to generate the source code for the multi-threaded test case; the binary file of the multi-threaded test case can be obtained directly.

[0055] The multi-threaded test case generation method provided by the embodiments of the present invention can select a first number of single-threaded test cases as basic test cases from single-threaded test cases, compile the source files of each basic test case and a preset test case scheduling code, and obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code. Based on the basic binary file and the scheduling binary file, the binary file of the target test case is generated. Since the physical memory spaces of the basic binary files corresponding to each basic test case are isolated from each other, the compilation operations of each basic test case can be independent and do not affect each other, thus forming independent basic binary files. After adding the scheduling binary file formed by compiling the test case scheduling code, each basic binary file can be combined with the scheduling binary file. Under the scheduling of the scheduling binary file, each basic test case can apply different test cases to different threads. Thus, without modifying the source code of the single-threaded test cases and generating the corresponding multi-threaded test case source code, the binary file of the multi-threaded test cases can be obtained directly, saving a lot of code modification, compilation, verification and other operations, thus effectively improving the generation efficiency of multi-threaded test cases.

[0056] In embodiments of the present invention, single-threaded test cases and multi-threaded test cases to be generated can be written based on various syntax structures, as long as they can be run by corresponding assemblers or compilers. For example, in one embodiment of the present invention, single-threaded test cases and multi-threaded test cases to be generated can use the syntax structures provided by NASM to implement their own assemblers, and can be compiled by NASM to output files in a preset format. NASM is a commonly used x86 instruction set assembler that supports multiple output file formats, such as Linux, 'NetBSD / FreeBSD', 'a.out', 'ELF', 'COFF', Microsoft 16-bit 'OBJ' and 'Win32', etc.

[0057] In step S11, basic test cases can be selected from single-threaded test cases using various strategies. For example, basic test cases can be selected from single-threaded test cases according to preset rules based on specific testing needs, or they can be randomly selected. This allows for flexible combinations of various test scenarios through different strategies, enabling the generated multi-threaded test cases to broadly adapt to various multi-threaded verification requirements. Optionally, the selected basic test cases can be the same or different; the embodiments of the present invention do not limit this. For example, in one embodiment of the present invention, two single-threaded test cases are selected as basic test cases, both of which are case1. In another embodiment of the present invention, four single-threaded test cases are selected as basic test cases, such as case1, case2, case3, and case4.

[0058] As mentioned earlier, in the embodiments of the present invention, the test case scheduling code is essentially a rule description of different threads calling different basic test cases. Its specific form is not limited. For example, the test case scheduling code can be an independent file or a component of a file used to couple with the source files of one or more basic test cases.

[0059] In specific implementation, to couple the test case scheduling code with the source files of one or more basic test cases, in one embodiment of the present invention, before compiling the source files of each basic test case and the preset test case scheduling code in step S12, the method for generating multi-threaded test cases provided by the embodiment of the present invention may further include: setting the test case scheduling code as header files in the source files of each basic test case to obtain corresponding extended source files. For example, in one embodiment of the present invention, the test case scheduling code can be pre-written in the form of macros, and then the macros of the test case scheduling code can be coupled into the source files of each basic test case through the "#include" directive to obtain the corresponding extended source files. Of course, in addition to being pre-written in the form of macros, the test case extended code can also exist in other forms, such as functions. In this way, the test case scheduling code is coupled with each basic test case in a simple way, effectively facilitating the generation of multi-threaded test cases.

[0060] Furthermore, to facilitate the generation of multi-threaded test cases without affecting the original use of single-threaded test cases, in one embodiment of the present invention, the test case scheduling code is set as a header file after the source files of each of the basic test cases. The multi-threaded test case generation method provided by the embodiment of the present invention may further include: isolating the test case scheduling code from the source files of each of the basic test cases through a macro mechanism, so that when a preset condition is met, the test case scheduling code and the source files of the basic test cases are compiled; when the preset condition is not met, only the source files of the basic test cases are compiled. The preset condition can be performing a multi-threaded test case generation operation. That is, when compiling each extended source file, the macro mechanism can be used to determine whether a multi-threaded test case generation operation is needed. If so, both the test case scheduling code in the extended source files and the source files of the basic test cases are compiled to generate corresponding multi-threaded test cases; if not, only the source files of the basic test cases are compiled, and single-threaded test cases are used to verify the single-threaded instruction set architecture.

[0061] Specifically, in one embodiment of the present invention, when performing the multi-threaded test case generation operation, compiling the source files of each basic test case and the preset test case scheduling code to obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code may specifically include: compiling the extended source files corresponding to each basic test case to obtain the corresponding extended binary files, wherein the physical memory spaces where the basic test case parts of each extended binary file are located are isolated from each other, the physical memory spaces where the test case scheduling parts of each extended binary file are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each extended binary file is located are not isolated from each other; based on this, generating the binary file of the target test case according to the basic binary file and the scheduling binary file may specifically include: generating the binary file of the target test case according to each extended binary file.

[0062] In this embodiment, the extended source files corresponding to each basic test case can be compiled. Each extended source file, after compilation, yields a corresponding extended binary file. Each extended binary file can include a basic test case section and a test case scheduling section. The physical memory spaces where the basic test case sections of each extended binary file reside are isolated from each other, allowing each single-threaded test case to be compiled independently without affecting others. However, the physical memory spaces where the test case scheduling sections of each extended binary file reside are not isolated from each other, nor are the physical memory spaces where the thread-shared data corresponding to each extended binary file reside. This facilitates scheduling of each basic test case section using the test case scheduling section and facilitates data exchange between different threads using the thread-shared data. "Physical memory spaces are isolated from each other" means that each physical memory space is independent and invisible to others, while "physical memory spaces are not isolated" means that each physical memory space is connected and visible to others. After obtaining each extended binary file, they can be merged into a single merged file. Then, the multiple scheduling binary files corresponding to the test case scheduling code in the merged file are deleted until only one is retained, resulting in the binary file of the target test case.

[0063] In addition to deleting redundant scheduling binary files during file merging, other methods can be used in other embodiments of the present invention to ensure that only one scheduling binary file is retained in the binary files of the target test cases.

[0064] For example, in one embodiment of the present invention, compiling the source files of each basic test case and the preset test case scheduling code to obtain the basic binary file corresponding to each basic test case and the scheduling binary file corresponding to the test case scheduling code may specifically include: compiling the extended source files corresponding to each basic test case to obtain the corresponding extended binary files, wherein, of the multiple copies of the test case scheduling code in each extended source file, only one copy is compiled; the physical memory spaces where the basic test case parts in each extended binary file are located are isolated from each other, the physical memory spaces where the test case scheduling parts in each extended binary file are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each extended binary file is located are not isolated from each other; based on this, generating the binary file of the target test case according to the basic binary file and the scheduling binary file may specifically include: merging each extended binary file into a merged file to obtain the binary file of the target test case. In other words, in this embodiment, when compiling each extended source file, only one set of test case scheduling code is selected for compilation, while compiling other duplicate test case code is abandoned. The compilation results are directly merged after compilation to obtain the binary file of the target test case, thereby effectively saving compilation resources and further improving the generation efficiency of multi-threaded test cases.

[0065] The above provides a brief explanation of the process of generating extended source files from the source files of basic test cases and test case scheduling code, as well as the compilation process of the extended source files. It should be noted that similar compilation techniques can be used whether compiling the source files of independent basic test cases or the source files of basic test cases within extended source files.

[0066] For example, in one embodiment of the present invention, the compilation of the source files of each of the basic test cases in step S12 may specifically include: for each source file of the basic test case, calling a first preset function to generate a configuration file corresponding to the basic test case, wherein the configuration file includes randomly initialized system environment variables; initializing the system running environment according to the configuration file and the preset loading rules; compiling and converting the source file of each basic test case and the corresponding configuration file to obtain the basic binary file corresponding to each basic test case.

[0067] Optionally, in embodiments of the present invention, a script can be written using a scripting language such as Python to automatically generate a text format file recognizable by NASM, such as a configuration file (.cfg file), and randomly initialize some basic environment variables in the generated .cfg file. Based on this, the aforementioned first preset function can be, for example, X86shell.py, and the source file of the basic test cases can be, for example, a file with the .asm extension. By calling this function on the source file of each basic test case, a corresponding configuration file can be generated for that basic test case, which can be, for example, a file with the .cfg extension. The .cfg file can be a text format file recognizable by NASM. This configuration file can include some randomly initialized system environment variables. The system environment variables corresponding to each basic test case are randomly set and can be the same or different.

[0068] After obtaining the configuration file corresponding to each basic test case, the corresponding system runtime environment can be initialized according to the configuration file and the pre-set loading rules. Specific initialization operations may include performing one or more of the following operations according to the configuration file and the pre-set loading rules: specifying the current operating mode, specifying the current page table mode, initializing the initial value of the control register, creating user segment, system segment, segment selector, creating GDT, LDT, IDT, TSS, creating memory page table mapping required for program execution within the specified virtual address and physical address range, switching system modes, etc.

[0069] Optionally, the basic operating environment of the system can be initialized using macro files implemented with NASM syntax, such as loading the GDT and LDT, and switching the system mode to the expected mode, such as 64-bit mode. These macro files can be, for example, files with the .inc extension, such as loader.inc. For example, for a single-threaded test case, the memory state corresponding to the randomly initialized and statically compiled operating system environment can be as follows: Figure 2 As shown in the system section, for multi-threaded test cases (taking dual-threaded as an example), the memory state corresponding to the randomly initialized and statically compiled operating system environment can be as follows: Figure 3 The system segment section is shown below. (See the example below.) Figure 3 As shown, the expansion of d301 and d302 can be seen as shown in d300.

[0070] In practice, the source files of basic test cases can be compiled by running the Makefile command. Generally, a test project can include multiple source files, which can be placed in several directories according to type, function, module, etc. The Makefile command can define a series of rules to specify which files need to be compiled first, which files need to be compiled later, which files need to be recompiled, and even perform more complex functional operations. In one embodiment of the present invention, the Makefile can include three input parameters: make multi_test_thread_index, N, and testi_path, where the value of make multi_test_thread_index is i, i represents the test case number, which is an integer less than or equal to N; N represents the number of threads, which is an integer greater than 1; and testi_path represents the path where the source file of the i-th test case is located. Taking a dual-threaded test case as an example, the Makefile command can be executed in two loops. In the first loop, i equals 1, and the first basic test case is compiled; in the second loop, i equals 2, and the second basic test case is compiled.

[0071] The following section uses the generation of dual-threaded test cases as an example to explain in detail how to compile the source files of basic test cases using Makefile.

[0072] In the dual-threaded compilation process, the Makefile first calls the first predefined function X86shell.py. The Makefile's input parameters, multi_test_thread_index = i, N = 2, are passed to this function, which divides the computer's physical address space into two parts. The first loop performs variable allocation and page table mapping in the first part of this physical space, resulting in the configuration file test1.cfg for the first basic test case. The second loop performs the same operations in the second part of the physical space, resulting in the configuration file test2.cfg for the second basic test case.

[0073] The second step in the Makefile can invoke the NASM compiler to compile the configuration files test1.cfg and test2.cfg for the basic test cases, as well as the source files test1.asm and test2.asm for the basic test cases. Specifically, it can compile test1.asm and test2.asm based on the page tables established in test1.cfg and test2.cfg, resulting in .lst format files, denoted as test1.lst and test2.lst.

[0074] The third step in the Makefile can further call the lst2bin.py function to convert test1.lst and test2.lst into corresponding binary files, such as test1.sim and test2.sim. Once these binary files are obtained, the binary data corresponding to the various code segments and data segments in the test cases is placed into the physical address space specified by the page table, according to the page table.

[0075] After two iterations, the base binary files for the first and second basic test cases, test1.sim and test2.sim, are obtained respectively. In one embodiment of this invention, test1.sim, test2.sim, and the compiled test case scheduling binary file can be merged into a single binary file to obtain the target test case binary file, denoted as test_new.sim. The test case scheduling binary file can exist as an independent file or be coupled with one or more base binary files for basic test cases; this embodiment of the invention does not limit this. When the test case scheduling binary file is coupled with one or more base binary files for basic test cases, since the physical address spaces of test1.sim and test2.sim are isolated from each other—that is, the physical addresses corresponding to test1.sim and test2.sim do not overlap—file merging can be achieved by running the command `cat test1.sim test2.sim>test_new.sim`.

[0076] To isolate the physical spaces of different basic binary files from each other, in one embodiment of the present invention, before compiling the source files of each basic test case and the preset test case scheduling code in step S12, the method for generating multi-threaded test cases provided by the embodiment of the present invention may further include: determining a first number based on the number of test threads corresponding to the target test case to be generated, wherein the number of test threads is greater than or equal to two; dividing the total physical memory space of the computer into a second number of isolated physical memory spaces, wherein the second number is greater than or equal to the first number. For example, if the number of test threads corresponding to Dai Chengcheng's target test case is 4, then the first number is also 4. Accordingly, the total physical memory space of the computer can be divided into at least 4 isolated physical memory spaces, for example, it can be divided into 4 or 5 isolated physical memory spaces. Optionally, the size of each physical memory space can be equal or unequal.

[0077] The following is a brief explanation of the memory usage of the target test case's binary file, using a dual-threaded test case as an example. Figure 3 As shown, the binary file of a dual-threaded test case includes a system segment shared by both threads and a segment exclusive to each thread in memory. The shared system segment can include loader stage1 (d100 in the diagram) and shell data commands (d200 in the diagram). Loader stage1 is primarily used for test case scheduling and is a common code segment. The scheduling binary file corresponding to the test case scheduling code can be stored in the common code segment of the target test case's binary file. Specifically, the test case scheduling code can be used to: control program startup, jump to different thread code; and / or control the program's exit process; and perform real-time detection of the execution results of each thread and synchronize them with other threads. The shell data commands are primarily used for data exchange between threads and are a common data segment. Data and variables that need to be exchanged between different threads can be stored in the common data segment of the target test case's binary file.

[0078] For example, in one embodiment of the present invention, the pseudocode of a NASM syntax format for the test case scheduling code to control the jump of the thread start code at the entry point of the startup code can be as follows:

[0079] section loader_base_common vstart=loader_base_common_base

[0080] org loader_base_common_offset

[0081] mov eax,1

[0082] cpuid

[0083] shr ebx,24

[0084] bx&0x7

[0085] cmp bl,0

[0086] The code entry point for thread 1 in Je

[0087] cmp bl, 1

[0088] The code entry point for thread 2.

[0089] In other words, in this embodiment, the cpuid instruction can be executed to read the current thread number, and then the corresponding thread entry code can be jumped to based on the thread number.

[0090] For example, in another embodiment of the present invention, the exit process of the control program, which involves real-time detection of the execution results of each thread and synchronization with other threads, can be mainly implemented in the following ways. For example... Figure 4 As shown in this embodiment, the shared variables between threads may include sync_cpus_semaphore and sync_pass_fail_label. In the loaderstage1 stage (f200 in the figure), sync_cpus_semaphore can be initialized to 0 and sync_pass_fail_label to 0x80. These two variables are stored in the common data segment d200.

[0091] The results of running test cases for synchronizing between two threads using sync_cpus_semaphore and sync_pass_fail_label can be divided into four cases:

[0092] In scenario 1, after executing f300 and f301, both thread 1 (thread1 in the diagram) and thread 2 (thread2 in the diagram) pass the test, with both results being "pass". Therefore, when running f400, the semaphore used for thread synchronization, `sync_cpus_semaphore`, will increment by 1 sequentially. Eventually, `sync_cpus_semaphore` will satisfy the condition of equaling 2, and both threads will return 0xc001c0de. The test environment will report a pass after detecting that both threads return 0xc001c0de.

[0093] Scenario 2: After executing f300 and f301, neither thread 1 nor thread 2 passed the test, and neither passed. Therefore, when running f400, both threads set sync_pass_fail_label = 0x88 and then directly returned 0xbaadc0de. The test environment detected that both threads returned 0xbaadc0de and reported the test as failed.

[0094] Scenario 3: After thread 1 finishes the f300 test prematurely, it reaches the pass stage early. When running f400, it increments the semaphore `sync_cpus_semaphore` by 1 and then loops around, checking the values ​​of `sync_cpus_semaphore` and `sync_pass_fail_label`, waiting for the result of thread 2's execution. Subsequently, thread 2 finishes the f301 test. If thread 2 has not passed, when running f400, it sets `sync_pass_fail_label` to 0x88 and returns 0xbaadc0de. Then, thread 1 detects that `sync_pass_fail_label` is not equal to 0x80 and also returns 0xbaadc0de. The test environment detects that both threads return 0xbaadc0de and reports test failure. Conversely, the same applies if thread 2 runs faster than thread 1.

[0095] Scenario 4: For some unknown reason, only one thread returns a result, whether it returns 0xbaadc0de or 0xc001c0de. If the test environment cannot detect the result of the other thread, the test environment will report that the test result is unknown.

[0096] In embodiments of the present invention, in addition to the system segment shared by the two threads, the target test case also includes a segment exclusively for each thread. This thread-exclusive segment can further include a dedicated system segment and a dedicated user segment. For example, Figure 3 The detailed expanded diagram of segments d301 and d302, which are exclusive to each thread, can be shown as d300. Since the memory usage of each thread's exclusive segment is similar to that of the binary file corresponding to a single-threaded test case, in this embodiment of the invention, while ensuring that the physical memory spaces of each basic test case are isolated from each other, the source files of each basic test case can be directly compiled to obtain the corresponding binary file. After simply merging the binary files of each basic test case and adding the system segments loader stage1 and shell data commands shared by the two threads, the binary file of the target test case can be obtained.

[0097] The method for generating multi-threaded test cases provided by the embodiments of the present invention will be described in detail below through specific examples.

[0098] like Figure 5 As shown, the method for generating multi-threaded test cases provided in the embodiments of the present invention may include:

[0099] S201. Determine a first number based on the number of test threads corresponding to the target test cases to be generated, wherein the number of test threads is greater than or equal to two.

[0100] S202. Divide the total physical memory space of the computer into a second number of isolated physical memory spaces, wherein the second number is greater than or equal to the first number;

[0101] S203. Select the first number of single-threaded test cases from the single-threaded test cases as the basic test cases;

[0102] S204. Set the test case scheduling code as header files in the source files of each of the basic test cases to obtain the corresponding extended source files;

[0103] S205. Through a macro mechanism, the test case scheduling code is isolated from the source files of each basic test case;

[0104] After isolation through the macro mechanism, the test case scheduling code and the source files of the basic test cases are compiled when the preset conditions are met; when the preset conditions are not met, only the source files of the basic test cases are compiled.

[0105] S206. Under the condition that the preset conditions are met, for the source files of the basic test cases in each extended source file, call the first preset function to generate the configuration file corresponding to the basic test cases;

[0106] The configuration file may include randomly initialized system environment variables;

[0107] S207. Initialize the system operating environment according to the configuration file and the pre-set loading rules;

[0108] S208. Compile and convert the source file and corresponding configuration file of each basic test case to obtain the basic binary file of each extended binary file;

[0109] S209. Compile the test case scheduling code in each extended source file to obtain the scheduling binary file in the extended binary file;

[0110] S210. Merge each of the extended binary files into a single merged file, and delete the multiple scheduling binary files corresponding to the scheduling code of each test case in the merged file until only one is retained, to obtain the binary file of the target test case.

[0111] Accordingly, in a second aspect, embodiments of the present invention provide a multi-threaded test case generation apparatus, which can effectively improve the generation efficiency of multi-threaded test cases.

[0112] like Figure 6 As shown, the multi-threaded test case generation apparatus provided in the embodiments of the present invention may include:

[0113] Selection unit 31 is used to select a first number of single-threaded test cases as base test cases from the single-threaded test cases, where the first number is greater than one;

[0114] The compilation unit 32 is used to compile the source files of each of the basic test cases and the preset test case scheduling code to obtain the basic binary files corresponding to each of the basic test cases and the scheduling binary files corresponding to the test case scheduling code; wherein, the physical memory spaces where the basic binary files corresponding to each of the basic test cases are located are isolated from each other.

[0115] The generation unit 33 is used to generate binary files of target test cases based on the base binary file and the scheduling binary file.

[0116] The multi-threaded test case generation apparatus provided in the embodiments of the present invention can select a first number of single-threaded test cases as basic test cases from single-threaded test cases, compile the source files of each basic test case and a preset test case scheduling code, and obtain a basic binary file corresponding to each basic test case and a scheduling binary file corresponding to the test case scheduling code. Based on the basic binary file and the scheduling binary file, a target test case binary file is generated. Since the physical memory spaces of the basic binary files corresponding to each basic test case are isolated from each other, the compilation operations of each basic test case can be independent and do not affect each other, thus forming independent basic binary files. After adding the scheduling binary file formed by compiling the test case scheduling code, each basic binary file can be combined with the scheduling binary file. Under the scheduling of the scheduling binary file, each basic test case can apply different test cases to different threads. Thus, without modifying the source code of the single-threaded test cases and generating the corresponding multi-threaded test case source code, the multi-threaded test case binary file is directly obtained, saving a lot of code modification, compilation, verification and other operations, thus effectively improving the generation efficiency of multi-threaded test cases.

[0117] In one embodiment, the multi-threaded test case generation device provided by the present invention may further include: a setting unit, used to set the test case scheduling code in the form of header files in the source files of each of the basic test cases before compiling the source files of each of the basic test cases and the preset test case scheduling code, so as to obtain corresponding extended source files.

[0118] In one implementation, the compilation unit 32 can be specifically used to compile the extended source files corresponding to each of the basic test cases to obtain the corresponding extended binary files. The physical memory spaces where the basic test case parts of each of the extended binary files are located are isolated from each other, the physical memory spaces where the test case scheduling parts of each of the extended binary files are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each of the extended binary files are located are not isolated from each other.

[0119] The generation unit 33 can be used to generate the binary file of the target test case based on each of the extended binary files.

[0120] In one implementation, the generation unit 33 can be used to merge the extended binary files into a merged file, and delete multiple scheduling binary files corresponding to the test case scheduling code in the merged file until only one is retained, to obtain the binary file of the target test case.

[0121] In one implementation, the compilation unit 32 is specifically used to compile the extended source files corresponding to each of the basic test cases to obtain the corresponding extended binary files. In this case, the test case scheduling code, which is repeated multiple times in each of the extended source files, is only compiled once. The physical memory spaces where the basic test case parts of each of the extended binary files are located are isolated from each other, the physical memory spaces where the test case scheduling parts of each of the extended binary files are located are not isolated from each other, and the physical memory spaces where the thread-shared data corresponding to each of the extended binary files are located are not isolated from each other.

[0122] The generation unit 33 is specifically used to merge the various extended binary files into a single merged file to obtain the binary file of the target test case.

[0123] In one embodiment, the multi-threaded test case generation apparatus provided by the present invention may further include: an isolation unit, configured to isolate the test case scheduling code from the source files of each of the basic test cases through a macro mechanism after the test case scheduling code is set in the form of header files in the source files of each of the basic test cases, so that the test case scheduling code and the source files of the basic test cases are compiled when the preset conditions are met, and only the source files of the basic test cases are compiled when the preset conditions are not met.

[0124] In one implementation, the compilation unit 32 may include:

[0125] The calling module is used to call the first preset function for the source file of each of the basic test cases to generate the configuration file corresponding to the basic test cases. The configuration file includes randomly initialized system environment variables.

[0126] The initialization module is used to initialize the system operating environment according to the configuration file and the pre-set loading rules;

[0127] The compilation and conversion module is used to compile and convert the source file of each basic test case and the corresponding configuration file to obtain the basic binary file corresponding to each basic test case.

[0128] In one implementation, the initialization module can be used to perform at least one of the following operations according to the configuration file and pre-set loading rules: specifying the current operating mode, specifying the current page table mode, initializing the initial value of the control register, creating the user segment, system segment, and segment selector, creating the Global Descriptor Table (GDT), Local Descriptor Table (LDT), Interrupt Descriptor Table (IDT), and Task Status Segment (TSS), creating the memory page table mapping required for program execution within the specified virtual and physical address range, and switching the system mode.

[0129] In one implementation, the test case scheduling code can be used to: control the program to jump to different thread code when it starts; and / or control the program's exit process, and to detect the running results of each thread in real time and synchronize them to other threads.

[0130] In one implementation, the scheduling binary file corresponding to the test case scheduling code is stored in the common code segment of the binary file of the target test case, and the data that needs to be interacted between different threads is stored in the common data segment of the binary file of the target test case.

[0131] In one embodiment, the multi-threaded test case generation apparatus provided in the embodiments of the present invention may further include:

[0132] The determining unit is used to determine the first quantity based on the number of test threads corresponding to the target test cases to be generated before compiling the source files of each of the basic test cases and the preset test case scheduling code, wherein the number of test threads is greater than or equal to two.

[0133] A partitioning unit is used to divide the total physical memory space of a computer into a second number of isolated physical memory spaces, wherein the second number is greater than or equal to the first number.

[0134] In one implementation, the basic test cases may be the same or different.

[0135] Thirdly, such as Figure 7 As shown, embodiments of the present invention also provide an electronic device, including: a housing 100, at least one processor 110, a memory 120, a circuit board 130, and a power supply circuit 140, wherein the circuit board 130 is disposed within the space enclosed by the housing 100, and the processor 110 and the memory 120 are disposed on the circuit board 130; the power supply circuit 140 is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory 120 is used to store executable program code; the processor 110 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 120, for executing any of the multi-threaded test case generation methods provided in the foregoing embodiments. The specific execution process of the processor 110 of the above steps and the steps further executed by the processor 110 by running the executable program code can be found in the description of the foregoing embodiments, and will not be repeated here.

[0136] Sixthly, embodiments of the present invention also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement any of the multi-threaded test case generation methods provided in the foregoing embodiments. The specific execution process of the processor on the above steps, and the steps further executed by the processor by running executable program code, can be found in the description of the foregoing embodiments, and will not be repeated here.

[0137] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0138] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0139] In particular, the device embodiment is basically similar to the method embodiment, so the description is relatively simple. For relevant details, please refer to the description of the method embodiment.

[0140] For ease of description, the above apparatus is described by dividing it into various functional units / modules. Of course, in implementing this invention, the functions of each unit / module can be implemented in one or more software and / or hardware.

[0141] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0142] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for generating multi-threaded test cases, the method comprising: The method comprises: selecting a first number of single-thread test cases from single-thread test cases as basic test cases, the first number being greater than one; compiling source files of each of the basic test cases and preset test case scheduling code to obtain a basic binary file corresponding to each of the basic test cases and a scheduling binary file corresponding to the test case scheduling code; wherein physical memory spaces in which basic test case parts of each of the basic binary files are located are isolated from each other; generating a binary file of a target test case according to the basic binary files and the scheduling binary file; wherein, before the compiling of the source files of each of the basic test cases and the preset test case scheduling code, the method further comprises: setting the test case scheduling code in the form of a header file in the source files of each of the basic test cases respectively to obtain corresponding extended source files; the compiling of the source files of each of the basic test cases and the preset test case scheduling code to obtain the basic binary file corresponding to each of the basic test cases and the scheduling binary file corresponding to the test case scheduling code comprises: compiling the extended source files corresponding to each of the basic test cases to obtain corresponding extended binary files, wherein physical memory spaces in which basic test case parts of each of the extended binary files are located are isolated from each other, physical memory spaces in which test case scheduling parts of each of the extended binary files are located are not isolated from each other, and physical memory spaces in which inter-thread shared data corresponding to each of the extended binary files are located are not isolated from each other; the generating of the binary file of the target test case according to the basic binary files and the scheduling binary file comprises: generating the binary file of the target test case according to each of the extended binary files; or, the compiling of the source files of each of the basic test cases and the preset test case scheduling code to obtain the basic binary file corresponding to each of the basic test cases and the scheduling binary file corresponding to the test case scheduling code comprises: compiling the extended source files corresponding to each of the basic test cases to obtain corresponding extended binary files, wherein the test case scheduling code is repeated in each of the extended source files, and only one of the repeated test case scheduling codes is compiled; wherein physical memory spaces in which basic test case parts of each of the extended binary files are located are isolated from each other, physical memory spaces in which test case scheduling parts of each of the extended binary files are located are not isolated from each other, and physical memory spaces in which inter-thread shared data corresponding to each of the extended binary files are located are not isolated from each other; the generating of the binary file of the target test case according to the basic binary files and the scheduling binary file comprises: merging each of the extended binary files into a merged file to obtain the binary file of the target test case.

2. The method of claim 1, wherein the generating of the binary file of the target test case according to each of the extended binary files comprises: ​ Merge the extended binary files into a merged file, and delete multiple copies of the test case scheduling code in the merged file to only keep one copy, to obtain the binary file of the target test case.

3. The method of claim 1, wherein, After the test case scheduling code is arranged in the form of a header file after the source file of each basic test case, the method further comprises: Isolate the test case scheduling code from the source file of each basic test case through a macro mechanism, so that the test case scheduling code and the source file of the basic test case are compiled under the condition of meeting the preset condition, and only the source file of the basic test case is compiled under the condition of not meeting the preset condition.

4. The method according to any one of claims 1 to 3, characterized in that, The compiling of the source file of each basic test case comprises: For each source file of the basic test case, a first preset function is called to generate a configuration file corresponding to the basic test case, and the configuration file includes a randomly initialized system environment variable; According to the configuration file and a pre-set loading rule, a system running environment is initialized; The source file of each basic test case and the corresponding configuration file are compiled and converted to obtain the basic binary file corresponding to each basic test case.

5. The method of claim 4, wherein, The initialization of the system running environment according to the configuration file and the pre-set loading rule comprises: According to the configuration file and the pre-set loading rule, at least one of the following operations is performed: specifying the current operation mode, specifying the current page table mode, initializing the initial value of the control register, creating the user segment, the system segment, the segment selection sub, creating the global descriptor table GDT, the local descriptor table LDT, the interrupt descriptor table IDT, the task state segment TSS, creating the memory page table mapping required by the program running in the specified virtual address and physical address range, and switching the system mode.

6. The method according to any one of claims 1 to 3, characterized in that, The test case scheduling code is used for: Controlling the program to jump to different thread codes at startup; And / or Controlling the exit process of the program, and detecting the running results of each thread in real time and synchronizing the running results to other threads.

7. The method according to any one of claims 1 to 3, characterized in that, The scheduling binary file corresponding to the test case scheduling code is stored in the common code segment of the binary file of the target test case, and the data required to be interacted between different threads is stored in the common data segment of the binary file of the target test case.

8. The method according to any one of claims 1 to 3, characterized in that, Before the compiling of the source file of each basic test case and the preset test case scheduling code, the method further comprises: According to the number of test threads corresponding to the target test case to be generated, the first number is determined, and the number of test threads is greater than or equal to two; Divide the total physical memory space of the computer into a second number of mutually isolated physical memory spaces, and the second number is greater than or equal to the first number.

9. The method according to any one of claims 1 to 3, characterized in that, Each basic test case is the same or different.

10. A device for generating multi-threaded test cases, characterized in that, Comprise: A selection unit is configured to select a first number of single-thread test cases as basic test cases from single-thread test cases, and the first number is greater than one. The compiling unit is configured to compile source files of the basic test cases and preset test case scheduling code to obtain a basic binary file corresponding to each of the basic test cases and a scheduling binary file corresponding to the test case scheduling code; wherein physical memory spaces in which the basic binary files corresponding to the basic test cases are located are isolated from each other. The generating unit is configured to generate a binary file of a target test case according to the basic binary files and the scheduling binary file. The apparatus further comprises: The setting unit is configured to set the test case scheduling code in the form of a header file in the source files of the basic test cases respectively before compiling the source files of the basic test cases and the preset test case scheduling code to obtain corresponding extended source files. The compiling unit is specifically configured to compile the extended source files corresponding to the basic test cases to obtain corresponding extended binary files, wherein physical memory spaces in which basic test case parts in the extended binary files are located are isolated from each other, physical memory spaces in which test case scheduling parts in the extended binary files are located are not isolated from each other, and physical memory spaces in which inter-thread shared data corresponding to the extended binary files are located are not isolated from each other. The generating unit is specifically configured to generate the binary file of the target test case according to the extended binary files. Alternatively, The compiling unit is specifically configured to compile the extended source files corresponding to the basic test cases to obtain corresponding extended binary files, wherein the test case scheduling code is repeated in the extended source files, and only one of the repeated test case scheduling codes is compiled; wherein physical memory spaces in which basic test case parts in the extended binary files are located are isolated from each other, physical memory spaces in which test case scheduling parts in the extended binary files are located are not isolated from each other, and physical memory spaces in which inter-thread shared data corresponding to the extended binary files are located are not isolated from each other. The generating unit is specifically configured to combine the extended binary files into one combined file to obtain the binary file of the target test case.

11. The apparatus of claim 10, wherein, The generating unit is specifically configured to combine the extended binary files into one combined file, and delete, in the combined file, multiple scheduling binary files corresponding to the test case scheduling codes to retain only one of the scheduling binary files to obtain the binary file of the target test case.

12. The apparatus of claim 10, wherein, Further comprising: The isolation unit is configured to isolate, by a macro mechanism, the test case scheduling code from the source files of the basic test cases after the test case scheduling code is set in the source files of the basic test cases in the form of a header file, so that the test case scheduling code and the source files of the basic test cases are compiled when a preset condition is met, and only the source files of the basic test cases are compiled when the preset condition is not met.

13. The apparatus of any one of claims 10-12, wherein, The compiling unit comprises: The calling module is configured to call a first preset function for a source file of each of the basic test cases to generate a configuration file corresponding to the basic test case, and the configuration file includes a randomly initialized system environment variable. The initialization module is configured to initialize a system running environment according to the configuration file and a preset loading rule. The compiling and converting module is configured to compile and convert the source file of each of the basic test cases and the corresponding configuration file to obtain the basic binary file corresponding to each of the basic test cases.

14. The apparatus of claim 13, wherein, The initialization module is specifically configured to perform at least one of the following operations according to the configuration file and the preset loading rule: specifying a current operation mode, specifying a current page table mode, initializing an initial value of a control register, creating a user segment, a system segment, a segment selection sub, creating a global descriptor table (GDT), a local descriptor table (LDT), an interrupt descriptor table (IDT), a task state segment (TSS), creating a memory page table mapping required by program running in a specified virtual address and physical address range, and switching a system mode.

15. The apparatus of any one of claims 10-12, wherein, The test case scheduling code is configured to: control program startup to jump to different thread codes; and / or control a program exit process to perform real-time detection on a running result of each thread and synchronously give the running result to other threads. A scheduling binary file corresponding to the test case scheduling code is stored in a common code segment of the binary file of the target test case, and data required to be interacted between different threads is stored in a common data segment of the binary file of the target test case.

16. The apparatus of any one of claims 10-12, wherein, The method further includes:

17. The apparatus of any one of claims 10-12, wherein, a determination unit configured to determine the first number according to a test thread number corresponding to a target test case to be generated before compiling a source file of each of the basic test cases and preset test case scheduling code, the test thread number being greater than or equal to two; a division unit configured to divide a total physical memory space of a computer into a second number of physical memory spaces isolated from each other, the second number being greater than or equal to the first number. The basic test cases are the same or different.

18. The apparatus of any one of claims 10-12, wherein, The electronic device comprises a shell, at least one processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is arranged inside a space enclosed by the shell, and the processor and the memory are arranged on the circuit board; the power supply circuit is configured to supply power to each circuit or device of the electronic device; the memory is configured to store executable program code; and the at least one processor is configured to run a program corresponding to the executable program code by reading the executable program code stored in the memory, and execute the method for generating a multi-thread test case according to any one of the preceding claims 1-9.

19. An electronic device, comprising: The computer readable storage medium stores one or more programs, and the one or more programs are executable by one or more processors to implement the method for generating a multi-thread test case according to any one of the preceding claims 1-9. ​ 20. A computer-readable storage medium, characterized in that, ​

Citation Information

Patent Citations

  • Simulator based automatic functional test implementation method for central processing unit instruction sets

    CN104317715A

  • System for preventing memory usage conflicts when generating and merging computer architecture test cases

    US20040093476A1