A symbol synchronization method and system for a multi-ary differential phase shift keying system

Abstract

The present invention discloses a symbol synchronization method and system for a multi-level differential phase-shift keying system, relating to the field of wireless communication technology. Based on the characteristic that the deviation between the transmission symbol rate and the reception symbol rate is generally small, this solution calculates characteristic angles based on the co-directional output signal and the orthogonal output signal. The results of the frame synchronization process are used as the initial value for symbol synchronization, and the optimal sampling point is continuously adjusted. The optimal sampling point for the next symbol is determined based on the offset judgment result to achieve symbol synchronization. This method eliminates the need for additional pilot signals, reduces receiver performance losses, and significantly simplifies the receiver structure while maintaining effectiveness. By utilizing the results of frame synchronization and carrier synchronization, as well as system characteristics, the present invention can achieve a sophisticated symbol synchronization process with a relatively simple design.

Description

Technical Field

[0001] The present invention relates to the technical field of wireless communications, and in particular to a symbol synchronization method and system for a multi-ary differential phase shift keying system. Background Art

[0002] Symbol synchronization is also known as symbol synchronization, bit synchronization, or timing synchronization. In digital communication systems, the transmitter typically uses a baseband filter to pulse-shape the signal, thereby limiting the spectral width of the transmitted signal. In the receiver, the signal output after downconversion and filtering is equivalent to the data sampled from the baseband analog signal. The receiver must select the sampling time, ensuring that only valid signals are sampled at the correct sampling time. This process of selecting the sampling time is called symbol synchronization. In synchronous digital communication, symbol synchronization is one of the most critical functions of the receiver. In some communication systems, the transmitter and receiver use synchronized clocks, which provide precise timing signals. The receiver then estimates the delay between transmission and reception to obtain an accurate clock signal. Alternatively, the transmitter can add a significant clock frequency component to the information signal, which the receiver then extracts using a narrowband filter. Finally, the clock signal can be extracted from the received data signal, a method known as self-synchronization.

[0003] In a differential phase shift keying system, the symbol code element depends on the relative phase between adjacent symbols. One advantage of this modulation method is that it does not require the estimation of the phase of the carrier during demodulation, and the demodulation complexity is low. For M-ary differential phase shift keying modulation, the receiver estimates the phase difference between adjacent symbols and calculates the phase difference estimate and the phase difference between the two symbols. The distance between them, choose the closest θ m as the differential phase estimate.

[0004] Using synchronized clocks for both the transmitter and receiver requires that the transmitter and receiver clocks be precisely synchronized to the same clock, and the receiver also needs to estimate the delay. This approach is difficult to implement and difficult to implement in many scenarios. Another approach is to insert clock frequency information into the message, but this method degrades system performance and is generally avoided. Extracting synchronization information from the waveform of unknown information generally requires a more complex receiver design. The waveform of the multi-bit differential phase-shift keying signal after shaping filtering is complex, making synchronization difficult. Summary of the Invention

[0005] The technical problem to be solved by the present invention is that the existing symbol synchronization methods either require the additional introduction of pilot signals, resulting in significant performance loss in the system, or require complex receiver design. The purpose of the present invention is to provide a symbol synchronization method and system for a multi-level differential phase-shift keying system, which uses a simple method to achieve symbol synchronization without the need for additional pilot signals.

[0006] The present invention is achieved through the following technical solutions:

[0007] This solution provides a symbol synchronization method for a multi-ary differential phase shift keying system, including:

[0008] Step 1: Acquire a received signal from a receiver and perform analog-to-digital sampling on the received signal to obtain an analog-to-digital sampling signal;

[0009] Step 2: Perform digital mixing processing on the analog-to-digital sampling signal to obtain a co-directional output signal and a quadrature output signal;

[0010] Step 3, calculating the characteristic angle according to the co-directional output signal and the orthogonal output signal;

[0011] Step 4: If frame synchronization has been successfully performed, the estimated best sampling point of the next symbol is estimated based on the best sampling point of the end symbol of the frame start marker; the estimated best sampling point of the next symbol is estimated based on the best sampling point of any symbol;

[0012] Step 5: If carrier synchronization has been successfully performed, perform an offset determination based on the carrier frequency deviation, characteristic angle, and the optimal sampling point of the current symbol: determine whether the estimated optimal sampling point of the next symbol is offset relative to the optimal sampling point of the current symbol; the carrier frequency deviation is the deviation between the carrier frequency of the received signal and the local oscillator signal frequency obtained during the carrier synchronization process;

[0013] The optimal sampling point of the next symbol is determined based on the offset judgment result to achieve symbol synchronization.

[0014] Working principle of this solution: Based on the characteristic that the deviation between the transmission symbol rate and the reception symbol rate is usually relatively small, the present invention utilizes the result of the frame synchronization process as the initial value of symbol synchronization. When the frame synchronization and carrier synchronization are successful, the optimal sampling point is continuously adjusted without the need for additional pilot introduction, thereby reducing the performance loss of the receiver; while exerting its effectiveness, the receiver structure is greatly simplified.

[0015] The present invention considers a communication system in which the sender and receiver communicate in frames, and assumes that frame synchronization and carrier synchronization have been achieved in some way. Since differential phase-shift keying modulation does not care about the absolute phase information of the code element, the carrier synchronization referred to in this scheme only includes frequency estimation. On the other hand, this scheme believes that after the frame synchronization is successful, the optimal sampling time of the frame start mark is also determined. Based on the above content and the characteristics of differential phase-shift keying, the present invention proposes a method for symbol synchronization of the signal after the frame start mark. By utilizing the results of frame synchronization and carrier synchronization and the system characteristics, a fine symbol synchronization process can be achieved with a relatively simple design.

[0016] Further optimization scheme is that step 4 includes the process:

[0017] n * is the best sampling point position of the current symbol, then the estimated best sampling point position of the next symbol is n * +P;

[0018] In the case where frame synchronization has been successfully performed, the position of the first best sampling point is initialized to the best sampling position of the last symbol of the frame start marker;

[0019] in f l represents the data rate at the output of the receiver filter, f s The symbol rate is agreed upon by both communicating parties. The round(*) function rounds * to an integer value.

[0020] A further optimization scheme is that the pretreatment includes the following steps:

[0021] Perform digital mixing processing on analog-to-digital sampling signals:

[0022] The analog-to-digital sampling signal is divided into two paths. One path inputs the same-direction branch (I path) and obtains the same-direction output signal through low-pass filtering and extraction; the other path inputs the orthogonal branch (Q path) and obtains the orthogonal output signal through low-pass filtering and extraction.

[0023] The outputs of the I and Q multipliers are passed through a Comb Integrator (CIC) filter for low-pass filtering and decimation. The CIC filter can be replaced by a combination of low-pass filtering and downsampling. Assume that the symbol rate agreed upon by both parties is f s , due to clock deviation, the actual symbol rate is different from f s There may be slight differences between the data rates at the output of the CIC filter. Where P is a positive integer greater than 1, Approaching f s ; The I-channel output and Q-channel output of the CIC filter are respectively denoted as I n and Q n . Will I n and Q n The corresponding angle value is recorded as α n , when I n When it is not zero, the characteristic angle is calculated according to the following formula:

[0024] Characteristic angle α n =arctan(Q n / I n );

[0025] Where: Q n Represents the quadrature output signal, In Represents the in-phase output signal, n is the sampling point, arctan(*) is the inverse tangent function, and the range is When I n When it is zero,

[0026] A further optimization scheme is that, in the present invention, it is assumed that the frame synchronization has been successfully performed and the optimal sampling time of the frame start mark is obtained, and the optimal sampling point of the last symbol of the frame start mark is recorded as n * :

[0027] The characteristic angles include: optimal sampling point characteristic angles Characteristic angle of the previous sampling point of the best sampling point The characteristic angle of the next sampling point of the best sampling point The characteristic angle of the P-1th point after the optimal sampling point The characteristic angle of point P after the optimal sampling point And the characteristic angle of the P+1th point after the optimal sampling point

[0028] A further optimization scheme is that step 5 includes the following sub-steps:

[0029] S51, calculating the first intermediate variable Δα l , the second intermediate variable Δα and the third intermediate variable Δα r :

[0030]

[0031]

[0032]

[0033] S52, the first intermediate variable Δα l , the second intermediate variable Δα and the third intermediate variable Δα r Corrected to the range [0, 2π) to obtain and

[0034]

[0035]

[0036]

[0037] Among them, mod is the modulo operation, For example, Where k is An integer in the range [0, 2π); Δf is the carrier frequency deviation; Δt is the sampling time interval between P sampling points;

[0038] S53, based on and Calculate the symbol synchronization deviation characteristic value.

[0039] A further optimization scheme is that the first deviation eigenvalue ε of M-ary differential phase shift keying modulation l , the second deviation characteristic value ε0 and the third deviation characteristic value ε r Calculated according to the following formula:

[0040]

[0041]

[0042]

[0043] Where |*| means taking the absolute value of *.

[0044] A further optimization solution is that step five also includes the following sub-steps:

[0045] S54, comparing the first deviation characteristic value ε l , the second deviation characteristic value ε0 and the third deviation characteristic value ε r The size of the first judgment factor c r and the second judgment factor c l ;

[0046] S55, according to the first judgment factor c r and the second judgment factor c l Update the optimal sampling point.

[0047] A further optimized solution is that step S54 includes the following process:

[0048] Judgment ε l <min(ε0,ε r ) is established, if so, let c l =c1+1,c r =0;

[0049] Judgment ε r <min(ε0,ε l ) is established, if so, let c r =c r +1, c l =0;

[0050] If ε l <min(ε0,ε r ) and ε r <min(ε0,ε1) does not hold, then let c r =0,c l=0;

[0051] where c r , c l The initial value of both is 0; the min(x, y) function represents taking the smaller value of x and y.

[0052] A further optimized solution is that step S55 includes the following process:

[0053] Judgment c l ≥γ is true, if so, update n * n * +P-1;

[0054] Judgment c r ≥γ is true, if so, update n * n * +P+1;

[0055] If c l ≥γ and c r ≥γ does not hold, then update n * n * +P;

[0056] where n * represents the current optimal sampling point; γ represents the preset update threshold.

[0057] This solution also provides a symbol synchronization system for a multi-level differential phase shift keying system, which is used to implement the symbol synchronization method for the multi-level differential phase shift keying system described above, including:

[0058] The sampling module is used to obtain the received signal of the receiver and perform analog-to-digital sampling on the received signal to obtain an analog-to-digital sampling signal;

[0059] A pre-processing module is used to perform digital mixing processing on the analog-to-digital sampling signal to obtain a co-directional output signal and a quadrature output signal;

[0060] A first calculation module is used to calculate a characteristic angle according to the co-directional output signal and the orthogonal output signal;

[0061] The second calculation module is configured to estimate the estimated best sampling point of the next symbol based on the best sampling point of the end symbol of the frame start marker when frame synchronization has been successfully performed; and estimate the estimated best sampling point of the next symbol based on the best sampling point of any symbol;

[0062] A judgment module is configured to, when carrier synchronization has been successfully performed, perform offset judgment based on the carrier frequency deviation, the characteristic angle, and the best sampling point of the current symbol: determining whether the estimated best sampling point of the next symbol is offset relative to the actual best sampling point;

[0063] The optimal sampling point of the next symbol is determined based on the offset judgment result to achieve symbol synchronization.

[0064] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0065] The present invention provides a symbol synchronization method and system for a multi-bit differential phase-shift keying system. Based on the fact that the deviation between the transmitted and received symbol rates is typically small, the results of the frame synchronization process are used as the initial value for symbol synchronization. When both frame and carrier synchronization are successful, the optimal sampling point is continuously adjusted to achieve symbol synchronization. This solution eliminates the need for additional pilot signals, reducing receiver performance losses. While maintaining its effectiveness, it also significantly simplifies the receiver structure. By leveraging the results of frame and carrier synchronization, as well as system characteristics, the present invention enables precise symbol synchronization with a relatively simple design. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for use in the examples. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be considered as limiting the scope. A person of ordinary skill in the art can also derive other relevant drawings based on these drawings without inventive effort. In the drawings:

[0067] Figure 1 This is a flow chart of a symbol synchronization method for a multi-ary differential phase shift keying system in accordance with Example 1;

[0068] Figure 2 This is a schematic diagram of a specific flow chart of a symbol synchronization method for a multi-ary differential phase shift keying system according to Example 2. DETAILED DESCRIPTION

[0069] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with examples and drawings. The exemplary embodiments of the present invention and their descriptions are only used to explain the present invention and are not intended to limit the present invention.

[0070] Example 1

[0071] This embodiment provides a symbol synchronization method for a multi-ary differential phase shift keying system, including:

[0072] Step 1: Acquire a received signal from a receiver and perform analog-to-digital sampling on the received signal to obtain an analog-to-digital sampling signal;

[0073] Step 2: Perform digital mixing processing on the analog-to-digital sampling signal to obtain a co-directional output signal and a quadrature output signal;

[0074] Step 3, calculating the characteristic angle according to the co-directional output signal and the orthogonal output signal;

[0075] Step 4: If frame synchronization has been successfully performed, the estimated best sampling point of the next symbol is estimated based on the best sampling point of the end symbol of the frame start marker; the estimated best sampling point of the next symbol is estimated based on the best sampling point of any symbol;

[0076] Step 5: If carrier synchronization has been successfully performed, perform an offset determination based on the carrier frequency deviation, the characteristic angle, and the optimal sampling point of the current symbol: determine whether the estimated optimal sampling point of the next symbol is offset relative to the optimal sampling point of the current symbol; the carrier frequency deviation is the deviation between the carrier frequency of the received signal and the local oscillator signal frequency obtained during the carrier synchronization process;

[0077] The optimal sampling point of the next symbol is determined based on the offset judgment result to achieve symbol synchronization.

[0078] Example 2

[0079] This embodiment provides a specific symbol synchronization method, such as Figure 2 As shown:

[0080] Step 1: In the receiver, the received signal is converted into an intermediate frequency signal through front-end processing, and the intermediate frequency signal is sampled in analog-to-digital (A / D) mode.

[0081] Step 2: Digitally mix the A / D sampling signal and pass the A / D sampling through the in-phase branch (I path) and the quadrature branch (Q path) multipliers.

[0082] Step 3: Let the outputs of the I and Q multipliers pass through the integral comb (CIC) filter for decimation and low-pass filtering. Assume that the symbol rate agreed upon by the two communicating parties is f s , due to clock deviation, the actual symbol rate is different from f s There may be slight differences between the data rates at the output of the CIC filter. Where P is a positive integer greater than 1, Approaching f s The I-channel output and Q-channel output of the CIC filter are respectively denoted as I n and Q n . Will I n and Q n The corresponding angle value is recorded as α n , when I n When it is not zero,

[0083] α n =arctan(Q n / I n ),

[0084] Where arctan(x) is the inverse tangent function, and its range is When I n When it is zero, The present invention assumes that the frame synchronization has been successfully performed and the optimal sampling time of the frame start mark is obtained, and the optimal sampling time of the last symbol of the frame start mark is recorded as n * .

[0085] Step 4, calculate

[0086] Step 5: Assume that the deviation between the received signal carrier frequency and the local carrier frequency has been obtained through carrier synchronization, denoted as Δf. n and I n+P The sampling time interval between is recorded as Δt, and the calculation

[0087]

[0088]

[0089]

[0090] Step 6: Δα l , Δα, Δα r Corrected to the range [0, 2π), we get

[0091]

[0092]

[0093]

[0094] Where mod is the modulo operation; For example, Where k is An integer in the range [0, 2π).

[0095] Step 7: For M-ary differential phase shift keying modulation, calculate the following deviation values:

[0096]

[0097]

[0098]

[0099] The round(x) function means rounding x to an integer value, and the |x| function means taking the absolute value of x.

[0100] Step 8, when the inequality ε l<min(ε0,ε r ) is established, let c l =c l +1, c r =0; when the inequality ε r <min(ε0,ε l ) is established, let c r =c r +1, c l =0; in other cases, let c r =0,c l =0. c r , c l The initial value of is 0. In the inequality, the min(x, y) function represents the smaller value of x and y.

[0101] Step 9, when c l ≥γ, update n * =n * +P-1; when c r ≥γ, update n * =n * +P+1; in other cases, update n * =n * +P; γ is a positive integer and can be selected based on experience; n * represents the optimal sampling position.

[0102] Step 10: repeat steps 4 to 9. As steps 4 to 9 are repeated, the optimal sampling point of each symbol is continuously adjusted to achieve symbol synchronization.

[0103] Example 3

[0104] This embodiment provides a symbol synchronization system for a multi-level differential phase shift keying system, which is used to implement the symbol synchronization method for the multi-level differential phase shift keying system described in the previous embodiment, including:

[0105] The sampling module is used to obtain the received signal of the receiver and perform analog-to-digital sampling on the received signal to obtain an analog-to-digital sampling signal;

[0106] A preprocessing module is used to preprocess the analog-to-digital sampling signal to obtain a co-directional output signal and a quadrature output signal;

[0107] A first calculation module is used to calculate a characteristic angle according to the co-directional output signal and the orthogonal output signal;

[0108] The second calculation module is configured to estimate the estimated best sampling point of the next symbol based on the best sampling point of the end symbol of the frame start marker when frame synchronization has been successfully performed; and estimate the estimated best sampling point of the next symbol based on the best sampling point of any symbol;

[0109] A judgment module is configured to, when carrier synchronization has been successfully performed, perform offset judgment based on the carrier frequency deviation, the characteristic angle, and the best sampling point of the current symbol: determining whether the estimated best sampling point of the next symbol is offset relative to the actual best sampling point;

[0110] The optimal sampling point of the next symbol is determined based on the offset judgment result to achieve symbol synchronization.

[0111] This embodiment offers the advantage of eliminating the need for additional pilot signals, thus reducing performance losses compared to clock-based pilot methods. Furthermore, this solution utilizes the results of the frame synchronization process as the initial value for symbol synchronization, and then continuously adjusts the optimal sampling interval. This is based on the fact that the deviation between the transmitted symbol rate and the received symbol rate is typically small. In summary, this invention meets the actual system requirements, significantly simplifies the receiver structure, and avoids performance losses while maintaining its effectiveness.

[0112] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A symbol synchronization method for a multi-ary differential phase shift keying system, characterized in that: include: Step 1: Acquire a received signal from a receiver and perform analog-to-digital sampling on the received signal to obtain an analog-to-digital sampling signal; Step 2: Perform digital mixing processing on the analog-to-digital sampling signal to obtain a co-directional output signal and a quadrature output signal; Step 3, calculating the characteristic angle according to the co-directional output signal and the orthogonal output signal; The characteristic angles include: optimal sampling point characteristic angles Characteristic angle of the previous sampling point of the best sampling point The characteristic angle of the next sampling point of the best sampling point The characteristic angle of the P-1th point after the optimal sampling point The characteristic angle of point P after the optimal sampling point And the characteristic angle of the P+1th point after the optimal sampling point The characteristic angle is calculated according to the following formula: When I n When it is not zero, the characteristic angle α n =arctan(Q n / I n ); Where: Q n Represents the quadrature output signal, I n Represents the in-phase output signal, n is the sampling point, arctan(*) is the inverse tangent function, and the range is When I n When it is zero, the characteristic angle Step 4: If frame synchronization has been successfully performed, the estimated best sampling point of the next symbol is estimated based on the best sampling point of the symbol at the end of the frame start marker; the estimated best sampling point of the next symbol is estimated based on the best sampling point of any symbol; Step 5: If carrier synchronization has been successfully performed, perform an offset determination based on the carrier frequency deviation, characteristic angle, and the optimal sampling point of the current symbol: determine whether the estimated optimal sampling point of the next symbol is offset relative to the optimal sampling point of the current symbol; the carrier frequency deviation is the deviation between the carrier frequency of the received signal and the local oscillator signal frequency obtained during the carrier synchronization process; Determine the optimal sampling point for the next symbol based on the offset judgment result to achieve symbol synchronization; Step 5 includes the following sub-steps: S51, calculating the first intermediate variable Δα l , the second intermediate variable Δα and the third intermediate variable Δα r : S52, the first intermediate variable Δα l , the second intermediate variable Δα and the third intermediate variable Δα r Corrected to the range [0,2π), we get and Where mod is the modulo operation, Δf is the carrier frequency deviation; Δt is the sampling time interval between P sampling points; S53, based on and Calculate the symbol synchronization deviation characteristic value.

2. The symbol synchronization method of a multi-ary differential phase shift keying system according to claim 1, characterized in that: The method of performing digital mixing processing on analog-to-digital sampling signals includes: The analog-to-digital sampling signal is divided into two paths, one path inputs the same-direction branch and obtains the same-direction output signal through low-pass filtering and extraction; the other path inputs the orthogonal branch and obtains the orthogonal output signal through low-pass filtering and extraction.

3. The symbol synchronization method of a multi-ary differential phase shift keying system according to claim 2, characterized in that: Step 4 includes the process of: n * is the best sampling point position of the current symbol, then the estimated best sampling point position of the next symbol is n * +P; In the case where frame synchronization has been successfully performed, the position of the first best sampling point is initialized to the best sampling position of the last symbol of the frame start marker; in f l represents the data rate at the output of the receiver filter, f s The symbol rate is agreed upon by both communicating parties. The round(*) function rounds * to an integer value.

4. The symbol synchronization method of a multi-ary differential phase shift keying system according to claim 1, characterized in that: The first deviation eigenvalue ε of M-ary differential phase shift keying modulation l , the second deviation characteristic value ε0 and the third deviation characteristic value ε r Calculate according to the following formula: Among them, the |*| function means taking the absolute value of *.

5. The symbol synchronization method of a multi-ary differential phase shift keying system according to claim 4, characterized in that: Step 5 also includes the following sub-steps: S54, comparing the first deviation characteristic value ε l , the second deviation characteristic value ε0 and the third deviation characteristic value ε r The size of the first judgment factor c r and the second judgment factor c l ; S55, according to the first judgment factor c r and the second judgment factor c l Update the optimal sampling point.

6. The symbol synchronization method of a multi-ary differential phase shift keying system according to claim 5, characterized in that: Step S54 includes the following steps: Judgment ε l <min(ε0,ε r ) is established, if so, let c l =c l +1,c r =0; Judgment ε r <min(ε0,ε l ) is established, if so, let c r =c r +1,c l =0; If ε l <min(ε0,ε r ) and ε r <min(ε0,ε l ) are not true, then let c r =0,c l =0; where c r , c l The initial value of both is 0; the min(x,y) function represents taking the smaller value of x and y.

7. The symbol synchronization method of a multi-ary differential phase shift keying system according to claim 5, characterized in that: Step S55 includes the following steps: Judgment c l ≥γ is true, if so, update n * n * +P-1; Judgment c r ≥γ is true, if so, update n * n * +P+1; If c l ≥γ and c r ≥γ does not hold, then update n * n * +P; where n * represents the current optimal sampling point; γ represents the preset update threshold.

8. A symbol synchronization system for a multi-ary differential phase shift keying system, characterized in that: A method for implementing symbol synchronization of a multi-ary differential phase shift keying system according to any one of claims 1 to 7, comprising: The sampling module is used to obtain the received signal of the receiver and perform analog-to-digital sampling on the received signal to obtain an analog-to-digital sampling signal; A pre-processing module is used to perform digital mixing processing on the analog-to-digital sampling signal to obtain a co-directional output signal and a quadrature output signal; A first calculation module is used to calculate a characteristic angle according to the co-directional output signal and the orthogonal output signal; The second calculation module is configured to estimate the estimated best sampling point of the next symbol based on the best sampling point of the end symbol of the frame start marker when frame synchronization has been successfully performed; and estimate the estimated best sampling point of the next symbol based on the best sampling point of any symbol; A judgment module is configured to, when carrier synchronization has been successfully performed, perform offset judgment based on the carrier frequency deviation, the characteristic angle, and the best sampling point of the current symbol: determining whether the estimated best sampling point of the next symbol is offset relative to the actual best sampling point; The optimal sampling point of the next symbol is determined based on the offset judgment result to achieve symbol synchronization.

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