A packaging structure and a method for forming the same

Abstract

The present invention provides a packaging structure and a method for forming the same. The packaging structure comprises: a substrate; a plurality of packaging units stacked sequentially on the substrate, each having a stepped edge; and a plastic encapsulation layer covering the packaging units. In the packaging structure provided by the present invention, the stepped edges of the packaging units can reduce the flow resistance of the packaging material when filling the packaging material to form the plastic encapsulation layer, thereby improving the fluidity and uniformity of the packaging material, making it easier to fill the packaging material, and thus improving the uniformity and reliability of the plastic encapsulation layer.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a packaging structure and a forming method thereof. Background Art

[0002] As the integrated circuit industry enters the post-Moore era, the critical pitch and size of chips are continuously shrinking. Consequently, new integrated packaging methods have emerged, such as solderless copper-copper bonding and hybrid bonding technology, which can significantly increase integration density. Hybrid bonding is a technique that simultaneously bonds metal electrodes and dielectric insulation layers on wafers / chips. By eliminating microbumps, hybrid bonding can further reduce the interconnect pitch. Therefore, hybrid bonding technology can achieve high-density integration and plays an irreplaceable role in 3D packaging.

[0003] Hybrid bonding can provide higher interconnect density, smaller and simpler circuits, greater bandwidth, and lower power consumption. However, as the distance between chips and bumps decreases, filling with packaging materials becomes more difficult. In particular, the use of fine-pitch microbumps makes the chip spacing extremely narrow, posing a great challenge to the packaging process. Summary of the Invention

[0004] The object of the present invention is to provide a packaging structure and a method for forming the same, wherein the edges of the packaging units in the packaging structure are stepped, which can reduce the flow resistance of the packaging material, improve the fluidity and uniformity of the packaging material, and make it easier to fill the packaging material.

[0005] In order to solve the above technical problems, the present invention provides a packaging structure, comprising:

[0006] substrate;

[0007] a plurality of packaging units stacked sequentially on the substrate, wherein the edge of each packaging unit is stepped; and

[0008] The plastic sealing layer covers the packaging unit.

[0009] Optionally, the steps of adjacent packaging units face opposite directions.

[0010] Optionally, each of the packaging units includes at least two chips interconnected by hybrid bonding, and at least the chip located at the top of the packaging unit is different in size from the chip located at the bottom of the packaging unit, so that the edge of the packaging unit is stepped.

[0011] Optionally, contact pads are formed on both opposite surfaces of the chip; a dielectric layer is further formed on the bonding surface of the adjacent chip, and the dielectric layer is located at the periphery of the contact pad; the adjacent chips are connected to each other.

[0012] Contact bonding is achieved through the contact pad and the dielectric layer.

[0013] Optionally, microbumps are formed on the chip at the bottom of the packaging unit, and the microbumps are connected to the contact pads of the bottom chip; the microbumps at the bottom of each packaging unit are connected to the contact pads at the top of another packaging unit.

[0014] 0 Optionally, the corresponding contact pads on the two opposite surfaces of the chip are formed by penetrating the

[0015] The through holes of the chip are connected.

[0016] Optionally, the chip located on the side of the package structure away from the substrate is not provided with the through hole, and

[0017] The contact pad is not provided on a side of the chip away from the substrate.

[0018] Optionally, the packaging unit includes two chips interconnected by hybrid bonding, and the distance between the edges of the two chips 5 is between 30 microns and 100 microns.

[0019] Accordingly, the present invention also provides a method for forming a packaging structure, comprising the following steps:

[0020] hybrid bonding at least two wafers to form a bonded structure, and attaching the bonded structure to a dicing tape;

[0021] The bonding structure is cut at least twice on a side away from the dicing tape until the dicing tape is exposed to form a plurality of packaging units, and the cross-sectional size of the cutting groove formed by each cutting is smaller than the cross-sectional size of the cutting groove formed by the previous cutting.

[0022] The cross-sectional dimensions of the cutting groove formed by one cutting process make the edge of the packaging unit have a step shape;

[0023] removing the dicing tape;

[0024] Providing a substrate, and stacking a plurality of packaging units sequentially on the substrate; and

[0025] The packaging unit is coated with a packaging material to form a packaging structure.

[0026] 5 Optionally, after forming the bonding structure and before attaching the bonding structure to the dicing tape,

[0027] The packaging method further includes forming microbumps on the wafer on top of the bonding structure.

[0028] Optionally, the step of attaching the bonding structure to a dicing tape includes:

[0029] attaching a portion of the bonding structure away from the micro-bump to the dicing tape;

[0030] A side of another portion of the bonding structure having the micro-bumps formed thereon is attached to the dicing tape.

[0031] Optionally, packaging units formed by a portion of the bonding structures and packaging units formed by another portion of the bonding structures are alternately stacked on the substrate.

[0032] Optionally, after removing the dicing tape and before sequentially stacking the plurality of packaging units on the substrate, the packaging method further includes:

[0033] forming micro bumps on a portion of the wafer on top of the package unit;

[0034] Micro bumps are formed on the wafer at the bottom of another portion of the packaging units.

[0035] Optionally, the micro-bumps of each packaging unit are stacked downward on the substrate.

[0036] Optionally, cutting blades with different widths are used to cut the bonding structure to form cutting grooves with different cross-sectional dimensions.

[0037] In summary, the packaging structure provided by the present invention comprises a substrate, a plurality of packaging units stacked sequentially on the substrate, each of the packaging units having a stepped edge, and a plastic encapsulation layer covering the packaging units. The stepped edges of the packaging units can reduce the flow resistance of the packaging material when the packaging material is filled to form the plastic encapsulation layer, thereby improving the fluidity and uniformity of the packaging material, making it easier to fill the packaging material, and thus improving the uniformity and reliability of the plastic encapsulation layer.

[0038] In the method for forming a packaging structure provided by the present invention, at least two wafers are hybrid-bonded to form a bonding structure, and the bonding structure is attached to a dicing tape; the side of the bonding structure away from the dicing tape is cut at least twice until the dicing tape is exposed to form a plurality of packaging units, and the cross-sectional size of the cutting groove formed by each cutting is smaller than the cross-sectional size of the cutting groove formed by the previous cutting, so that the edge of the packaging unit is stepped; then the dicing tape is removed; thereafter, a substrate is provided, and a plurality of packaging units are stacked on the substrate in sequence; then the packaging unit is coated with a packaging material. Since the edge of the packaging unit is stepped, the flow resistance of the packaging material during packaging can be reduced, the fluidity and uniformity of the packaging material can be improved, and the packaging material can be easier to fill. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0040] Figure 1 It is a flow chart of a method for forming a packaging structure provided by one embodiment of the present invention.

[0041] Figure 2 It is a schematic structural diagram after forming a bonding structure provided by one embodiment of the present invention.

[0042] Figure 3 It is a schematic diagram of a structure in which a side of a bonding structure away from micro-bumps is attached to a dicing tape according to an embodiment of the present invention.

[0043] Figure 4 It is a schematic structural diagram of the bonding structure after the first cutting provided by one embodiment of the present invention.

[0044] Figure 5 It is a schematic structural diagram of a bonding structure after a second cutting provided by an embodiment of the present invention.

[0045] Figure 6 This is a structural diagram of a first packaging unit provided by an embodiment of the present invention.

[0046] Figure 7 It is a schematic structural diagram of attaching a side of a bonding structure with micro-bumps to a dicing tape according to an embodiment of the present invention.

[0047] Figure 8 It is a schematic structural diagram of the bonding structure after the first cutting provided by one embodiment of the present invention.

[0048] Figure 9 This is a schematic diagram of the structure after the second cutting of the bonding structure provided by one embodiment of the present invention

[0049] Figure 10 It is a structural diagram of a second packaging unit provided by an embodiment of the present invention.

[0050] Figure 11 It is a schematic structural diagram after forming a bonding structure provided by another embodiment of the present invention.

[0051] Figure 12 It is a schematic structural diagram of attaching a bonding structure to a dicing tape provided by another embodiment of the present invention.

[0052] Figure 13 It is a schematic structural diagram of another embodiment of the present invention after the bonding structure is cut for the first time.

[0053] Figure 14 It is a schematic structural diagram of another embodiment of the present invention after the bonding structure is cut for the second time.

[0054] Figure 15 It is a structural schematic diagram of a packaging unit provided by another embodiment of the present invention.

[0055] Figure 16 It is a structural diagram of a packaging structure provided by an embodiment of the present invention.

[0056] In the attached figure:

[0057] 10-bonding structure; 11-wafer; 11′-chip; 12-dielectric layer; 13-contact pad; 14-microbump; 15-first cutting groove; 16-second cutting groove; 20-cutting tape; 30-packaging unit; 31-first packaging unit; 32-second packaging unit; 40-substrate; 50-packaging layer. DETAILED DESCRIPTION

[0058] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.

[0059] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" and "third" may explicitly or implicitly include one or at least two of such features. The term "proximal end" is usually the end close to the operator, and the term "distal end" is usually the end close to the patient. "One end" and "the other end" as well as "proximal end" and "distal end" usually refer to two corresponding parts, which not only include the endpoints. The terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements.

[0060] In addition, as used in the present invention, "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements may be direct or indirect through an intermediate element. It should not be understood as indicating or implying a spatial positional relationship between the two elements. That is, one element can be in any orientation, such as inside, outside, above, below, or to one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0061] In order to solve the above technical problems, the present invention provides a packaging structure, comprising:

[0062] substrate;

[0063] a plurality of packaging units stacked sequentially on the substrate, wherein the edge of each packaging unit is stepped; and

[0064] The plastic sealing layer covers the packaging unit.

[0065] The present invention also provides a method for forming a packaging structure, comprising the following steps:

[0066] hybrid bonding at least two wafers to form a bonded structure, and attaching the bonded structure to a dicing tape;

[0067] Cutting the bonding structure at a side away from the dicing tape at least twice until the dicing tape is exposed to form a plurality of packaging units, wherein the cross-sectional dimensions of the cutting groove formed by each cutting are smaller than the cross-sectional dimensions of the cutting groove formed by the previous cutting, so that the edges of the packaging units are stepped;

[0068] removing the dicing tape;

[0069] Providing a substrate, and stacking a plurality of packaging units sequentially on the substrate;

[0070] The packaging unit is coated with a packaging material to form a packaging structure.

[0071] In the packaging structure and the method for forming the packaging structure provided by the present invention, at least two wafers are hybrid-bonded to form a bonding structure, and the bonding structure is attached to a dicing tape; the side of the bonding structure away from the dicing tape is cut at least twice until the dicing tape is exposed to form a plurality of packaging units, and the cross-sectional dimensions of the cutting grooves formed by each cutting are smaller than the cross-sectional dimensions of the cutting grooves formed by the previous cutting, so that the edges of the packaging units are stepped. Therefore, when packaging is performed using a packaging material, the stepped edges of the packaging units can reduce the flow resistance of the packaging material during packaging, improve the fluidity and uniformity of the packaging material, and make it easier to fill the packaging material, thereby improving the uniformity and reliability of the plastic sealing layer in the finally formed packaging structure.

[0072] Figure 16 FIG. 1 is a schematic diagram of a packaging structure provided by an embodiment of the present invention. Figure 16 As shown, the packaging structure includes: a substrate 40; a plurality of packaging units 30 stacked sequentially on the substrate 40, with the edge of each packaging unit 30 being stepped; and a plastic packaging layer 50, which covers the packaging unit 30.

[0073] In one embodiment of the present invention, the steps of the adjacent packaging units 30 are oriented in opposite directions. Figure 16 As shown, the packaging unit 30 includes a first packaging unit 31 and a second packaging unit 32. The step of the first packaging unit 31 faces downward, that is, toward the substrate 40, and the step of the second packaging unit 32 faces upward, that is, away from the substrate 40. The second packaging units 32 and the first packaging units 31 are alternately stacked on the substrate 40.

[0074] In this embodiment Figure 16In the figure, only two first packaging units 31 and two second packaging units 32 are shown, that is, four packaging units 30 are stacked on the substrate 40. In other embodiments, other numbers of packaging units can be stacked on the substrate 40, and the present invention is not limited to this. Of course, on the substrate 40, the first packaging units 31 can be stacked first, and then the second packaging units 32 can be stacked, with the first packaging units 31 and the second packaging units 32 stacked in sequence. In another embodiment of the present invention, only the first packaging units 31 can be stacked on the substrate 40, or only the second packaging units 32 can be stacked on the substrate 40.

[0075] The substrate 40 can be made of silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium, or can be silicon-on-insulator (SiO2) or germanium-on-insulator (GeO2). Alternatively, it can be made of other materials, such as III-V compounds such as gallium arsenide. A circuit is formed within the substrate 40, and the circuit is connected to the packaging unit 30. The plastic encapsulation layer 50 can be made of, but is not limited to, epoxy resin, phenolic resin, silicone, or spin-on silica glass. The plastic encapsulation layer 50 is located on the substrate 40 and covers the packaging unit 30.

[0076] In other embodiments, the substrate 40 may be a transfer board or a chip. The chip may be a chip with a different function from the chip in the packaging unit 30. For example, the chip in the packaging unit 30 is a DRAM (dynamic random access memory) chip, and the substrate 40 is a logic chip.

[0077] Each of the packaging units 30 includes at least two chips interconnected by hybrid bonding. In one embodiment of the present invention, at least the chip located at the top of the packaging unit 30 is different in size from the chip located at the bottom of the packaging unit 30, so that the edge of the packaging unit 30 is stepped, and the chip located in the middle, the middle chip close to the top chip, can have the same size as the top chip, and the middle chip close to the bottom chip can have the same size as the bottom chip. Alternatively, the sizes of all the chips in the packaging unit 30 are different, so that the edge of the packaging unit 30 is stepped. For example, the packaging unit 30 contains 3 chips interconnected by hybrid bonding, and the sizes of the 3 chips are different. The 3 chips are hybrid bonded in order from large to small in size, or the 3 chips can be hybrid bonded at will, and steps can be formed on the edge of the packaging unit 30.

[0078] In another embodiment of the present invention, the sizes of the chips in the packaging unit 30 can all be the same. When hybrid bonding is performed, the positions of adjacent chips can be moved so that the positions of adjacent chips are offset by a certain distance, thereby making the edge of the packaging unit 30 step-shaped. Of course, this offset needs to ensure connectivity between adjacent chips. The present invention does not limit the number of hybrid-bonded chips, which can be 2, 3, or more. The present invention also does not limit the method of forming the step-shaped edge of the packaging unit 30.

[0079] In this embodiment, the packaging unit 30 is taken as an example to illustrate that it includes two chips interconnected by hybrid bonding. Figure 6 is a structural diagram of a first packaging unit provided by an embodiment of the present invention, Figure 10 It is a structural diagram of a second packaging unit provided by an embodiment of the present invention.

[0080] Please refer to Figure 6 As shown, the first packaging unit 31 includes two chips 11′ interconnected by hybrid bonding. Contact pads 13 are formed on two opposing surfaces of the chips 11′, and the corresponding contact pads 13 on the two opposing surfaces of the chips 11′ are connected by through-holes that penetrate the chips 11′. A dielectric layer 12 is also formed on the bonding surfaces of adjacent chips 11′, and the dielectric layer 12 is located around the contact pads 13. Adjacent chips 11′ are contact-bonded via the contact pads 13 and the dielectric layer 12. For example, the first dielectric layer and the first contact pad are located on the first chip, and the second dielectric layer and the second contact pad are located on the second chip. The first dielectric layer and the second dielectric layer are contact-bonded, and the first contact pad and the second contact pad are contact-bonded.

[0081] Please refer to Figure 6 As shown, a micro bump 14 is formed on the chip 11' on the top of the first packaging unit 31, and the micro bump 14 is connected to the contact pad 13 on the chip 11' on the top of the first packaging unit 31. Figure 16 As shown, the microbump 14 at the bottom of each package unit 30 is connected to the contact pad 13 at the top of another package unit 30. Specifically, the microbump 14 at the bottom of the first package unit 31 is connected to the contact pad 13 at the top of the second package unit 32. The microbump 14 at the top of the second package unit 32 close to the substrate 40 is connected to the circuit of the substrate 40. For the first package unit 31 located at the top of the package structure, the contact pad 13 does not need to be formed on the side of the chip at the top away from the substrate 10. It can be understood that Figure 16 In the package structure shown, Figure 6 The first packaging unit 31 shown is Figure 10The second packaging unit 32 is flipped and stacked on the substrate 40. Figure 6 and Figure 10 The top, bottom and Figure 16 The top and bottom shown in are exactly the opposite.

[0082] Figure 6 In the first packaging unit 31 shown, the chip 11 ′ formed with the micro bumps 14 has a smaller size than the other chip 11 ′. Figure 10 In the second packaging unit 32 shown, the chip 11 ′ formed with the micro bumps 14 has a size larger than that of the other chip 11 ′.

[0083] For example, please refer to Figure 6 and Figure 10 As shown, in the first packaging unit 31 and the second packaging unit 32 , the distance L between the edges of the two chips 11 ′ is between 30 μm and 100 μm.

[0084] Please refer to Figure 16 As shown, the chip located at the top of the package structure (i.e., on the side of the package structure away from the substrate 40) is not provided with a through hole, and the side of the chip away from the substrate 40 is not provided with the contact pad 13. In other embodiments, through holes may be provided in the chip located at the top of the package structure, and the contact pad 13 may be provided on the side of the chip away from the substrate 40, and the present invention is not limited to this.

[0085] The packaging structure provided by the present invention includes a substrate 40, a plurality of packaging units 30 stacked sequentially on the substrate 40, each packaging unit 30 having a stepped edge; and a plastic encapsulation layer 50 covering the packaging units 30. The stepped edges of the packaging units 30 can reduce the flow resistance of the packaging material when the packaging material is filled to form the plastic encapsulation layer 50, thereby improving the fluidity and uniformity of the packaging material, making it easier to fill the packaging material, and thus improving the uniformity and reliability of the plastic encapsulation layer.

[0086] Correspondingly, the present invention also provides a method for forming a packaging structure, which is used to form the packaging structure described above. Figure 1 FIG. 1 is a flow chart of a method for forming a packaging structure according to an embodiment of the present invention. Figure 1 As shown, the method for forming the packaging structure includes the following steps:

[0087] S1: hybrid bonding at least two wafers to form a bonding structure, and attaching the bonding structure to a dicing tape;

[0088] S2: cutting the bonding structure at least twice on a side away from the dicing tape until the dicing tape is exposed to form a plurality of packaging units, wherein the cross-sectional dimensions of the cutting groove formed by each cutting are smaller than the cross-sectional dimensions of the cutting groove formed by the previous cutting, so that the edges of the packaging units are stepped;

[0089] S3: removing the cutting tape;

[0090] S4: providing a substrate, and stacking a plurality of packaging units on the substrate in sequence; and

[0091] S5: Encapsulating the packaging unit with a packaging material to form a packaging structure.

[0092] Figures 2 to 16 This is a schematic diagram of the steps of the method for forming a packaging structure according to an embodiment of the present invention. Figure 1 and Figures 2 to 16 The method for forming the packaging structure provided by the embodiment of the present invention is described in detail.

[0093] In step S1, please refer to Figure 2 、 Figure 3 and Figure 7 As shown, at least two wafers 11 are hybrid-bonded to form a bonding structure 10 , and the bonding structure 10 is attached to a dicing tape 20 .

[0094] The wafer 11 may include a substrate, a device structure formed on the substrate, and an interconnect structure electrically connecting the device structure. The substrate may be a semiconductor substrate, such as silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium, or may be silicon-on-insulator or germanium-on-insulator; or it may be other materials, such as III-V compounds such as gallium arsenide. The device structure may be a MOS device, a sensor device, a memory device, and / or other passive devices. The interconnect structure may include multiple layers, and interconnections between different layers may be achieved through contact plugs, wiring layers, vias, etc. The interconnect structure may be made of a metal material, such as tungsten, aluminum, copper, etc. The wafers 11 undergoing hybrid bonding may be the same wafer or different wafers.

[0095] The wafer 11 can be manufactured using an integrated circuit manufacturing process. The wafer 11 includes multiple chip areas and scribe lines between adjacent chip areas, each of which contains chips. When multiple wafers 11 are bonded together, the chip areas and scribe lines are bonded to each other in a corresponding manner. That is, in the bonding structure 10, the chip areas and scribe lines overlap in a direction perpendicular to the wafers 11.

[0096] Exemplarily, contact pads 13 are formed on both opposite surfaces of the wafer 11 (it is understandable that the contact pad 13 may not be formed in a certain area of ​​a certain surface of the wafer 11, and the packaging unit formed after the area is cut is located on the top of the packaging structure). A dielectric layer 12 is also formed on the bonding surface of the wafer 11 for bonding. The dielectric layer 12 is located on the periphery of the contact pad 13, and adjacent wafers 11 are contact-bonded through the contact pad 13 and the dielectric layer 12. Hybrid bonding refers to bonding in which the bonding interface is made of different materials. In the present application, the hybrid bonding includes bonding of the dielectric layer 12 and bonding of the contact pad 13.

[0097] The material of the bonding pad 13 includes, but is not limited to, an alloy formed by one or more of copper, gold, silver, aluminum, nickel, tungsten, titanium, tin, conductive graphene, or carbon nanotubes. The material of the dielectric layer 12 includes, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, aluminum oxide, aluminum nitride, amorphous silicon, silicon carbide, or spin-on silica glass. The dielectric layer 12 can be a single layer or a multilayer structure. In one embodiment, the dielectric layer 12 is made of spin-on silica glass, which has good filling capacity and good compatibility with the substrate.

[0098] In this embodiment, hybrid bonding of two wafers 11 is used as an example for explanation. In other embodiments, hybrid bonding of three or more wafers 11 may be performed, and the present invention is not limited thereto. Hybrid bonding of the two wafers 11 is performed to form a bonding structure 10. Next, microbumps 14 are formed on the top of the bonding structure 10, and the microbumps 14 are connected to the bonding pads 13 on the wafers 11 at the top of the bonding structure 10.

[0099] Next, the bonding structure 10 is attached to the dicing tape 20 . Figure 3 This is a schematic diagram of a structure in which the side of the bonding structure away from the micro-bump is attached to the dicing tape according to an embodiment of the present invention. Figure 3 As shown, a portion of the bonding structure 10 away from the micro-bump 14 is attached to the dicing tape 20 . Figure 7 This is a schematic diagram of a structure in which one side of a bonding structure with micro-bumps is attached to a dicing tape according to an embodiment of the present invention. Figure 7 As shown, another portion of the bonding structure 10 having the micro-bumps 14 formed thereon is attached to the dicing tape 20 .

[0100] In step S2, please refer to Figures 4 and 5 、 Figures 8 and 9As shown, the side of the bonding structure 10 away from the cutting tape 20 is cut at least twice until the cutting tape 20 is exposed to form a plurality of packaging units. The cross-sectional dimensions of the cutting grooves formed by each cutting are smaller than the cross-sectional dimensions of the cutting grooves formed by the previous cutting, so that the edges of the packaging units are stepped.

[0101] The bonding structure 10 is cut along the cutting lanes until the cutting tape 20 is exposed. For example, the bonding structure 10 can be cut by plasma cutting, saw blade cutting, plasma cutting or laser cutting, and the laser cutting can include laser stealth cutting and laser non-stealth cutting.

[0102] Exemplarily, the bonding structure 10 is cut using a laser stealth cutting process. Stealth cutting refers to controlling a laser emitter to emit laser pulses of a certain power, wavelength and focal length into the bonding structure 10 at a specific frequency, so as to form a metamorphic structure at a preset position in the bonding structure 10. The metamorphic structure is generally a cavity or a hollow space with a relaxed material structure (i.e., a laser scratch). During stealth cutting, the laser enters the bonding structure 10 and forms laser scratches in the bonding structure 10. The laser scratches are a grid composed of longitudinal straight channels and transverse straight channels. The laser scratches are located between adjacent chips and define the size of the chip. In this embodiment, the frequency and power of the laser are not limited during the stealth cutting process, and can be determined according to actual conditions. Then, the bonding structure 10 is cracked along the position of the laser scratches by expanding the film to form a cutting groove. In other embodiments, a plasma cutting process can also be used to directly form the cutting groove in the bonding structure 10.

[0103] In this embodiment, the side of the bonding structure 10 away from the dicing tape 20 is cut at least twice until the dicing tape 20 is exposed. The number of cuts can be equal to the number of the wafers 11 in the bonding structure 10, that is, each of the wafers 11 in the bonding structure 10 is cut once, and the cross-sectional dimensions of the cutting groove formed by each cut are smaller than the cross-sectional dimensions of the cutting groove formed by the previous cut, so that the size of each chip in the final packaging unit is inconsistent, so that the edge of the packaging unit formed by cutting is step-shaped. Of course, the number of cuts can also be less than the number of the wafers 11 in the bonding structure 10, that is, 2 or 3 wafers 11 can be cut at the same time. The bonding structure 10 is cut at least twice to ensure that chips of two sizes are formed to form a step-shaped edge.

[0104] The following description will be made by taking the bonding structure 10 including the two wafers 11 as an example. Figure 4This is a schematic diagram of the structure after the first cutting of the bonding structure provided by an embodiment of the present invention. Figure 4 As shown, it is Figure 3 In this embodiment, a saw blade with a first width is used to cut the top wafer 11 of the bonding structure 10 to form a first cutting groove 15 , which exposes the bottom wafer 11 .

[0105] Figure 5 This is a schematic diagram of the structure after the second cutting of the bonding structure provided by an embodiment of the present invention. Figure 5 As shown, it is Figure 4 In this embodiment, a second cutting blade with a second width is used to cut the wafer 11 at the bottom of the bonding structure 10 to form a second cutting groove 16, which exposes the cutting tape 20, thereby forming a plurality of packaging units.

[0106] In this embodiment, the first width is greater than the second width, that is, a wider cutting blade is used for the first cutting and a narrower cutting blade is used for the second cutting, so that the cross-sectional width of the first cutting groove 15 is greater than the cross-sectional width of the second cutting groove 16, and finally the chip size at the top of the packaging unit is smaller than the chip size at the bottom. Here, the top is Figure 5 Top shown.

[0107] Figure 8 This is a schematic diagram of the structure after the first cutting of the bonding structure provided by an embodiment of the present invention. Figure 8 As shown, it is Figure 7 In this embodiment, a saw blade with a first width is used to cut the top wafer 11 of the bonding structure 10 to form a first cutting groove 15 , which exposes the bottom wafer 11 .

[0108] Figure 9 This is a schematic diagram of the structure after the second cutting of the bonding structure provided by an embodiment of the present invention. Figure 9 As shown, it is Figure 8 In this embodiment, a second cutting blade with a second width is used to cut the wafer 11 at the bottom of the bonding structure 10 to form a second cutting groove 16, which exposes the cutting tape 20, thereby forming a plurality of packaging units.

[0109] In this embodiment, the first width is greater than the second width, that is, a wider cutting blade is used for the first cutting and a narrower cutting blade is used for the second cutting, so that the cross-sectional width of the first cutting groove 15 is greater than the cross-sectional width of the second cutting groove 16, and finally the chip size at the top of the packaging unit is smaller than the chip size at the bottom. Here, the top is Figure 9 Top shown.

[0110] It should be noted that when the cutting road widths of the wafers 11 in the bonding structure 10 are inconsistent, the wafer 11 with a larger cutting road width needs to be located at the top of the bonding structure 10, that is, farthest from the cutting tape 20, to ensure that the cutting road cross-sectional size of the wafer 11 located on the upper layer is larger than the cutting road cross-sectional size of the wafer 11 located on the lower layer.

[0111] In step S3, please refer to Figure 6 and Figure 10 As shown, the dicing tape 20 is removed.

[0112] Please refer to Figures 3 to 6 As shown, the side of the bonding structure 10 away from the microbumps 14 is attached to the dicing tape 20. After the bonding structure 10 is cut, a plurality of first packaging units 31 are formed. The size of the chip 11′ formed with the microbumps 14 in the first packaging unit 31 is smaller than that of the other chips 11′. Optionally, the distance L between the edges of the two chips 11′ is between 30 microns and 100 microns.

[0113] Please refer to Figures 7 to 10 As shown, the side of the bonding structure 10 with the microbumps 14 is attached to the dicing tape 20. After the bonding structure 10 is cut, a plurality of second packaging units 32 are formed. The size of the chip 11′ with the microbumps 14 in the second packaging unit 32 is larger than that of the other chip 11′. Optionally, the distance L between the edges of the two chips 11′ is between 30 microns and 100 microns.

[0114] Please refer to Figure 6 and Figure 10 As shown, the directions of the steps in the first packaging unit 31 and the second packaging unit 32 are different. When the micro-bumps 14 are all located at the top of the packaging units, Figure 6 The step of the first packaging unit 31 faces upward, Figure 10 The step of the second packaging unit 32 faces downward.

[0115] It is understandable that, in another embodiment of the present invention, only the following Figure 6The first packaging unit 31 shown in FIG. 1 may also be formed as shown in FIG. Figure 10 The second packaging unit 32 is shown.

[0116] In step S4, please refer to Figure 16 As shown, a substrate 40 is provided, and a plurality of packaging units 30 are stacked on the substrate 40 in sequence.

[0117] The substrate 40 may be made of silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, indium gallium, or silicon-on-insulator (SOI), germanium-on-insulator (GOI), or other materials, such as III-V compounds such as gallium arsenide. A circuit is formed within the substrate 40.

[0118] In other embodiments, the substrate 40 may be a transfer board or a chip. The chip may be a chip with a different function from the chip in the packaging unit 30. For example, the chip in the packaging unit 30 is a DRAM (dynamic random access memory) chip, and the substrate 40 is a logic chip.

[0119] The second package units 32 and the first package units 31 are alternately stacked on the substrate 40. The microbumps 14 of the first package units 31 and the second package units 32 are stacked downward on the substrate 40. The microbumps 14 of the second package units 32 at the bottom are connected to the circuit in the substrate 40, and the microbumps 14 at the bottom of the first package units 31 are connected to the contact pads 13 at the top of the second package units 32.

[0120] It should be noted that Figure 16 It will Figure 6 The first packaging unit 31 shown is Figure 10 After the second package unit 32 is flipped, the microbumps 14 are stacked downward on the substrate 40. Figure 6 、 Figure 10 The top and bottom of Figure 16 The top is the opposite of the bottom.

[0121] In step S5, please continue to refer to Figure 16 As shown, the packaging unit 30 is coated with a packaging material to form a packaging structure.

[0122] The packaging unit 30 is coated with a packaging material to form a plastic packaging layer 50 . Figure 16 Only four layers of the encapsulation units 30 are shown, including two first encapsulation units 31 and two second encapsulation units 32 , but the present invention is not limited thereto.

[0123] Since the edge of the packaging unit 30 is in a step shape, during the process of filling the plastic packaging material to form the plastic packaging layer 50 , the flow resistance of the packaging material can be reduced, the fluidity and uniformity of the packaging material can be improved, and the packaging material can be filled more easily.

[0124] The method of forming the plastic layer 30 may include compression molding, printing molding, transfer molding, liquid sealing molding, vacuum pressing molding, and spin coating molding. The material of the plastic layer 30 includes but is not limited to epoxy resin, phenolic resin, silicone, or spin-on silica glass.

[0125] In another embodiment of the present invention, based on the above embodiment, the top of the bonding structure 10 formed by hybrid bonding of at least two wafers does not need to form the micro-bump 14, but directly affixes either side of the bonding structure 10 (the structures on both sides are the same) to the dicing tape 20, and then the bonding structure 10 is cut to form a package unit 30 with a stepped edge, and then micro-bumps 14 are formed on the top or bottom wafer of the package unit 30 to form the first package unit 31 or the second package unit 32. Of course, the method described in this embodiment can be adopted when the functions of each layer of wafers in the package unit 30 are the same. The following description will be made by taking the bonding structure 10 including two wafers 11 as an example.

[0126] In step S1, please refer to Figure 11 and Figure 12 As shown, the two wafers 11 are hybrid-bonded to form a bonding structure 10 , and the bonding structure 10 is attached to the dicing tape 20 .

[0127] In step S2, please refer to Figure 13 and Figure 14 As shown, the side of the bonding structure 10 away from the cutting tape 20 is cut twice until the cutting tape 20 is exposed to form a plurality of packaging units. The cross-sectional dimensions of the cutting grooves formed by each cutting are smaller than the cross-sectional dimensions of the cutting grooves formed by the previous cutting, so that the edges of the packaging units are stepped.

[0128] In step S3, please refer to Figure 15 As shown, the dicing tape is removed. The edge of the package unit 30 formed at this time is stepped. Next, micro bumps 14 are formed on the top of a portion of the package unit 30 to form a Figure 6 The first packaging unit 31 shown in FIG. 1 forms a micro bump 14 on the bottom wafer of another portion of the packaging unit 30 to form a micro bump 14. Figure 10 The second packaging unit 32 is shown.

[0129] In step S4, please refer to Figure 16As shown, the micro-bumps 14 of each packaging unit 30 are stacked on the substrate 40 facing in the opposite direction.

[0130] By using the method described in this embodiment, there is no need to distinguish the bonding structure 10 before cutting. The structures of the packaging units 30 formed by cutting are the same. Only before stacking the packaging units 30 on the substrate 40, micro bumps 14 are formed on the top or bottom of the packaging units 30. The method is simple and easy to operate.

[0131] It should be noted that the embodiments in this specification are described in a progressive manner, and the structures described later focus on the differences from the methods described previously, and the similarities and similarities between the various parts can be referenced to each other.

[0132] In the method for forming a packaging structure provided by the present invention, at least two wafers 11 are hybrid-bonded to form a bonding structure 10, and the bonding structure 10 is attached to a dicing tape 20; the side of the bonding structure 10 away from the dicing tape 20 is cut at least twice until the dicing tape 20 is exposed to form a plurality of packaging units 30, and the cross-sectional size of the cutting groove formed by each cutting is smaller than the cross-sectional size of the cutting groove formed by the previous cutting, so that the edge of the packaging unit 30 is stepped; then the dicing tape 20 is removed; thereafter, a substrate 40 is provided, and a plurality of packaging units 30 are stacked on the substrate 40 in sequence; then the packaging unit 30 is coated with a packaging material. Since the edge of the packaging unit 30 is stepped, the flow resistance of the packaging material during packaging can be reduced, the fluidity and uniformity of the packaging material can be improved, and the packaging material can be easier to fill.

[0133] The above description is only a description of the preferred embodiment of the present invention, and does not limit the scope of the rights of the present invention. Any person skilled in the art can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for forming a packaging structure, characterized in that: The following steps are involved: hybrid bonding at least two wafers to form a bonded structure, and attaching the bonded structure to a dicing tape; Cutting the bonding structure at a side away from the dicing tape at least twice until the dicing tape is exposed to form a plurality of packaging units, wherein the cross-sectional dimensions of the cutting groove formed by each cutting are smaller than the cross-sectional dimensions of the cutting groove formed by the previous cutting, so that the edges of the packaging units are stepped; removing the dicing tape; Providing a substrate, and stacking a plurality of packaging units sequentially on the substrate; as well as The packaging unit is coated with a packaging material to form a packaging structure.

2. The method for forming a package structure according to claim 1, wherein: After forming the bonding structure and before attaching the bonding structure to the dicing tape, the method for forming the packaging structure further includes: forming micro bumps on the wafer on top of the bonding structure.

3. The method for forming a package structure according to claim 2, wherein: The step of attaching the bonding structure to the dicing tape includes: attaching a portion of the bonding structure away from the micro-bump to the dicing tape; A side of another portion of the bonding structure having the micro-bumps formed thereon is attached to the dicing tape.

4. The method for forming a package structure according to claim 3, wherein: The packaging units formed by a portion of the bonding structures and the packaging units formed by another portion of the bonding structures are alternately stacked on the substrate.

5. The method for forming a package structure according to claim 1, wherein: After removing the dicing tape and before sequentially stacking a plurality of packaging units on the substrate, the method for forming the packaging structure further includes: forming micro bumps on a portion of the wafer on top of the package unit; Micro bumps are formed on the wafer at the bottom of another portion of the packaging units.

6. The method for forming a package structure according to claim 5, wherein: The micro-bumps of each packaging unit are stacked downward on the substrate.

7. The method for forming a package structure according to claim 1, wherein: The bonding structure is cut using cutting blades of different widths to form cutting grooves with different cross-sectional sizes.

8. A packaging structure formed by the method according to any one of claims 1 to 7, characterized in that: include: substrate; A plurality of packaging units are sequentially stacked on the substrate, wherein the edge of each packaging unit is in a step shape; as well as The plastic sealing layer covers the packaging unit.

9. The packaging structure according to claim 8, wherein: The steps of adjacent packaging units face opposite directions.

10. The packaging structure according to claim 8, wherein: Each of the packaging units includes at least two chips interconnected by hybrid bonding, and at least the chip located at the top of the packaging unit has a different size from the chip located at the bottom of the packaging unit, so that the edge of the packaging unit is stepped.

11. The packaging structure according to claim 10, wherein: Contact pads are formed on two opposite surfaces of the chip; a dielectric layer is also formed on the bonding surface of the adjacent chips, and the dielectric layer is located around the contact pads; the adjacent chips are contacted and bonded through the contact pads and the dielectric layer.

12. The packaging structure according to claim 11, wherein: Microbumps are also formed on the chip at the bottom of the packaging unit, and the microbumps are connected to the contact pads of the bottom chip; the microbumps at the bottom of each packaging unit are connected to the contact pads at the top of another packaging unit.

13. The packaging structure according to claim 11, wherein: The corresponding contact pads on two opposite surfaces of the chip are connected via through-holes penetrating the chip.

14. The packaging structure according to claim 13, wherein: The chip located on a side of the package structure away from the substrate is not provided with the through hole, and the chip is not provided with a side of the package structure away from the substrate.

15. The packaging structure according to claim 10, wherein: The packaging unit includes two chips interconnected by hybrid bonding, and the distance between the edges of the two chips is between 30 micrometers and 100 micrometers.

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