Metal oxide termination diamond field effect transistor and method of fabrication

Abstract

The application belongs to the technical field of semiconductor and provides a metal oxide terminal diamond field effect transistor and a preparation method thereof. The metal oxide terminal diamond field effect transistor comprises a diamond substrate, a source electrode and a drain electrode arranged on two sides of the upper surface of the diamond substrate, a metal oxide terminal arranged on the upper surface of the diamond substrate and located between the source electrode and the drain electrode, a gate dielectric layer arranged on the upper surface of the metal oxide terminal, and a gate electrode arranged on the upper surface of the gate dielectric layer. The metal oxide terminal and the gate dielectric layer are lattice matched, which can effectively reduce the interface state density, improve the quality of the gate dielectric layer deposited on the upper surface of the metal oxide terminal, and further make the metal oxide terminal diamond have high carrier mobility and make the metal oxide terminal diamond field effect transistor have good direct current and radio frequency performance.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and in particular relates to a metal oxide-terminated diamond field-effect transistor and its fabrication method. Background Technology

[0002] Diamond possesses advantages such as wide bandgap, high carrier mobility, high carrier saturation drift velocity, low dielectric constant, radiation resistance, and corrosion resistance, making it the "ultimate semiconductor" material for realizing high-frequency power devices. Currently, diamond field-effect transistors are mainly based on hydrogen-terminated diamond, where a layer of carbon atoms on the diamond surface is connected to a layer of hydrogen atoms, forming a negative electron affinity system. Electrons on the diamond surface are transferred to the adsorption layer, generating a two-dimensional hole gas (2DHG) near the surface, thus forming hydrogen termination.

[0003] However, hydrogen-terminated diamond field-effect transistors typically use alumina (Al2O3) as the gate dielectric. The high interface state density between the hydrogen terminal and alumina, as well as the low dielectric mass of alumina, result in low carrier mobility in hydrogen-terminated diamond, which in turn limits the DC and RF performance of diamond field-effect transistors. At the same time, since the carbon-hydrogen bonds are located on the outermost layer of diamond, it is necessary to avoid photoresist contamination, high-energy plasma, or dielectric deposition processes in oxygen-containing atmospheres during device fabrication, making the fabrication process complex. Summary of the Invention

[0004] This application provides a metal oxide-terminated diamond field-effect transistor and its fabrication method to solve the technical problem of low DC and RF performance of existing hydrogen-terminated diamond field-effect transistors due to the low carrier mobility of hydrogen-terminated diamond.

[0005] This application is achieved through the following technical solution:

[0006] In a first aspect, embodiments of this application provide a metal oxide-terminated diamond field-effect transistor, comprising: a diamond substrate; a source and a drain, respectively disposed on opposite sides of the upper surface of the diamond substrate; a metal oxide terminator, disposed on the upper surface of the diamond substrate and located between the source and the drain; a gate dielectric layer, disposed on the upper surface of the metal oxide terminator; and a gate electrode, disposed on the upper surface of the gate dielectric layer.

[0007] In conjunction with the first aspect, in some possible implementations, the diamond substrate is single-crystal diamond or polycrystalline diamond; the gate dielectric is silicon oxide, titanium oxide, aluminum oxide, copper oxide, nickel oxide or zinc oxide; the gate dielectric layer is a single dielectric layer or multiple dielectric layers; the thickness of the gate dielectric layer is 1 to 500 nm; and the gate morphology is one or more combinations of straight gate, T-type gate, TT-type gate, U-type gate and Y-type gate.

[0008] Secondly, embodiments of this application provide a method for fabricating a metal-oxide-terminated diamond field-effect transistor (MDT), comprising: photolithographically etching source and drain regions on the upper surface of a diamond substrate; depositing ohmic contact metal in the source and drain regions; and performing a first annealing treatment on the sample to allow the ohmic contact metal to react with the corresponding regions of the diamond substrate upper surface, forming a source and a drain. The source and drain regions are located on opposite sides of the upper surface of the diamond substrate. A mesa region is photolithographically etched on the upper surface of the diamond substrate; metal or metal oxide is deposited in the mesa region; and a second annealing treatment is performed on the sample to allow the metal or metal oxide to react with the corresponding regions of the diamond substrate upper surface, forming a metal-oxide-terminated transistor. The mesa region is located between the source and drain. A gate dielectric is deposited on the upper surface of the metal-oxide-terminated transistor to form a gate dielectric layer. A gate is photolithographically etched on the upper surface of the gate dielectric layer and a gate metal is deposited; the gate metal is then stripped to form a gate electrode.

[0009] In conjunction with the second aspect, in some possible implementations, photolithographically etched source / drain regions on the upper surface of a diamond substrate, and depositing ohmic contact metal in the source / drain regions, includes: coating photoresist on the upper surface of the diamond substrate in areas other than the source / drain regions; depositing ohmic contact metal in the source / drain regions; and removing the photoresist.

[0010] In conjunction with the second aspect, in some possible implementations, a mesa region is photolithographically formed on the upper surface of a diamond substrate, and metal or metal oxide is deposited in the mesa region, including: coating a region of the upper surface of the diamond substrate other than the mesa region with photoresist; depositing metal or metal oxide in the mesa region; and removing the photoresist.

[0011] In conjunction with the second aspect, in some possible implementations, photolithographically etched gate and deposited gate metal on the upper surface of the gate dielectric layer, and stripped of the gate metal to form the gate, includes: coating photoresist on the upper surface of the gate dielectric layer, the upper surface of the source, and the upper surface of the drain; making a gate metal window on the photoresist on the upper surface of the gate dielectric layer by photolithography; forming the gate by depositing and stripping the gate metal; and removing the photoresist.

[0012] In conjunction with the second aspect, some possible implementations include, before photolithographically lithographically forming the source and drain regions on the upper surface of the diamond substrate, cleaning the diamond substrate and forming a carbon-hydrogen bond layer on the upper surface of the diamond substrate using microwave plasma chemical vapor deposition.

[0013] In conjunction with the second aspect, in some possible implementations, after the sample undergoes a second annealing treatment, the unreacted metal or metal oxide in the mesa region is removed by wet etching and / or dry etching.

[0014] In conjunction with the second aspect, in some possible implementations, the metal is titanium, aluminum, copper, nickel, or zinc; the metal oxide is titanium oxide, aluminum oxide, copper oxide, nickel oxide, or zinc oxide; and the thickness of the metal or metal oxide is 0.1–2 nm.

[0015] In conjunction with the second aspect, in some possible implementations, the annealing temperature in the first annealing treatment is 400–1000°C, and the annealing condition is a hydrogen atmosphere; in the second annealing treatment, the annealing temperature is 400–1000°C, and the annealing condition is an oxygen, ozone, or mixed gas atmosphere.

[0016] It is understandable that the beneficial effects of the second aspect mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0017] The beneficial effects of the embodiments of this application compared with the prior art are:

[0018] The metal oxide-terminated diamond field-effect transistor provided in this application has a lattice match between the metal oxide terminal and the gate dielectric, which can effectively reduce the interface state density and improve the quality of the gate dielectric deposited on the upper surface of the metal oxide terminal. This enables the metal oxide-terminated diamond to have high carrier mobility and gives the metal oxide-terminated diamond field-effect transistor good DC and RF performance.

[0019] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic cross-sectional view of a metal oxide-terminated diamond field-effect transistor provided in an embodiment of this application;

[0022] Figure 2 This is a schematic flowchart of a method for fabricating a metal oxide-terminated diamond field-effect transistor according to an embodiment of this application;

[0023] Figure 3 This is a cross-sectional structural schematic diagram corresponding to the method for fabricating a metal oxide-terminated diamond field-effect transistor provided in an embodiment of this application. Detailed Implementation

[0024] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0025] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0026] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0027] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0028] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0029] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0030] Furthermore, the term "multiple" mentioned in the embodiments of this application should be interpreted as two or more.

[0031] Figure 1 This is a schematic cross-sectional view of a metal-oxide-semiconductor-terminated diamond field-effect transistor provided in an embodiment of this application. Figure 1 As shown, the metal oxide-terminated diamond field-effect transistor includes:

[0032] Diamond substrate 1; source 2 and drain 3, respectively disposed on both sides of the upper surface of diamond substrate 1; metal oxide terminal 5, disposed on the upper surface of diamond substrate 1 and located between source 2 and drain 3; gate dielectric layer 6, disposed on the upper surface of metal oxide terminal 5; gate 7, disposed on the upper surface of gate dielectric layer 6.

[0033] The diamond substrate 1 is either single-crystal diamond or polycrystalline diamond. The gate dielectric is silicon oxide (SiO2). x ), titanium oxide (TiO) x ), aluminum oxide (AlO) x ), copper oxide (CuO) x Nickel oxide (NiO) x ) or zinc oxide (ZnO) x The gate dielectric layer 6 is a single dielectric layer or multiple dielectric layers, and the thickness of the gate dielectric layer 6 is 1–500 nm. The gate 7 has a morphology of one or more combinations of straight gate, T-gate, TT-gate, U-gate, and Y-gate.

[0034] The following combination Figure 1 The method for fabricating metal oxide-terminated diamond field-effect transistors according to embodiments of this application will be described in detail.

[0035] Figure 2 This is a schematic flowchart of a method for fabricating a metal oxide-terminated diamond field-effect transistor according to an embodiment of this application. Figure 3 This is a cross-sectional structural schematic diagram corresponding to the fabrication method of a metal-oxide-semiconductor-terminated diamond field-effect transistor provided in an embodiment of this application. (Refer to...) Figure 2 and Figure 3 The method is described in detail below:

[0036] Step 101: Photolithographically etch source and drain regions on the upper surface of the diamond substrate, deposit ohmic contact metal in the source and drain regions, and perform a first annealing treatment on the sample to allow the ohmic contact metal to react with the upper surface of the diamond substrate in the corresponding region to form the source and drain.

[0037] Among them, see Figure 3 In (a)-(b), the source and drain regions are located on both sides of the upper surface of the diamond substrate 1. Correspondingly, the formed source 2 and drain 3 are located on both sides of the upper surface of the diamond substrate 1. The ohmic contact metal reacts with the upper surface of the diamond substrate 1 in contact with it to form the source 2 and drain 3.

[0038] For example, in the first annealing treatment, the annealing temperature is 400–1000°C, and the annealing condition is a hydrogen atmosphere. The ohmic contact metal can be Ti / Au, Ti / Pt / Au, TiW / Au, TiW / Pt / Au, Pd / Au, Cr / Au, etc.

[0039] In one possible implementation, source / drain regions are photolithographically etched on the upper surface of a diamond substrate, and ohmic contact metal is deposited in the source / drain regions. Specifically, this may include:

[0040] Photoresist is coated on the surface of a diamond substrate, excluding the source / drain regions; ohmic contact metal is deposited in the source / drain regions; and the photoresist is removed.

[0041] Step 102: Photolithographically etch a mesa region on the upper surface of the diamond substrate, deposit metal or metal oxide in the mesa region, and perform a second annealing treatment on the sample to allow the metal or metal oxide to react with the upper surface of the diamond substrate in the corresponding region to form a metal oxide terminal.

[0042] Among them, see Figure 3 In (c)-(d), the mesa region is located between source 2 and drain 3.

[0043] For example, in the second annealing process, the annealing temperature is 400 to 1000°C, and the annealing conditions are oxygen, ozone, a mixture of oxygen and ozone, a mixture of oxygen, argon, and nitrogen, or a mixture of ozone, argon, and nitrogen atmosphere.

[0044] For example, when depositing metal in the mesa region, the metal can be titanium, aluminum, copper, nickel, or zinc, etc., and the metal deposition method can be thermal evaporation, electron beam evaporation, atomic layer deposition, magnetron sputtering, etc. When depositing metal oxide in the mesa region, the metal oxide can be titanium oxide, aluminum oxide, copper oxide, nickel oxide, or zinc oxide, etc., and the metal oxide deposition method can be atomic layer deposition, thermal evaporation, magnetron sputtering, metal self-oxidation, etc. The thickness of the deposited metal or metal oxide 4 is 0.1–2 nm.

[0045] For example, the metal or metal oxide 4 deposited in the mesa region reacts with the upper surface of the diamond substrate 1 in the corresponding region below during the second annealing process, i.e., alloying, to form a layer of two-dimensional hole gas (2DHG) on the upper surface of the diamond substrate 1, which is to form a metal oxide terminal 5. The metal oxide terminal 5 formed on the upper surface of the diamond substrate 1 provides a metal oxide terminal diamond as a conductive channel.

[0046] Lattice matching between the metal oxide terminal and the gate dielectric can effectively reduce the interface trap density, i.e., reduce the interface state density, while ensuring the high quality of the gate dielectric deposited on the surface of the metal oxide terminal. This, in turn, enables the metal oxide terminal diamond transistor to have high carrier mobility, and gives the metal oxide terminal diamond field-effect transistor good DC and RF performance, as well as good temperature stability.

[0047] In one possible implementation, a mesa region is photolithographically patterned on the upper surface of the diamond substrate, and metal or metal oxide is deposited in the mesa region. Specifically, this may include:

[0048] Photoresist is coated on the surface of a diamond substrate, excluding the mesa region; metal or metal oxide is deposited in the mesa region; and the photoresist is removed.

[0049] Step 103: Deposit a gate dielectric on the upper surface of the metal oxide terminal to form a gate dielectric layer.

[0050] Among them, see Figure 3 In (e), the gate dielectric is silicon oxide, titanium oxide, aluminum oxide, copper oxide, nickel oxide, or zinc oxide, etc. The gate dielectric layer 6 is a single dielectric layer or multiple dielectric layers, and the thickness of the gate dielectric layer 6 is 1–500 nm.

[0051] Step 104: Photolithographically etch a gate on the upper surface of the gate dielectric layer and deposit gate metal, then strip the gate metal to form the gate electrode.

[0052] In one possible implementation, step 104 may specifically include:

[0053] Photoresist is coated on the upper surface of the gate dielectric layer, the upper surface of the source electrode, and the upper surface of the drain electrode; a gate metal window is made on the photoresist on the upper surface of the gate dielectric layer by photolithography; the gate is formed by deposition and stripping of the gate metal; and the photoresist is removed.

[0054] Among them, see Figure 3 In (f), the gate metal can be Al / Au, etc. The morphology of the gate 7 is one or more combinations of straight gate, T-type gate, TT-type gate, U-type gate, and Y-type gate.

[0055] In one possible implementation, before photolithographically lithographically forming the source / drain region on the upper surface of the diamond substrate, the process includes: cleaning the diamond substrate; and forming a carbon-hydrogen bond layer on the upper surface of the diamond substrate using microwave plasma chemical vapor deposition.

[0056] For example, a carbon-hydrogen bond layer is formed on the upper surface of the diamond substrate 1 to make it easier for metal oxide terminals 5 to form on the upper surface of the diamond substrate 1 in the corresponding region where the metal or metal oxide 4 reacts with the corresponding region.

[0057] In one possible implementation, after the sample undergoes a second annealing treatment, the unreacted metal or metal oxide in the mesa region is removed by wet etching and / or dry etching.

[0058] The aforementioned method for fabricating metal-oxide-terminated diamond field-effect transistors (MOSFETs) involves forming metal-oxide terminals in the mesa region on the upper surface of a diamond substrate. These metal-oxide-terminated diamonds serve as conductive channels. Due to the lattice matching between the metal-oxide terminals and the gate dielectric, the interface trap density (i.e., the interface state density) is effectively reduced. Simultaneously, the high quality of the gate dielectric deposited on the upper surface of the metal-oxide terminals is ensured, resulting in high carrier mobility in the metal-oxide-terminated diamond. Consequently, the MOSFET exhibits excellent DC and RF performance, as well as good temperature stability. Furthermore, the method uses metal-oxide terminals instead of hydrogen terminals, eliminating the need for photoresist contamination, high-energy plasma, or oxygen-containing atmosphere dielectric deposition processes, simplifying the fabrication process.

[0059] A simple example is the fabrication steps of the metal oxide-terminated diamond field-effect transistor based on the alumina-terminated diamond field-effect transistor described in this application:

[0060] (1) Clean the single crystal diamond substrate and place the cleaned diamond substrate in a hydrogen plasma atmosphere at 750°C. Then, use microwave plasma chemical vapor deposition to treat the surface of the diamond substrate for 10 minutes to form a carbon-hydrogen bond layer.

[0061] (2) Photolithographically etch source and drain regions on the upper surface of the diamond substrate. The source and drain regions are located on both sides of the upper surface of the diamond substrate. Ohmic contact metal Ti / Pt / Au is deposited in the source and drain regions. The sample is then annealed at 700°C in a hydrogen atmosphere for 30 minutes. The alloy forms the source and drain.

[0062] (3) A mesa region was photolithographically patterned on the surface of a diamond substrate, located between the source and drain electrodes. A 1 nm thick layer of metallic aluminum was deposited in the mesa region by electron beam evaporation. The sample was then annealed at 500 °C in an ozone atmosphere for 2 hours to form an alumina terminal. Unreacted metallic aluminum and its oxides in the mesa region were removed by hydrofluoric acid wet etching.

[0063] (4) The sample was placed in an environment of 400°C and an alumina gate dielectric with a thickness of 50 nm was deposited on the surface of the alumina terminal by atomic layer deposition to form a gate dielectric layer.

[0064] (5) Photolithographically etch a gate on the upper surface of the gate dielectric layer, deposit and strip the gate metal Al / Au to form a T-type gate.

[0065] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0066] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A metal oxide-terminated diamond field-effect transistor, characterized in that, include: Diamond substrate; The source and drain are respectively disposed on both sides of the upper surface of the diamond substrate; A metal oxide terminal is directly disposed on the upper surface of the diamond substrate and located between the source and drain electrodes. A mesa region is etched on the upper surface of the diamond substrate, and a metal or metal oxide is directly deposited in the mesa region. The sample undergoes a second annealing treatment to allow the metal or metal oxide to react directly with the corresponding region of the diamond substrate upper surface, forming the metal oxide terminal. The metal is titanium, aluminum, copper, nickel, or zinc; the metal oxide is titanium oxide, aluminum oxide, copper oxide, nickel oxide, or zinc oxide; the thickness of the metal or metal oxide is 0.1~2 nm; the second annealing treatment is performed under an oxygen, ozone, or mixed gas atmosphere. A gate dielectric layer is disposed on the upper surface of the metal oxide terminal; the metal oxide terminal and the gate dielectric layer are lattice matched. The gate is disposed on the upper surface of the gate dielectric layer.

2. The metal oxide-terminated diamond field-effect transistor according to claim 1, characterized in that, The diamond substrate is a single-crystal diamond or a polycrystalline diamond; The gate dielectric is silicon oxide, titanium oxide, aluminum oxide, copper oxide, nickel oxide, or zinc oxide; the gate dielectric layer is a single dielectric layer or multiple dielectric layers; the thickness of the gate dielectric layer is 1~500 nm; The gate morphology is one or more of the following: straight gate, T-type gate, TT-type gate, U-type gate, and Y-type gate.

3. A method for fabricating a metal oxide-terminated diamond field-effect transistor, characterized in that, include: Source and drain regions are photolithographically etched on the upper surface of a diamond substrate. Ohmic contact metal is deposited in the source and drain regions, and the sample is subjected to a first annealing treatment to allow the ohmic contact metal to react with the corresponding regions of the upper surface of the diamond substrate to form source and drain electrodes. The source and drain regions are located on both sides of the upper surface of the diamond substrate. A mesa region is photolithographically etched on the upper surface of the diamond substrate. Metal or metal oxide is directly deposited in the mesa region, and the sample undergoes a second annealing treatment to allow the metal or metal oxide to react directly with the corresponding area of ​​the diamond substrate upper surface, forming a metal oxide terminal. The mesa region is located between the source and drain electrodes. The metal is titanium, aluminum, copper, nickel, or zinc; the metal oxide is titanium oxide, aluminum oxide, copper oxide, nickel oxide, or zinc oxide; the thickness of the metal or metal oxide is 0.1~2 nm; the second annealing treatment is performed under an oxygen, ozone, or mixed gas atmosphere. A gate dielectric is deposited on the upper surface of the metal oxide terminal to form a gate dielectric layer; the metal oxide terminal and the gate dielectric layer are lattice matched. A gate is photolithographically etched on the upper surface of the gate dielectric layer and a gate metal is deposited. The gate metal is then stripped to form the gate electrode.

4. The method for fabricating a metal oxide-terminated diamond field-effect transistor according to claim 3, characterized in that, The process of photolithographically etching source / drain regions on the surface of a diamond substrate and depositing ohmic contact metal in the source / drain regions includes: Photoresist is coated on the surface of the diamond substrate, excluding the source and drain regions. An ohmic contact metal is deposited in the source / drain region; Remove the photoresist.

5. The method for fabricating a metal oxide-terminated diamond field-effect transistor according to claim 3, characterized in that, The step of photolithographically etched mesa regions on the upper surface of the diamond substrate, and depositing metal or metal oxides in the mesa regions, includes: Photoresist is coated on the surface of the diamond substrate, excluding the mesa region. Deposit metal or metal oxide in the mesa region; Remove the photoresist.

6. The method for fabricating a metal oxide-terminated diamond field-effect transistor according to claim 3, characterized in that, The process of photolithographically etching a gate and depositing gate metal on the upper surface of the gate dielectric layer, and then stripping the gate metal to form the gate electrode, includes: Photoresist is coated on the upper surface of the gate dielectric layer, the upper surface of the source electrode, and the upper surface of the drain electrode; A gate metal window is formed on the photoresist on the upper surface of the gate dielectric layer by photolithography. The gate is formed by depositing and stripping gate metal; Remove the photoresist.

7. The method for fabricating a metal oxide-terminated diamond field-effect transistor according to claim 3, characterized in that, Before photolithographically lithographically etching the source and drain regions on the surface of the diamond substrate, the process includes: The diamond substrate is cleaned; A carbon-hydrogen bond layer was formed on the surface of the diamond substrate using microwave plasma chemical vapor deposition.

8. The method for fabricating a metal oxide-terminated diamond field-effect transistor according to claim 3, characterized in that, The second annealing treatment of the sample includes: Unreacted metal or metal oxides in the mesa region are removed by wet etching and / or dry etching.

9. The method for fabricating a metal oxide-terminated diamond field-effect transistor according to claim 3, characterized in that, In the first annealing treatment, the annealing temperature is 400~1000℃ and the annealing condition is a hydrogen atmosphere; in the second annealing treatment, the annealing temperature is 400~1000℃.

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