Filter circuit using active inductor

Abstract

A filter circuit (200) using an active inductor is disclosed. The filter circuit (200) has a first terminal (In1 / Out1) and a second terminal (In2 / Out2). The filter circuit (200) includes a first transistor (M1) and a second transistor (M2). The filter circuit (200) also includes a first switch (S1), a second switch (S2), a first capacitor (C1), a second capacitor (C2) and a resistor (R). The first and second transistors (M1 / M2) and the resistor (R) and the first and second switches (S1 / S2) are connected together in a current mirror topology. The first and second capacitors (C1 / C2) are respectively connected at the first and second terminals of the filter circuit (200). The filter circuit (200) can be configured to either use the first terminal (In1 / Out1) as an input terminal and the second terminal (In2 / Out2) as an output terminal, or use the first terminal (In1 / Out1) as an output terminal and the second terminal (In2 / Out2) as an input terminal by changing the on-off state of the first and second switches. The transistors are interconnected in a current mirror manner. Depending on the switch position, one of the transistors also functions as part of an active inductor, so that the circuit operates as a low pass filter with a complex pole pair and a real pole. Depending on the switch position, the LPF allows signal flow in either direction. For use in conjunction with a passive mixer (420) in a TDD environment.

Description

Technical Field

[0001] Embodiments herein relate to a filter circuit. In particular, they relate to a low pass filter (LPF) implemented by using an active inductor. Background Art

[0002] Wireless communication systems typically include a complex chain of transmitter and receiver circuits, including several frequency conversion steps. The transmitter circuit typically up-converts a baseband signal to a radio frequency (RF) signal for transmission, while the receiver circuit down-converts the received RF signal to a baseband signal for processing. This frequency conversion requires a mixer to mix the two signals.

[0003] The transmitter (Tx) typically includes a digital-to-analog converter (DAC), a low-pass filter (LPF), an up-conversion mixer, and a power amplifier module. Similarly, the receiver (Rx) includes an analog-to-digital (ADC), an LPF, a down-conversion mixer, and a low-noise amplifier module. Many wireless systems operate in frequency division duplex (FDD) mode, where Tx and Rx are active at the same time. This makes it very difficult to use the same hardware modules in Tx and Rx mode. However, there are also many wireless systems that operate in time division duplex (TDD) mode. These systems turn on one of the Tx or Rx at a time, making it easier to share the same hardware modules. For example, systems such as the second generation (2G), time division code division multiple access (TD-CDMA), time division long term evolution (TD-LTE), and 5G high frequency band.

[0004] Analog low-pass filters are used as anti-aliasing filters in both transmitters and receivers, placed between the data converter and the frequency converter, i.e. after the digital-to-analog converter (DAC) in the transmitter and before the analog-to-digital converter (ADC) in the receiver. Usually they are implemented as operational amplifiers (op-amps) with feedback elements, generating complex poles to effectively suppress aliasing frequencies while passing the desired signal with minimum distortion. Other alternatives are to use active or passive components such as inductors, capacitors and resistors to form these filters. However, most applications require the filter poles to be complex to achieve the required attenuation at the stop band while keeping the pass-band gain droop to a minimum. A real pole gives 3dB of attenuation at the pole frequency, for example if third-order filtering is required to achieve the required stop-band attenuation, this will cause 9dB of attenuation at the pole frequency. If all poles are in the same position, this means that significant "gain droop" is inevitable in the passband. For example, a real pole / zero has a Q of 0.5, which means there is a 3dB deviation at the pole / zero frequency. Complex pole pairs have Q values ​​greater than 0.5 by definition, resulting in less "gain roll-off". If the Q is greater than 0.707, the frequency response will even peak in the passband.

[0005] A common approach to generating complex poles is to use an op amp in a feedback configuration. However, this comes at a high cost in current consumption as the signal bandwidth increases. The reason is that the op amp needs a bandwidth 5-10 times higher than the signal bandwidth, called unity gain bandwidth (UGB) or gain bandwidth product (GBP), in order to maintain high loop gain in the passband. If a higher-order filter is required, more op amps are required, further increasing current consumption. For example, the requirement for base transceiver stations (BTS) for 5G products now is 400MHz instantaneous bandwidth (IBW), and even 800MHz IBW is discussed, that is, 200MHz baseband BW on in-phase and quadrature-phase signals. This means that the digital pre-distortion (DPD) bandwidth will be higher. Depending on how high the linearity requirement needs to be to set the loop gain, this means that the op amp needs to have a UGB of about 3-6GHz. If 800MHz IBW is required, this may need to be doubled, making it difficult to achieve even at high current consumption.

[0006] Another way to generate complex poles is to use a transconductor-capacitor (gm-C) type filter. Unfortunately, they have poor linearity at low supply voltages due to the large input and output voltage swings. Summary of the invention

[0007] Therefore, it is an object of embodiments herein to provide a low pass filter with improved performance.

[0008] According to one aspect of the embodiments of this document, the purpose is achieved by a filter circuit having a first end and a second end. The filter circuit includes: a first transistor having a first end, a second end and a third end; a second transistor having a first end, a second end and a third end. The filter circuit also includes a first switch and a second switch, a first capacitor and a second capacitor, and a resistor. The first end of the first transistor, the first end of the first switch and the first end of the first capacitor are connected to the first end of the filter circuit. The first end of the second transistor, the first end of the second switch and the first end of the second capacitor are connected to the second end of the filter circuit. The second end of the first transistor, the second end of the second transistor and the first end of the resistor are connected together. The third ends of the first transistor and the second transistor are connected together. The second end of the first switch, the second end of the second switch and the second end of the resistor are connected together. The second ends of the first capacitor and the second capacitor are connected to the signal ground. By changing the on-off state of the first switch and the second switch, the filter circuit can be configured to either use the first end as input and the second end as output, or use the first end as output and the second end as input.

[0009] In other words, according to the embodiments of the present invention, a filter circuit with low-pass characteristics is realized by using an active inductor. The current mirror connection of the first and second transistors forms an active inductor. This makes it possible to generate complex poles with good Q values ​​and achieve high bandwidth. Through the first and second switches, the current mirror is configured to be switchable, and the filter circuit can be easily made bidirectional. The filter circuit can be easily integrated with a DAC or ADC and a passive mixer. Since the passive mixer is already bidirectional, the bidirectional filter circuit and the mixer combination can be used for both transmit and receive modes.

[0010] The filter circuit according to the embodiments of this document has some advantages:

[0011] The filter circuit itself has a high bandwidth because the traditional trade-off between bandwidth and current consumption does not exist in this topology.

[0012] By implementing the first and second capacitors and the resistor with switched or variable capacitors and resistors, the bandwidth may be scalable, which makes it possible to adapt to different products with different IBWs.

[0013] The filter circuit is robust compared to op amp based solutions since there is no feedback loop, neither differential mode nor common mode, thus eliminating stability issues.

[0014] It is very simple and does not require bias voltage, reference current, etc.

[0015] Since the entire filter circuit consists of a single current mirror, it can operate at very low supply voltages.

[0016] The complex pole pair formed at the input, i.e. the diode-connected transistor side of the current mirror, depends on the state of the first and second switches and is independent of the current mirror gain. The gain of the current mirror can be changed without disturbing the complex poles, thereby enabling gain programmability.

[0017] The bidirectional nature of the filter circuit allows transmit and receive operation on the same LPF and mixer chain. This allows the LO profile to be smaller and consume less current.

[0018] Thus, the filter circuit according to embodiments herein provides a low pass filter with improved performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Examples of embodiments of the present invention are described in more detail with reference to the accompanying drawings, in which:

[0020] Figure 1 (a) is a schematic diagram of an active inductor according to the prior art; (b) is a small signal model of the active inductor shown in (a); (c) is a graph showing the input impedance of the active inductor; and (d) is a small signal equivalent circuit diagram of the active inductor;

[0021] Figure 2 is a schematic diagram showing a filter circuit according to an embodiment of the present invention;

[0022] Figure 3 (a) is a simplified schematic diagram of a filter circuit according to an embodiment of the present invention when operating in one of two directions; (b) is a small signal equivalent circuit of the filter circuit shown in (a);

[0023] Figure 4 is a schematic diagram showing a filter circuit combining a mixer and a DAC / ADC according to an embodiment;

[0024] Figure 5 is a graph showing a simulated transfer function of a filter circuit for transmit mode according to an embodiment of the present invention;

[0025] Figure 6is a graph showing a simulated transfer function of a filter circuit for receive mode according to an embodiment of the present invention; and

[0026] Figure 7 is a block diagram illustrating an electronic device in which embodiments of the present invention may be implemented. DETAILED DESCRIPTION

[0027] As part of the embodiments developed herein, active inductors according to the prior art will first be discussed. In "A 1V 4.2Mw fully integrated 2.5Gb / sCMOS limiting amplifier using folded active inductors" at the 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No. 04CH37512), Wu et al. proposed an active folded inductor for use as a spike inductor in a limiting amplifier. Their goal was to extend the bandwidth of the limiting amplifier by eliminating parasitic capacitance using an active inductor. Figure 1 (a) is a schematic diagram of Wu's active inductor; (b) shows the small signal model of the active inductor; (c) shows the input impedance of the active inductor that varies with frequency; and (d) shows the small signal equivalent circuit of Wu's active inductor. Figure 1 As can be seen in Figure 1, Wu's folded active inductor circuit is very similar to a diode-connected metal oxide silicon (MOS) transistor that can be used as the input of a current mirror. The only difference is the resistor at the gate. The same transistor can be used as an active inductor or as part of a current mirror pair.

[0028] Based on this observation, the Figure 2 Filter circuit 200 according to an embodiment of the present invention is shown in FIG. 2 , which uses an active inductor similar to Wu's inductor.

[0029] The filter circuit 200 has a first terminal In1 / Out1 and a second terminal In2 / Out2 .

[0030] The filter circuit 200 includes a first transistor M1 having a first terminal M11, a second terminal M12, and a third terminal M13, and a second transistor M2 having a first terminal M21, a second terminal M22, and a third terminal M23.

[0031] The filter circuit 200 further includes a first switch S1 , a second switch S2 , a first capacitor C1 , a second capacitor C2 , and a resistor R.

[0032] The first and second transistors M1 / M2 are connected in a current mirror topology together with a resistor R and a first and second switch S1 / S2. The first and second capacitors C1 / C2 are connected at the first and second terminals of the filter circuit 200, respectively. The connections of the elements in the filter circuit 200 are as follows:

[0033] A first terminal M11 of the first transistor M1 , a first terminal S11 of the first switch S1 , and a first terminal C11 of the first capacitor C1 are connected to a first terminal In1 / Out1 of the filter circuit 200 ;

[0034] A first terminal M21 of the second transistor M2, a first terminal S21 of the second switch S2, and a first terminal C21 of the second capacitor C2 are connected to a second terminal In2 / Out2 of the filter circuit 200;

[0035] A second end M12 of the first transistor M1, a second end M22 of the second transistor M2 and a first end R1 of the resistor R are connected together;

[0036] The third terminals M13 and M23 of the first and second transistors M1 and M2 are connected together;

[0037] A second end S12 of the first switch S1, a second end S22 of the second switch S2, and a second end R2 of the resistor R are connected together; and

[0038] Second terminals C12, C22 of the first and second capacitors C1, C2 are connected to a signal ground.

[0039] The filter circuit 200 can be configured to either use the first terminal In1 / Out1 as an input terminal and the second terminal In2 / Out2 as an output terminal, or use the first terminal In1 / Out1 as an output terminal and the second terminal In2 / Out2 as an input terminal by changing the on / off state of the first and second switches S1 and S2.

[0040] It can be seen that the filter circuit 200 has an inductor of Wu embedded in the current mirror, and realizes bidirectionality by using two switches S1 and S2 that exchange the input or output roles of transistors M1 and M2 in the current mirror. In this way, the filter circuit 200 can be used as a LPF that can be bidirectional by two switches.

[0041] It should be noted that the active inductor and the shunt capacitor on the input side form a complex pole pair, while the shunt capacitor on the output side forms a real pole.

[0042] To derive the transfer function H(s) of the filter circuit 200 that generates the complex poles, Figure 3 A simplified schematic diagram of the filter circuit 200 is shown in (a) when operating in one of two directions (with S1 on and S2 off). For simplicity, the real pole is not included, so Figure 3 C2 is ignored in (a). Figure 3 (b) shows a small signal equivalent circuit of the filter circuit 200 shown in (a).

[0043] The input current is

[0044] i in =g m ·v gs +i1+i2 (1)

[0045] The output current is

[0046] i out =g m ·v gs (2)

[0047] The voltage at the input is

[0048]

[0049] The gate voltage of the transistor is

[0050]

[0051] Substituting equation (4) into equation (2):

[0052]

[0053] Substituting equation (5) into equation (3):

[0054]

[0055] Substituting equations (2), (5) and (6) into equation (1):

[0056]

[0057]

[0058]

[0059] Then the transfer function H(s) is

[0060]

[0061]

[0062]

[0063] The complex pole is

[0064]

[0065] And the Q value of the pole is

[0066]

[0067]

[0068] As can be seen from the transfer function, the filter circuit 200 can be configured as a low-pass filter and can generate a complex pole with a good Q value and achieve a high bandwidth by using active inductors.

[0069] According to some embodiments of the present invention, the first and second capacitors C1, C2 can be implemented with variable capacitors or switchable capacitor banks. The resistor R can be implemented with variable resistors or switchable resistor banks. That is, the bandwidth of the filter circuit 200 can be configured to be scalable by switching capacitors and resistors, which makes it possible to adapt to different products with different IBWs.

[0070] The filter circuit 200 has a current mirror topology and can be easily integrated with a DAC / ADC and a mixer. By making the current mirror switchable, the filter circuit 200 can be easily made bidirectional. Since the passive mixer is already bidirectional, a bidirectional filter and mixer combination can be obtained, which can be used in both transmit and receive modes.

[0071] According to some embodiments herein, the filter circuit 200 may be implemented in a transceiver. Figure 4 An example implementation of a filter circuit 200 used as an LPF in a transceiver chain is shown. A first terminal In1 / Out1 of the filter circuit 200 may be coupled to a data converter 410, i.e., an ADC or a DAC, and a second terminal In2 / Out2 of the filter circuit 200 may be coupled to a mixer 420, i.e., an upconverter or a downconverter. When the first switch S1 is turned on and the second switch S2 is turned off, the filter circuit 200 operates in a transmit mode, and when the first switch S1 is turned off and the second switch S2 is turned on, the filter circuit 200 operates in a receive mode. The ADC / DAC may be a current mode converter, the mixer may be a passive current mode mixer, and the current mode mixer may be a Gilbert cell mixer.

[0072] The bidirectional nature of the filter circuit 200 enables transmit and receive operations on the same LPF and mixer chain. In this way, the local oscillator (LO) distribution will become smaller and consume less current, because one of the problems with having dedicated Tx and Rx hardware chains is that the LO distribution consumes high current. For example, in a direct quadrature conversion architecture, 4 LO signals need to be routed to Tx and Rx at RF frequencies (e.g., 28GHz). Routing to two blocks adds more capacitive loads, increases current consumption and requires area because these are sensitive lines that need to be shielded. In addition, due to load pulling, not all unused LO buffers can be turned off. For example, when the Tx is turned off, some Tx buffers still need to run because turning them on / off will cause glitches in the phase-locked loop (PLL) output due to load changes. Another problem with dedicated Tx and Rx chains is the placement of the baseband filters. Since the LO path running at the RF frequency is prioritized, both the Tx and Rx baseband blocks are pushed far away from the mixers. This can result in long routing on the mixer baseband interface, increasing parasitics and causing possible cross talk and interference issues. The bidirectional nature of the filter circuit 200 can address these issues.

[0073] The bidirectional filter circuit 200 is superior to prior art op-amp based LPF solutions because to make an op-amp based LPF bidirectional, the input and output connections need to be swapped via switches. This adds extra resistance and capacitance to the circuit, making high bandwidth operation more difficult and expensive.

[0074] The filter circuit 200 is simple and does not require bias voltages and reference currents, etc. It can be integrated into many circuits without consuming any additional current. For example, it can use the same current source as a data converter or mixer. Since the entire filter circuit consists of a single current mirror and the number of stacked transistors is small when integrated in data converters and mixers, it can operate at very low supply voltages. It is a simple and robust way to generate complex poles at high bandwidths compared to op amp based solutions. Depending on how it is integrated with the converter, it can achieve all of these features without consuming additional current in the system because it can multiplex current from other blocks.

[0075] The filter circuit 200 exhibits better efficiency in terms of the Q of the poles versus the consumed power. The filter circuit 200 in the current mirror topology is well suited for DAC and mixer current interfaces. The complex poles are generated without consuming any additional current.

[0076] The complex poles of the filter circuit 200 are formed by capacitors C1 / C2, resistors R and transistors M1 / M2 at the input of the current mirror, i.e., the diode-connected transistor side of the current mirror, depending on the state of the first and second switches. The pole position is independent of the current mirror gain, i.e., the current mirror ratio. The current mirror gain can be adjusted without changing the pole position, making gain programmability possible. If the current mirror requires gain, bidirectional operation requires attention to this asymmetry, because gain in one direction will be attenuation in the other direction. For example, if the filter circuit 200 used as an Rx filter requires more gain, this problem can be solved by adding additional current mirrors in front of the ADC, such as adding more pMOS transistors, which is only used in receive mode.

[0077] The filter circuit 200 inherently has a high bandwidth because the traditional tradeoff between bandwidth and current consumption does not exist in this topology.

[0078] Compared to operational amplifier based solutions, the filter circuit 200 is robust because there is no feedback loop, neither differential mode nor common mode, which eliminates stability issues.

[0079] According to some embodiments herein, the filter circuit 200 may be implemented in any circuit that requires filtering, such as a phase-locked loop circuit or a programmable delay line circuit.

[0080] The filter circuit 200 used as a bidirectional LPF has been simulated in two test benches, a baseband (BB) and an RF test bench. The filter circuit 200 was made symmetrical in the simulations to give the same transfer function in both operating modes.

[0081] Figure 5 The transfer function of the filter circuit 200 in a baseband test bench is shown, i.e., used as an LPF in Tx mode in a transmitter chain. The complex pole is -6.939e 8 + / -j8.674 e 8 , Q=8.004e -1 The zero point is 5.183e 9 、-8.563e 9 .

[0082] Figure 6 The transfer function of the filter circuit 200 in an RF test bench is shown, ie used as an LPF in Rx mode in a receiver chain.

[0083] from Figure 5 and Figure 6It can be seen that, compared with the BB test bench, the 1 dB bandwidth of the filter circuit 200 in the RF test bench is a little lower, that is, about 510 MHz in the RF test bench and about 660 MHz in the BB test bench.

[0084] The current conversion gain of the LPF circuit 200 and the mixer combination in Tx mode is -3.3 dB. In Rx mode, the current conversion gain of the LPF 200 and the mixer is -11.7 dB for I and Q respectively.

[0085] The filter circuit 200 according to the embodiments herein may be used in various electronic circuits or devices. Figure 7 A block diagram of an electronic device 700 is shown. The electronic device 700 may include a transmitter, a receiver or both, i.e. a transceiver Rx / Tx 710, etc. The electronic device 700 includes a filter circuit 200. The electronic device 700 may include other units, among which a memory 720, a processing unit 730 are shown. The electronic device 700 may be a user equipment or a mobile device, a wireless communication device, a radio base station for a cellular communication system.

[0086] although Figure 2 and Figure 4 The filter circuit 200 shown in the figure is implemented using NMOS transistors, but PMOS and bipolar implementations are also possible for the filter circuit 200. It will be understood by those skilled in the art that the filter circuit 200 according to the embodiments of the present invention can be implemented by any semiconductor technology, such as bipolar, NMOS, PMOS, CMOS, field effect transistor (FET) or micro-electromechanical system (MEMS) technology, etc. Depending on the type of transistor used, the first, second and third terminals of the first and second transistors M1, M2 may be referred to as the gate, source, drain, respectively, for MOS or FET transistors, or may be referred to as the base, emitter, collector, respectively, for bipolar transistors.

[0087] The circuits described herein, such as the filter circuit 200, the transceiver, the phase-locked loop circuit, and the programmable delay line, are suitable for integration on an integrated circuit. Thus, according to some embodiments, an integrated circuit comprising one or more such circuits is provided.

[0088] When used herein, the word "comprising" or "including" should be interpreted as being non-limiting, ie meaning "consisting at least of."

[0089] The embodiments herein are not limited to the preferred embodiments described above. Various substitutions, modifications and equivalents may be used. Therefore, the above embodiments should not be considered to limit the scope of the present invention, which is defined by the appended claims.

Claims

1. A filter circuit (200) having a first end (In1 / Out1) and a second end (In2 / Out2) and comprising: a first transistor (M1) having a first terminal (M11), a second terminal (M12) and a third terminal (M13); a second transistor (M2) having a first terminal (M21), a second terminal (M22) and a third terminal (M23); A first switch (S1) and a second switch (S2); a first capacitor (C1) and a second capacitor (C2); and Resistor (R); where The first end (M11) of the first transistor (M1), the first end (S11) of the first switch (S1) and the first end (C11) of the first capacitor (C1) are connected to the first end (In1 / Out1) of the filter circuit; The first end (M21) of the second transistor (M2), the first end (S21) of the second switch (S2) and the first end (C21) of the second capacitor (C2) are connected to the second end (In2 / Out2) of the filter circuit; The second end (M12) of the first transistor (M1), the second end (M22) of the second transistor (M2), and the first end (R1) of the resistor (R) are connected together; The third terminals (M13, M23) of the first transistor and the second transistor (M1, M2) are connected together; A second end (S12) of the first switch (S1), a second end (S22) of the second switch (S2), and a second end (R2) of the resistor (R) are connected together; The second ends (C12, C22) of the first and second capacitors are connected to a signal ground; and wherein The filter circuit (200) can be configured to use the first end (In1 / Out1) as input and the second end (In2 / Out2) as output, or use the first end (In1 / Out1) as output and the second end (In2 / Out2) as input by changing the on / off state of the first switch and the second switch.

2. The filter circuit (200) according to claim 1, wherein: The first and second capacitors (C1, C2) are implemented as variable capacitors or switchable capacitor banks.

3. The filter circuit (200) according to any one of claims 1 to 2, wherein: The resistor (R) is implemented as a variable resistor or a switchable resistor group.

4. The filter circuit (200) according to any one of claims 1 to 3, wherein: The filter circuit (200) is implemented in a transceiver, wherein the first end (In1 / Out1) of the filter circuit (200) is coupled to a data converter (410), the second end (In2 / Out2) of the filter circuit (200) is coupled to a mixer (420), and wherein when the first switch (S1) is turned on and the second switch (S2) is turned off, the filter circuit (200) operates in a transmission mode, and when the first switch (S1) is turned off and the second switch (S2) is turned on, the filter circuit (200) operates in a reception mode.

5. The filter circuit (200) according to any one of claims 1 to 3, wherein: The filter circuit (200) is implemented in a phase-locked loop circuit or a programmable delay line circuit.

6. A transceiver, comprising: The filter circuit (200) according to claim 4, the data converter (410) and the mixer (420).

7. An electronic device (700), comprising the filter circuit (200) according to any one of claims 1-5.

8. The electronic device (700) according to claim 7, wherein: The electronic device is any one of a base station and a wireless communication device used in a cellular communication system.

Images