A multi-power supply selection voltage stabilization circuit

Abstract

An embodiment of the present invention provides a multi-power selection voltage stabilization circuit. The circuit includes: at least two pre-voltage stabilization circuits, an input source detection circuit, and a power selection circuit. The pre-voltage stabilization circuits are respectively and correspondingly connected to a first power supply. The voltage input from the first power supply is stabilized in a low voltage domain through the pre-voltage stabilization circuits. The input source detection circuit is used to determine whether the voltage processed by the pre-voltage stabilization circuits can be used as an input source to supply power to a device to be powered. Furthermore, the power selection circuit selects a first power supply for the device to be powered according to the detection result of the input source detection circuit. That is to say, in the embodiment of the present application, after pre-stepping down multiple high-voltage power supplies, the highest voltage path is selected and gated in the low voltage domain, and then the selected highest voltage path is further voltage-stabilized. Therefore, the technical solution provided by the embodiment of the present application can reduce the use of a large number of large-size high-voltage devices and large-area devices, reducing the cost.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of voltage stabilization circuits, and particularly to a multi-power source selection voltage stabilization circuit. Background Art

[0002] Current electronic products can support both wired charging and wireless charging. Therefore, the charge pump fast charging chip needs to select the optimal input source between wireless charging and wired charging to charge the electronic product. At the same time, the charge pump fast charging chip itself also needs to select the optimal input source from these multiple input sources to supply power to the chip itself. As Figure 1 shown, the regulated power supply generated by the power source selection circuit in the figure supplies power to the charge pump boost circuit in the chip of the electronic product, enabling the switches Q1 and Q2 to be correctly turned on to connect the required input power source to the selected power source, so that the charge pump charging circuit starts to work and charges the battery in the electronic product. The input sources are respectively regulated by two high-voltage linear regulators, and then directly connected by diodes to realize selecting the input source to regulate and supply power to the chip.

[0003] Two high-voltage linear regulators require two high-voltage bias circuits, and these circuits all need a large number of high-voltage devices (usually 40V) to be realized. The stability of the high-voltage linear regulator needs to meet a certain range of load current and load capacitance. Therefore, the linear regulator itself will require a certain static current and use a complex compensation network to ensure the stability of the circuit, thus increasing the complexity of the circuit design. The increased static current and the use of a large number of compensation capacitors will greatly increase the chip area and standby power consumption. At the same time, since the power supply of the chip needs a certain current passing ability, D1 and D2 usually select diodes with a large area in order to reduce the voltage drop. Therefore, although the prior art can provide a reliable and stable power supply for the chip and avoid power-off, and solve the problems of punch-through during multi-input power source switching and protection when the input source is a negative voltage, the circuit area and power consumption overhead are too large, especially the use of a large number of large-size high-voltage devices and large-size devices. Summary of the Invention

[0004] Therefore, the embodiments of the present invention provide a multi-power source selection voltage stabilization circuit to solve the technical problems of too large circuit area and power consumption overhead in the prior art, especially the use of a large number of large-size high-voltage devices and large-size devices.

[0005] In a first aspect, an embodiment of the present application provides a dual-high-voltage first power source selection voltage stabilization circuit, including:

[0006] At least two pre-voltage stabilization circuits, an input source detection circuit, and a power source selection circuit;

[0007] The pre-voltage stabilization circuits are respectively connected to the first power source in one-to-one correspondence;

[0008] At least two of the pre - voltage - stabilizing circuits are connected in parallel. The pre - voltage - stabilizing circuit is used to stabilize the voltage input from the first power supply in the low - voltage domain;

[0009] The input - source detection circuit is connected to the output end of each pre - voltage - stabilizing circuit and each first power supply, and is used to determine whether the voltage processed by the pre - voltage - stabilizing circuit can be used as an input source to supply power to the device to be powered;

[0010] The input ends of the power - supply selection circuit are all connected to the output ends of each pre - voltage - stabilizing circuit and the output end of the input - source detection circuit. The power - supply selection circuit is used to select the first power supply for powering the device to be powered according to the detection result of the input - source detection circuit.

[0011] As a preferred embodiment of the present application, the pre - voltage - stabilizing circuit includes a clamping circuit, a source follower, a voltage control circuit, and a first switch;

[0012] The first end of the clamping circuit, the first end of the source follower, the first end of the voltage control circuit, and the first end of the first switch are all connected to the first power supply;

[0013] The second end of the clamping circuit and the second end of the voltage control circuit are both connected to the reference ground;

[0014] The third end of the clamping circuit is connected to the second end of the source follower. The third end of the voltage control circuit is connected to the second end of the first switch. The common node between the third end of the first switch and the third end of the source follower is connected to the input end of the input - source detection circuit.

[0015] As a preferred embodiment of the present application, the clamping circuit includes a first resistor and a first diode connected in series;

[0016] The first end of the first resistor is connected to the first power supply. The second end of the first resistor is connected to the first end of the first diode. The second end of the first diode is connected to the reference ground. The common end between the first resistor and the first diode is connected to the second end of the source follower.

[0017] As a preferred embodiment of the present application, the voltage control circuit includes a first current source and a second resistor connected in series;

[0018] The first end of the first current source is connected to the first power supply. The second end of the first current source is connected to the first end of the second resistor. The second end of the second resistor is connected to the reference ground potential. The common end between the first current source and the second resistor is connected to the second end of the first switch.

[0019] As a preferred embodiment of the present application, the input source detection circuit includes a selection circuit, a bias circuit, a power supply detection branch, a drive circuit, and a comparator;

[0020] The power supply detection branch, the drive circuit, and the pre-regulator circuit are arranged in one-to-one correspondence;

[0021] The first end of the selection circuit is connected to the common node between the third end of the second switch and the third end of the source follower;

[0022] The second end of the selection circuit is respectively connected to the first end of the bias circuit, the first end of the power supply detection branch, and the first end of the comparator;

[0023] The third end of the selection circuit and the second end of the power supply detection branch are both connected to the reference ground;

[0024] The third end of the power supply detection branch is connected to the first end of the drive circuit.

[0025] As a preferred embodiment of the present application, the selection circuit includes at least two selection circuit branches, and the selection circuit is arranged in one-to-one correspondence with the pre-regulator circuit and the power supply detection branch;

[0026] Each selection circuit branch includes a second switch and a second diode connected in series. The first end of the second switch is connected to the common node between the third end of the second switch and the third end of the source follower. The second end of the second switch is connected to the first end of the second diode, and the third end of the second switch is connected to the reference ground;

[0027] The common node between the second ends of each second diode is connected to the first end of the bias circuit, the first end of each power supply detection branch, and the first end of the comparator.

[0028] As a preferred embodiment of the present application, the power supply detection branch includes a second current source, a third current source, a third switch, and a fourth switch;

[0029] The first ends of the second current source and the third current source are both connected to the common node between the second ends of all the second diodes;

[0030] The second end of the second current source is connected to the first end of the third switch, the second end of the third current source is connected to the first end of the fourth switch, and the second end of the fourth switch is connected to the reference ground;

[0031] The common terminal between the second current source and the first end of the third switch is connected to the third end of the fourth switch, and the common terminal between the third current source and the first end of the fourth switch is connected to the first end of the drive circuit;

[0032] The third terminal of the third switch is connected to the common node between the third terminal of the second switch and the third terminal of the source follower;

[0033] The second terminal of the third switch and the second terminal of the fourth switch are respectively connected to the reference ground;

[0034] The third terminal of the second current source, the third terminal of the third current source and the second terminal of the bias circuit are connected to each other.

[0035] As a preferred embodiment of the present application, the common terminal formed between the common terminal between the third current source and the first terminal of the fourth switch and the first terminal of the drive circuit is connected to the first terminal of the first capacitor, and the second terminal of the first capacitor is connected to the reference ground.

[0036] As a preferred embodiment of the present application, the second terminal of the comparator is connected to the first power supply.

[0037] As a preferred embodiment of the present application, the power supply selection circuit includes a gating logic circuit, at least two fifth switches and a voltage regulator;

[0038] The first terminal of the gating logic circuit is connected to the third terminal of the comparator and the second terminal of each drive circuit, the second terminal of the gating logic circuit is connected to the first terminal of each fifth switch, the fifth switch is provided in one-to-one correspondence with the pre-regulator circuit, the second terminal of the fifth switch is connected to the common node between the third terminal of the second switch and the third terminal of the source follower, and the common node between the third terminals of each fifth switch is connected to the first terminal of the voltage regulator, and the second terminal of the voltage regulator is connected to the device to be powered.

[0039] As a preferred embodiment of the present application, the common terminal of at least two third terminals of the fifth switch is connected to the first terminal of the second capacitor, and the second terminal of the second capacitor is connected to the reference ground.

[0040] As a preferred embodiment of the present application, each third terminal of the fifth switch is connected to the end of the second diode away from the second switch.

[0041] Compared with the prior art, the embodiment of the present invention provides a multi - power - selection voltage - stabilizing circuit, which includes: at least two pre - voltage - stabilizing circuits, an input - source detection circuit, and a power - selection circuit; the pre - voltage - stabilizing circuits are respectively and correspondingly connected to a first power supply, the voltage input from the first power supply is stabilized in a low - voltage domain through the pre - voltage - stabilizing circuits, the input - source detection circuit is used to determine whether the voltage processed by the pre - voltage - stabilizing circuits can be used as an input source to supply power to the device to be powered, and then the power - selection circuit selects the first power supply for powering the device to be powered according to the detection result of the input - source detection circuit. That is to say, in the embodiment of the present application, after pre - stepping down multiple high - voltage power supplies, the highest - voltage path is selected and gated in the low - voltage domain, and then the selected highest - voltage path is further voltage - stabilized. Therefore, the technical solution provided by the embodiment of the present application can reduce the use of a large number of large - size high - voltage devices and large - area devices, reducing the cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only exemplary, and for those of ordinary skill in the art, without creative efforts, other implementation drawings can also be obtained according to the provided drawings.

[0043] The structures, ratios, sizes, etc. shown in this specification are only used to cooperate with the content disclosed in the specification for those who are familiar with this technology to understand and read, and are not used to limit the limited conditions for the implementation of the present invention. Therefore, they do not have a substantial technical meaning. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope covered by the technical content disclosed by the present invention.

[0044] Figure 1 FIG. 12 is a schematic structural diagram of a multi - power - selection voltage - stabilizing circuit provided in the prior art;

[0045] Figure 2 FIG. 16 is a schematic structural diagram of a multi - power - selection voltage - stabilizing circuit provided in the embodiment of the present application;

[0046] Figure 3 FIG. 20 is a schematic structural diagram of a multi - power - selection voltage - stabilizing circuit provided in the embodiment of the present application;

[0047] Figure 4 FIG. 24 is a working waveform diagram of the voltage - stabilizing circuit when the first power supply is slowly powered on in the embodiment of the present application;

[0048] Figure 5 FIG. 28 is a working waveform diagram of the voltage - stabilizing circuit when the first power supply is quickly powered on in the embodiment of the present application. Detailed Implementation Modes

[0049] The following specific embodiments illustrate the implementation modes of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0050] In the embodiments of the present application, the number of pre-regulator circuits is at least two, and the present application does not limit this. The following specifically takes two pre-regulator circuits as an example to specifically illustrate the solution of the present invention.

[0051] As Figure 2 shown, the embodiments of the present application provide a multi-power selection voltage regulation circuit, including: two pre-regulator circuits 03 and 04, an input source detection circuit 05 and a power selection circuit 06. In the embodiments of the present application, the pre-regulator circuit 03 is electrically connected to the first power supply 01, and the pre-regulator circuit 04 is electrically connected to the first power supply 02. The first power supply 01 and the first power supply 02 can provide voltage input for the two pre-regulator circuits 03 and 04.

[0052] The pre-regulator circuit 03 and the pre-regulator circuit 04 are arranged in parallel. The pre-regulator circuits 03 and 04 are used to stabilize the voltage input from the first power supplies 01 and 02 in the low-voltage domain. The input source detection circuit 05 is connected to the output terminals of each of the pre-regulator power supplies 03 and 04 and the first power supplies 01 and 02, and is used to determine whether the voltage processed by the pre-regulator circuits 03 and 04 can be used as an input source to supply power to the device to be powered 07. That is to say, in the entire voltage regulation circuit, all the pre-regulator circuits 03 and 04 are connected to the input source detection circuit 05 for detecting the voltage input from the first power supplies 01 and 02.

[0053] The input terminals of the power selection circuit 06 are all connected to the output terminals of each of the pre-regulator circuits 03 and 04 and the output terminal of the input source detection circuit 05. The power selection circuit 06 is used to select the first power supply 01 for power supply to the device to be powered 07 according to the detection result of the input source detection circuit 05.

[0054] In the above solution, in the embodiments of the present application, the input voltage is first stabilized in the low-voltage domain by the pre-regulator circuits 03 and 04, and then the input source detection circuit 05 detects the voltage input from the first power supplies 01 and 02 to determine whether it can supply power to the device to be powered 07, and connects the first power supply 01 or 02 that meets the requirements to the power selection circuit 06 to supply power to the device to be powered 07.

[0055] As Figure 2As shown, since the structures of the pre - voltage - stabilizing circuits 03 and 04 are the same, only the structure of the pre - voltage - stabilizing circuit 03 will be introduced in detail below.

[0056] The pre - voltage - stabilizing circuit 03 includes a clamping circuit, a source follower 03 - 3, a voltage control circuit, and a first switch 03 - 6; the first end of the clamping circuit, the first end of the source follower 03 - 3, the first end of the voltage control circuit, and the first end of the first switch 03 - 6 are all connected to the first power supply 01; the second end of the clamping circuit and the second end of the voltage control circuit are both connected to the reference ground potential; the third end of the clamping circuit is connected to the second end of the source follower 03 - 3, the third end of the voltage control circuit is connected to the second end of the first switch 03 - 6, and the common node between the third end of the second switch 05 - 1 and the third end of the source follower 03 - 3 is connected to the input of the input source detection circuit 05. The voltage at the control end of the source follower 03 - 3 can be clamped at a preset voltage through the clamping circuit.

[0057] Specifically, the clamping circuit includes a first resistor 03 - 1 and a first diode 03 - 2 connected in series; the first end of the first resistor 03 - 1 is connected to the first power supply 01, the second end of the first resistor 03 - 1 is connected to the first end of the first diode 03 - 2, the second end of the first diode 03 - 2 is connected to the reference ground potential, and the common end between the first resistor 03 - 1 and the first diode 03 - 2 is connected to the second end of the source follower 03 - 3.

[0058] The source follower 03 - 3 is a three - terminal controlled device, specifically an NMOS. The first diode 03 - 2 is a Zener diode. The gate of the three - terminal controlled device NMOS is connected to the common end between the first resistor 03 - 1 and the first diode 03 - 2, the drain of the three - terminal controlled device NMOS is connected to the first power supply 0101, and the source of the three - terminal controlled device NMOS is connected to the input source detection circuit 05. The source follower 03 - 3 is a circuit for impedance transformation and voltage following.

[0059] Specifically, the voltage control circuit includes a first current source 03-4 and a second resistor 03-5 connected in series. The voltage control circuit is used to turn off the first switch 03-6. The first end of the first current source 03-4 is connected to the first power supply 01. The second end of the first current source 03-4 is connected to the first end of the second resistor 03-5. The second end of the second resistor 03-5 is connected to the reference ground potential. The common end between the first current source 03-4 and the second resistor 03-5 is connected to the second end of the first switch 03-6. In the embodiment of the present application, the voltage control circuit is not limited to the above structure and can also be other structures. As long as it can control the circuit of the first switch 03-6, it belongs to the protection scope of the embodiment of the present application. In the embodiment of the present application, the first switch 03-6 is a PMOS. The gate of the first switch 03-6 is connected to the common end between the first current source 03-4 and the second resistor 03-5. The source of the first switch 03-6 is connected to the first power supply 01. The drain of the first switch 03-6 is connected to the input source detection circuit 05.

[0060] During the specific use process, assume that the output voltage of the first power supply 0101 is Vac1, the current of the first current source 03-4 is I1, the resistance of the second resistor 03-5 is R2, the clamping voltage of the first power supply 01 is Vac1_clamp, the clamping voltage of the first power supply 02 is Vac2_clamp, the threshold voltage of the source follower is VthN1, and the breakdown voltage of the first diode 03-2 is Vbd.

[0061] When Vac1 > 5 * VthN1 (usually at 3.5V), the first current source 03-4 is turned on through a judgment circuit connected to the first current source 03-4. Design the maximum value of I1 * R2 > Vac1. At this time, the gate voltage of the first switch 03-6 is higher than the source voltage of the first switch 03-6. Therefore, the first switch 03-6 is turned off. The output voltage v1 of the high-voltage clamping circuit composed of the first resistor 03-1 and the first diode 03-2 is connected to the gate of the high-voltage NMOS transistor as the input of the source follower 03-3. When Vac1 > Vbd (the higher Vac1 is, the higher Vbd is. Vbd is usually less than 6V), the output voltage v1 of the high-voltage clamping circuit is clamped at Vbd, Vac1_clamp = v1 - VthN1. When Vac1 < Vbd, v1 = Vac1, Vac1_clamp = Vac1 - VthN1.

[0062] When Vac < 5 * VthN1 (usually at 3.5V), and when Vac1_clamp = Vac1 - VthN1 = 4 * VthN1, Vac1_clamp is low. The first current source 03 - 4 is turned off through a judgment circuit connected to the first current source 03 - 4. The gate voltage of the first switch 03 - 6 is lower than the source voltage of the first switch 03 - 6, so the first switch 03 - 6 is fully turned on, Vac1_clamp = Vac1 < 5 * VthN1, and the minimum value of Vac1_clamp is the minimum value of Vac1, Vac1min, usually around 3V.

[0063] In the embodiment of the present application, the pre - voltage - stabilizing circuit 03 controls the clamped voltage Vac1_clamp of the input voltage source 01 within Vacmin < Vac1_clamp < Vbd - VthN1. Therefore, the voltage domain of Vac1_clamp is a low - voltage domain, and the circuits in the input source detection circuit and the power supply selection circuit can all be implemented with low - voltage devices. Similarly, for the pre - voltage - stabilizing circuit 04, the low - voltage clamped voltage Vac2_clamp of the input voltage source 02 is also controlled within Vacmin < Vac2_clamp < Vbd - VthN1. Therefore, the voltage domain of Vac2_clamp is a low - voltage domain, and the circuits in the input source detection circuit and the power supply selection circuit can all be implemented with low - voltage devices. The embodiment of the present application greatly reduces the use of high - voltage devices, reduces the use of large - size devices, reduces the feedback loop, and realizes the selection of a high - voltage and strong input source and the function of providing a regulated voltage for the device to be powered with the fewest devices and the least power consumption.

[0064] In an embodiment of the present application, the input source detection circuit includes a selection circuit, a bias circuit 05 - 3, a power supply detection branch, a drive circuit 05 - 9, and a comparator 05 - 10; the power supply detection branch, the drive circuit, and the pre - voltage - stabilizing circuit are arranged in one - to - one correspondence; wherein, the first end of the selection circuit is connected to the common node between the third end of the second switch 05 - 1 and the third end of the source follower 03 - 3; the second end of the selection circuit is respectively connected to the first end of the bias circuit 05 - 3, the first end of the first power supply 01 detection branch, and the first end of the comparator 05 - 10; the third end of the selection circuit and the second end of the first power supply 01 detection branch are both connected to the reference ground; the third end of the first power supply 01 detection branch is connected to the first end of the drive circuit 05 - 9.

[0065] Specifically, in order to better correspond to the pre-regulated power supply in the embodiment of the present application, the power supply selection circuit includes two selection circuit branches, and the selection circuit is correspondingly arranged with the pre-regulation circuit and the power supply detection branch one by one; each selection circuit branch includes a second switch 05-1 and a second diode 05-2 connected in series, the first end of the second switch 05-1 is connected to the common node between the third end of the second switch 05-1 and the third end of the source follower 03-3, the second end of the second switch 05-1 is connected to the first end of the second diode 05-2, and the third end of the second switch 05-1 is connected to the reference ground; the common node between the second ends of each second diode 05-2 is connected to the first end of the bias circuit 05-3, the first end of each power supply detection branch and the first end of the comparator 05-10. In the embodiment of the present application, the second switch 05-1 is a PMOS transistor, the second diode 05-2 is a Schottky diode, the gate of the second switch 05-1 is connected to the reference ground, the source of the second switch 05-1 is connected to the second diode 05-2, and the drain of the second switch 05-1 is connected to the common node between the third end of the second switch 05-1 and the third end of the source follower 03-3.

[0066] In the embodiment of the present application, two second switches 05-1 and two second diodes 05-2 form an auxiliary power supply selection circuit, which is used to select the highest voltage among the clamped voltage Vac1_clamp of the first power supply 01 and the clamped voltage Vac2_clamp of the first power supply 02 to supply power to other power supply detection circuits. Since the power supply detection circuit itself is a low-power circuit and consumes very little power, generally the power consumption is less than 10uA. If this power consumption is supplied from a relatively low input voltage, the supply current is very small. Therefore, even if this supply current all comes from the input power supply that does not select the lower input voltage, it will not have an adverse impact on the input power supply because the current provided by the input power supply is very small. At the same time, the second diode 05-2 can be implemented with the smallest size, and the second diode 05-2 selects the input power supply through a Schottky diode because it has a fast response when switching and there is no risk of power loss. The source of the second switch 05-1 is connected to the positive pole of the Schottky diode, and the negative pole of the Schottky diode is used as the auxiliary power supply to supply power to the selection circuit. The second power supply 08 is at least Vac1_clamp - Vtsbd (the forward conduction voltage of the Schottky diode is usually 0.3V). The second switch 05-1 with its gate grounded protects the device to be supplied from being damaged by negative voltage. The second switch 05-1 can also be a MOS transistor with a low threshold.

[0067] In the auxiliary power supply domain, a detection circuit for Vac1 and Vac2 is made, and the power-on detection delay of Vac1_clamp or Vac2_clamp is used to avoid the situation of Vdd power-off when the inputs of Vac1 and Vac2 are quickly powered on and switched, stably and reliably realizing the power supply of the high power to the device to be powered while avoiding the risk of power-off, the through-conduction of the two input sources, and the protection function of the device to be powered when the input source is a negative voltage.

[0068] When the output voltage Vac1 of the first power supply 01 or the output voltage Vac2 of the first power supply 02 inserts a negative power supply, Vac1_clamp or Vac2_clamp is also a negative voltage, and the gate voltages of the two second switches 05-1 are 0. Therefore, when the positive voltage of the Schottky diode drops to 0, both of the two second switches 05-1 will cut off and turn off, thereby preventing the conduction from the substrate to the positive electrode of the Schottky diode and burning out the Schottky diode after the positive electrode of the Schottky diode is connected to the negative voltage.

[0069] In the embodiment of the present application, the power supply detection branch includes a second current source 05-4, a third current source 05-5, a third switch 05-6 and a fourth switch 05-7; the first ends of the second current source 05-4 and the third current source 05-5 are both connected to the common node between the second ends of all the second diodes 05-2; the second end of the second current source 05-4 is connected to the first end of the third switch 05-6, the second end of the third current source 05-5 is connected to the first end of the fourth switch 05-7, and the second end of the fourth switch 05-7 is connected to the reference ground; the common end between the second current source 05-4 and the first end of the third switch 05-6 is connected to the third end of the fourth switch 05-7, and the common end between the third current source 05-5 and the first end of the fourth switch 05-7 is connected to the first end of the drive circuit 05-9; the third end of the third switch 05-6 is connected to the common node between the third ends of the second switch 05-1 and the source follower 03-3; the second ends of the third switch 05-6 and the fourth switch 05-7 are respectively connected to the reference ground; the third ends of the second current source 05-4, the third current source 05-5 and the second end of the bias circuit 05-3 are connected to each other.

[0070] Preferably, the common end formed between the common end between the third current source 05-5 and the first end of the fourth switch 05-7 and the first end of the drive circuit 05-9 is connected to the first end of a first capacitor 05-8, and the second end of the first capacitor 05-8 is connected to the reference ground.

[0071] Specifically, the second end of the comparator 05-10 is connected to the first power supply 01.

[0072] In the embodiment of the present application, the second current source 05-4 and the third current source 05-5 are both PMOS, the third switch 05-6 and the fourth switch 05-7 are both NMOS, and a low-power low-voltage biasing circuit 05-3 is used to provide a biasing current. A group of the second current source 05-4, the third current source 05-5, the third switch 05-6 and the fourth switch 05-7 constitutes a power detection branch of the output voltage Vac1 of the first power supply 01, and another group of the second current source 05-4, the third current source 05-5, the third switch 05-6 and the fourth switch 05-7 constitutes a power detection branch of the output voltage Vac2 of the first power supply 02. Among them, the second current source 05-4 and the third current source 05-5 are used to increase the drain voltage of the third switch 05-6 and the fourth switch 05-7. The gate of the third switch 05-6 outputs the voltage divided by the resistor of the clamping voltage Vac1_clamp of the first power supply 01, and the voltage of the divided output is β*Vac1_clamp, where β is the resistor voltage division coefficient. When Vac1 is 0, Vac1_clamp is also 0, and the third switch 05-6 is cut off. Since the second current source 05-4 has the effect of increasing the drain voltage of the third switch 05-6, the gate voltage of the fourth switch 05-7 is relatively high. After the fourth switch 05-7 is fully turned on, the drain voltage of the fourth switch 05-7 is relatively low. After passing through the in-phase driving circuit 05-9, the Vac1_ready signal output by the driving circuit 05-9 is low. When Vac1 rises to β*Vac1_clamp > VthN2 (i.e., the threshold voltage of the third switch 05-6), after the third switch 05-6 is turned on, the gate voltage of the fourth switch 05-7 is relatively low, and the fourth switch 05-7 is cut off. The third current source 05-5 charges the first capacitor 05-8. The current of the third current source 05-5 is IP3, and the drain voltage of the fourth switch 05-7 rises. When it rises to the threshold voltage Vthdrv of the driving circuit 05-9, the Vac1_ready signal output by the driving circuit 05-9 becomes high, indicating that the clamping voltage Vac1_clamp of the input voltage source 01 is ready. The time T1 from when Vac1 rises to β*Vac1_clamp > VthN2 to when Vac1_ready becomes high is T1 = C1*VthN2 / IP3, where IP3 is the current of the third current source 05-5, VthN2 is the threshold voltage of the third switch 05-6, and C1 is the capacitance of the first capacitor. The purpose of setting T1 is that when Vac1 quickly powers on from 0 and exceeds Vac2, since the voltage of Vac1_clamp needs time to be established, at this time Vac1_clamp just starts to climb and establish from a relatively low voltage. If the input source of Vac1 is selected as the chip power supply at this time, the chip power supply will select a relatively low Vac1_clamp, resulting in a power-down situation of the power supply. The delay time T1 is to ensure that Vac1 is selected as the input source to supply power to the chip after Vac1_clamp is fully established.The implementation method of the delay time T1 is realized by charging the first electric capacitor 05-8 with current, or can be realized by logical delay, or other capacitor charge and discharge structures.

[0073] The principle of Vac2_ready going high is the same as that of Vac1, which will not be elaborated here.

[0074] In the embodiment of the present application, the comparator 05-10 is used to compare which of Vac1 and Vac2 has a higher voltage. The comparator 05-10 has built-in hysteresis to avoid the continuous flipping of the output of the comparator 05-10 when Vac1 and Vac2 are relatively close, and it cannot stably output a logic level. The inputs of the comparator 05-10 are δ*Vac1 and δ*Vac2, where δ is the resistor voltage division coefficient of Vac1 and Vac2. The output of the comparator 05-10 is Vac_sel, and its logical inverse signal is Vac_sel_b. When Vac_sel = 0, Vac1 is selected as the power supply, and when Vac_sel = 1, Vac2 is selected as the power supply.

[0075] In the embodiment of the present application, the power supply selection circuit includes a gating logic circuit 06-1, two fifth switches 06-2 and 06-3, and a voltage regulator 06-5; the first ends of the gating logic circuit 06-1 are respectively connected to the third end of the comparator 05-10 and the second ends of each drive circuit 05-9, the second end of the gating logic circuit 06-1 is connected to the first ends of the fifth switches 06-2 and 06-3, the second end of the fifth switch 06-2 is connected to the common node between the third end of the second switch 05-1 and the third end of the source follower 03-3, the second end of the fifth switch 06-3 is connected to the common node between the third end of the second switch 05-1 and the third end of the source follower 03-3 in the other group, the common node between the third ends of the fifth switch 06-2 and the fifth switch 06-3 is connected to the first end of the voltage regulator 06-5, the second end of the voltage regulator 06-5 is connected to the device to be powered 07, the fifth switches 06-2 and 06-3 are NMOS transistors, the first ends of the fifth switches 06-2 and 06-3 are gates, the second ends of the fifth switches 06-2 and 06-3 are drains, the third ends of the fifth switches 06-2 and 06-3 are sources, and the third ends of the fifth switches 06-2 and 06-3 are connected to the second end of the second diode 05-2. Specifically, the common end of the third ends of the two fifth switches 06-2 and 06-3 is connected to the first end of the second capacitor 05-8, and the second end of the second capacitor 05-8 is connected to the reference ground.

[0076] In the embodiment of the present application, the following fifth switch 06-2 is replaced by S1, and the fifth switch 06-3 is replaced by S2.

[0077] The gating logic circuit 06-1 only describes the logical results. The gating logic circuit 06-1 includes any implementation method, including digital logic gates or the superposition and subtraction of analog current and voltage. The functions implemented by the gating logic circuit 06-1 are as follows: when Vac1_ready = Vac2_ready = 0, force S1_onb = 1 and S2_onb = 1, and both the fifth switches 06-2 S1 and 06-3 S2 are closed; when Vac1_ready = Vac2_ready = 1, S1_onb = Vac_sel and S2_onb = Vac_sel_b, and S1 and S2 are turned on according to the result of Vac_sel. When S1_onb and S2_onb switch from 1 to 0 or from 0 to 1, S1 and S2 should first be closed simultaneously for a time T2, and then S1 or S2 is turned on according to the result of Vac_sel. This prevents the situation of punch-through between Vac1 and Vac2 when S1 and 0S2 are turned on simultaneously.

[0078] When Vac1_ready = 1 and Vac2_ready = 0, Vac_sel forces S1_onb = 0 and S2_onb = 1. At this time, S1 is turned on and S2 is turned off.

[0079] When Vac1_ready = 0 and Vac2_ready = 1, Vac_sel forces S1_onb = 1 and S2_onb = 0. At this time, S1 is turned off and S2 is turned on.

[0080] When a negative input power supply is inserted into Vac1 or Vac2, the outputs of Vac1_clamp or Vac2_clamp are also negative voltages. The minimum gate voltage of S1 and S2 is 0, and the substrate of the fifth switches S1 and S2 is connected to the auxiliary power supply, and its minimum value is also 0. Therefore, both S1 and S2 will be cut off, thus protecting the chip power supply Vdd from becoming a negative voltage and protecting the chip from being burned out.

[0081] Since the outputs of S1 and S2 are Vac1_clamp or Vac2_clamp, no matter which input power supply is selected, its variation range is Vacmin < Vac1_clamp or Vac2_clamp < Vbd - VthN1 (the threshold voltage of the source follower 03-3). The voltages of the fifth switches S1 and S2 change with the input voltage of the selected input source and are not an ideal regulated power supply. The purpose of adding the low-dropout regulator LDO 06-5 is to stabilize the chip power supply near the value close to Vacmin, so that the chip power supply Vdd does not change with the output voltage of the input power supply. Since Vac1_clamp and Vac2_clamp are already in the low-voltage domain, the implementation of the low-dropout regulator LDO can be achieved with low-voltage devices and a simple structure. This greatly reduces the complexity and area of the circuit design.

[0082] The working process of the voltage stabilizing circuit provided by this application is introduced in detail below: As Figure 3 shown, the working process of the voltage stabilizing circuit after the slow power-on of Vac1 and Vac2 is as follows:

[0083] When Vac1 = 8V and Vac2 = 0, the voltage of Vac1_clamp is 4.5V, the voltage of Vac2_clamp is also 0, the Vac2_ready signal is 0, the Vac1_ready signal is 1, and Vac1_clamp is forcibly selected as the power supply to supply power to the chip. At this time, the output Vac_sel of comparator 05-10 is low.

[0084] When Vac2 rises slowly, Vac2_clamp also rises slowly with Vac2. When Vac2_clamp > VthN1 / β and after the delay of T1, at this time Vac2 is still less than Vac1. So Vac1_ready = Vac2_ready = 1, Vac_sel is low, and Vac1_clamp is still selected as the chip power supply.

[0085] When Vac2 rises slowly and exceeds Vac1, the output Vac_sel of comparator 05-10 is high. First, turn off S1. After T2 time, turn on S2 and select Vac_clamp2 to supply power to the chip. During T2, since both S1 and S2 are turned off, the power consumption of the chip will cause the outputs Vac_clamp_out of S1 and S2 to drop. The dropping amplitude is related to the size of the voltage stabilizing capacitor Cclamp at this point and the length of T2. Reasonably selecting these two values can control the drop of Vac_clamp_out to an acceptable amplitude and make it always greater than the output of the low-dropout linear regulator LDO.

[0086] During the entire switching process of Vac1 and Vac2, since Vac_clamp_out is always greater than the output of the low-dropout linear regulator LDO, the chip power supply remains stable and is not affected by the switching of Vac1 and Vac2 power supplies.

[0087] The working process of the voltage stabilizing circuit after the fast power-on of Vac1 and Vac2 is as follows:

[0088] When Vac1 = 8V and Vac2 = 0, the voltage of Vac1_clamp is 4.5V, the voltage of Vac2_clamp is also 0, the Vac2_ready signal is 0, the Vac1_ready signal is 1, and Vac1_clamp is forcibly selected as the power supply to supply power to the device to be powered. At this time, the output Vac_sel of comparator 05-10 is low.

[0089] When Vac2 rises rapidly above Vac1 and Vac2_clamp fails to follow the rapid rise of Vac2, and Vac2 is still at a relatively low voltage. At this time, Vac2_clamp < Vthn / β, so Vac2_ready = 0. At this time, the output Vac_sel of comparator 05-10 changes from low to high. Although the output of comparator 05-10 becomes high at this time, since Vac2_ready = 0, Vac1_clamp is still forced to supply power to the device to be powered.

[0090] When Vac2_clamp rises until Vac2_clamp > Vthn / β, after a delay of T1 time, Vac_clamp2 has output a stable voltage at the target value within the time of T1. The Vac2_ready signal changes from low to high, and Vac1_ready = Vac2_ready = 1. The gating logic circuit 06-1 selects Vac_sel as the input for the selection of S1 and S2. At this time, Vac_sel is high, so S1 is first turned off, and then after T2 time, Vac_clamp2 is selected to supply power to the device to be powered. During the T2 period, since both S1 and S2 are in the off state, the power consumption of the device to be powered will cause the output Vac_clamp_out of S1 and S2 to drop. The amplitude of the drop is related to the size of the second voltage stabilizing capacitor 06-4 and the length of T2 time. Reasonable selection of these two values can control the drop of Vac_clamp_out to an acceptable amplitude so that it is always greater than the output of the low-dropout regulator 06-5 LDO.

[0091] During the entire switching process between Vac1 and Vac2, since Vac_clamp_out is always greater than the output of the low-dropout regulator 06-5 LDO, the power supply of the device to be powered remains stable and is not affected by the switching of the Vac1 and Vac2 power supplies.

[0092] Although the present invention has been described in detail with general descriptions and specific embodiments above, based on the present invention, some modifications or improvements can be made, which are obvious to those skilled in the art. Therefore, these modifications or improvements made without departing from the spirit of the present invention all fall within the scope of the present invention claimed.

Claims

1. A multi - power - selection voltage - stabilizing circuit, characterized in that, it includes: Two pre - voltage - stabilizing circuits 03 and 04, an input - source detection circuit, and a power - selection circuit; The pre - voltage - stabilizing circuits 03 and 04 are respectively connected to the first power supplies 01 and 02 correspondingly; The two pre - voltage - stabilizing circuits 03 and 04 are arranged in parallel. The pre - voltage - stabilizing circuits 03 and 04 are respectively used to stabilize the voltages input from the first power supplies 01 and 02 in the low - voltage domain; The input - source detection circuit is connected to the output ends of the pre - voltage - stabilizing circuits 03 and 04 and the first power supplies 01 and 02, and is used to determine whether the voltages processed by the pre - voltage - stabilizing circuits 03 and 04 can be used as an input source to supply power to the device to be powered; The input ends of the power - selection circuit are all connected to the output ends of the pre - voltage - stabilizing circuits 03 and 04 and the output end of the input - source detection circuit. The power - selection circuit is used to select the first power supply 01 or 02 for power supply to the device to be powered according to the detection result of the input - source detection circuit; Both the pre - voltage - stabilizing circuits 03 and 04 include a clamping circuit, a source follower, a voltage - control circuit, and a first switch; The first end of the clamping circuit, the first end of the source follower, the first end of the voltage - control circuit, and the first end of the first switch are all connected to the corresponding first power supply; The second end of the clamping circuit and the second end of the voltage - control circuit are both connected to the reference ground; The third end of the clamping circuit is connected to the second end of the source follower. The third end of the voltage - control circuit is connected to the second end of the first switch. The common node between the third end of the first switch and the third end of the source follower is connected to the input end of the input - source detection circuit.

2. A multi - power - selection voltage - stabilizing circuit according to claim 1, characterized in that, The clamping circuit includes a first resistor and a first diode connected in series; The first end of the first resistor is connected to the corresponding first power supply. The second end of the first resistor is connected to the first end of the first diode. The second end of the first diode is connected to the reference ground. The common end between the first resistor and the first diode is connected to the second end of the source follower.

3. A multi - power - selection voltage - stabilizing circuit according to claim 2, characterized in that, The voltage - control circuit includes a first current source and a second resistor connected in series; The first end of the first current source is connected to the corresponding first power supply. The second end of the first current source is connected to the first end of the second resistor. The second end of the second resistor is connected to the reference ground. The common end between the first current source and the second resistor is connected to the second end of the first switch.

4. A multi - power - selection voltage - stabilizing circuit according to claim 3, characterized in that, The input - source detection circuit includes a selection circuit, a bias circuit, a power - detection branch, a drive circuit, and a comparator; There are two power - detection branches and two drive circuits. The two power - detection branches, drive circuits, and the pre - voltage - stabilizing circuits 03 and 04 are arranged in one - to - one correspondence; The first end of the selection circuit is connected to the common node between the third end of the first switch and the third end of the source follower; The second end of the selection circuit is respectively connected to the first end of the bias circuit, the first end of the power supply detection branch, and the first end of the comparator; The third end of the selection circuit and the second end of the power supply detection branch are both connected to the reference ground; The third end of the power supply detection branch is connected to the first end of the drive circuit.

5. A multi-power selection voltage stabilization circuit according to claim 4, characterized in that the selection circuit includes two selection circuit branches, and the two selection circuit branches are arranged in one-to-one correspondence with the pre-voltage stabilization circuits 03 and 04 and the two power supply detection branches; each selection circuit branch includes a second switch and a second diode connected in series, the first end of the second switch is connected to the common node between the third end of the first switch and the third end of the source follower, the second end of the second switch is connected to the first end of the second diode, and the third end of the second switch is connected to the reference ground; the common node between the second ends of the two second diodes is connected to the first end of the bias circuit, the first end of each power supply detection branch, and the first end of the comparator.

6. A multi-power selection voltage stabilization circuit according to claim 5, characterized in that the power supply detection branch includes a second current source, a third current source, a third switch, and a fourth switch; the first ends of the second current source and the third current source are both connected to the common node between the second ends of the two second diodes; the second end of the second current source is connected to the first end of the third switch, the second end of the third current source is connected to the first end of the fourth switch, and the second end of the fourth switch is connected to the reference ground; the common terminal between the second current source and the first end of the third switch is connected to the third end of the fourth switch, and the common terminal between the third current source and the first end of the fourth switch is connected to the first end of the drive circuit; the third end of the third switch is connected to the common node between the third end of the first switch and the third end of the source follower; the second end of the third switch and the second end of the fourth switch are respectively connected to the reference ground; the third end of the second current source, the third end of the third current source, and the second end of the bias circuit are connected to each other.

7. A multi-power selection voltage stabilization circuit according to claim 6, characterized in that the common terminal formed between the common terminal between the third current source and the first end of the fourth switch and the first end of the drive circuit is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to the reference ground.

8. A multi-power selection voltage stabilization circuit according to claim 6, characterized in that the second end of the comparator is connected to the first power supplies 01 and 02.

9. A multi-power selection voltage stabilization circuit according to claim 6, characterized in that the power supply selection circuit includes a gating logic circuit, two fifth switches, and a voltage regulator; The first end of the strobe logic circuit is connected to the third end of the comparator and the second end of each drive circuit. The second end of the strobe logic circuit is connected to the first end of each of the fifth switches. The two fifth switches are provided in one-to-one correspondence with the pre-regulator circuits 03 and 04. The second end of the fifth switch is connected to the common node between the third end of the first switch and the third end of the source follower. The common node between the third ends of the two fifth switches is connected to the first end of the voltage regulator. The second end of the voltage regulator is connected to the device to be powered.

Images