Semiconductor structure and method of forming the same
By forming a protective layer on the top surface of the capacitor transfer structure and selectively etching it, the surface defects and short circuit problems of the capacitor substrate are solved, and the electrical performance and yield of the semiconductor structure are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2021-08-04
- Publication Date
- 2026-05-08
AI Technical Summary
Defects are easily generated on the surface of the capacitor substrate, and short circuits are prone to occur between adjacent capacitor transfer structures, affecting the electrical performance of the semiconductor structure.
A protective layer is formed on the top surface of the capacitor transfer structure, and the isolation layer is removed by dry and wet etching processes to avoid damage to the capacitor transfer structure, ensure its morphological integrity, and prevent conductive particles from splashing. Nitriding treatment and selective etching with etching gas are used to protect the capacitor transfer structure.
This reduces defects in the capacitor transfer structure, avoids short circuit problems, and improves the yield and electrical performance of the semiconductor structure.
Smart Images
Figure CN116133361B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to a semiconductor structure and a method for forming the same. Background Technology
[0002] Dynamic Random Access Memory (DRAM) is a commonly used semiconductor structure in computers and other electronic devices. It consists of multiple memory cells, each of which typically includes a capacitor for storing charge and a transistor for accessing the capacitor. The gate of the transistor is electrically connected to the word line, the source is electrically connected to the bit line, and the drain is electrically connected to the capacitor. The word line voltage on the word line can control the transistor to turn on and off, thereby allowing data information stored in the capacitor to be read or written to the capacitor via the bit line.
[0003] The capacitor is connected to the drain via a capacitor transfer structure in the capacitor substrate. However, due to limitations in current manufacturing processes, defects are prone to occur on the surface of the capacitor substrate, and short circuits can easily occur between adjacent capacitor transfer structures.
[0004] Therefore, how to reduce defects on the surface of the capacitor substrate and avoid short circuits between adjacent capacitor junction structures in order to improve the electrical performance of the semiconductor structure is a technical problem that urgently needs to be solved. Summary of the Invention
[0005] This invention provides a semiconductor structure and a method for forming the same, which addresses the problems of defects easily generated on the surface of capacitor substrates and short circuits easily occurring between adjacent capacitor transfer structures, thereby improving the electrical performance of the semiconductor structure.
[0006] According to some embodiments of this application, this application provides a method for forming a semiconductor structure, comprising the following steps:
[0007] A capacitor substrate is formed, the capacitor substrate including a plurality of capacitor transfer structures and gaps located between adjacent capacitor transfer structures;
[0008] A protective layer is formed that at least covers the top surface of the capacitor transfer structure;
[0009] An isolation layer is formed that fills the gap and covers the surface of the protective layer;
[0010] Remove the isolation layer covering the top surface of the protective layer to expose the protective layer;
[0011] Remove the protective layer to expose the capacitor transfer structure.
[0012] In some embodiments, the specific steps of forming a protective layer that at least covers the top surface of the capacitor transfer structure include:
[0013] A protective layer is formed covering the top surface and sidewalls of the capacitor transfer structure.
[0014] In some embodiments, the specific steps of forming a protective layer that at least covers the top surface of the capacitor transfer structure include:
[0015] The surface of the capacitor transfer structure is passivated to form a protective layer covering the surface of the capacitor transfer structure.
[0016] In some embodiments, the specific steps of passivating the surface of the capacitor transfer structure include:
[0017] The surface of the capacitor transfer structure is nitrided.
[0018] In some embodiments, the material of the capacitor transfer structure is a metallic material; the specific steps of nitriding the surface of the capacitor transfer structure include:
[0019] The surface of the capacitor transfer structure is treated with a nitrogen source gas to form a metal nitride as the protective layer. The nitrogen source gas includes H2, O2 and NH3.
[0020] In some embodiments, the specific steps of removing the isolation layer covering the top surface of the protective layer include:
[0021] The isolation layer covering the top surface of the protective layer is removed using a dry etching process.
[0022] In some embodiments, the isolation layer is made of a nitride material; the specific steps for removing the isolation layer covering the top surface of the protective layer using a dry etching process include:
[0023] The isolation layer was etched using a mixed gas of CF4, CHF3 and O2 as the etching gas.
[0024] In some embodiments, the specific steps for removing the protective layer include:
[0025] The protective layer is removed using a wet etching process.
[0026] In some embodiments, the protective layer is made of a metal nitride material; the specific steps for removing the protective layer using a wet etching process include:
[0027] The protective layer on the top surface of the capacitor transfer structure is removed using deionized water or an organic solvent.
[0028] In some embodiments, after removing the protective layer and exposing the capacitor transfer structure, the following steps are further included:
[0029] Clean the surface of the capacitor adapter structure.
[0030] In some embodiments, the specific steps for cleaning the surface of the capacitor transfer structure include:
[0031] A wet cleaning process is used to remove particulate matter and the natural oxide layer from the surface of the capacitor transfer structure;
[0032] Dry the capacitor transfer structure.
[0033] According to other embodiments of this application, this application also provides a semiconductor structure formed using the semiconductor structure formation method described in any of the preceding claims, the semiconductor structure comprising:
[0034] A capacitor substrate, the capacitor substrate including multiple capacitor transfer structures;
[0035] An isolation layer, located between adjacent capacitor transfer structures, is used to isolate the adjacent capacitor transfer structures.
[0036] A protective layer covers part of the sidewall of the capacitor transfer structure.
[0037] In some embodiments, it also includes:
[0038] A diffusion barrier layer covers the bottom surface and part of the sidewalls of the capacitor transfer structure.
[0039] In some embodiments, the diffusion barrier layer and the protective layer together cover the entire sidewall of the capacitor transfer structure.
[0040] In some embodiments, the thickness of the protective layer is 0.5 nm to 5 nm.
[0041] The semiconductor structure and its formation method provided in some embodiments of this application, by forming a protective layer that at least covers the top surface of the capacitor transfer structure, ensures that removing the isolation layer covering the top surface of the protective layer does not damage the capacitor transfer structure, thereby ensuring the morphological integrity of the capacitor transfer structure and reducing defects in the capacitor transfer structure. Furthermore, due to the coverage of the protective layer, conductive particles in the capacitor transfer structure are prevented from splashing onto the surface of the isolation layer during the removal of the isolation layer covering the top surface of the protective layer, thus avoiding short circuits between adjacent capacitor transfer structures, improving the yield of the semiconductor structure, and enhancing the electrical performance of the semiconductor structure. Attached Figure Description
[0042] Appendix Figure 1 This is a flowchart of a method for forming a semiconductor structure according to a specific embodiment of the present invention;
[0043] Appendix Figure 2A-2JThis is a schematic diagram of the main processes involved in forming the semiconductor structure according to a specific embodiment of the present invention;
[0044] Appendix Figure 3 This is a schematic diagram of the semiconductor structure in a specific embodiment of the present invention. Detailed Implementation
[0045] The specific embodiments of the semiconductor structure and its formation method provided by the present invention will be described in detail below with reference to the accompanying drawings.
[0046] This specific embodiment provides a method for forming a semiconductor structure, with appended... Figure 1 This is a flowchart illustrating the method for forming a semiconductor structure according to a specific embodiment of the present invention. Figure 2A-2J This is a schematic diagram illustrating the main processes involved in forming the semiconductor structure according to a specific embodiment of the present invention. For example... Figure 1 , Figures 2A-2J As shown, the method for forming the semiconductor structure includes the following steps:
[0047] Step S11: Forming a capacitor substrate, the capacitor substrate including a plurality of capacitor transfer structures 21 and gaps 22 located between adjacent capacitor transfer structures 21, such as... Figure 2A As shown.
[0048] In some embodiments, the specific steps for forming the capacitor substrate may include:
[0049] A substrate 20 is provided, wherein the substrate 20 has a plurality of capacitive contact areas;
[0050] Multiple capacitor transfer structures 21 are formed on the surface of the substrate 20, and the multiple capacitor transfer structures 21 are electrically connected to the multiple capacitor contact areas one by one, and the gaps 22 are between adjacent capacitor transfer structures 21.
[0051] Specifically, the substrate 20 can be, but is not limited to, a silicon substrate. This specific embodiment uses a silicon substrate as an example for illustration. In other examples, the substrate 20 can be a semiconductor substrate such as gallium nitride, gallium arsenide, gallium carbide, silicon carbide, or SOI. The substrate 20 has multiple active regions arranged in an array, each of which includes a bit line contact region and a capacitor contact region. Before forming the multiple capacitor transfer structures 21, a capacitor contact layer can be formed on the surface of the substrate 20, the capacitor contact layer having capacitor contact points that are electrically connected to each of the multiple capacitor contact regions. The material of the capacitor contact points can be polycrystalline silicon. Subsequently, multiple capacitor transfer structures 21 are formed that are electrically connected to each of the multiple capacitor contact points. The material of the capacitor transfer structure 21 can be a conductive metal material, such as tungsten. The multiple capacitor transfer structures 21 are independent of each other, that is, there is a gap 22 between adjacent capacitor transfer structures 21. A portion of the surface of the capacitor transfer structure 21 is covered with a diffusion barrier layer 23. The diffusion barrier layer 23 is used to prevent conductive particles in the capacitor transfer structure 21 from diffusing to the outside of the capacitor transfer structure 21, and also to prevent particles outside the capacitor transfer structure 21 from entering the capacitor transfer structure 21. The capacitor transfer structure 21 is used to transmit capacitance signals. The shape of the capacitor transfer structure 21 can be set according to actual needs, for example, according to the shape of the bit line structure adjacent to the capacitor transfer structure. This specific embodiment does not limit this.
[0052] Step S12, forming a protective layer 24 that at least covers the top surface of the capacitor transfer structure 21, such as Figure 2B As shown.
[0053] In some embodiments, the specific steps of forming a protective layer 24 that at least covers the top surface of the capacitor transfer structure 21 include:
[0054] A protective layer 24 is formed covering the top surface and sidewalls of the capacitor transfer structure 21.
[0055] Specifically, the protective layer 24 covers the surface of the capacitor transfer structure 21 (including the top surface and sidewalls of the capacitor transfer structure 21) to protect the capacitor transfer structure 21 and prevent damage to it from subsequent processes. The protective layer 24 covering the sidewalls of the capacitor transfer structure 21 also helps to further electrically isolate adjacent capacitor transfer structures 21, preventing signal crosstalk between them. In one example, the material of the protective layer 24 can be a high-density insulating material.
[0056] The protective layer 24 can be formed by a deposition process (e.g., chemical vapor deposition, physical vapor deposition, or atomic layer deposition), or it can be formed directly by processing the surface of the capacitor transfer structure 21. In some embodiments, the specific steps for forming a protective layer 24 that at least covers the top surface of the capacitor transfer structure 21 include:
[0057] The surface of the capacitor transfer structure 21 is passivated to form the protective layer 24 covering the surface of the capacitor transfer structure 21.
[0058] In some embodiments, the specific steps for passivating the surface of the capacitor transfer structure 21 include:
[0059] The surface of the capacitor transfer structure 21 is nitrided.
[0060] In some embodiments, the capacitor transfer structure 21 is made of a metallic material; the specific steps of nitriding the surface of the capacitor transfer structure 21 include:
[0061] The surface of the capacitor transfer structure 21 is treated with a nitrogen source gas to form a metal nitride as the protective layer 24. The nitrogen source gas includes H2, O2 and NH3.
[0062] The following explanation uses tungsten (W) as the material of the capacitor transfer structure 21 as an example. After depositing tungsten material to form the capacitor transfer structure 21, since the tungsten is exposed to air, a natural oxide layer, namely tungsten oxide (WO3), will form in a certain area of the surface of the capacitor transfer structure 21. When the nitrogen source gas, including H2, O2, and NH3, is transferred to the surface of the capacitor transfer structure 21, the following reaction occurs:
[0063] WO3 + H2 + O2 → W + H2O + O2
[0064] W + NH3 + O2 → WN x + H2O
[0065] Where 0 < x < 1. Through the treatment of the nitrogen source gas, the tungsten oxide on the surface of the capacitor transfer structure 21 is reduced to tungsten, which then reacts with ammonia to generate tungsten nitride, which serves as the protective layer 24. The thickness of the protective layer 24 can be adjusted by changing the amount of nitrogen source gas introduced. In this specific embodiment, the thickness of the protective layer 24 should not be too thin, as this would not effectively protect the capacitor transfer structure 21; nor should it be too thick, as this would consume too much material (tungsten) from the capacitor transfer structure 21, affecting its electrical performance, and would also hinder subsequent removal. Therefore, in this specific embodiment, the thickness of the protective layer 24 is set to 0.5 nm to 5 nm.
[0066] Step S13, forming an isolation layer 25 that fills the gap 22 and covers the surface of the protective layer 24, such as Figure 2C As shown.
[0067] Specifically, after the protective layer 24 is formed, materials such as silicon nitride can be deposited on the capacitor substrate using chemical vapor deposition, physical vapor deposition, or atomic layer deposition processes to form an isolation layer 25 that fills the gap 22 and covers the surface of the protective layer 24.
[0068] Step S14: Remove the isolation layer 25 covering the top surface of the protective layer 24, exposing the protective layer 24, as follows: Figure 2D As shown.
[0069] In some embodiments, the specific steps for removing the isolation layer 25 covering the top surface of the protective layer 24 include:
[0070] The isolation layer 25 covering the top surface of the protective layer 24 is removed using a dry etching process.
[0071] In some embodiments, the material of the isolation layer 25 is a nitride material; the specific steps of removing the isolation layer 25 covering the top surface of the protective layer 24 using a dry etching process include:
[0072] The isolation layer 25 is etched using a mixed gas of CF4, CHF3 and O2 as the etching gas.
[0073] The following description uses silicon nitride as the material for the isolation layer 25 and tungsten oxide as the material for the protective layer 24 as an example. After forming the isolation layer 25, a dry etching process is used, with a mixed gas of CF4, CHF3, and O2 as the etching gas to bombard the isolation layer 25, removing a portion of the isolation layer 25 and exposing the surface of the protective layer 24. Then, H2N2 plasma is used to remove the byproducts generated during the etching of the isolation layer 25.
[0074] In one example, the protective layer 24 and the isolation layer 25 should have a high etching selectivity, for example, an etching selectivity greater than 3, so that the protective layer 24 is not damaged or is only minimally damaged during the removal of part of the isolation layer 25, thereby better protecting the capacitor transfer structure 21.
[0075] Step S15: Remove the protective layer 24 to expose the capacitor transfer structure 21, as shown below. Figure 2E As shown.
[0076] In some embodiments, the specific steps for removing the protective layer 24 include:
[0077] The protective layer 24 is removed using a wet etching process.
[0078] In other specific embodiments, those skilled in the art can also select the appropriate removal process according to the specific material of the protective layer 24, for example, a dry etching process can also be used.
[0079] In some embodiments, the protective layer 24 is made of a metal nitride material; the specific steps for removing the protective layer 24 using a wet etching process include:
[0080] The protective layer 24 on the top surface of the capacitor transfer structure 21 is removed using deionized water (DIW) or an organic solvent.
[0081] For example, since tungsten nitride is readily soluble in water and organic solvents, hot deionized water (HotDIW, HDIW) or organic solvents can be used as wet etching agents to remove the protective layer 24 on the top surface of the capacitor transfer structure 21. Specifically, HDIW can be sprayed onto the surface of the capacitor substrate 30 through the first nozzle 40 to wet the capacitor substrate 30, and then the protective layer 24 can be removed, such as... Figure 2F As shown. Afterwards, the capacitor substrate can be dried using IPA (isopropanol), and residual deionized water or organic solvents can be removed by purging. Using hot deionized water (temperature above 40°C) can increase the solubility of the tungsten nitride, thereby improving the efficiency of removing the protective layer 24.
[0082] In this specific embodiment, only the protective layer 24 located on the top surface of the capacitor transfer structure 21 is removed, while the protective layer 24 on the sidewalls of the capacitor transfer structure 21 is retained. In other specific embodiments, those skilled in the art may also remove all of the protective layers 24 (including the protective layers 24 on the top surface and sidewalls of the capacitor transfer structure 21) as needed, thereby forming an air gap between adjacent capacitor transfer structures 21 and enhancing the electrical isolation effect between adjacent capacitor transfer structures 21.
[0083] In some embodiments, after removing the protective layer 24 and exposing the capacitor transfer structure 21, the following steps are further included:
[0084] Clean the surface of the capacitor transfer structure 21.
[0085] In some embodiments, the specific steps for cleaning the surface of the capacitor transfer structure 21 include:
[0086] Wet cleaning process is used to remove particulate matter and natural oxide layer from the surface of the capacitor transfer structure 21;
[0087] Dry the capacitor transfer structure 21.
[0088] Specifically, after removing the protective layer 24, a mixed solution of DHF (diluted hydrofluoric acid) and deionized water can be sprayed onto the capacitor substrate 30 through the first nozzle 40, such as... Figure 2G As shown, this process removes particulate matter and the natural oxide layer from the surface of the capacitor transfer structure 21, and further removes the protective layer 24 remaining on the top surface of the capacitor transfer structure 21. After IPA drying of the capacitor substrate 30, DSP (dipotassium hydrogen phosphate) is sprayed onto the capacitor substrate 30 again through the first nozzle 40, as shown. Figure 2H As shown, this is to further remove particulate matter from the surface of the capacitor substrate 30 and polymer generated during the etching of the insulating layer 25. After the capacitor substrate 30 is dried again with IPA, DIW is sprayed onto the capacitor substrate 30 through the first nozzle 40, as shown. Figure 2I As shown, the capacitor substrate 30 is immersed to remove residual DSP. Then, a mixture of N2 and IPA is sprayed onto the capacitor substrate 30 through a second nozzle 41 to remove residual DIW, preventing residual moisture from re-oxidizing the capacitor transfer structure 21.
[0089] In other specific embodiments, a mixed solution of DHF and DSP can be sprayed onto the capacitor substrate through the first nozzle 40, followed by IPA drying, to improve the cleaning efficiency of the capacitor substrate.
[0090] Furthermore, this specific embodiment also provides a semiconductor structure, with attached... Figure 3 This is a schematic diagram of a semiconductor structure in a specific embodiment of the present invention. The semiconductor structure provided in this specific embodiment can adopt, for example... Figure 1 , Figures 2A-2J The semiconductor structure shown is formed using the method described. Figure 1 , Figures 2A-2J ,as well as Figure 3 As shown, the semiconductor structure includes:
[0091] A capacitor substrate, the capacitor substrate including a plurality of capacitor transfer structures 21;
[0092] An isolation layer 25 is located between adjacent capacitor transfer structures 21 and is used to isolate the adjacent capacitor transfer structures 21.
[0093] A protective layer 24 covers part of the sidewall of the capacitor transfer structure 21.
[0094] In some embodiments, the semiconductor structure further includes:
[0095] A diffusion barrier layer 23 covers the bottom surface and part of the sidewalls of the capacitor transfer structure 21.
[0096] In some embodiments, the diffusion barrier layer 23 and the protective layer 24 together cover the entire sidewall of the capacitor transfer structure 21.
[0097] Specifically, the diffusion barrier layer 23 and the protective layer 24 together cover the entire sidewall of the capacitor transfer structure 21, and the diffusion barrier layer 23 and the protective layer 24 do not overlap.
[0098] In some embodiments, the thickness of the protective layer 24 is 0.5 nm to 5 nm.
[0099] The semiconductor structure and its formation method provided in this specific embodiment, by forming a protective layer that at least covers the top surface of the capacitor transfer structure, ensures that removing the isolation layer covering the top surface of the protective layer does not damage the capacitor transfer structure, thereby ensuring the morphological integrity of the capacitor transfer structure and reducing defects in the capacitor transfer structure. Furthermore, due to the coverage of the protective layer, conductive particles in the capacitor transfer structure are prevented from splashing onto the surface of the isolation layer during the removal of the isolation layer covering the top surface of the protective layer, thus avoiding short circuits between adjacent capacitor transfer structures, improving the yield of the semiconductor structure, and enhancing the electrical performance of the semiconductor structure.
[0100] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for forming a semiconductor structure, characterized in that, Includes the following steps: A capacitor substrate is formed, the capacitor substrate including a plurality of capacitor transfer structures and gaps located between adjacent capacitor transfer structures; A protective layer is formed that at least covers the top surface of the capacitor transfer structure; An isolation layer is formed that fills the gap and covers the surface of the protective layer; Remove the isolation layer covering the top surface of the protective layer to expose the protective layer; Remove the protective layer to expose the capacitor transfer structure; The specific steps for forming a protective layer that at least covers the top surface of the capacitor transfer structure include: The surface of the capacitor transfer structure is passivated to form a protective layer covering the surface of the capacitor transfer structure; The specific steps for passivating the surface of the capacitor transfer structure include: The surface of the capacitor transfer structure is nitrided. The capacitor transfer structure is made of a metallic material; the specific steps for nitriding the surface of the capacitor transfer structure include: The surface of the capacitor transfer structure is treated with a nitrogen source gas to form a metal nitride as the protective layer. The nitrogen source gas includes H2, O2 and NH3.
2. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for forming a protective layer that at least covers the top surface of the capacitor transfer structure include: A protective layer is formed covering the top surface and sidewalls of the capacitor transfer structure.
3. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for removing the isolation layer covering the top surface of the protective layer include: The isolation layer covering the top surface of the protective layer is removed using a dry etching process.
4. The method for forming a semiconductor structure according to claim 1, characterized in that, The isolation layer is made of nitride material; the specific steps for removing the isolation layer covering the top surface of the protective layer using a dry etching process include: The isolation layer was etched using a mixed gas of CF4, CHF3 and O2 as the etching gas.
5. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for removing the protective layer include: The protective layer is removed using a wet etching process.
6. The method for forming a semiconductor structure according to claim 4, characterized in that, The protective layer is made of a metal nitride material; the specific steps for removing the protective layer using a wet etching process include: The protective layer on the top surface of the capacitor transfer structure is removed using deionized water or an organic solvent.
7. The method for forming a semiconductor structure according to claim 1, characterized in that, After removing the protective layer and exposing the capacitor transfer structure, the following steps are also included: Clean the surface of the capacitor adapter structure.
8. The method for forming a semiconductor structure according to claim 7, characterized in that, The specific steps for cleaning the surface of the capacitor transfer structure include: A wet cleaning process is used to remove particulate matter and the natural oxide layer from the surface of the capacitor transfer structure; Dry the capacitor transfer structure.
9. A semiconductor structure, characterized in that, The semiconductor structure is formed using the method for forming a semiconductor structure as described in any one of claims 1-8, the semiconductor structure comprising: A capacitor substrate, the capacitor substrate including multiple capacitor transfer structures; An isolation layer, located between adjacent capacitor transfer structures, is used to isolate the adjacent capacitor transfer structures. A protective layer covers part of the sidewall of the capacitor transfer structure.
10. The semiconductor structure according to claim 9, characterized in that, Also includes: A diffusion barrier layer covers the bottom surface and part of the sidewalls of the capacitor transfer structure.
11. The semiconductor structure according to claim 10, characterized in that, The diffusion barrier layer and the protective layer together cover the entire sidewall of the capacitor transfer structure.
12. The semiconductor structure according to claim 9, characterized in that, The thickness of the protective layer is 0.5nm to 5nm.
Citation Information
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