Synchronous data processing method and apparatus

Abstract

A synchronous data processing method comprises: sending a preset synchronization frame to a plurality of slave devices, the preset synchronization frame being used to instruct each of the slave devices to enter an edge trigger mode; sending synchronization data to the plurality of slave devices, the synchronization data being used to instruct each of the slave devices to start data sampling when a first edge of the synchronization data is received; receiving transmission time sent by each of the slave devices, the transmission time being a total time recorded by each of the slave devices in the edge trigger mode for receiving the synchronization data; calculating relative time deviations among the plurality of slave devices according to the transmission time sent by each of the slave devices; receiving sampling data returned by each of the slave devices; and processing the sampling data according to the relative time deviations to obtain synchronous sampling data of the plurality of slave devices.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of communication, and particularly relates to a synchronous data processing method and device. BACKGROUND

[0002] The statements herein merely provide background information related to the present application and do not necessarily constitute the exemplary technology.

[0003] The application scenarios of the current communication bus are wide, and the communication bus can be used for communication between various devices. In actual application, in a communication bus including one master device control and a plurality of slave devices as data sampling units, the clock synchronization of the data sampling of each slave device is required to be high.

[0004] However, each of the master device and the slave devices has a respective clock system, and there is a certain deviation between each of the clock systems, which causes the master device to be difficult to obtain high-synchronization data from the slave devices. SUMMARY

[0005] According to various embodiments of the present application, a synchronous data processing method, device and storage medium are provided.

[0006] In a first aspect, the embodiments of the present application provide a synchronous data processing method applied to a master device, wherein the master device is in communication connection with a plurality of slave devices, and the method comprises the following steps.

[0007] sending a preset synchronization frame to the plurality of slave devices, wherein the preset synchronization frame is used to instruct each of the slave devices to enter an edge trigger mode;

[0008] sending synchronization data to the plurality of slave devices, wherein the synchronization data is used to instruct each of the slave devices to start data sampling when a first edge of the synchronization data is received;

[0009] receiving transmission time sent by each of the slave devices, wherein the transmission time is the total time of receiving the synchronization data recorded by the slave device in the edge trigger mode;

[0010] calculating relative time deviation between the plurality of slave devices according to the transmission time sent by each of the slave devices;

[0011] receiving sampling data returned by each of the slave devices;

[0012] processing the sampling data according to the relative time deviation to obtain synchronous sampling data of the plurality of slave devices.

[0013] In a second aspect, the embodiments of the present application provide a synchronous data processing method applied to a slave device, wherein the slave device is in communication connection with a master device, and the method comprises the following steps.

[0014] in response to the preset synchronization frame sent by the master device, change a receiving mode to an edge trigger mode;

[0015] start data sampling when a first edge of the synchronization data sent by the master device is received, to obtain sampling data;

[0016] take a total time of receiving the synchronization data in the edge trigger mode as a transmission time, and send the transmission time to the master device;

[0017] send the sampling data to the master device, so that the master device calculates relative time deviations among the multiple slave devices based on the transmission time sent by each slave device, and processes the sampling data according to the relative time deviations to obtain synchronization sampling data of the multiple slave devices.

[0018] In a third aspect, an embodiment of the present application provides a synchronization data processing method, applied to a communication system, the communication system including a master device and multiple slave devices, the master device being in communication connection with the multiple slave devices, and the method including:

[0019] the master device sends a preset synchronization frame to the multiple slave devices;

[0020] in response to the preset synchronization frame sent by the master device, the slave device changes a receiving mode to an edge trigger mode;

[0021] the master device sends synchronization data to the multiple slave devices;

[0022] the slave device starts data sampling when a first edge of the synchronization data is received, to obtain sampling data;

[0023] the slave device takes a total time of receiving the synchronization data in the edge trigger mode as a transmission time;

[0024] the slave device sends the transmission time and the sampling data to the master device;

[0025] the master device receives the transmission time and the sampling data sent by the multiple slave devices;

[0026] the master device calculates relative time deviations among the multiple slave devices according to the transmission time sent by each slave device;

[0027] the master device processes the sampling data according to the relative time deviations to obtain synchronization sampling data of the multiple slave devices.

[0028] In a fourth aspect, an embodiment of the present application provides a computer device, comprising a processor and a memory, wherein the processor is configured to implement the above-mentioned synchronization data processing method when executing a computer program stored in the memory.

[0029] In a fifth aspect, an embodiment of the present application provides a computer readable storage medium, wherein a computer program is stored in the computer readable storage medium, and the computer program is configured to implement the above-mentioned synchronization data processing method when executed by a processor.

[0030] The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the application will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of the provided drawings.

[0032] Figure 1 The application environment diagram of the synchronization data processing method provided by an embodiment of the present application.

[0033] Figure 2 The flowchart of the synchronization data processing method provided by an embodiment of the present application.

[0034] Figure 3 The signal waveform schematic diagram of the synchronization data provided by an embodiment of the present application when transmitted on a bus.

[0035] Figure 4 The calculation flowchart of the relative time deviation provided by an embodiment of the present application.

[0036] Figure 5 The determination flowchart of the synchronization sampling data provided by an embodiment of the present application.

[0037] Figure 6 The flowchart of the synchronization data processing method provided by another embodiment of the present application.

[0038] Figure 7 The trigger condition flowchart of the edge trigger mode provided by an embodiment of the present application.

[0039] Figure 8 The calculation flowchart of the transmission time provided by an embodiment of the present application.

[0040] Figure 9A flow chart of determining a synchronous data end edge is provided for an embodiment of the present application.

[0041] Figure 10 A flow chart of determining a transmission time is provided for an embodiment of the present application.

[0042] Figure 11 A flow chart of a synchronous data processing method is provided for another embodiment of the present application.

[0043] Figure 12 A structure diagram of a synchronous data processing apparatus is provided for an embodiment of the present application.

[0044] Figure 13 A structure of a computer device is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0045] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application will be described in detail below in combination with the drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0046] In the following description, a large number of specific details are set forth in order to facilitate a thorough understanding of the present application. The described embodiments are only a part of the embodiments of the present application, and are not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0048] The application scenario of the communication bus is wide, and can be used for communication between various devices. In actual application, in a communication bus network topology adopting one master device and multiple slave devices, the clock synchronization of data sampling of each slave device is required to be high. However, each clock system has its own clock system on the master device and each slave device, and there is a certain deviation between each clock system, which makes it difficult for the master device to obtain high-synchronization data from the above slave devices.

[0049] Among them, according to the types of information transmitted between various devices, the communication bus can be divided into data bus, address bus and control bus, which are used for transmitting data, data address and control signal respectively.

[0050] Taking the communication bus RS485 bus as an example, combined with Figure 1The application provides a synchronous data processing method. The application provides an application environment diagram of the synchronous data processing method. A master device and a plurality of slave devices are connected through an RS485 bus. The number of the slave devices is not limited. The master device and each slave device are controlled by a single-chip microcomputer. The single-chip microcomputer is provided with a clock system, for example, a crystal oscillator. When data is transmitted between the devices through the RS485 bus, a certain deviation exists between the clock systems, so that the master device cannot obtain high-synchronous data from the slave devices.

[0051] Based on the above problems, the application provides a synchronous data processing method, so that the master device can obtain high-synchronous data from each slave device.

[0052] The synchronous data processing method provided by the application can be executed by a computer device, and correspondingly, a synchronous data processing device runs in the computer device. Figure 2 FIG. 1 is a flowchart of a synchronous data processing method provided by the application, and the synchronous data processing method is applied to a master device. As shown in FIG. 1, the synchronous data processing method can include the following steps S11-S16. The order of the steps in the flowchart can be changed, and some steps can be omitted according to different requirements. Figure 2

[0053] S11, a preset synchronization frame is sent to a plurality of slave devices, and the preset synchronization frame is used to instruct each slave device to enter an edge trigger mode.

[0054] In at least one embodiment of the application, the preset synchronization frame is a data frame in a self-defined format. For example, the preset synchronization frame can include one or more bytes, each byte can include a start bit, a data bit and a stop bit, and the number of the start bit, the data bit and the stop bit can be self-defined. In some embodiments, the byte of the preset synchronization frame can further include a check bit. Taking RS485 bus communication as an example, one byte can include 10 bits. The master device sends the preset synchronization frame to the plurality of slave devices at the same time point, and each slave device changes a receiving mode to the edge trigger mode after receiving the preset synchronization frame.

[0055] It can be understood that before entering the edge trigger mode, each slave device works in a serial port receiving mode by default. Taking the RS485 bus as an example, in the embodiment, the serial port receiving mode means that the RS485 bus receiving port of each slave device notifies an application program to perform a corresponding operation only after receiving a complete byte of data. The edge trigger mode means that when the data received by the RS485 bus receiving port of each slave device changes in level, an interrupt is triggered, an interrupt processing function is executed, and a corresponding operation is performed, for example, data sampling. The level change can mean that the data changes from high level to low level, or the data changes from low level to high level.

[0056] ​It can be understood that in some embodiments, the plurality of slave devices are used for data sampling, and the master device is used to obtain the sampled data from each slave device. Taking the RS485 bus as an example, after the slave device samples the data, the slave device reports the sampled data to the master device through the RS485 bus.

[0057] S12, sending synchronization data to the plurality of slave devices, the synchronization data being used to instruct each slave device to start data sampling when a first edge of the synchronization data is received.

[0058] In at least one embodiment of the present application, the master device simultaneously sends synchronization data to the plurality of slave devices within a preset time period, the preset time period being a preset length of time for sending the synchronization data. The synchronization data refers to a preset number of bytes, the preset number being preset. For example, if the preset time period is 2 milliseconds and the preset number is 1000, it means that the master device will send 1000 bytes of synchronization data in the future 2 milliseconds, and the slave device will be ready to receive 1000 bytes of synchronization data at any time in the future 2 milliseconds until the reception is completed. The preset time and the preset number can be set or adjusted according to requirements in actual application.

[0059] As described above, each byte can include a plurality of bits, for example, including a start bit, a data bit, and a stop bit, wherein the start bit and the stop bit can be 1 bit, and the data bit can be 8 bits. In some embodiments, a check bit can also be included, and in this case, the start bit and the stop bit can be 1 bit, for example, only the start bit or only the stop bit is set.

[0060] It can be understood that for the synchronization data, the value of each byte of bits is different, so that each time a bit from the previous bit enters the current bit, a rising edge or a falling edge is generated, and then the slave device can determine the number of received bits. In combination with the above description of the synchronization data, the slave device can determine the number of received bits according to the rising edge or the falling edge. Figure 3 It is illustrated that the edge change of the slave device receiving the synchronization data according to the embodiments of the present application. Exemplarily, before the slave device receives the synchronization data, the bus interface port of the slave device is at a default level, for example, a high level. When the slave device receives the start bit of the first byte of the synchronization data, the start bit is 0, and the data level changes from high to low. The slave device can record a falling edge at P1, which is also the first edge of the synchronization data. Then, the slave device receives the first data bit 1 of the first byte of the synchronization data, and the data level changes again from low to high. The slave device can record a rising edge at P2, and so on, which will not be described here. When the slave device receives the first edge of the synchronization data, the slave device triggers an interrupt and executes an interrupt processing function. Then, the slave device starts data sampling and collects channel data.

[0061] In the embodiments of the present application, the master device sends the synchronization data to each slave device and controls each slave device to start data sampling when the first edge of the synchronization data is received. Since the time of edge triggering is very short, each slave device can start sampling at nearly the same time, ensuring high synchronization of starting sampling of each slave device.

[0062] S13, receiving the transmission time sent by each slave device, the transmission time being the total time of receiving the synchronization data recorded by the slave device in the edge triggering mode.

[0063] In at least one embodiment of the present application, each slave device has a respective clock system. When the first byte of the synchronization data is received, each slave device starts timing according to the respective clock system, calculates the total time from the start bit of the first byte to the stop bit of the last byte, and takes the total time as the transmission time of each slave device. In this embodiment, the stop bit of the last byte is not counted. Assuming that the number of bytes of the synchronization data is 1000 and each byte includes 10 bits, the total time of receiving the synchronization data recorded by the slave device is the total time of receiving (10*1000-1) bits.

[0064] Exemplarily, taking the synchronization data as 1000 bytes and the number of slave devices as 2 (slave device A and slave device B) as an example, slave device A starts timing when the start bit of the first byte of the synchronization data is received and ends timing when (10*1000-1) bits are received, and the timing time is recorded as T A . The total time of receiving the synchronization data recorded by slave device A is T A . Similarly, slave device B starts timing when the start bit of the first byte of the synchronization data is received and ends timing when (10*1000-1) bits are received, and the timing time is recorded as T B . The total time of receiving the synchronization data recorded by slave device B is T B .

[0065] S14, calculating the relative time deviation among the plurality of slave devices according to the transmission time sent by each slave device.

[0066] In at least one embodiment of the present application, since each slave device is provided with a clock system, there is a certain deviation between each clock system, so each slave device will also have a deviation when timing according to its own clock system. On this basis, each slave device samples data according to the agreed sampling interval, and the sampling interval of each slave device has a deviation, which leads to a certain deviation in the time of sampling data. However, since the deviation caused by the clock system is fixed, the deviation also exists when receiving synchronous data. Still taking the synchronous data as 1000 bytes and the number of slave devices as 2 (slave device A and slave device B respectively) as an example, the transmission time T recorded by slave device A is A The transmission time T recorded from device B B There is a time deviation, which is caused by the clock system of each slave device.

[0067] In one embodiment, the relative time deviation is the time deviation of the remaining slave devices relative to a reference device calculated according to a preset relative time deviation calculation formula, with a slave device among multiple slave devices as the reference device. The preset relative time deviation calculation formula can be preset. For example, taking the communication bus including slave device A and slave device B as an example, the relative time deviation can refer to the time deviation of slave device A relative to slave device B, or the time deviation of slave device B relative to slave device A, without limitation. Assume that the time deviation of slave device B relative to slave device A is ΔT BA ,but:

[0068] ΔT BA =(T B -T A ) / T A .

[0069] S15, receiving the sampled data returned by each slave device.

[0070] In at least one embodiment of the present application, when sampling data, the slave device may utilize a DMA (Direct Memory Access) channel to control an ADC (Analog-to-Digital Converter) to perform sampling and obtain the sampled data. The method of utilizing the DMA channel to control the ADC for sampling is not limited in this embodiment and may be any existing technology, which is not described in detail here.

[0071] In one embodiment, each slave device starts sampling data at the same sampling interval, starting with the moment an interrupt is triggered and the interrupt handling function is executed. It will be appreciated that, because edge triggering occurs very quickly, each slave device initiates sampling at approximately the same time. The sampling interval can be pre-set, for example, 1ms, but this is not a limitation.

[0072] In an embodiment, the synchronization process ends after the master device sends the last byte of the synchronization data to the slave devices. The slave devices then transmit the sampled data to the master device.

[0073] It can be understood that after the synchronization data is sent, the slave devices can continue to sample data, for example, by timing sampling within a predetermined time or by continuous sampling at a preset sampling interval until the master device sends a stop sampling notification.

[0074] S16, processing the sampled data according to the relative time deviation to obtain synchronized sampled data of the plurality of slave devices.

[0075] In at least one embodiment of the present application, there is a certain time deviation between the clock systems of the slave devices. Therefore, there is also a deviation in the sampling interval between the slave devices, which results in that the final sampled data is not synchronized when the slave devices sample data at the same starting time and with the same sampling interval. Taking one of the slave devices as a reference device, the sampling interval of the remaining slave devices is corrected, and then the sampling time of each sampling data point in the sampled data relative to the starting time is corrected according to the sampling interval, so that the corrected sampled data of the remaining slave devices is obtained. At this time, the sampled data of each slave device is synchronized.

[0076] The above synchronization data processing method provided by the embodiments of the present application controls each slave device to enter the edge trigger state by the preset synchronization frame. Then, the master device sends synchronization data to each slave device and controls each slave device to start sampling data when the first edge of the synchronization data is received. Since the time of edge triggering is very short, each slave device can start sampling at nearly the same time, so that the synchronization of the sampling start of each slave device is high. Subsequently, the master device receives the transmission time sent by each slave device and determines the relative time deviation between each slave device according to the transmission time. The sampling data of each slave device is processed according to the relative time deviation, so that data with high synchronization is obtained.

[0077] The following describes the calculation process of the relative time deviation provided by the embodiments of the present application. Figure 4 In some embodiments, the relative time deviation between the plurality of slave devices is calculated according to the transmission time sent by each slave device, which includes:

[0078] S140, selecting a first slave device from the slave devices and determining the transmission time sent by the first slave device.

[0079] In one embodiment, the first slave device is a reference device. The first slave device can be selected either by designation or randomly. For example, if there are slave devices A and B, slave device A can be designated as the first slave device; alternatively, a slave device can be randomly selected from slave devices A and B as the first slave device.

[0080] S141 , determining the slave devices other than the first slave device among the slave devices as second slave devices, and calculating the relative time deviation between the transmission time sent by each second slave device and the transmission time sent by the first slave device.

[0081] In one embodiment, the number of the second slave devices may be one or more, and is not limited here. The relative time deviation can be calculated by a preset relative time deviation calculation formula. For example, still taking the number of slave devices as 2 (slave device A and slave device B), the transmission time of slave device A is T A , for example, T A is 10085, and the transmission time from device B is T B , for example, T B The relative time deviation ΔT between the transmission time sent from device B and that sent from device A is 99754. BA is (T B -T A ) / T A , which is -1.1%. It can be understood that -1.1% means that slave B is 1.1% slower than slave A.

[0082] The following combination Figure 5 The process for determining synchronous sampling data provided by the embodiments of the present application is described. In some embodiments, the sampled data is processed according to the relative time offset to obtain synchronous sampling data of multiple slave devices, including:

[0083] S160: Determine the start time of data sampling and the first sampling interval.

[0084] In one embodiment, the starting time and sampling interval of data sampling are both pre-set, for example, the sampling interval is 1ms. The starting time of data sampling of each slave device is the same, that is, the time corresponding to the first edge of the synchronization data is received. It can be understood that for each slave device, its agreed sampling interval should be the same, but due to the clock deviation of each slave device, the actual sampling interval of each slave device has a deviation. Here, the first sampling interval refers to the sampling interval of the first slave device. When the first slave device is used as the reference device, its sampling interval is assumed to be accurate, and the sampling interval deviation of other slave devices will be corrected based on the sampling interval of the first device.

[0085] S161, determining a second sampling interval of the second slave device according to the first sampling interval and the relative time deviation.

[0086] In an embodiment, as shown above, since there is a relative time deviation between the slave devices, the actual sampling intervals between the slave devices are also deviated, and the second sampling interval of the second slave device needs to be determined according to the first sampling interval and the relative time deviation. The second sampling interval is the sampling interval of the second slave device corrected based on the clock of the first slave device. For example, it is assumed that the slave device B is 1.1% slower than the clock of the slave device A, and the first sampling interval of the slave device A is 100 clock periods, then the second sampling interval of the slave device B is 99 clock periods.

[0087] S162, correcting the sampling time of each sampling data point in the sampling data of the second slave device relative to the starting time to obtain the corrected sampling data of the second slave device.

[0088] In an embodiment, it is assumed that each slave device samples once every 100 slave station clock to obtain a data sampling point, and each sampling data point has a corresponding sampling time. The sampling time of each sampling data point in the sampling data of the second slave device relative to the starting time is corrected according to the second sampling interval to obtain the corrected sampling data of the second slave device.

[0089] For example, taking the number of slave devices as 2 (the slave device A and the slave device B) as an example, and setting the sampling interval as 100 clock periods, each slave device samples once every 100 slave station clock. It can be understood that when there is no time deviation between the slave device A and the slave device B, it is assumed that the 100th sampling data point of the slave device A corresponds to the time A (relative to the starting time), and the 100th sampling data point of the slave device B also corresponds to the time A, that is, the 100th sampling points of the slave device A and the slave device B correspond to the same time. However, there is a time deviation between the slave device A and the slave device B, and the above correspondence will be deviated. It is assumed that the slave device A is the reference device, and the time deviation of the slave device B relative to the slave device A is 1%, that is, the clock of the slave device B is 1% slower than that of the slave device A. At this time, the 100th sampling data point of the slave device A actually corresponds to the 99th sampling data point of the slave device B at the time A. Therefore, corresponding the 99th sampling data point of the slave device B to the 100th sampling data point of the slave device A is actually equivalent to correcting the sampling time of the 99th sampling point of the slave device B to the time A, so that the synchronous sampling data of the slave device A and the slave device B can be obtained.

[0090] S163, determining the sampling data of the first slave device as the synchronous sampling data of the first slave device, and determining the corrected sampling data of the second slave device as the synchronous sampling data of the second slave device.

[0091] It can be understood that, taking the first slave device as the reference device, the sampling data of the first slave device can be used as the synchronous sampling data without correction. For the sampling data of other slave devices such as the second slave device, the sampling data obtained after correction according to the above process can be used as the synchronous sampling data.

[0092] Figure 6 FIG. 1 is a flowchart of a synchronous data processing method provided by an embodiment of the present application, which is applied to a slave device. As shown in FIG. 1, the synchronous data processing method can include the following steps S21-S24. The order of the steps in the flowchart can be changed, and some steps can be omitted according to different requirements. Figure 6

[0093] S21, in response to a preset synchronization frame sent by a master device, changing a receiving mode to an edge trigger mode.

[0094] In at least one embodiment of the present application, the master device sends the preset synchronization frame to multiple slave devices at the same time point, and the slave device changes the receiving mode to the edge trigger mode after receiving the preset synchronization frame. The edge trigger mode refers to that when the data received by the RS485 bus receiving port of the slave device changes in level, an interrupt is triggered, an interrupt processing function is executed, and corresponding operations such as data sampling are performed. The level change can refer to that the data changes from high level to low level, or the data changes from low level to high level.

[0095] S22, starting data sampling when a first edge of the synchronization data sent by the master device is received, to obtain sampling data.

[0096] In at least one embodiment of the present application, when the first edge (i.e., the start bit of the first byte) of the synchronization data is received, the data of the slave device changes in level, and the slave device triggers an interrupt and executes an interrupt processing function when the received data changes in level. Then, the slave device starts data sampling and collects channel data.

[0097] In an embodiment, the slave device can use a DMA (Direct Memory Access) channel to control an ADC (Analog-to-Digital Converter) to sample and obtain sampling data when sampling data. The method of using the DMA channel to control the ADC for sampling is a prior art, and will not be described here.

[0098] ​In an embodiment, each slave device triggers an interrupt, and executes an interrupt handling function at the start time of data sampling, and sets the same sampling interval for data sampling. It can be understood that, since the time of edge triggering is very short, each slave device starts sampling at nearly the same time. The sampling interval is pre-set, for example, the sampling interval is 1 ms, which is not limited herein.

[0099] In an embodiment, after the master device sends the last byte of the synchronization data to the slave device, the synchronization process ends at this time. Subsequently, each slave device transmits the sampled data to the master device.

[0100] It can be understood that, after the synchronization data is sent, the slave device can continue to sample data, for example, to perform timed sampling within a predetermined time, or to continuously sample at a pre-set sampling interval until the master device sends a stop sampling notification.

[0101] S23, the total time of receiving the synchronization data in the edge triggering mode is taken as the transmission time, and the transmission time is sent to the master device.

[0102] In at least one embodiment of the present application, each slave device has its own clock system. When each slave device receives the start bit of the first byte of the synchronization data, it starts timing according to its own clock system, calculates the total time from the start bit of the first byte to the stop bit of the last byte, and takes the total time as the transmission time of each slave device. In this embodiment, the stop bit of the last byte is not counted. Assuming that the number of bytes of the synchronization data is 1000, and each byte includes 10 bits, the slave device records the total time of receiving the synchronization data as the total time of receiving (10*1000-1) bits.

[0103] For example, slave device A starts timing when it receives the start bit of the first byte of the synchronization data, and ends timing when it receives (10*1000-1) bits, and records the timing time as T A , and the total time of receiving the synchronization data recorded by slave device A is T A .

[0104] S24, the sampled data is sent to the master device, so that the master device calculates the relative time deviation among the plurality of slave devices based on the transmission time sent by each slave device, and processes the sampled data according to the relative time deviation to obtain the synchronized sampled data of the plurality of slave devices.

[0105] In at least one embodiment of the present application, since each slave device is provided with a clock system, there is a certain deviation between each clock system, and thus each slave device also has a deviation when timing according to its own clock system. On this basis, each slave device samples data according to the agreed sampling interval, and the sampling interval of each slave device is deviated, thereby causing a certain deviation in the time of the sampled data. However, since the deviation caused by the clock system is fixed, when receiving the synchronization data, the same deviation also exists. Taking the synchronization data as 1000 bytes, and the number of slave devices as 2 (slave device A and slave device B) as an example, the transmission time T A recorded by the slave device A is not the same as the transmission time T B recorded by the slave device B, and there is a time deviation, which is caused by the clock system of each slave device.

[0106] In one embodiment, the master device takes one of the plurality of slave devices as a reference device, and calculates the time deviation of the remaining slave devices relative to the reference device according to a preset relative time deviation calculation formula. The preset relative time deviation calculation formula is preset. Since there is a relative time deviation between each slave device, the sampling interval between each slave device is also actually deviated, thereby causing the final sampled data to be unsynchronized when each slave device samples data at the same starting time and according to the same sampling interval. Taking one of the plurality of slave devices as a reference device, correcting the sampling interval of the remaining slave devices, and then correcting the sampling time of each sampled data point in the sampled data relative to the starting time according to the sampling interval, the corrected sampled data of the remaining slave devices can be obtained, and at this time, the sampled data of each slave device is synchronized.

[0107] In combination Figure 7 with the description of the trigger condition of the edge trigger mode provided by the embodiments of the present application, after responding to the preset synchronization frame sent by the master device, the method further includes:

[0108] S210, determining the check bit corresponding to the preset synchronization frame.

[0109] In one embodiment, the preset synchronization frame can contain one or more bytes, and each byte can contain a start bit, a data bit, and a stop bit. The specific bit number of the start bit, the data bit, and the stop bit can be set by the user. In some embodiments, the byte in the preset synchronization frame can also include a check bit.

[0110] S211, when the check bit meets the preset check requirement, determining that the check is correct and updating the receiving mode to the edge trigger mode.

[0111] In an embodiment, before receiving the preset synchronization frame, each slave device is in a serial port receiving mode, that is, after receiving a complete data frame, the slave device responds to the data frame to perform a corresponding operation. The check bit is used to confirm that the current preset synchronization frame is received completely and correctly, and when the preset check bit meets the preset check requirement, it is confirmed that the preset synchronization frame has been received completely. At this time, the slave device updates the receiving mode to an edge trigger mode. When the check bit does not meet the preset check requirement, the receiving mode does not need to be updated to the edge trigger mode.

[0112] In combination Figure 8 The embodiment of the present application provides a calculation process of transmission time, and the total time of receiving synchronization data is calculated as the transmission time, including the following steps.

[0113] S230, determining the number of bits corresponding to the synchronization data.

[0114] In an embodiment, the synchronization data refers to a preset number of bytes, and the preset number is preset, for example, the preset number can be 1000. Each byte can include a plurality of bit positions, for example, including a start bit, a data bit and a stop bit, wherein the start bit and the stop bit can be 1 bit, and the data bit can be 8 bits. The number of bits refers to the number of bit positions in the synchronization data, when the synchronization data includes 1000 bytes, 1 byte includes 10 bit positions, and the last 1 byte of the synchronization data is not considered, the number of bits is 10*1000-1.

[0115] S231, determining an ending edge of the synchronization data according to the first edge of the synchronization data and the number of bits.

[0116] In an embodiment, the master device transmits the start bit of the first byte in the synchronization data to each slave device as the first edge, and the last 1 byte of the synchronization data is not considered, and the 10*1000-1 bit in the synchronization data is taken as the ending edge.

[0117] S232, determining a time interval between the first edge and the ending edge as the transmission time.

[0118] In an embodiment, taking 1000 bytes of synchronization data as an example, the slave device A starts timing when receiving the start bit of the first byte of the synchronization data, and ends timing when receiving 10*1000-1 bits, and records the timing time as T A The total time of receiving the synchronization data recorded by the slave device A (that is, the transmission time) is T A .

[0119] In combination Figure 9The embodiment of the application provides a determination process of the end edge of the synchronization data, determines the end edge of the synchronization data according to the first edge of the synchronization data and the bit quantity, and comprises the following steps:

[0120] S2310, when the first edge of the synchronization data is received, a counter is started to accumulate the quantity of the received edges.

[0121] In an embodiment, the edge here refers to a rising edge or a falling edge. As described above, the value of each bit of each byte in the synchronization data is different, that is, the start of each bit in each byte of the synchronization data is a rising edge or a falling edge. After the pre-synchronization frame is received, the slave device enters an edge trigger mode. When the master device starts to send the synchronization data, the slave device can identify the first rising edge or falling edge as the first edge of the synchronization data when the first rising edge or falling edge is identified, and start the counter to start counting. It can be understood that the type of the first edge depends on the setting of the start bit and the stop bit, for example, if the value of the start bit is set to 0 and the stop bit is set to 1, the first edge is a falling edge, and vice versa. The counter is used to record the quantity of the edges received by the slave device in the synchronization data. When the first edge of the synchronization data is received (for example, the first edge is a falling edge), the slave device enters the edge trigger for the first time, and the counter starts counting from 0; when the second edge is received by the slave device (for example, the second edge is a rising edge), the slave device enters the edge trigger for the second time, and the count is increased by 1. In this way, the counter can count the quantity of the received edges, that is, the quantity of the bits of the received synchronization data.

[0122] In an embodiment, taking the synchronization data as 1000 bytes, 1 byte containing 10 bit positions as an example, a total of 10*1000 bit positions are contained. When the slave device receives 10*1000 edges, the quantity of the counter is 10*1000-1.

[0123] S2311, when the count of the counter is equal to the bit quantity, the current edge is determined as the end edge of the synchronization data.

[0124] In an embodiment, when the synchronization data contains 1000 bytes, 1 byte contains 10 bit positions, and the stop bit of the last byte in the synchronization data is not counted, the bit quantity is 10*1000-1. When the count of the timer is also 10*1000-1, the current edge is determined as the end edge of the synchronization data.

[0125] In combination Figure 10 The embodiment of the application provides a determination process of the transmission time, determines the time interval between the first edge and the end edge as the transmission time, and comprises the following steps:

[0126] S2320, when the first edge of the synchronization data is received, a timer is started to count.

[0127] In an embodiment, a timer is used to record the time of receiving the edge of the synchronization data from the device. When the first edge of the synchronization data is received (taking the falling edge as an example), the device enters the edge trigger for the first time, resets the timer to 0, and starts timing.

[0128] S2321, when the end edge of the synchronization data is received, stop timing.

[0129] In an embodiment, when the synchronization data contains 1000 bytes, 1 byte contains 10 bits, and the stop bit of the last byte of the synchronization data is not counted, when the end edge of 10*1000-1 is received, the control timer stops timing, and the time is recorded as T1.

[0130] S2322, determine the timing time of the timer as the transmission time.

[0131] In an embodiment, the transmission time is T1.

[0132] Figure 11 is a flowchart of the synchronization data processing method provided by the embodiment of the application. The synchronization data processing method is applied to a communication system, the communication system includes a master device and a plurality of slave devices, and the master device and the plurality of slave devices are in communication connection. As shown in the figure, Figure 11 The synchronization data processing method can include the following steps S31-S39, and the order of the steps in the flowchart can be changed, and some steps can be omitted according to different requirements.

[0133] S31, the master device sends a preset synchronization frame to the plurality of slave devices.

[0134] S32, the slave device changes the receiving mode to the edge trigger mode in response to the preset synchronization frame sent by the master device.

[0135] S33, the master device sends synchronization data to the plurality of slave devices.

[0136] S34, the slave device starts data sampling when receiving the first edge of the synchronization data, and obtains sampling data.

[0137] S35, the slave device takes the total time of receiving the synchronization data in the edge trigger mode as the transmission time.

[0138] S36, the slave device sends the transmission time and the sampling data to the master device.

[0139] S37, the master device receives the transmission time and the sampling data sent by the plurality of slave devices.

[0140] S38, the master device calculates the relative time deviation among the plurality of slave devices according to the transmission time sent by each slave device.

[0141] S39, the master device processes the sampling data according to the relative time deviation to obtain the synchronized sampling data of the plurality of slave devices.

[0142] The steps S31-S39 correspond to the steps S11-S16 and the steps S21-S24 respectively, and the specific implementation process is described in the foregoing embodiments, which will not be described here.

[0143] It should be understood that, in the above embodiments, a slave device in the plurality of slave devices is taken as the reference device, and in some other embodiments, the master device can also be taken as the reference device. When the master device is taken as the reference device, the relative time deviation between the length of the preset time period and the transmission time of each slave device can be calculated according to the preset time period of the master device sending the synchronization data, and the sampling data of each slave device is processed according to the relative time deviation between the master device and each slave device to obtain the synchronized sampling data of the plurality of slave devices.

[0144] Please refer to Figure 12 , Figure 12 is a structural schematic diagram of the synchronization data processing apparatus provided in the embodiments of the present application. In some embodiments, the synchronization data processing apparatus 20 can include a plurality of functional modules composed of computer program segments. The computer programs of each program segment in the synchronization data processing apparatus 20 can be stored in the memory of the computer device 30 and executed by at least one processor to perform the functions of the synchronization data processing (see the detailed description). Figure 1

[0145] In the present embodiment, the synchronization data processing apparatus 20 can be divided into a plurality of functional modules according to the functions it performs. When the synchronization data processing apparatus 20 is applied to the master device, the functional modules can include a synchronization frame sending module 201, a synchronization data sending module 202, a transmission time receiving module 203, a time deviation calculation module 204, a sampling data receiving module 205, and a sampling data processing module 206. The module referred to in the present application refers to a series of computer program segments that can be executed by at least one processor and can complete a fixed function, which is stored in the memory. In the present embodiment, the functions of each module will be described in detail in subsequent embodiments.

[0146] The synchronization frame sending module 201 is configured to send a preset synchronization frame to a plurality of slave devices, and the preset synchronization frame is configured to instruct each slave device to enter an edge trigger mode.

[0147] The synchronization data sending module 202 is configured to send synchronization data to a plurality of slave devices, and the synchronization data is configured to instruct each slave device to start data sampling when the first edge of the received synchronization data is received.

[0148] ​The transmission time receiving module 203 is configured to receive the transmission time sent by each slave device, and the transmission time is the total time of receiving the synchronization data recorded by the slave device in the edge trigger mode.

[0149] The time deviation calculating module 204 is configured to calculate the relative time deviation between the plurality of slave devices according to the transmission time sent by each slave device.

[0150] The sampling data receiving module 205 is configured to receive the sampling data returned by each slave device.

[0151] The sampling data processing module 206 is configured to process the sampling data according to the relative time deviation to obtain the synchronization sampling data of the plurality of slave devices.

[0152] Please refer to Figure 13 , Figure 13 is a structural schematic diagram of the computer device 30 provided by the embodiment of the present application. In the preferred embodiment of the present application, the computer device 30 comprises a memory 31, at least one processor 32, and at least one communication bus 33.

[0153] Those skilled in the art should understand that Figure 13 The structure of the computer device shown does not constitute a limitation of the embodiment of the present application, and can be a bus structure or a star structure. The computer device 30 can further comprise more or less other hardware or software, or different arrangement of components.

[0154] In some embodiments, the computer device 30 is a device capable of automatically performing numerical calculation and / or information processing according to pre-set or stored instructions. The hardware of the computer device 30 includes but is not limited to a microprocessor, an application specific integrated circuit, a programmable gate array, a digital processor, and an embedded device. The computer device 30 can also comprise a client device, which includes but is not limited to any electronic product capable of human-computer interaction with a client through a keyboard, a mouse, a remote controller, a touchpad, or a sound control device, such as a personal computer, a tablet computer, a smart phone, a digital camera, and the like.

[0155] It should be noted that the computer device 30 is only an example, and other existing or future electronic products can also be applicable to the present application and should be included in the protection scope of the present application.

[0156] In some embodiments, the memory 31 stores a computer program which, when executed by the at least one processor 32, implements all or part of the steps in the method of synchronously processing data. The memory 31 includes a Read-Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), a One-time Programmable Read-Only Memory (OTPROM), an Electrically-Erasable Programmable Read-Only Memory (EEPROM), a Compact Disc Read-Only Memory (CD-ROM), or other optical disk storage, magnetic disk storage, magnetic tape storage, or any other medium of computer readable storage.

[0157] Further, the computer readable storage medium can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, application programs required by at least one function, etc.; and the data storage area can store data created according to the use of the computer device 30, etc.

[0158] In some embodiments, the at least one processor 32 is a control core (Control Unit) of the computer device 30, which connects various components of the entire computer device 30 through various interfaces and lines, and performs various functions of the computer device 30 and processes data by running or executing programs or modules stored in the memory 31 and calling data stored in the memory 31. For example, the at least one processor 32 implements all or part of the steps in the method of synchronously processing data in the embodiments of the present application when executing the computer program stored in the memory; or implements all or part of the functions of the synchronous data processing apparatus. The at least one processor 32 can be composed of integrated circuits, for example, can be composed of a single packaged integrated circuit, or can be composed of multiple packaged integrated circuits with the same function or different functions, including one or more combinations of Central Processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips, etc.

[0159] In some embodiments, the at least one communication bus 33 is provided to realize the connection and communication between the memory 31, the at least one processor 32, etc.

[0160] Although not shown, the computer device 30 can also include a power supply (e.g., battery) for powering the various components of the device, preferably a power management system controller coupled with at least one processor 32 for managing the charging, discharging, and power usage management of the power supply. The power supply can also include one or more AC or DC power sources, recharging circuitry, power failure detection circuitry, power converter or inverter, power status indicator, and any other components typically associated with a power supply. The computer device 30 can also include a variety of sensors, Bluetooth module, Wi-Fi module, and the like, which are not shown.

[0161] The integrated units in the form of software function modules described above can be stored in a computer readable storage medium. The software function modules described above are stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a computer device, or a network device, etc.) or a processor to execute part of the method of various embodiments of the present application.

[0162] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other ways. For example, the apparatus embodiments described above are merely illustrative, for example, the division of modules is only a logical function division, and actual implementation can have another division way.

[0163] The modules described as separate components can or can not be physically separated, and the components shown as modules can or can not be physical units, which can be located in one place or distributed to multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0164] In addition, each functional module in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or hardware plus software function module.

[0165] It is apparent for a person skilled in the art that the application is not restricted to the details of the exemplary embodiments described above and that the application can be implemented in other concrete forms without departing from the spirit or general character thereof. The embodiments are therefore to be considered as illustrative and not restrictive and the scope of the application is defined by the appended claims rather than by the description above, which is therefore intended to be non-limiting. All changes coming within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. No reference signs in the claims should be considered as limiting the scope of the claims to the features to which the reference signs are attached. Furthermore, it is expressly intended that the description of the application set forth herein should not be construed to limit the scope of the application as defined by the appended claims. The word comprising and the like does not exclude other elements or steps. The use of the indefinite article "a" or "an" does not exclude a plurality. The preceding description of exemplary embodiments of the application is provided, the scope of the application is not limited by the described embodiments. The above embodiments are merely intended to illustrate the technical solutions of the application and not to limit the application. Although the application is described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the application can be modified or equivalently replaced without departing from the spirit and scope of the application.

[0166] Finally, it should be noted that the above embodiments are merely intended to illustrate the technical solutions of the application and not to limit the application. Although the application is described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the application can be modified or equivalently replaced without departing from the spirit and scope of the application.

Claims

1. A synchronous data processing method, applied to a master device, wherein the master device is communicatively connected to a plurality of slave devices, the method comprising: Sending a preset synchronization frame to the plurality of slave devices, wherein the preset synchronization frame is configured to instruct each of the slave devices to enter an edge-triggered mode; Sending synchronization data to the plurality of slave devices, wherein the synchronization data is configured to instruct each of the slave devices to start data sampling upon receiving a first edge of the synchronization data; receiving a transmission time sent by each of the slave devices, where the transmission time is a total time recorded by the slave device for receiving the synchronization data in the edge-triggered mode; Calculating relative time deviations between the plurality of slave devices according to a transmission time sent by each of the slave devices; receiving the sampled data returned by each of the slave devices; The sampled data are processed according to the relative time deviation to obtain synchronous sampled data of the multiple slave devices.

2. The method according to claim 1, wherein Calculating the relative time deviations between the plurality of slave devices according to the transmission time sent by each of the slave devices includes: Selecting a first slave device from each of the slave devices, and determining a transmission time sent by the first slave device; The slave devices other than the first slave device among the slave devices are determined as second slave devices, and a relative time deviation between a transmission time sent by each second slave device and a transmission time sent by the first slave device is calculated.

3. The method according to claim 2, wherein The processing of the sampled data according to the relative time deviation to obtain the synchronously sampled data of the plurality of slave devices includes: Determine the starting time of data sampling and the first sampling interval; determining a second sampling interval of the second slave device according to the first sampling interval and the relative time deviation; Correcting the sampling time of each sampling data point in the sampling data of the second slave device relative to the starting time according to the second sampling interval to obtain corrected sampling data of the second slave device; The sampling data of the first slave device is determined as the synchronized sampling data of the first slave device, and the corrected sampling data of the second slave device is determined as the synchronized sampling data of the second slave device.

4. A synchronous data processing method, applied to a slave device, wherein the slave device is communicatively connected to a master device, the method comprising: In response to a preset synchronization frame sent by the master device, changing the receiving mode to an edge triggered mode; Starting data sampling upon receiving the first edge of the synchronization data sent by the master device to obtain sampled data; using the total time of receiving the synchronization data in the edge-triggered mode as a transmission time, and sending the transmission time to the master device; The sampling data is sent to the master device so that the master device calculates the relative time deviation between multiple slave devices based on the transmission time sent by each slave device, and processes the sampling data according to the relative time deviation to obtain synchronized sampling data of the multiple slave devices.

5. The method according to claim 4, wherein After responding to the preset synchronization frame sent by the master device, the method further includes: Determining a check bit corresponding to the preset synchronization frame; When the check bit meets the preset check requirement, it is determined that the check is correct and the receiving mode is updated to the edge-triggered mode.

6. The method according to claim 4, wherein The total time of receiving the synchronization data in the edge-triggered mode as the transmission time comprises: Determining the number of bits corresponding to the synchronization data; determining an end edge of the synchronization data according to a first edge of the synchronization data and the number of bits; A time interval between receiving the first edge and receiving the end edge is determined as a transmission time.

7. The method according to claim 6, wherein The determining the end edge of the synchronization data according to the first edge of the synchronization data and the number of bits includes: When the first edge of the synchronization data is received, a counter is started to accumulate the number of received edges; When the count of the counter is equal to the number of bits, the current edge is determined to be the end edge of the synchronization data.

8. The method according to claim 7, wherein The determining that a time interval between receiving the first edge and receiving the end edge is a transmission time includes: When the first edge of the synchronization data is received, the timer is started to count; When the end edge of the synchronization data is received, the timing is stopped; The timing time of the timer is determined as the transmission time.

9. A synchronous data processing method, applied to a communication system, wherein the communication system includes a master device and multiple slave devices, the master device being communicatively connected to the multiple slave devices, the method comprising: The master device sends a preset synchronization frame to the multiple slave devices; The slave device changes a receiving mode to an edge-triggered mode in response to a preset synchronization frame sent by the master device; The master device sends synchronization data to the multiple slave devices; The slave device starts data sampling upon receiving the first edge of the synchronization data to obtain sampled data; The slave device uses the total time of receiving the synchronization data in the edge-triggered mode as the transmission time; The slave device sends the transmission time and the sampling data to the master device; The master device receives the transmission time and sampling data sent by the multiple slave devices; The master device calculates the relative time deviation between the plurality of slave devices according to the transmission time sent by each of the slave devices; The master device processes the sampled data according to the relative time deviation to obtain the synchronous sampled data of the multiple slave devices.

10. A computer device, characterized in that: The computer device includes a processor and a memory, and the processor is used to implement the synchronous data processing method as described in any one of claims 1 to 3, or the synchronous data processing method as described in any one of claims 4 to 8 when executing the computer program stored in the memory.

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