Optical modulator and method of forming the same
By designing a ridge waveguide structure using semiconductors and insulating materials with different refractive indices in a silicon-based optical modulator, the problem of low modulation efficiency in existing systems has been solved, and higher optical signal conversion efficiency has been achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUHAN OPTICAL VALLEY INFORMATION OPTOELECTRONICS INNOVATION CENT CO LTD
- Filing Date
- 2023-01-03
- Publication Date
- 2026-06-05
Smart Images
Figure CN116165813B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and to, but is not limited to, an optical modulator and a method for forming the same. Background Technology
[0002] Silicon-based photonic chips, with their advantages of compatibility with standard semiconductor processes, low cost, and high integration, are increasingly being adopted by the industry. The modulator is one of the most crucial optical components in silicon-based photonic chips. Currently, high-speed silicon-based optical modulators often employ a horizontal PN junction modulation structure. P-type and N-type doping form a PN junction near the waveguide centerline. By applying a reverse bias voltage to the PN junction, the width of the depletion region can be adjusted, thereby regulating the waveguide refractive index. According to current simulation results, P-type doping has a higher modulation efficiency than N-type doping. Therefore, to achieve higher modulation efficiency, the common practice is to place the PN junction closer to the N-type doping side, allowing the P-type doping to occupy a larger cross-section in the waveguide. However, this approach yields limited improvements in modulation efficiency. Summary of the Invention
[0003] In view of this, embodiments of the present disclosure provide an optical modulator and a method for forming the same.
[0004] The technical solution disclosed herein is implemented as follows:
[0005] In a first aspect, embodiments of this disclosure provide an optical modulator, the optical modulator comprising, in sequence: a dielectric layer, a doped layer, a ridge waveguide located on the doped layer, a capping layer located on the doped layer and covering the ridge waveguide, and a first electrode and a second electrode electrically connected to the doped layer through the capping layer, wherein: the doped layer includes a P-type doped region and an N-type doped region arranged in parallel; the ridge waveguide includes a first waveguide disposed on the P-type doped region and a second waveguide disposed on the N-type doped region, wherein both the first waveguide and the second waveguide are made of semiconductor materials, and the refractive index of the first waveguide material is greater than the refractive index of the second waveguide material.
[0006] Secondly, embodiments of this disclosure provide a method for forming an optical modulator, the method comprising: forming an initial doped layer on a dielectric layer; etching a first preset region of the initial doped layer to form an initial first waveguide, and etching a second preset region of the initial doped layer to a preset height to form an etched second preset region; forming an initial second waveguide based on the etched second preset region; performing P-type doping on the initial first waveguide and the etched first preset region respectively to form a first waveguide and a P-type doped region; performing N-type doping on the initial second waveguide and the etched second preset region respectively to form a second waveguide and an N-type doped region; wherein the first waveguide and the second waveguide form a ridge waveguide, and the P-type doped region and the N-type doped region form a doped layer; and forming a capping layer covering the ridge waveguide on the doped layer.
[0007] In this embodiment of the present disclosure, an optical modulator comprises, from bottom to top: a dielectric layer, a doped layer, a ridge waveguide located on the doped layer, a capping layer located on the doped layer and covering the ridge waveguide, and a first electrode and a second electrode electrically connected to the doped layer through the capping layer; firstly, an initial doped layer is formed on the dielectric layer; secondly, a first preset region of the initial doped layer is etched to form an initial first waveguide, and a second preset region of the initial doped layer is etched to a preset height to form an etched second preset region; thirdly, an initial second waveguide is formed based on the etched second preset region; then, the initial first waveguide and the etched first preset region are respectively subjected to P-type doping to form a first waveguide and a P-type doped region; the initial second waveguide and the etched second preset region are respectively subjected to N-type doping to form a second waveguide and an N-type doped region; wherein, the first waveguide and the second waveguide form a ridge waveguide, and the P-type doped region and the N-type doped region form a doped layer; finally, a capping layer covering the ridge waveguide is formed on the doped layer.
[0008] As can be seen from the above, an optical modulator is obtained by using two semiconductor materials with different refractive indices to form a first waveguide and a second waveguide. This optical modulator structure can effectively concentrate the mode field distribution in the waveguide to one side of the waveguide, and at the same time, the P-type dopant with higher modulation efficiency is also set on this side, thereby increasing the overlap integral of the P-type dopant and the mode field and obtaining higher modulation efficiency.
[0009] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of this disclosure. Attached Figure Description
[0010] In the accompanying drawings (which are not necessarily drawn to scale), similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.
[0011] Figure 1 This is a schematic diagram of a first cross-sectional structure of an optical modulator provided in an embodiment of this disclosure;
[0012] Figure 2 This is a schematic diagram of a second cross-sectional structure of an optical modulator provided in an embodiment of this disclosure;
[0013] Figure 3 This is a schematic diagram of a third cross-sectional structure of an optical modulator provided in an embodiment of this disclosure;
[0014] Figure 4 This is a schematic diagram of a fourth cross-sectional structure of an optical modulator provided in an embodiment of this disclosure;
[0015] Figure 5 A schematic diagram illustrating the implementation process of a method for forming an optical modulator according to an embodiment of this disclosure;
[0016] Figures 6A to 6E and Figure 7 This is a schematic diagram of the formation process of an optical modulator provided in an embodiment of the present disclosure. Detailed Implementation
[0017] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
[0018] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.
[0019] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.
[0020] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this disclosure.
[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0022] In recent years, with the development of silicon-based semiconductor technology, silicon-based optical modulators have advantages in achieving ultra-large scale, ultra-high density, ultra-low power consumption, and ultra-low cost in the field of silicon-based optoelectronics, and have gradually become the mainstream silicon photonic devices in the optoelectronic field. Silicon-based optical modulators can not only be integrated with single-chip electronic devices, but their manufacturing process is also compatible with traditional CMOS (Complementary Metal Oxide Semiconductor) processes.
[0023] Silicon-based optical modulators are one of the core devices in on-chip optical logic, optical interconnects, and optical processors. On the one hand, they can be used to convert radio frequency electrical signals into high-speed optical signals; on the other hand, they can form a complete functional network with lasers, detectors, and other wavelength division multiplexing devices.
[0024] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.
[0025] This disclosure provides an embodiment of an optical modulator, see [link to relevant documentation] Figure 1 The optical modulator, from bottom to top, comprises: a dielectric layer 1, a doped layer 2, a ridge waveguide 3 located on the doped layer 2, a capping layer 4 located on the doped layer 2 and covering the ridge waveguide 3, and a first electrode 51 and a second electrode 52 that penetrate the capping layer 4 and are electrically connected to the doped layer 2, wherein:
[0026] Doped layer 2 includes a P-type doped region 20 and an N-type doped region 21 arranged side by side;
[0027] The ridge waveguide 3 includes a first waveguide 31 disposed on the P-type doped region 20 and a second waveguide 32 disposed on the N-type doped region 21. Both the first waveguide 31 and the second waveguide 32 are made of semiconductor materials, and the refractive index of the first waveguide 31 is greater than that of the second waveguide 32.
[0028] In implementation, a first waveguide and a second waveguide are formed by using two semiconductor materials with different refractive indices, thereby obtaining the first structure of the optical modulator. This optical modulator structure can effectively concentrate the mode field distribution in the waveguide to one side of the waveguide, while the P-type dopant with higher modulation efficiency is also set on this side, thereby increasing the overlap integral of the P-type dopant and the mode field and obtaining higher modulation efficiency.
[0029] Here, the P-type doping process can be either diffusion or ion implantation. The doped layer is P-type doped using a P-type doping process to form a P-type doped region. The dopant ions used in the P-type doping process include at least one of boron, indium, aluminum, and gallium.
[0030] N-type doping can be performed using diffusion or ion implantation. The N-type doping process is used to dop the doped layer with N-type ions to form N-type doped regions. The dopant ions in the N-type doping process must include at least one of phosphorus or arsenic.
[0031] In some embodiments, see Figures 1 to 4 Ridge waveguide 3 includes double ridge waveguides and single ridge waveguides.
[0032] Here, ridge waveguides can be divided into double-ridge waveguides and single-ridge waveguides. For a double-ridge waveguide, please refer to [reference needed]. Figure 2 For single-ridge waveguide 3, please refer to Figure 1 , Figure 3 and Figure 4 .
[0033] In some embodiments, see Figure 2 The first waveguide 31 and the second waveguide 32 are isolated from each other, and the size parameter of the first waveguide 31 is larger than the size parameter of the second waveguide 32.
[0034] The dimensional parameters include: width and / or height.
[0035] In implementation, a second structure of the optical modulator is obtained by using two different refractive indices or the same semiconductor material to form a non-contact first waveguide and a second waveguide. This optical modulator structure can effectively concentrate the mode field distribution in the waveguide to one side of the waveguide, and at the same time, the P-type dopant with higher modulation efficiency is also set on this side, thereby increasing the overlap integral of the P-type dopant and the mode field and obtaining higher modulation efficiency.
[0036] Here, the doped layer can be etched using either a dry etching process or a wet etching process to form the first waveguide. The etching gas used in the dry etching process can include trifluoromethane (CHF3), carbon tetrafluoride (CF4), hydrogen bromide (HBr), and chlorine (Cl2). In other embodiments, the etching gas may also include one or more of other carbon-fluorine based gases, such as difluoromethane (CH2F2), octafluoropropane (C3F8), perfluorobutadiene (C4F6), octafluorocyclobutane (C4F8), and octafluorocyclopentene (C5F8). The etching solution used in the wet etching process may include a diluted hydrofluoric acid solution.
[0037] This disclosure provides an embodiment of an optical modulator, see [link to relevant documentation] Figure 3 The capping layer includes a first capping region 41 corresponding to the P-type doped region 20 and a second capping region 42 corresponding to the N-type doped region 21. The boundary between the first capping region 41 and the second capping region 42 is aligned with the boundary between the P-type doped region 20 and the N-type doped region 21.
[0038] The first covering area 41 and the second covering area 42 are both made of insulating material, and the refractive index of the first covering area 41 and the refractive index of the second covering area 42 are different.
[0039] In implementation, a third structure of the optical modulator is obtained by using two insulating materials with different refractive indices to form a first and a second covering area. This optical modulator structure can effectively concentrate the mode field distribution in the waveguide to one side of the waveguide, while the P-type dopant with higher modulation efficiency is also set on this side, thereby increasing the overlap integral of the P-type dopant and the mode field and obtaining higher modulation efficiency.
[0040] Here, two insulating materials with different refractive indices are deposited on P-type doped regions and N-type doped regions to form the first and second capping regions of the capping layer. The capping layer can be formed by any of the following suitable deposition processes, such as chemical vapor deposition, physical vapor deposition, atomic layer deposition, plasma chemical vapor deposition, spin coating, coating process, or thin film process.
[0041] In some embodiments, see Figure 3 The refractive index of the first covering region 41 is greater than that of the second covering region 42.
[0042] In some embodiments, see Figure 4 The width of the first waveguide 31 covered by the first coverage area is greater than the width of the second waveguide 32 covered by the second coverage area.
[0043] In implementation, a fourth structure of the optical modulator is obtained by using two semiconductor materials with different refractive indices to form a first waveguide and a second waveguide with different heights and widths. This optical modulator structure can effectively concentrate the mode field distribution in the waveguide to one side of the waveguide, and at the same time, the P-type dopant with higher modulation efficiency is also set on this side, thereby increasing the overlap integral of the P-type dopant and the mode field and obtaining higher modulation efficiency.
[0044] This disclosure provides an embodiment of an optical modulator, see [link to relevant documentation] Figures 1 to 4 The P-type doped region 20 includes three P-type doped ohmic contact regions 201, a first doped region 202, and a second doped region 203 arranged in parallel; the N-type doped region 21 includes three third doped regions 211, a fourth doped region 212, and an N-type doped ohmic contact region 213 arranged in parallel and in contact with the second doped region 203.
[0045] The doping concentration of the first doped region 202 is greater than that of the second doped region 203.
[0046] The doping concentration of the fourth doped region 212 is greater than that of the third doped region 211;
[0047] The first electrode 51 is electrically connected to the P-type doped ohmic contact region 201, and the second electrode 52 is electrically connected to the N-type doped ohmic contact region 213.
[0048] The first waveguide 31 is located in the second doped region 203, and the second waveguide 32 is located in the third doped region 211.
[0049] This disclosure provides a method for forming an optical modulator, see [link to relevant documentation]. Figure 5 The method may include steps S501 to S505, wherein:
[0050] Step S501: An initial doped layer is formed on the dielectric layer;
[0051] See Figure 6A An initial doped layer 6 is formed on the dielectric layer 1, wherein the initial doped layer 6 adopts a silicon-on-insulator (SOI) platform. The initial doped layer 6 includes a first preset region 61 and a second preset region 63.
[0052] It should be noted that the SOI platform consists of the following three layers: 1) a very thick bulk silicon substrate layer, whose main function is to provide mechanical support for the two layers above; 2) a relatively thin insulating silicon dioxide intermediate layer; and 3) a thin single-crystal silicon top layer, on which (optical) waveguides are etched.
[0053] Step S502: Etch the first preset region of the initial doped layer to form the initial first waveguide, and etch the second preset region of the initial doped layer to a preset height to form the etched second preset region;
[0054] See Figure 6A The first preset region 61 of the initial doped layer 6 is formed by etching. Figure 6B The initial first waveguide 62 and the etched first preset region 611 are shown, and the second preset region 63 of the initial doped layer is etched to a preset height to form... Figure 6B The second preset area 631 after etching is shown.
[0055] Step S503: Based on the etched second preset region, an initial second waveguide is formed;
[0056] In implementation, an initial second waveguide is formed based on the etched second preset region, including: Method 1: growing semiconductor material in a selected area on the etched second preset region to form an initial second waveguide; or, Method 2: depositing semiconductor material on the etched initial doped layer and etching to form an initial second waveguide.
[0057] Method 1 can be found in [reference]. Figure 6B Semiconductor material is grown in a selected area on the etched second preset region 631 to form Figure 6C The initial second waveguide 64 is shown. Selective growth of semiconductor materials refers to the growth of semiconductor materials on a dielectric layer surface by opening windows at specified locations on the crystal surface. The "dielectric layer surface" specifically refers to the surface on which the semiconductor material cannot grow during selective growth. The dielectric layer material has unique properties; semiconductor materials cannot nucleate or grow on its surface, or the nucleation and growth rates are extremely slow, negligible compared to the nucleation and growth rates of semiconductor materials on a single crystal surface. Typically, the dielectric layer material is an amorphous insulating material, such as silicon dioxide (SiO2) or silicon nitride (SiN). In practice, another dielectric layer (e.g., silicon dioxide) can be sequentially formed on the etched first preset region 611 and the etched second preset region 631; then, the other dielectric layer on the target region in the etched second preset region 631 is removed, where the target region is the area where the initial second waveguide will be formed; finally, semiconductor materials are grown on the target region.
[0058] Method 2 can be found in [link / reference]. Figure 7Semiconductor material is deposited on the etched first preset region 611 and the etched second preset region 631 to form a semiconductor layer 7 with a preset height. Then, the semiconductor layer 7 is thinned to the same height as the first waveguide 62 by a chemical mechanical polishing process. Finally, the semiconductor layer 7 on the etched first preset region 611 and the semiconductor layer 7 on the etched second preset region 631 are removed to form... Figure 6C The initial second waveguide 64 is shown. In implementation, the preset height can be greater than or equal to the height of the initial first waveguide. The semiconductor layer can be formed by any of the following suitable deposition processes, such as chemical vapor deposition, physical vapor deposition, atomic layer deposition, plasma chemical vapor deposition, spin coating, coating, or thin film deposition.
[0059] Step S504: P-type doping is performed on the initial first waveguide and the etched first preset region respectively to form the first waveguide and the P-type doped region; N-type doping is performed on the initial second waveguide and the etched second preset region respectively to form the second waveguide and the N-type doped region; wherein, the first waveguide and the second waveguide form a ridge waveguide, and the P-type doped region and the N-type doped region form a doped layer.
[0060] See Figure 6C P-type doping was performed on the initial first waveguide 62 and the etched first preset region 611, respectively, to form corresponding... Figure 6D The first waveguide 31 and P-type doped region 20 are shown; the initial second waveguide 64 and the etched second preset region 631 are respectively N-type doped to form corresponding structures. Figure 6D The second waveguide 32 and the N-type doped region 21 are shown; wherein, the first waveguide 31 and the second waveguide 32 form a ridge waveguide 3, and the P-type doped region 20 and the N-type doped region 21 form a doped layer 2.
[0061] Here, the initial first waveguide and the first preset region after etching are P-type doped using diffusion or ion implantation, wherein the P-type dopant ions include at least one of boron, indium, aluminum, and gallium; the initial second waveguide and the second preset region after etching are N-type doped using diffusion or ion implantation, wherein the N-type dopant ions include at least one of phosphorus and arsenic.
[0062] Step S505: A capping layer covering the ridge waveguide is formed on the doped layer.
[0063] See Figure 6E A capping layer 4 is formed on the doped layer 2 to cover the ridge waveguide 3.
[0064] In some embodiments, see Figures 1 to 4The P-type doped region 20 includes three P-type doped ohmic contact regions 201, a first doped region 202, and a second doped region 203 arranged in parallel. The N-type doped region 21 includes three N-type doped ohmic contact regions 211, 212, and 213 arranged in parallel and in contact with the second doped region 203. The doping concentration of the first doped region 202 is greater than that of the second doped region 203, and the doping concentration of the fourth doped region 212 is greater than that of the third doped region 211.
[0065] The first electrode 51 and the second electrode 52, which are electrically connected to the doped layer 2, are formed through the capping layer 4. The first electrode 51, which is electrically connected to the P-type doped ohmic contact region 201, and the second electrode 52, which is electrically connected to the N-type doped ohmic contact region 213, are formed through the capping layer 4.
[0066] In practice, the capping layer can be etched using either a dry etching process or a wet etching process to form two capacitor holes on the P-type doped ohmic contact region and the N-type doped ohmic contact region. Electrode material is then deposited in the two capacitor holes to form the first electrode and the second electrode.
[0067] Electrode materials may include metals, metal nitrides, or metal silicides, such as titanium nitride (TiN). In some embodiments, the electrode can be formed by depositing electrode material in the capacitor aperture using any suitable deposition process, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), plasma-enhanced chemical vapor deposition (PECVD), spin coating, coating, or thin film processing, etc. The embodiments of this disclosure do not limit the method of electrode formation.
[0068] To effectively address the technical problem of modulation efficiency in existing optical modulators, this disclosure provides four different structures for optical modulators, all of which can significantly improve the modulation efficiency of optical modulators.
[0069] In this embodiment, the silicon-based optical modulator employs a special waveguide structure, causing light to propagate towards one side of the waveguide when it is transmitted in the waveguide, with P-type doping disposed on that side.
[0070] In this embodiment, the silicon-based optical modulator's ridge waveguide, which transmits light, is composed of two waveguides with different refractive indices. Both waveguides are made of semiconductor materials.
[0071] In this embodiment, two waveguides with different refractive indices are used, one of which has a higher refractive index than the other. The waveguide with the higher refractive index is p-type doped, and the waveguide with the lower refractive index is n-type doped.
[0072] In this embodiment, the width of the waveguide with a higher refractive index is greater than or equal to the width of the waveguide with a lower refractive index.
[0073] In this embodiment, the silicon-based optical modulator has a cladding layer with two different refractive indices on the ridge waveguide that forms the modulator's transmission light. The boundary between the two different refractive index cladding layers is located above the waveguide.
[0074] In this embodiment, the ridge waveguide is covered with two cladding layers of different refractive indices, one of which has a higher refractive index than the other. The waveguide covered by the cladding layer with the higher refractive index is P-type doped, and the waveguide covered by the cladding layer with the lower refractive index is N-type doped.
[0075] In this embodiment, the width of the capping layer with a higher refractive index covering the waveguide is greater than or equal to the width of the capping layer with a lower refractive index covering the waveguide.
[0076] In this embodiment, the silicon-based optical modulator consists of two isolated waveguides of different widths forming the ridge waveguide that transmits the modulator light. The wider waveguide is P-type doped, and the narrower waveguide is N-type doped.
[0077] In this embodiment, the silicon-based optical modulator consists of two waveguides with different heights and widths forming the ridge waveguide for transmitting light. The wider waveguide is P-type doped, and the narrower waveguide is N-type doped.
[0078] The above embodiments can effectively concentrate the mode field distribution in the waveguide to one side of the waveguide. By also placing the highly efficient P-type dopant on this side, the overlap integral between the P-type dopant and the mode field can be increased, resulting in higher modulation efficiency.
[0079] Logic "high" and logic "low" levels can be used to describe the logic levels of electrical signals. Signals with a logic "high" level can be distinguished from signals with a logic "low" level. For example, when a signal with a first voltage corresponds to a signal with a logic "high" level, a signal with a second voltage corresponds to a signal with a logic "low" level. In one embodiment, a logic "high" level can be set to a voltage level higher than that of a logic "low" level. Furthermore, according to embodiments, the logic levels of signals can be set to be different or opposite. For example, a signal with a logic "high" level in one embodiment can be set to a logic "low" level in another embodiment.
[0080] In the several embodiments provided in this disclosure, it should be understood that the disclosed devices and methods can be implemented in a non-target manner. The device embodiments described above are merely illustrative; for example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another system, or some features may be ignored or not executed. Furthermore, the various components shown or discussed may be coupled or directly coupled to each other.
[0081] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.
[0082] The features disclosed in the several method or device embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or device embodiments.
[0083] The above descriptions are merely some embodiments of this disclosure, but the protection scope of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this disclosure should be included within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the scope of the claims.
Claims
1. An optical modulator, characterized in that, In order, they include: A dielectric layer, a doped layer, a ridge waveguide located on the doped layer, a capping layer located on the doped layer and covering the ridge waveguide, and a first electrode and a second electrode electrically connected to the doped layer through the capping layer, wherein: The doped layer includes P-type doped regions and N-type doped regions arranged side by side; The ridge waveguide includes a first waveguide disposed on the P-type doped region and a second waveguide disposed on the N-type doped region, wherein both the first waveguide and the second waveguide are made of semiconductor materials, and the refractive index of the first waveguide material is greater than the refractive index of the second waveguide material.
2. The optical modulator according to claim 1, characterized in that, The ridge waveguide includes a double ridge waveguide or a single ridge waveguide.
3. The optical modulator according to claim 1, characterized in that, The first waveguide and the second waveguide are isolated from each other, and the size parameter of the first waveguide is larger than that of the second waveguide; The dimensional parameters include: width and / or height.
4. The optical modulator according to any one of claims 1 to 3, characterized in that, The capping layer includes a first capping region corresponding to the P-type doped region and a second capping region corresponding to the N-type doped region, and the boundary between the first capping region and the second capping region is aligned with the boundary between the P-type doped region and the N-type doped region. Both the first and second covering areas are made of insulating materials, and the refractive indices of the first and second covering areas are different.
5. The optical modulator according to claim 4, characterized in that, The refractive index of the first covered region is greater than that of the second covered region.
6. The optical modulator according to claim 4, characterized in that, The width of the first waveguide covered by the first coverage area is greater than the width of the second waveguide covered by the second coverage area.
7. The optical modulator according to any one of claims 1 to 3, characterized in that, The P-type doped region includes three P-type doped ohmic contact regions, a first doped region, and a second doped region arranged in parallel; the N-type doped region includes three third doped regions, a fourth doped region, and an N-type doped ohmic contact region arranged in parallel and in contact with the second doped region. Wherein, the doping concentration of the first doped region is greater than the doping concentration of the second doped region; The doping concentration of the fourth doping region is greater than that of the third doping region; The first electrode is electrically connected to the P-type doped ohmic contact region, and the second electrode is electrically connected to the N-type doped ohmic contact region; The first waveguide is disposed in the second doped region, and the second waveguide is disposed in the third doped region.
8. A method for forming an optical modulator, characterized in that, The method is used to form an optical modulator as described in any one of claims 1-7, the method comprising: An initial doped layer is formed on the dielectric layer; The first preset region of the initial doped layer is etched to form an initial first waveguide, and the second preset region of the initial doped layer is etched to a preset height to form the etched second preset region; An initial second waveguide is formed based on the etched second preset region; The initial first waveguide and the etched first preset region are respectively subjected to P-type doping to form a first waveguide and a P-type doped region; the initial second waveguide and the etched second preset region are respectively subjected to N-type doping to form a second waveguide and an N-type doped region; wherein, the first waveguide and the second waveguide form a ridge waveguide, and the P-type doped region and the N-type doped region form a doped layer; A capping layer is formed on the doped layer to cover the ridge waveguide.
9. The method according to claim 8, characterized in that, The first waveguide and the second waveguide are isolated from each other, and the size parameter of the first waveguide is larger than that of the second waveguide; The dimensional parameters include: width and / or height; The formation of an initial second waveguide based on the etched second preset region includes: growing semiconductor material in a selected area on the etched second preset region to form the initial second waveguide; or, depositing semiconductor material on the etched initial doped layer and etching to form the initial second waveguide.
10. The method according to claim 8, characterized in that, The P-type doped region includes three P-type doped ohmic contact regions, a first doped region, and a second doped region arranged in parallel; the N-type doped region includes three third doped regions, a fourth doped region, and an N-type doped ohmic contact region arranged in parallel and in contact with the second doped region; wherein, the doping concentration of the first doped region is greater than that of the second doped region; and the doping concentration of the fourth doped region is greater than that of the third doped region. A first electrode and a second electrode, electrically connected to the doped layer, are formed through the capping layer, comprising: A first electrode electrically connected to the P-type doped ohmic contact region and a second electrode electrically connected to the N-type doped ohmic contact region are formed through the capping layer.