Optical proximity correction method and system, mask, device and storage medium

Abstract

An optical proximity correction method and system, mask, device, and storage medium are disclosed. The method includes: providing an initial mask layer, comprising multiple graphic rows arranged along a first direction, each graphic row comprising multiple graphics regularly arranged along a second direction, the first direction being perpendicular to the second direction; splitting the initial mask layer into a first mask layer and a second mask layer, placing adjacent graphic rows in the first mask layer and the remaining graphic rows in the second mask layer; splitting the first mask layer into a third mask layer and a fourth mask layer, placing adjacent graphics in each graphic row of the first mask layer in the third mask layer and the remaining graphics in the fourth mask layer; splitting the second mask layer into a fifth mask layer and a sixth mask layer, placing adjacent graphics in each graphic row of the second mask layer in the fifth mask layer and the remaining graphics in the sixth mask layer. The present invention improves the optical proximity correction effect while saving process costs.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to an optical proximity correction method and system, a mask, a device, and a storage medium. Background Art

[0002] To transfer a pattern from a mask to the surface of a silicon wafer, it typically requires an exposure step, a development step that follows the exposure step, and an etching step that follows the development step. During the exposure step, light passes through the light-transmitting areas of the mask onto the silicon wafer coated with photoresist, causing the photoresist to undergo a chemical reaction under the irradiation of light. During the development step, the different solubility of the developer in the sensitive and unsensitive photoresists is exploited to form a photoresist pattern, enabling the transfer of the pattern from the mask to the photoresist. In the etching step, the silicon wafer is etched based on the photoresist pattern formed in the photoresist layer, further transferring the mask pattern to the silicon wafer.

[0003] With the rapid development of integrated circuit design, mask layouts are shrinking in size, and the optical proximity effect is becoming increasingly pronounced. When the feature size of exposed lines approaches the theoretical resolution limit of the exposure system, severe distortion of the lithographic image occurs, leading to a significant decline in the quality of the lithographic pattern. Currently, multi-patterning (MP) technology is used to split the mask layout to reduce the impact of the optical proximity effect. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide an optical proximity correction method and system, a mask, a device and a storage medium, which improve the optical proximity correction effect while saving process costs.

[0005] To solve the above problems, an embodiment of the present invention provides an optical proximity correction method, comprising: providing an initial layout layer, the initial layout layer comprising a plurality of graphic rows arranged along a first direction, each of the graphic rows comprising a plurality of graphics regularly arranged along a second direction, the first direction being perpendicular to the second direction; splitting the initial layout layer into a first layout layer and a second layout layer, for placing the graphic rows that are adjacent to each other in the first layout layer, and placing the remaining graphic rows in the second layout layer; splitting the first layout layer into a third layout layer and a fourth layout layer, for placing the graphics that are adjacent to each other in each graphic row of the first layout layer in the third layout layer, and placing the remaining graphics in the fourth layout layer; splitting the second layout layer into a fifth layout layer and a sixth layout layer, for placing the graphics that are adjacent to each other in each graphic row of the second layout layer in the fifth layout layer, and placing the remaining graphics in the sixth layout layer; wherein the third, fourth, fifth, and sixth layout layers are used to perform optical proximity correction separately.

[0006] Accordingly, an embodiment of the present invention further provides an optical proximity correction system, comprising: a layout layer providing module, configured to provide an initial layout layer, the initial layout layer comprising a plurality of graphic rows arranged along a first direction, each graphic row comprising a plurality of graphics regularly arranged along a second direction, the first direction being perpendicular to the second direction; a first layout layer splitting module, configured to split the initial layout layer into a first layout layer and a second layout layer, configured to place the adjacent graphic rows in the first layout layer and the remaining graphic rows in the second layout layer; a second layout layer splitting module, configured to split the first layout layer into a third layout layer and a fourth layout layer, configured to place the adjacent graphic rows in each graphic row of the first layout layer in the third layout layer and the remaining graphic rows in the fourth layout layer; a third layout layer splitting module, configured to split the second layout layer into a fifth layout layer and a sixth layout layer, configured to place the adjacent graphic rows in each graphic row of the second layout layer in the fifth layout layer and the remaining graphic rows in the sixth layout layer; wherein the third, fourth, fifth, and sixth layout layers are configured to be individually subjected to optical proximity correction.

[0007] Correspondingly, an embodiment of the present invention further provides a mask, including a pattern obtained by using the optical proximity correction method provided by an embodiment of the present invention.

[0008] Accordingly, an embodiment of the present invention also provides a device comprising at least one memory and at least one processor, wherein the memory stores one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the optical proximity correction method provided in an embodiment of the present invention.

[0009] Correspondingly, an embodiment of the present invention further provides a storage medium, wherein the storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement the optical proximity correction method provided by the embodiment of the present invention.

[0010] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0011] In the optical proximity correction method provided by an embodiment of the present invention, the initial version layer includes a plurality of graphic rows arranged along a first direction, and each graphic row includes a plurality of graphics regularly arranged along a second direction, that is, the graphics in the initial version layer are regularly arranged, and the initial version layer is split into a first version layer and a second version layer, and the adjacent graphic rows are placed in the first version layer, and the remaining graphic rows are placed in the second version layer, so that the spacing between the graphics adjacent to each other along the first direction increases. At the same time, the splitting is regular, and the graphic rows are alternately located in the first version layer and the second version layer. Then, the first version layer is split into a third version layer and a fourth version layer, and the adjacent graphic rows in each graphic row of the first version layer are placed in the third version layer, and the remaining graphic rows are placed in the fourth version layer, so that the spacing between the graphic rows adjacent to each other along the second direction increases. At the same time, the splitting is also regular, and the graphics are alternately located in the third version layer and the fourth version layer. Similarly, the second version layer is split into a fifth version layer and a sixth version layer, so that the spacing between the graphic rows adjacent to each other along the second direction in the second version layer is regular. The spacing increases, and at the same time, the splitting also has regularity. Therefore, the embodiment of the present invention regularly splits the initial plate layer with regularly arranged graphics. Compared with the random splitting scheme in the prior art, the embodiment of the present invention avoids the significant damage caused by random splitting to the regularity of the graphics in the initial plate layer. By using regular splitting, the spacing between adjacent graphics in the split third, fourth, fifth, and sixth plate layers is large, while the graphics in each plate layer are still regularly arranged. As a result, the distribution of graphics in the third, fourth, fifth, and sixth plate layers is more uniform, which is beneficial to improving the effect of subsequent optical proximity correction of the third, fourth, fifth, and sixth plate layers, thereby improving the lithography quality of the graphics. Moreover, the embodiment of the present invention can avoid the situation where the number of splits caused by random splitting is too large by adopting regular splitting that is adapted to the regularity of the graphic arrangement of the initial plate layer, which is beneficial to obtaining a smaller number of splits, thereby splitting the initial plate layer into a smaller number of plate layers, thereby saving process costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a flow chart of an optical proximity correction method;

[0013] Figures 2 to 3 is a schematic diagram corresponding to each step in an optical proximity correction method;

[0014] Figure 4 is a flow chart of an embodiment of an optical proximity correction method of the present invention;

[0015] Figures 5 to 13 1 is a schematic diagram corresponding to each step in an embodiment of an optical proximity correction method of the present invention;

[0016] Figure 14 is a functional block diagram of an embodiment of an optical proximity correction system of the present invention;

[0017] Figure 15 It is a hardware structure diagram of an embodiment of the device provided by the present invention. DETAILED DESCRIPTION

[0018] Currently, the effect of optical proximity correction needs to be improved. This paper analyzes the reasons why it is necessary to improve the effect of optical proximity correction while saving process costs by combining an optical proximity correction method.

[0019] Figure 1 This is a flow chart of an optical proximity correction method. Figures 2 to 3 , shows a schematic diagram corresponding to each step in the optical proximity correction method, the optical proximity correction method comprising:

[0020] refer to Figure 2 , Figure 2 is a schematic diagram corresponding to step s1, step s1: providing an initial version layer (not shown), the initial version layer includes multiple layers along the first direction (such as Figure 2 The first graphic rows 10 and the second graphic rows 20 are alternately arranged (as shown in the X direction), and each first graphic row 10 includes a plurality of first graphic rows 10 and a plurality of second graphic rows 20 arranged in the second direction (as shown in the X direction). Figure 2 The first and second graphic rows 10 and 20 are each composed of a plurality of first graphics 11 arranged along a first direction (indicated by the Y direction in FIG). The plurality of first graphics 11 are arranged according to a first regular pattern. Each second graphic row 20 includes a plurality of second graphics 21 arranged along a second direction, and the plurality of second graphics 21 are arranged according to a second regular pattern. The first direction is perpendicular to the second direction. For ease of illustration, a dashed line is used to distinguish between the first and second graphic rows 10 and 20.

[0021] refer to Figure 3 , Figure 3 This is a schematic diagram corresponding to step s2. Step s2: perform layer splitting processing to split the initial layer into multiple sub-layers (not marked), and set each first graphic 11 and second graphic 21 on one of the sub-layers respectively.

[0022] For example, Figure 3 As shown, taking the initial version layer being split into five sub-version layers as an example, the sub-version layers are the first sub-version layer, the second sub-version layer, the third sub-version layer, the fourth sub-version layer and the fifth sub-version layer.

[0023] The plate layer splitting process usually splits the initial plate layer by random splitting, and the first graphic 11 and the second graphic 21 in the initial plate layer are both arranged regularly. The random splitting of the initial plate layer is likely to cause great damage to the graphic regularity of the initial plate layer, resulting in the graphics in each sub-plate layer being difficult to maintain a regular arrangement, and easily resulting in the first graphic 11 and the second graphic 21 in the sub-plate layer being unevenly distributed and relatively messy. Therefore, after optical proximity correction is performed on each sub-plate layer, it is easy to cause great damage to the original regularity of the first graphic 11 and the second graphic 21, thereby affecting the lithography quality of the first graphic 11 and the second graphic 21. Moreover, it is difficult to find the optimal number of splitting times that adapts to the graphic regularity of the initial plate layer when splitting the initial plate layer by random splitting, which easily leads to too many splitting times, thereby splitting the initial plate layer into a large number of sub-plate layers, thereby wasting process costs.

[0024] In order to solve the above technical problems, an embodiment of the present invention provides an optical proximity correction method. Figure 4 , which shows a flow chart of an embodiment of the optical proximity correction method of the present invention.

[0025] In this embodiment, the optical proximity correction method includes the following basic steps:

[0026] Step S1: providing an initial layer, wherein the initial layer comprises a plurality of graphic rows arranged along a first direction, each of the graphic rows comprising a plurality of graphics regularly arranged along a second direction, wherein the first direction is perpendicular to the second direction;

[0027] Step S2: Splitting the initial layout layer into a first layout layer and a second layout layer, placing adjacent graphic rows in the first layout layer and placing the remaining graphic rows in the second layout layer;

[0028] Step S3: Splitting the first layer into a third layer and a fourth layer, placing adjacent graphics in each graphic row of the first layer into the third layer, and placing the remaining graphics into the fourth layer;

[0029] Step S4: Splitting the second layer into a fifth layer and a sixth layer, placing adjacent graphics in each graphic row of the second layer into the fifth layer, and placing the remaining graphics into the sixth layer;

[0030] The third version layer, the fourth version layer, the fifth version layer and the sixth version layer are used to perform optical proximity correction separately.

[0031] In order to make the above-mentioned objects, features and advantages of the embodiments of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0032] Figures 5 to 13 1 is a schematic diagram corresponding to each step in an embodiment of the optical proximity correction method of the present invention.

[0033] refer to Figure 5 , execute step S1: provide an initial version layer (not shown), the initial version layer includes a plurality of layers along a first direction (such as Figure 5 The graphic rows (not shown) are arranged along the second direction (as shown in the X direction), each graphic row includes Figure 5 A plurality of graphics (not shown) are regularly arranged (as shown in the Y direction in the figure), with the first direction being perpendicular to the second direction. For ease of illustration, dashed lines are used to distinguish the rows of graphics.

[0034] The pattern of the initial layer is the target pattern to be transferred to the wafer. After optical proximity correction is performed on the pattern of the initial layer, the obtained pattern is used to make a mask, which is then used in the photolithography process to form the corresponding mask pattern on the wafer.

[0035] In this embodiment, the graphics in the initial layout layer are arranged regularly, so the initial layout layer is a layout layer with regularly arranged graphics, so that a regular splitting method is subsequently adopted for the initial layout layer, which is beneficial to reduce the damage to the original graphic regularity of the initial layout layer.

[0036] In this embodiment, the multiple graphic rows include multiple first graphic rows 100 and second graphic rows 200 arranged alternately along the first direction, each first graphic row 100 includes multiple first graphics 110 arranged along the second direction, and the multiple first graphics 110 are arranged according to a first regularity, and each second graphic row 200 includes multiple second graphics 210 arranged along the second direction, and the multiple second graphics 210 are arranged according to a second regularity.

[0037] In this embodiment, a plurality of first graphic rows 100 and second graphic rows 200 are regularly arranged in the first direction. Therefore, the initial layer has a high graphic regularity. Thus, a regular splitting method is subsequently adopted for the initial layer, thereby reducing the damage to the original graphic regularity of the initial layer, and having a more significant effect on better transferring the first graphics 110 and the second graphics 210 to the wafer.

[0038] In the semiconductor field, some structures in the semiconductor structure may have regularity, for example, regularly arranged metal wires, and partition structures for cutting regularly arranged metal wires. The metal wires generally follow the rule of extending in one direction and being arranged in another direction. Correspondingly, the partition structure is used to cut the metal wires, and the partition structure generally also follows the rule of extending in one direction and being arranged in another direction. Therefore, as an example, the second rule is: in each second graphic row 200, multiple second graphics 210 are all located on the same straight line; when the partition structures located in the same row are used to cut different metal wires, the partition structures in the same row will not all be located on the same metal wire. Therefore, as an example, the first rule is: in each first graphic row 100, multiple first graphics 110 are not all located on the same straight line.

[0039] In this embodiment, in the first graphic row 100, a plurality of first graphics 110 are arranged alternately up and down in a first direction, and the adjacent first graphics 110 are located on the same straight line. The first graphics 110 in the first graphic row 100 can be used to form target graphics on a wafer that are arranged alternately up and down in a first direction, and the adjacent target graphics are located on the same straight line. For example, when the target graphics are partition structures, the partition structures located in the same row are used to cut off different metal wires, and the adjacent partition structures are used to cut off the same metal wire.

[0040] It should be noted that the adjacent first graphics 110 are located on the same straight line means that, in the first graphic row 100 , for any first graphic 110 , the first graphics 110 located on both sides of the first graphic and adjacent to the first graphic 110 are all located on the same straight line.

[0041] In this embodiment, in the first direction, in the multiple first graphic rows 100, adjacent first graphics 110 are located on the same straight line along the first direction, so that the first graphics 110 are not only regularly distributed in the second direction, but also regularly distributed in the first direction. Therefore, the regularity of the first graphics 110 is relatively high.

[0042] refer to Figure 5 In this embodiment, the initial pattern layer is a pattern layer for forming an SRAM device, and the first pattern 110 and the second pattern 210 are both source and drain lead cutting patterns.

[0043] The SRAM device is a device with a highly regular structure, and the source-drain lead cutting pattern is used to form a source-drain lead isolation structure in the SRAM device.

[0044] Specifically, the SRAM device includes a plurality of memory cell areas, and the plurality of memory cell areas are arranged in a matrix along a first direction and a second direction.

[0045] Accordingly, the memory cell region includes centrally symmetrical sub-cell regions, each of which includes a transfer gate transistor region, a pull-down transistor region, and a pull-up transistor region. The transfer gate transistor region and the pull-down transistor region are adjacently arranged in a first direction, and the transfer gate transistor region and the pull-down transistor region are adjacently arranged in a second direction to the pull-up transistor region.

[0046] It should be noted that the transfer gate transistor region is used to form a transfer gate transistor, the pull-down transistor region is used to form a pull-down transistor, and the pull-up transistor region is used to form a pull-up transistor.

[0047] Therefore, in the sub-unit area, along the first direction, the pull-down transistor and the transfer gate transistor share a channel structure (for example, a fin), and are arranged parallel to the channel structure of the pull-up transistor along the second direction. Along the second direction, the pull-up transistor and the pull-down transistor share a gate structure, and are arranged parallel to the gate structure of the transfer gate transistor along the first direction. The source-drain doped layers are located in the channel structure on both sides of the gate structure. Accordingly, in the sub-unit area, the source-drain doped layers are arranged into source-drain rows along the second direction, and the source-drain rows are arranged parallel to the first direction.

[0048] Correspondingly, the source-drain leads are located above the source-drain doped layer and are used to electrically lead out the source-drain doped layer. The source-drain lead partition structure is used to cut off the source-drain leads, so that the source-drain lead cutting pattern is arranged into cutting rows along the second direction, and the cutting rows are arranged parallel to the first direction.

[0049] Correspondingly, in the SRAM device, for the source-drain lead cutting patterns for cutting off the same source-drain lead, the source-drain lead cutting patterns are located on the same straight line. For the source-drain lead cutting patterns for cutting off two source-drain leads parallel to each other, the source-drain lead cutting patterns are alternately arranged up and down in a first direction, and the source-drain lead cutting patterns adjacent to each other are located on the same straight line. Therefore, in the SRAM device, the source-drain lead cutting patterns have the pattern arrangement rules of the first pattern 110 and the second pattern 210.

[0050] Continue to refer Figure 5 After providing the initial version layer, before subsequently splitting the initial version layer into the first version layer and the second version layer, it also includes: providing a reference version layer, the reference version layer includes a plurality of reference graphic rows 300 arranged along the first direction, each reference graphic row 300 includes a plurality of reference graphics 310 arranged along the second direction, and the plurality of reference graphics 310 are all located on the same straight line, and the reference graphics 310 are gate lead graphics.

[0051] In this embodiment, the reference graphic 310 is used as a reference condition for the subsequent splitting of the first layer.

[0052] The gate lead pattern is used to form a gate lead on the top of the gate structure for electrically leading out the gate structure. As can be seen from the above, in the SRAM device, the gate structures all extend along the first direction and are arranged in parallel along the second direction. The gate lead pattern is arranged as a reference pattern 310 along the second direction to form a reference pattern row 300, and the reference pattern row 300 is arranged in parallel along the first direction.

[0053] In this embodiment, the gate lead is located at the top of the gate structure, the source and drain leads are located at the top of the source and drain doped layers, and the source and drain lead isolation structure is used to cut off the source and drain leads. Therefore, the gate lead pattern has the characteristic of contacting part of the source and drain lead cut-off pattern.

[0054] As an example, the reference layer is overlapped with the initial layer, and in the first graphic row 100 , the first graphics 110 adjacent to each other are in contact with the reference graphic 310 .

[0055] Combined with reference Figures 6 to 8 , execute step S2: split the initial layout layer into a first layout layer (not marked) and a second layout layer (not marked), and place the adjacent graphic rows in the first layout layer and the remaining graphic rows in the second layout layer. Figure 7 and Figure 8 They are the first and second version layers that were split out.

[0056] It should be noted that placing adjacent graphic rows in the first layer means that, for any graphic row, the graphic rows located on both sides thereof and adjacent to it are all placed in the first layer.

[0057] In this embodiment, the splitting of the initial plate layer is regular, and the graphic rows are alternately placed in the first plate layer and the second plate layer, which causes less damage to the original graphic regularity of the initial plate layer. In addition, the distribution of the graphic rows in the first plate layer and the second plate layer is also relatively uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer caused by the subsequent lithography process.

[0058] In this embodiment, in the step of splitting the initial layout layer into the first layout layer and the second layout layer, the first graphic row 100 is placed in the first layout layer, and the second graphic row 200 is placed in the second layout layer.

[0059] In this embodiment, the splitting increases the spacing between adjacent graphics along the first direction, which is beneficial to improving the subsequent lithography quality of the adjacent graphics in the first direction. At the same time, the splitting has a high regularity, and the graphics following the same regularity are placed in the same layer, which causes less damage to the original graphic regularity of the initial layer. Moreover, the distribution of the graphics in the first layer and the second layer is more uniform, which is further beneficial to reducing the damage to the original graphic regularity of the initial layer by the subsequent lithography process.

[0060] Combined with reference Figures 9 to 13 , execute step S3: split the first version layer into the third version layer (not marked) and the fourth version layer (not marked), and place the adjacent graphics in each graphic row of the first version layer into the third version layer, and the remaining graphics into the fourth version layer. Figure 10 and Figure 11 These are the third and fourth version layers that were split out respectively.

[0061] It should be noted that placing adjacent graphics at intervals in the third layer means that in a graphic row, for any graphic, the graphics located on both sides of it and adjacent to it are all placed in the third layer.

[0062] In this embodiment, the splitting of the first plate layer is regular, and the regularly arranged graphics are alternately located in the third plate layer and the fourth plate layer, which causes less damage to the original graphic regularity of the first plate layer. In addition, the distribution of graphic rows in the third plate layer and the fourth plate layer is also relatively uniform, which is beneficial to reducing the damage to the graphic regularity of the first plate layer by the subsequent photolithography process.

[0063] Accordingly, in this embodiment, in the step of splitting the first layer into the third layer and the fourth layer, the adjacent first graphics 110 in each first graphic row 100 are placed in the third layer, and the remaining first graphics 110 are placed in the fourth layer.

[0064] In this embodiment, the splitting increases the spacing between adjacent first graphic rows 100 along the second direction, which is beneficial to improving the subsequent photolithography quality of adjacent first graphic rows 100 along the second direction. At the same time, the splitting also has regularity. The first graphics 110 are alternately located in the third and fourth plate layers, which has little damage to the first regularity of the first graphics 110. Moreover, the distribution of the first graphics 110 in the third and fourth plate layers is also relatively uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer by the subsequent photolithography process.

[0065] In this embodiment, in the step of splitting the first version layer into the third version layer and the fourth version layer, the first graphic 110 that is in contact with the reference graphic row 300 is placed in the third version layer, and the first graphic 110 that is not in contact with the reference graphic row 300 is placed in the fourth version layer, or the first graphic 110 that is in contact with the reference graphic row 300 is placed in the fourth version layer, and the first graphic 110 that is not in contact with the reference graphic row 300 is placed in the third version layer.

[0066] Since in this embodiment, in the first graphic row 100, the first graphics 110 that are adjacent to each other are in contact with the reference graphic 310, the first graphics 110 that are in contact with the reference graphic row 300 are placed in the third layer, and the first graphics 110 that are not in contact with the reference graphic row 300 are placed in the fourth layer. Alternatively, the first graphics 110 that are in contact with the reference graphic row 300 are placed in the fourth layer, and the first graphics 110 that are not in contact with the reference graphic row 300 are placed in the third layer. That is to say, in each first graphic row 100, the first graphics 110 that are adjacent to each other are placed in the third layer, and the remaining first graphics 110 are placed in the fourth layer, which constitutes a regular split.

[0067] Moreover, in this embodiment, by using whether or not there is contact with the reference graphic row 300 as a reference condition, there is no need to additionally set an algorithm for selecting the first graphics 110 that are adjacent to each other in the first graphic row 100, which simplifies the splitting process of the first layer and saves the cost of the optical proximity correction process.

[0068] In this embodiment, the step of splitting the first layout layer into the third layout layer and the fourth layout layer includes: in a first direction, dividing the first graphics 110 located on the same straight line into alternating first graphic groups (not labeled) and second graphic groups (not labeled), each of the first graphic group and the second graphic group including N first graphics 110, where N is a positive integer and N is less than or equal to the total number of first graphic rows 100; placing the first graphic group and the second graphic group in the third layout layer and the fourth layout layer, respectively.

[0069] It should be noted that the first graphic group and the second graphic group refer to adjacent graphic groups that include the same number of first graphics 110 .

[0070] In this embodiment, multiple first graphics 110 are also regularly arranged along the first direction. Therefore, in this embodiment, the first graphics 110 located on the same straight line are divided into alternating first graphic groups and second graphic groups, and the first graphic group and the second graphic group are respectively placed in the third and fourth plate layers. In this way, the first plate layer is also regularly split in the first direction, thereby causing less damage to the original graphic regularity of the first plate layer, and the distribution of the graphics in the first and second plate layers is also more uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer by the subsequent photolithography process.

[0071] Continue to combine references Figures 9 to 13 , execute step S4: split the second version layer into the fifth version layer and the sixth version layer, and place the adjacent graphics in each graphic row of the second version layer into the fifth version layer, and the remaining graphics into the sixth version layer. Figure 12 and Figure 13These are the fifth and sixth version layers that were split out respectively.

[0072] It should be noted that placing adjacent graphics at intervals in the fifth layer means that in a graphic row, for any graphic, the graphics located on both sides of it and adjacent to it are all placed in the fifth layer.

[0073] In this embodiment, the splitting of the second plate layer is regular, and the regularly arranged graphics are alternately located in the fifth and sixth plate layers, which causes less damage to the original graphic regularity of the second plate layer. In addition, the distribution of graphic rows in the fifth and sixth plate layers is also relatively uniform, which is beneficial to reducing the damage to the graphic regularity of the second plate layer by the subsequent photolithography process.

[0074] Accordingly, in this embodiment, in the step of splitting the second layer into the fifth layer and the sixth layer, the adjacent second graphics 210 in each second graphic row 200 are placed in the fifth layer, and the remaining second graphics 210 are placed in the sixth layer.

[0075] In this embodiment, the splitting increases the spacing between the second graphic rows 200 adjacent to each other along the second direction, which is beneficial to improving the subsequent photolithography quality of the second graphic rows 200 adjacent to each other along the second direction. At the same time, the splitting also has regularity. The second graphics 210 are alternately located in the fifth and sixth plate layers, which has little damage to the second regularity of the second graphics 210. Moreover, the distribution of the second graphics 210 in the fifth and sixth plate layers is also relatively uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer by the subsequent photolithography process.

[0076] This embodiment regularly splits the initial plate layer with regularly arranged graphics. Compared with the random splitting scheme in the prior art, this embodiment avoids the significant damage caused by random splitting to the regularity of the graphics in the initial plate layer. By utilizing regular splitting, the spacing between adjacent graphics in the split third, fourth, fifth, and sixth plate layers is large, while the graphics in each plate layer are still regularly arranged. As a result, the distribution of graphics in the third, fourth, fifth, and sixth plate layers is more uniform, which is beneficial to improving the effect of subsequent optical proximity correction of the third, fourth, fifth, and sixth plate layers, thereby improving the lithography quality of the graphics. Moreover, this embodiment can avoid the situation where the number of splits caused by random splitting is too large by adopting regular splitting that is adapted to the regularity of the graphic arrangement of the initial plate layer, which is beneficial to obtaining a smaller number of splits, thereby splitting the initial plate layer into a smaller number of plate layers, and thus saving process costs.

[0077] In this embodiment, the method further includes separately performing optical proximity correction on the third version layer, the fourth version layer, the fifth version layer, and the sixth version layer.

[0078] After performing optical proximity correction on the third, fourth, fifth, and sixth lithography layers, the resulting patterns are used to create a mask, which is then used in a photolithography process to form corresponding mask patterns on a wafer. As can be seen from the aforementioned description, the patterns in the third, fourth, fifth, and sixth lithography layers are spaced relatively wide apart and more evenly distributed, which facilitates improving the effectiveness of performing optical proximity correction on the third, fourth, fifth, and sixth lithography layers.

[0079] Correspondingly, the present invention also provides an optical proximity correction system. Figure 14 FIG. 4 is a functional block diagram of an optical proximity correction system according to an embodiment of the present invention.

[0080] In this embodiment, the optical proximity correction system 50 includes: a layout layer providing module 501 for providing an initial layout layer, the initial layout layer including a plurality of graphic rows arranged along a first direction, each graphic row including a plurality of graphics regularly arranged along a second direction, the first direction being perpendicular to the second direction; a first layout layer splitting module 502 for splitting the initial layout layer into a first layout layer and a second layout layer, for placing adjacent graphic rows in the first layout layer and the remaining graphic rows in the second layout layer; a second layout layer splitting module 503 for splitting the first layout layer into a third layout layer and a fourth layout layer, for placing adjacent graphics in each graphic row of the first layout layer in the third layout layer and the remaining graphics in the fourth layout layer; a third layout layer splitting module 504 for splitting the second layout layer into a fifth layout layer and a sixth layout layer, for placing adjacent graphics in each graphic row of the second layout layer in the fifth layout layer and the remaining graphics in the sixth layout layer; wherein the third, fourth, fifth, and sixth layout layers are configured to be individually subjected to optical proximity correction.

[0081] The layout layer providing module 501 is used to provide an initial layout layer, which includes multiple graphic rows arranged along a first direction, each graphic row includes multiple graphics regularly arranged along a second direction, and the first direction is perpendicular to the second direction.

[0082] The pattern of the initial layer is the target pattern to be transferred to the wafer. After optical proximity correction is performed on the pattern of the initial layer, the obtained pattern is used to make a mask, which is then used in the photolithography process to form the corresponding mask pattern on the wafer.

[0083] In this embodiment, the graphics in the initial layout layer are arranged regularly, so the initial layout layer is a layout layer with regularly arranged graphics, so that a regular splitting method is subsequently adopted for the initial layout layer, which is beneficial to reduce the damage to the original graphic regularity of the initial layout layer.

[0084] In this embodiment, the multiple graphic rows include multiple first graphic rows and second graphic rows arranged alternately along the first direction, each first graphic row includes multiple first graphics arranged along the second direction, and the multiple first graphics are arranged according to a first regularity, and each second graphic row includes multiple second graphics arranged along the second direction, and the multiple second graphics are arranged according to a second regularity.

[0085] In this embodiment, multiple first graphic rows and second graphic rows are regularly arranged in the first direction. Therefore, the initial layer has a high graphic regularity. Therefore, a regular splitting method is subsequently adopted for the initial layer, which reduces the damage to the original graphic regularity of the initial layer, and has a more significant effect on better transferring the first and second graphics to the wafer.

[0086] As an example, the first rule is: in each first graphic row, multiple first graphics are not all located on the same straight line; the second rule is: in each second graphic row, multiple second graphics are all located on the same straight line.

[0087] In this embodiment, in the first graphic row, multiple first graphics are arranged alternately up and down in a first direction, and the adjacent first graphics are located on the same straight line. Then, the first graphics in the first graphic row can be used to form target graphics on the wafer that are arranged alternately up and down in a first direction, and the adjacent target graphics are located on the same straight line. For example, when the target graphics are partition structures, the partition structures located in the same row are used to cut off different metal wires, and at the same time, the adjacent partition structures are used to cut off the same metal wire.

[0088] It should be noted that the adjacent first graphics are located on the same straight line means that, in the first graphic row, for any first graphic, the first graphics located on both sides of the first graphic and adjacent to the first graphic are all located on the same straight line.

[0089] In this embodiment, in the first direction, in multiple rows of first graphics, adjacent first graphics are located on the same straight line along the first direction, so that the first graphics are not only regularly distributed in the second direction, but also regularly distributed in the first direction. Therefore, the regularity of the first graphics is relatively high.

[0090] In this embodiment, the initial pattern layer is a pattern layer for forming an SRAM device, and the first pattern and the second pattern are both source and drain lead cutting patterns.

[0091] The SRAM device is a device with a highly regular structure, and the source-drain lead cutting pattern is used to form a source-drain lead isolation structure in the SRAM device.

[0092] Accordingly, in the SRAM device, for source-drain lead cutting patterns for cutting the same source-drain lead, the source-drain lead cutting patterns are located on the same straight line. For source-drain lead cutting patterns for cutting two parallel source-drain leads, the source-drain lead cutting patterns are arranged alternately in a vertically staggered manner in the first direction, and adjacent source-drain lead cutting patterns are located on the same straight line. Therefore, in the SRAM device, the source-drain lead cutting patterns have a pattern arrangement pattern of the first pattern and the second pattern. For the description of the SRAM device, reference can be made to the corresponding description in the aforementioned embodiment and will not be repeated here.

[0093] In this embodiment, the correction system also includes: a reference plate layer providing module, which is used to provide a reference plate layer, located above or below the initial plate layer, the reference plate layer includes multiple reference graphic rows arranged along the first direction, each reference graphic row includes multiple reference graphics arranged along the second direction, and the multiple reference graphics are all located on the same straight line, and the reference graphics are gate lead graphics.

[0094] In this embodiment, the reference graphic is used as a reference condition for the subsequent splitting of the first layer.

[0095] The gate lead pattern is used to form a gate lead on the top of the gate structure for electrically leading out the gate structure. As can be seen from the above, in the SRAM device, the gate structures all extend along the first direction and are arranged in parallel along the second direction. The gate lead pattern is then arranged as a reference pattern along the second direction into a reference pattern row, and the reference pattern row is arranged in parallel along the first direction.

[0096] In this embodiment, the gate lead is located at the top of the gate structure, the source and drain leads are located at the top of the source and drain doped layers, and the source and drain lead isolation structure is used to cut off the source and drain leads. Therefore, the gate lead pattern has the characteristic of contacting part of the source and drain lead cut-off pattern.

[0097] As an example, the reference layer is overlapped with the initial layer, and in the first graphic row, the first graphics adjacent to each other are in contact with the reference graphics.

[0098] The first layout layer splitting module 502 is used to split the initial layout layer into a first layout layer and a second layout layer, and is used to place adjacent graphic rows in the first layout layer and place the remaining graphic rows in the second layout layer.

[0099] In this embodiment, the splitting of the initial plate layer is regular, and the graphic rows are alternately placed in the first plate layer and the second plate layer, which causes less damage to the original graphic regularity of the initial plate layer. In addition, the distribution of the graphic rows in the first plate layer and the second plate layer is also relatively uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer caused by the subsequent lithography process.

[0100] In this embodiment, the first graphic row is placed in the first layout layer, and the second graphic row is placed in the second layout layer.

[0101] In this embodiment, the splitting increases the spacing between adjacent graphics along the first direction, which is beneficial to improving the subsequent lithography quality of the adjacent graphics in the first direction. At the same time, the splitting has a high regularity, and the graphics following the same regularity are placed in the same layer, which causes less damage to the original graphic regularity of the initial layer. Moreover, the distribution of the graphics in the first layer and the second layer is more uniform, which is further beneficial to reducing the damage to the original graphic regularity of the initial layer by the subsequent lithography process.

[0102] The second layer splitting module 503 is used to split the first layer into the third layer and the fourth layer, and is used to place adjacent graphics in each graphic row of the first layer in the third layer and the remaining graphics in the fourth layer.

[0103] Since the splitting of the first version layer is regular, the regularly arranged graphics are alternately placed in the third and fourth version layers, which has little damage to the original graphic regularity of the first version layer. In addition, the distribution of graphic rows in the third and fourth version layers is also relatively uniform, which is beneficial to reduce the damage to the graphic regularity of the first version layer by the subsequent lithography process.

[0104] Accordingly, in each first pattern row, alternate first patterns are placed in the third plate layer, and the remaining first patterns are placed in the fourth plate layer. This splitting increases the spacing between adjacent first pattern rows along the second direction, which is beneficial for improving the subsequent photolithography quality of adjacent first pattern rows along the second direction. Furthermore, the splitting also has a regularity, with the first patterns alternately located in the third and fourth plate layers, which minimizes disruption to the first pattern regularity. Furthermore, the first patterns are more evenly distributed in the third and fourth plate layers, thus minimizing disruption to the original pattern regularity of the initial plate layer during subsequent photolithography.

[0105] In this embodiment, the first graphic that is in contact with the reference graphic row is placed in the third layer, and the first graphic that is not in contact with the reference graphic row is placed in the fourth layer, or the first graphic that is in contact with the reference graphic row is placed in the fourth layer, and the first graphic that is not in contact with the reference graphic row is placed in the third layer.

[0106] Since in this embodiment, in the first graphic row, the first graphics that are adjacent to each other are in contact with the reference graphic, the first graphics that are in contact with the reference graphic row are placed in the third layer, and the first graphics that are not in contact with the reference graphic row are placed in the fourth layer. Alternatively, the first graphics that are in contact with the reference graphic row are placed in the fourth layer, and the first graphics that are not in contact with the reference graphic row are placed in the third layer. That is to say, in each first graphic row, the first graphics that are adjacent to each other are placed in the third layer, and the remaining first graphics are placed in the fourth layer, which constitutes a regular split.

[0107] Moreover, in this embodiment, by using whether or not there is contact with the reference graphic row as a reference condition, there is no need to additionally set an algorithm for selecting the first graphics with adjacent intervals in the first graphic row, which simplifies the splitting process of the first layer and saves the cost of the optical proximity correction process.

[0108] In this embodiment, in the first direction, the first graphics located on the same straight line are divided into a first graphic group and a second graphic group that are alternately arranged. The first graphic group and the second graphic group each include N first graphics, where N is a positive integer and N is less than or equal to the total number of first graphic rows; the first graphic group and the second graphic group are respectively placed in the third and fourth layer.

[0109] In this embodiment, multiple first graphics are also regularly arranged along the first direction. Therefore, in this embodiment, the first graphics located on the same straight line are divided into a first graphic group and a second graphic group that are alternately arranged, and the first graphic group and the second graphic group are respectively placed in the third and fourth plate layers. In this way, the first plate layer is also regularly split in the first direction, thereby causing less damage to the original graphic regularity of the first plate layer, and the distribution of the graphics in the first and second plate layers is also more uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer by the subsequent photolithography process.

[0110] The third-layer splitting module 504 is used to split the second-layer into the fifth-layer and the sixth-layer, and is used to place adjacent graphics in each graphic row of the second-layer into the fifth-layer and the remaining graphics into the sixth-layer.

[0111] In this embodiment, the splitting of the second plate layer is regular, and the regularly arranged graphics are alternately located in the fifth and sixth plate layers, which causes less damage to the original graphic regularity of the second plate layer. In addition, the distribution of graphic rows in the fifth and sixth plate layers is also relatively uniform, which is beneficial to reducing the damage to the graphic regularity of the second plate layer by the subsequent photolithography process.

[0112] Accordingly, in this embodiment, in each second graphic row, the second graphics that are adjacent to each other are placed in the fifth layer, and the remaining second graphics are placed in the sixth layer.

[0113] In this embodiment, the splitting increases the spacing between adjacent second graphic rows along the second direction, which is beneficial to improving the subsequent photolithography quality of adjacent second graphic rows along the second direction. At the same time, the splitting is also regular, and the second graphics are alternately located in the fifth and sixth plate layers, which has little damage to the second regularity of the second graphics. Moreover, the distribution of the second graphics in the fifth and sixth plate layers is also relatively uniform, which is beneficial to reducing the damage to the original graphic regularity of the initial plate layer during the subsequent photolithography process.

[0114] This embodiment regularly splits the initial plate layer with regularly arranged graphics. Compared with the random splitting scheme in the prior art, this embodiment avoids the significant damage caused by random splitting to the regularity of the graphics in the initial plate layer. By utilizing regular splitting, the spacing between adjacent graphics in the split third, fourth, fifth, and sixth plate layers is large, while the graphics in each plate layer are still regularly arranged. As a result, the distribution of graphics in the third, fourth, fifth, and sixth plate layers is more uniform, which is beneficial to improving the effect of subsequent optical proximity correction of the third, fourth, fifth, and sixth plate layers, thereby improving the lithography quality of the graphics. Moreover, this embodiment can avoid the situation where the number of splits caused by random splitting is too large by adopting regular splitting that is adapted to the regularity of the graphic arrangement of the initial plate layer, which is beneficial to obtaining a smaller number of splits, thereby splitting the initial plate layer into a smaller number of plate layers, and thus saving process costs.

[0115] In this embodiment, the correction system further includes: an optical proximity correction module, which is used to perform optical proximity correction on the third version layer, the fourth version layer, the fifth version layer and the sixth version layer separately.

[0116] Correspondingly, the present invention further provides a mask, comprising: a pattern obtained by using the optical proximity correction method provided by an embodiment of the present invention.

[0117] It can be seen from the aforementioned embodiments that the initial plate layer with regularly arranged graphics is regularly split to avoid significant damage to the graphic regularity of the initial plate layer caused by random splitting. By utilizing regular splitting, the spacing between adjacent graphics in the split third plate layer, fourth plate layer, fifth plate layer and sixth plate layer is large, while the graphics in each plate layer are still regularly arranged, so that the distribution of graphics in the third plate layer, fourth plate layer, fifth plate layer and sixth plate layer is more uniform, which is beneficial to improving the effect of subsequent optical proximity correction of the third plate layer, fourth plate layer, fifth plate layer and sixth plate layer, thereby improving the lithography quality of the graphics. Moreover, the embodiments of the present invention can avoid the situation where too many splitting times are caused by random splitting by adopting regular splitting that is adapted to the graphic arrangement regularity of the initial plate layer, which is beneficial to obtaining fewer splitting times, thereby splitting the initial plate layer into a smaller number of plate layers, and further beneficial to saving process costs.

[0118] The embodiment of the present invention further provides a device that can implement the optical proximity correction method provided by the embodiment of the present invention by loading the above optical proximity correction method in the form of a program. An optional hardware structure of the terminal device provided by the embodiment of the present invention can be as follows Figure 15 As shown, it includes: at least one processor 01, at least one communication interface 02, at least one memory 03 and at least one communication bus 04.

[0119] In this embodiment, the number of processor 01, communication interface 02, memory 03, and communication bus 04 is at least one, and the processor 01, communication interface 02, and memory 03 communicate with each other via the communication bus 04. The communication interface 02 can be an interface of a communication module for network communication, such as an interface of a GSM module. The processor 01 can be a central processing unit (CPU), or an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present invention. The memory 03 can include a high-speed RAM memory, or can also include a non-volatile memory (NVM), such as at least one disk storage. The memory 03 stores one or more computer instructions, which are executed by the processor 01 to implement the optical proximity correction method provided in the embodiments of the present invention.

[0120] It should be noted that the above-mentioned terminal device may also include other devices (not shown) that may not be necessary for understanding the contents disclosed in the embodiments of the present invention; given that these other devices may not be necessary for understanding the contents disclosed in the embodiments of the present invention, the embodiments of the present invention will not introduce them one by one.

[0121] An embodiment of the present invention further provides a storage medium storing one or more computer instructions, wherein the one or more computer instructions are used to implement the optical proximity correction method provided by the embodiment of the present invention.

[0122] In the optical proximity correction method provided by an embodiment of the present invention, an initial plate layer with regularly arranged graphics is regularly split to avoid significant damage to the graphic regularity of the initial plate layer caused by random splitting. By utilizing the regular splitting, the spacing between adjacent graphics in the split third, fourth, fifth, and sixth plate layers is large, while the graphics in each plate layer are still regularly arranged, thereby making the distribution of graphics in the third, fourth, fifth, and sixth plate layers more uniform, which is beneficial to improving the effect of subsequent optical proximity correction on the third, fourth, fifth, and sixth plate layers, thereby improving the lithography quality of the graphics. Moreover, the embodiment of the present invention can avoid the situation where the number of splits due to random splitting is too large by adopting regular splitting that is adapted to the graphic arrangement regularity of the initial plate layer, which is beneficial to obtaining a smaller number of splits, thereby splitting the initial plate layer into a smaller number of plate layers, thereby saving process costs.

[0123] The embodiments of the present invention described above are combinations of elements and features of the present invention. Unless otherwise mentioned, the elements or features may be considered as optional. Each element or feature may be put into practice without being combined with other elements or features. In addition, the embodiments of the present invention may be constructed by combining some elements and / or features. The order of operations described in the embodiments of the present invention may be rearranged. Some configurations of any one embodiment may be included in another embodiment and may be replaced by the corresponding configuration of another embodiment. It is obvious to those skilled in the art that claims that do not have a clear reference relationship to each other in the appended claims may be combined into embodiments of the present invention, or may be included as new claims in amendments after submitting this application.

[0124] The embodiments of the present invention can be implemented by various means such as hardware, firmware, software or a combination thereof. In a hardware configuration, the method according to the exemplary embodiment of the present invention can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, etc. In a firmware or software configuration, the embodiments of the present invention can be implemented in the form of modules, processes, functions, etc. The software code can be stored in a memory unit and executed by a processor. The memory unit is located inside or outside the processor and can send data to the processor and receive data from the processor via various known means.

[0125] The above description of the disclosed embodiments will enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein, but is to be construed in the widest possible manner consistent with the principles and novel features disclosed herein.

[0126] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. An optical proximity correction method, characterized in that: include: Providing an initial layer, the initial layer comprising a plurality of graphic rows arranged along a first direction, each of the graphic rows comprising a plurality of graphics regularly arranged along a second direction, the first direction being perpendicular to the second direction; Splitting the initial layout layer into a first layout layer and a second layout layer, placing adjacent graphic rows in the first layout layer and placing the remaining graphic rows in the second layout layer; Splitting the first layer into a third layer and a fourth layer, so as to place adjacent graphics in each graphic row of the first layer into the third layer and the remaining graphics into the fourth layer; Splitting the second layer into a fifth layer and a sixth layer, so as to place adjacent graphics in each graphic row of the second layer into the fifth layer and the remaining graphics into the sixth layer; The third version layer, the fourth version layer, the fifth version layer and the sixth version layer are used to perform optical proximity correction separately.

2. The optical proximity correction method according to claim 1, wherein: In the step of providing the initial layer, the plurality of graphic rows include first graphic rows and second graphic rows alternately arranged along a first direction, each of the first graphic rows includes a plurality of first graphics arranged along a second direction, and the plurality of first graphics are arranged according to a first regularity, and each of the second graphic rows includes a plurality of second graphics arranged along a second direction, and the plurality of second graphics are arranged according to a second regularity; In the step of splitting the initial version layer into a first version layer and a second version layer, the first graphic row is placed in the first version layer, and the second graphic row is placed in the second version layer.

3. The optical proximity correction method according to claim 2, wherein: In the step of providing the initial version layer, the first rule is: in each row of the first graphics, multiple first graphics are not all located on the same straight line; the second rule is: in each row of the second graphics, multiple second graphics are all located on the same straight line.

4. The optical proximity correction method according to claim 3, wherein: In the step of providing the initial layer, in the first graphic row, a plurality of the first graphics are alternately arranged in an up-and-down staggered manner in the first direction, and the first graphics adjacent to each other are located on the same straight line.

5. The optical proximity correction method according to claim 4, wherein: In the step of providing the initial layer, in the plurality of rows of the first graphics, adjacent first graphics are located on the same straight line along the first direction; The step of splitting the first version layer into a third version layer and a fourth version layer includes: in a first direction, dividing the first graphics located on the same straight line into alternating first graphic groups and second graphic groups, wherein the first graphic group and the second graphic group each include N first graphics, where N is a positive integer and N is less than or equal to the total number of first graphic rows; and placing the first graphic group and the second graphic group in the third version layer and the fourth version layer, respectively.

6. The optical proximity correction method according to claim 4, wherein: In the step of providing the initial layout layer, the initial layout layer is a layout layer for forming an SRAM device, and the first pattern and the second pattern are both source and drain lead cutting patterns.

7. The optical proximity correction method according to claim 6, wherein: After providing the initial version layer, before splitting the initial version layer into the first version layer and the second version layer, the method further includes: providing a reference version layer, wherein the reference version layer includes a plurality of reference pattern rows arranged along a first direction, each of the reference pattern rows includes a plurality of reference patterns arranged along a second direction, and the plurality of reference patterns are all located on the same straight line, and the reference patterns are gate lead patterns; Overlapping the reference layer with the initial layer, wherein adjacent first graphics in the first graphic row are in contact with the reference graphics; In the step of splitting the first version layer into a third version layer and a fourth version layer, the first graphic that is in contact with the reference graphic row is placed in the third version layer, and the first graphic that is not in contact with the reference graphic row is placed in the fourth version layer, or the first graphic that is in contact with the reference graphic row is placed in the fourth version layer, and the first graphic that is not in contact with the reference graphic row is placed in the third version layer.

8. An optical proximity correction system, characterized in that: include: A layout layer providing module is configured to provide an initial layout layer, wherein the initial layout layer includes a plurality of graphic rows arranged along a first direction, each of the graphic rows including a plurality of graphics regularly arranged along a second direction, wherein the first direction is perpendicular to the second direction; A first layer splitting module is used to split the initial layer into a first layer and a second layer, and to place adjacent graphic rows in the first layer and the remaining graphic rows in the second layer; A second layer splitting module is configured to split the first layer into a third layer and a fourth layer, and to place adjacent graphics in each graphic row of the first layer into the third layer, and the remaining graphics into the fourth layer; A third layer splitting module is used to split the second layer into a fifth layer and a sixth layer, and is used to place adjacent graphics in each graphic row of the second layer into the fifth layer, and the remaining graphics into the sixth layer; The third version layer, the fourth version layer, the fifth version layer and the sixth version layer are used to perform optical proximity correction separately.

9. The optical proximity correction system according to claim 8, wherein: In the layout layer providing module, in the step of providing the initial layout layer by alternately arranging a plurality of first graphic rows and a second graphic row along a first direction, the plurality of graphic rows include first graphic rows and second graphic rows alternately arranged along the first direction, each of the first graphic rows includes a plurality of first graphics arranged along the second direction, and the plurality of first graphics are arranged according to a first regularity, and each of the second graphic rows includes a plurality of second graphics arranged along the second direction, and the plurality of second graphics are arranged according to a second regularity; The first layout layer splitting module is used to place the first graphic row in a first layout layer and place the second graphic row in a second layout layer.

10. The optical proximity correction system according to claim 9, wherein: In the layout layer providing module, the first rule is: in each first graphic row, multiple first graphics are not all located on the same straight line; the second rule is: in each second graphic row, multiple second graphics are all located on the same straight line.

11. A mask, characterized in that: include: A pattern obtained using the optical proximity correction method according to any one of claims 1 to 7.

12. A terminal device, characterized in that: The method comprises at least one memory and at least one processor, wherein the memory stores one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the optical proximity correction method according to any one of claims 1 to 7.

13. A storage medium, characterized in that: The storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement the optical proximity correction method according to any one of claims 1 to 7.

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