Backlight control device

Abstract

A backlight control device suitable for controlling multiple backlight light sources. The backlight control device includes a timing control module and a regional backlight control module. The timing control module is configured to generate a transmission data packet according to a first custom content specification. The transmission data packet includes control information and brightness information. The timing control module includes a differential circuit configured to transmit the transmission data packet according to a differential level. The regional backlight control module includes a receiving circuit electrically connected to the differential circuit. The receiving circuit is configured to receive the transmission data packet. The regional backlight control module is configured to issue a light source control signal based on the control information and brightness information.

Description

Technical Field

[0001] The invention relates to a control device for a backlight panel. Background Art

[0002] According to various application requirements, flat panel displays often need to use a transmission interface to transmit backlight data to the backlight module. For example, the backlight data is transmitted to the backlight module through the transmission interface to control the brightness of the backlight light source, or the transmission interface is used to independently control multiple backlight light sources of the partitioned backlight. Traditional backlight data transmission interfaces use interfaces such as Serial Peripheral Interface (SPI), Inter-Integrated Circuit (IC) bus, etc. 2 C), RS-232, and transistor-transistor logic (TTL) transmission protocols. These interfaces provide point-to-point signal transmission between the panel control chip and one or more backlight sources. Taking the SPI interface as an example, single-point control requires four traces: serial clock (SCLK), master output slave input (MOSI), master input slave output (MISO), and slave select (SS).

[0003] As market trends evolve, the demand for larger, higher-resolution displays is increasing. One solution to this problem is to provide displays with a large number of zoned backlight sources. However, traditional transmission architectures require numerous traces to control these numerous backlight sources.

[0004] The use of a large number of traces in displays leads to at least the following problems: (1) increased trace costs; (2) an increase in the number of I / Os on the transmitter or receiver chip, resulting in increased production costs; (3) an increase in the space occupied by traces; (4) system complexity must be increased to address the problem of propagation delay skew caused by inconsistent trace distances; and (5) electromagnetic noise interference is likely to occur between a large number of traces. To reduce electromagnetic interference, the transmission speed of displays using traditional transmission interfaces cannot be too high. Summary of the Invention

[0005] In view of this, according to some embodiments, the present invention provides a backlight control device suitable for controlling multiple backlight light sources. The backlight control device includes a timing control module and a regional backlight control module. The timing control module is used to generate a transmission data packet according to a first custom content specification, and the transmission data packet includes control information and brightness information. The timing control module includes a first differential circuit, and the first differential circuit is used to transmit the transmission data packet according to a differential level. The regional backlight control module includes a first receiving circuit, and the first receiving circuit is electrically connected to the first differential circuit. The first receiving circuit is used to receive the transmission data packet. The regional backlight control module is used to issue a light source control signal based on the control information and the brightness information. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a block diagram of a backlight control device and a backlight light source according to some embodiments;

[0007] Figure 2 is a schematic diagram of a timing control module and a regional backlight control module according to the first embodiment;

[0008] Figure 3A is a schematic diagram of sending a data packet according to some embodiments;

[0009] Figure 3B is a schematic diagram of sending data packets according to other embodiments;

[0010] Figure 4 is a schematic diagram of an operating state of a backlight control device according to some embodiments;

[0011] Figure 5 is a schematic diagram of a timing control module and a regional backlight control module according to a second embodiment;

[0012] Figure 6 is a schematic diagram of differential signals according to some embodiments;

[0013] Figure 7 is a schematic diagram of a timing control module and a regional backlight control module according to a third embodiment;

[0014] Figure 8 is a block diagram of a backlight control device and a liquid crystal panel according to some embodiments;

[0015] Figure 9A is a schematic diagram of a backlight control device, a backlight panel, and a liquid crystal panel according to some embodiments;

[0016] Figure 9B is a schematic diagram of a backlight control device, a backlight panel, and a liquid crystal panel according to other embodiments. DETAILED DESCRIPTION

[0017] Figure 1 is a block diagram of a backlight control device and a backlight light source according to some embodiments, please refer to Figure 1 . According to some embodiments, the backlight control device 200 controls multiple backlight light sources 101. The backlight light source 101 may refer to a light source that actively emits light, such as but not limited to an incandescent bulb, a light emitting diode, a fluorescent tube, or a light emitting panel. The backlight light source 101 may be a direct-lit backlight source that is directly disposed behind the liquid crystal panel to provide lighting, or it may be a side-lit light source that is disposed on the side of the liquid crystal panel and provides lighting through a reflector or a light guide plate. According to some embodiments, multiple backlight light sources 101 are arranged in an array to provide partitioned backlight.

[0018] The backlight control device 200 includes a timing control module 201 and a local backlight control module 203. According to some embodiments, the timing control module 201 includes a timing controller 2015 (TCON). The timing control module 201 receives image data D and generates one or more transmission packets for controlling the backlight light source 101 according to a first custom content specification. These transmission packets include control information and brightness information, which will be described in detail below.

[0019] The timing control module 201 includes a first differential circuit 2011, which transmits data packets based on differential level transmission. According to some embodiments, the differential circuit configuration is based on circuit logic with a differential architecture, such as low voltage differential signaling (LVDS), emitter coupled logic (ECL), positive emitter coupled logic (PECL), or current mode logic (CML).

[0020] According to some embodiments, the regional backlight control module 203 includes a backlight controller 2035 (BCON). For example, the backlight controller 2035 is a backlight controller 2035 based on pulse-width modulation dimming (PWM dimming) or analog dimming. The regional backlight control module 203 receives a transmitted data packet and generates a light source control signal based on the control information and brightness information contained in the transmitted data packet to control the backlight source 101. The regional backlight control module 203 includes a first receiving circuit 2031 electrically connected to the first differential circuit 2011. According to some embodiments, the first receiving circuit 2031 is a high-input impedance voltage detection circuit, such as an operational amplifier or a buffer.

[0021] According to some embodiments, the timing control module 201 includes a digital-to-analog converter, which converts the transmitted data packet into a differential level and transmits the differential level to the first receiving circuit 2031 of the regional backlight control module 203 through the first differential circuit 2011. Conversely, the regional backlight control module 203 includes an analog-to-digital converter, which is used to convert the differential level back into the transmitted data packet.

[0022] Figure 2 is a schematic diagram of the timing control module and the regional backlight control module according to the first embodiment. Figure 2 . According to some embodiments, the timing control module 201 includes a timing controller 2015 and a first differential circuit 2011; the regional backlight control module 203 includes a first receiving circuit 2031 and a backlight controller 2035. The first differential circuit 2011 of the timing control module 201 generates a differential signal to transmit a data packet. The first receiving circuit 2031 of the regional backlight control module 203 is electrically connected to the first differential circuit 2011 via a pair of transmission lines to receive the differential signal. The differential signal can be a voltage signal or a current signal and has a differential level. The differential level can refer to a standard for distinguishing between a high level and a low level. For example, the first differential circuit 2011 is a current source for providing a current signal with a differential level of plus or minus 3.5 mA. The current signal flows through a resistor R with a resistance of 100 ohms bridged to the transmission line, and a voltage level of plus or minus 350 mV is generated at both ends of the resistor R. The first receiving circuit 2031 measures the aforementioned voltage level. Among them, a voltage level of positive 350mV is a high level, and a voltage level of negative 350mV is a low level.

[0023] The timing control module 201 generates a transmission data packet based on a first custom content specification. According to some embodiments, the first custom content specification is used to compile brightness information corresponding to multiple backlight light sources 101 into the transmission data packet, making the transmission data packet suitable for transmission via the first differential circuit 2011. According to some embodiments, the transmission data packet includes a start byte, a data sequence, and a stop byte. Figure 3A is a schematic diagram of sending a data packet according to some embodiments. Figure 3A For example, the transmitted data packet P0 includes fields such as the start byte group Head byte[0] to Head byte[n], the data sequence DATA0[7:0] to DATA10367[11:4], and the tailor byte group Tailor byte[0] to Tailor byte[1]. The first differential circuit 2011 transmits the field contents of the transmitted data packet bit by bit.

[0024] According to some embodiments, the start bit group marks the start of data. When the first receiving circuit 2031 receives the start bit group, the regional backlight control module 203 determines that a new transmission data packet has been received. The data sequence stores the brightness information for controlling each backlight light source 101. For example, Figure 3A The transmitted data packet P0 of the embodiment is used to control 10368 backlight light sources 101, and each backlight light source 101 corresponds to 12 bits of brightness information. Thus, the first field DATA0[7:0] (8 bits) of the data sequence and the second field DATA0[11:8] (4 bits) correspond to the backlight light source 101 No. 0; the second field DATA1[3:0] (4 bits) of the data sequence and the third field DATA1[11:4] (8 bits) of the data sequence correspond to the backlight light source 101 No. 1, and so on. Considering that the brightness information corresponding to each backlight light source 101 is not necessarily 8 bits (for example, Figure 3A In some embodiments, the start bit group includes control information. This control information can be used to inform the local backlight control module 203 of the number of bits of brightness information corresponding to each backlight light source 101. In some embodiments, the end bit group marks the end of data transmission. When the first receiving circuit 2031 receives the end bit group, the local backlight control module 203 determines that the received transmission data packet has ended.

[0025] Figure 3B This is a schematic diagram of sending data packets according to other embodiments. Please refer to Figure 3A and Figure 3B .exist Figure 3AIn some embodiments, a single transmission data packet P0 stores brightness information corresponding to all 10368 backlight light sources 101. According to some embodiments, the transmission data packet P0 is transmitted by a set of first differential circuit 2011 and first receiving circuit 2031. Figure 3B In some embodiments, the two transmitted data packets P0 and P1 together store brightness information corresponding to all 10,368 backlight sources 101. According to some embodiments, the transmitted data packets P0 and P1 are transmitted separately by two sets of first differential circuits 2011 and first receiving circuits 2031, thereby improving the transmission speed.

[0026] According to some embodiments, the brightness information corresponding to each backlight source 101 is compiled into a single or multiple transmission data packets according to the first custom content specification. For example, Figure 3A In the embodiment, the first 12 bits of the data sequence of the transmitted data packet P0 correspond to the backlight source 101 No. 0, followed by the backlight sources 101 No. 1, No. 2, ..., No. 10367. Therefore, the brightness information stored in the data sequence corresponds sequentially to the numbering order of the backlight sources 101. Figure 3B In the embodiment, the first 12 bits of the data sequence of the transmitted data packet P0 correspond to backlight source 101 No. 0, followed by backlight source 101 No. 1, No. 4, No. 5, ..., No. 10365; the first 12 bits of the data sequence of the transmitted data packet P1 correspond to backlight source 101 No. 2, followed by backlight source 101 No. 3, No. 6, No. 7, ..., No. 10367. Therefore, all brightness information is alternately stored in two transmitted data packets, with each two brightness information pieces forming a cycle. According to some embodiments, to solve the data correspondence problem when transmitting multiple transmitted data packets, the start byte group includes control information. This control information enables the local backlight control module 203 to identify the brightness information stored in each transmitted data packet and the backlight source 101 corresponding to each brightness information piece.

[0027] In summary, according to some embodiments, the transmission interface between the timing control module 201 and the local backlight control module 203 utilizes a differential configuration. According to some embodiments, the backlight control device 200 utilizes a serial transmission scheme for fast data transmission, replacing the traditional parallel transmission scheme for synchronous data transmission. This solves the problem of traditional displays requiring a large number of traces. Thus, the backlight control device 200 allows for the control of a large number of backlight sources 101. For example, a traditional interface requires a total of eight SPI interfaces and 32 traces to transmit 8-bit parallel data. For 10,368 backlight sources 101 and 12 bits of brightness information, and considering the data volume of less than 1ms per frame (combined with the vertical blanking time of a scanning LCD panel <1ms), the transmission speed of a single SPI interface must reach 10,368 * 12 bits / 8 ports / 1ms = 15.552 Mbps, which is still below the SPI interface's upper limit of 20 Mbps. In contrast, a differential configuration requires a single differential transmission interface and two traces to transmit serial data. Taking the LVDS transmission interface as an example, to transmit 10,368 backlight sources 101 and 12 bits of brightness information, and considering the limitation of each frame within 1ms, the transmission speed of a single LVDS must reach 10,368 * 12 bits / 1 pair / 1ms = 124.416Mbps, which is far lower than the LVDS transmission limit of 600Mbps. According to some embodiments, the timing control module 201 generates a transmission data packet according to a first custom content specification, and the local backlight control module 203 parses the received transmission data packet according to the first custom content specification to determine the corresponding relationship between the brightness information of the transmission data packet and the backlight source 101.

[0028] Figure 4 is a schematic diagram of the operating state of the backlight control device according to some embodiments, please refer to Figure 4 . According to some embodiments, the backlight control device 200 includes a timing control module 201, a regional backlight control module 203 and a buffer memory 204. The buffer memory 204 is electrically connected to the regional backlight control module 203 and is used to temporarily store the transmission data packets. According to some embodiments, the timing control module 201 generates transmission data packets frame by frame F, and each transmission data packet contains the brightness information of all backlight light sources 101. After the transmission data packet is transmitted to the regional backlight control module 203 by the timing control module 201, it is forwarded by the regional backlight control module 203 to and temporarily stored in the buffer memory 204. For example, in Figure 4In the embodiment, the transmission data packet P0, the transmission data packet P1, the transmission data packet P2 and the transmission data packet P3 respectively store the brightness information of four frames F. According to some embodiments, the timing control module 201 generates multiple transmission data packets for each frame F. The multiple transmission data packets are transmitted and temporarily stored in the buffer memory 204. For example, in Figure 4 In the embodiment, the transmitted data packet P0, the transmitted data packet P1, the transmitted data packet P2, and the transmitted data packet P3 store within a range of a frame F, and correspond to brightness information of four groups of backlight light sources 101 respectively.

[0029] According to some embodiments, the regional backlight control module 203 of the backlight control device 200 sends light source control signals to the plurality of backlight light sources 101 one by one according to a scanning method. Figure 4 , the regional backlight control module 203 adjusts the backlight light sources 101 one by one from left to right according to the scanning axis X. When it moves to the rightmost position, it moves to the next row according to the scanning axis Y, and then adjusts the backlight light sources 101 one by one according to the scanning axis X. Therefore, when the regional backlight control module 203 scans a specific backlight light source 101, it needs to adjust it according to the brightness information corresponding to the specific backlight light source 101. According to some embodiments, before the regional backlight control module 203 scans a specific backlight light source 101, the regional backlight control module 203 reads the brightness information corresponding to the specific backlight light source 101 from the buffer memory 204. For example, before the regional backlight control module 203 scans the backlight light sources 101 in the first row, it reads the brightness information corresponding to the backlight light sources 101 in the first row from the buffer memory 204. For example, when the regional backlight control module 203 scans the backlight source 101 in the first row and third column along the scanning axis X, the brightness information corresponding to the backlight source 101 in the first row and fourth column is read from the buffer memory 204 .

[0030] The interval between the completion of a panel scan and the start of the next scan is defined as the vertical blanking time. Therefore, according to some embodiments, before the local backlight control module 203 completes scanning of a frame F, the timing control module 201 generates a transmission data packet for the next frame F during the vertical blanking time. The local backlight control module 203 pre-stores the transmission data packet in the buffer memory 204. This buffer memory 204 provides a buffer to prevent screen tearing caused by a significant difference between the speed at which the timing control module 201 generates brightness information and the scanning speed of the local backlight control module 203.

[0031] According to some embodiments, the timing control module 201 sends a synchronization signal Vsync to the local backlight control module 203 to synchronize the speed of generating brightness information with the speed of scanning the panel. Figure 5is a schematic diagram of a timing control module and a regional backlight control module according to a second embodiment; Figure 6 This is a schematic diagram of differential signals according to some embodiments. Please refer to Figure 5 and Figure 6 According to some embodiments, the timing control module 201 includes a timing controller 2015, a plurality of first differential circuits 2011, a second differential circuit 2012, a third differential circuit 2013, and a fourth receiving circuit 2014; the regional backlight control module 203 includes a plurality of first receiving circuits 2031, a second receiving circuit 2032, a third receiving circuit 2033, a fourth differential circuit 2034, and a backlight controller 2035. According to some embodiments, the plurality of first differential circuits 2011 of the timing control module 201 are respectively connected to the plurality of first receiving circuits 2031 of the regional backlight control module 203; the second differential circuit 2012 and the third differential circuit 2013 of the timing control module 201 are respectively connected to the second receiving circuit 2032 and the third receiving circuit 2033 of the regional backlight control module 203. According to some embodiments, the second differential circuit 2012 transmits a synchronization signal Vsync to the second receiving circuit 2032 at the beginning of each frame F. The local backlight control module 203 then begins scanning after receiving the synchronization signal Vsync. Consequently, the generation rate of brightness information within each frame F is synchronized with the scanning rate of the local backlight control module 203. According to some embodiments, the third differential circuit 2013 transmits a data enable signal DEN to the third receiving circuit 2033 during each frame F. The data enable signal DEN is used to mark the valid period E of the transmitted data packet transmitted by the first differential signal Data, ensuring the accuracy of the transmitted data packet within the valid period E.

[0032] According to some embodiments, the local backlight control module 203 generates a return data packet according to a second custom content specification, and the fourth differential circuit 2034 transmits the return data packet to the fourth receiving circuit 2014 of the timing control module 201 according to the differential level. According to some embodiments, the return data packet includes compensation data, such as electrical compensation data or optical compensation data. According to some embodiments, the second custom content specification is used to compile the sensed information of the multiple backlight light sources 101 into the return data packet, making the return data packet suitable for transmission via the fourth differential circuit 2034. According to some embodiments, the second custom content specification is the same as the first custom content specification.

[0033] Due to process variations or wear cycles, the driving currents of different backlight sources 101 may vary, resulting in different brightness levels across different areas of the same backlight panel 102. Therefore, in some embodiments, each backlight source 101 is coupled to a current detection circuit that measures the driving current of the backlight source 101 and generates sensing information. The local backlight control module 203 receives the sensing information measured by each current detection circuit and generates a return data packet.

[0034] According to some embodiments, the backlight control device 200 includes an optical sensing module configured to measure the light intensity of each backlight source 101 and generate sensing information. The local backlight control module 203 receives the sensing information corresponding to each backlight source 101 and generates a return data packet. The optical sensing module may be, but is not limited to, a photodiode, a phototransistor, a photoresistor, or a visible or invisible light sensor.

[0035] According to some embodiments, the return data packet includes a start bit group, a data sequence, and a stop bit group. According to some embodiments, the start bit group includes control information. The control information can be used to inform the timing control module 201 of the number of bits of the sensing information. According to some embodiments, the control information enables the timing control module 201 to identify the sensing information stored in each return data packet and the backlight source 101 corresponding to each sensing information. Figure 3A By analogy, taking 12-bit sensing information as an example, the first field DATA0[7:0] (8 bits) and the second field DATA0[11:8] (4 bits) of the data sequence correspond to the sensing information measured from the backlight source 101 No. 0.

[0036] Figure 7 is a schematic diagram of the timing control module and the regional backlight control module according to the third embodiment. Figure 7 . According to some embodiments, the timing control module 201 includes a timing controller 2015, a first differential circuit 2011 and a fourth receiving circuit 2014; the regional backlight control module 203 includes a first receiving circuit 2031, a fourth differential circuit 2034 and a backlight controller 2035, wherein the first receiving circuit 2031 is electrically connected to the first differential circuit 2011 through a pair of transmission lines, the fourth differential circuit 2034 is connected in parallel with the first receiving circuit 2031, and the fourth receiving circuit 2014 is connected in parallel with the first differential circuit 2011. Thus, according to some embodiments, multiple groups of differential circuits share the same pair of transmission lines to reduce the number of wiring. In this way, the differential circuit allows half-duplex transmission between the timing control module 201 and the regional backlight control module 203. Please refer to Figure 1, the backlight control device 200 allows data packets to be transmitted in transmission direction a or in transmission direction b at the same time. According to some embodiments, the first differential circuit 2011 transmits a data packet according to a first duty cycle, and the fourth differential circuit 2034 transmits a return data packet according to a second duty cycle, and the first duty cycle is different from the second duty cycle. For example, the differential signal sent by the first differential circuit 2011 has a first duty cycle of 50%, and the differential signal sent by the fourth differential circuit 2034 has a second duty cycle of 80%. Thus, the first receiving circuit 2031 parses the differential level according to the first duty cycle of 50% to obtain a transmitted data packet; the second receiving circuit 2032 parses the differential level according to the second duty cycle of 80% to obtain a return data packet. In this way, the differential circuit allows full-duplex transmission between the timing control module 201 and the regional backlight control module 203. Please refer to Figure 1 , the backlight control device 200 allows data packets to be transmitted in the transmission direction c at the same time.

[0037] According to some embodiments, the backlight control device 200 is suitable for controlling the backlight source 101 and the liquid crystal panel 210 . Figure 8 is a block diagram of a backlight control device and a liquid crystal panel according to some embodiments. Figure 8 . According to some embodiments, the timing control module 201 of the backlight control device 200' generates a differential signal S, and the differential level of the differential signal S transmits a data packet to the regional backlight control module 203 to control the backlight light source 101. In addition, the timing control module 201 sends a gate drive signal (Gate In Panel signal, GIP signal) and a drive data signal Drive to the liquid crystal panel 210 to control the liquid crystal panel 210. The GIP signal allows the timing control module 201 to scan and drive the liquid crystal panel 210 of the array, and the drive data signal Drive allows the timing control module 201 to adjust the RGB display of the liquid crystal panel 210. In this way, the timing control module 201 coordinates the display of the liquid crystal panel 210 and the backlight panel 102 at the same time, reducing the number of panel control chips and the coordination problem between chips.

[0038] Figure 9A is a schematic diagram of a backlight control device, a backlight panel, and a liquid crystal panel according to some embodiments; Figure 9B is a schematic diagram of a backlight control device, a backlight panel and a liquid crystal panel according to other embodiments. Figure 9A. According to some embodiments, the backlight control device 200 includes a regional backlight control module 203, a timing control module 201, a Gamma module 207, a power management module 208 and a zoom control module 205. The Gamma module 207 performs voltage correction of the grayscale image. The power management module 208 is responsible for the power management of each module. The zoom control module 205 zooms the image data D of different resolutions to meet the display specifications of the liquid crystal panel 210 or the backlight panel 102. According to some embodiments, the zoom control module 205 is externally connected to the timing control module 201 via a cable 209. According to some embodiments, please refer to Figure 9B The scaling control module 205 and the timing control module 201 are integrated into a system-on-chip 206 .

[0039] In summary, according to some embodiments, the regional backlight control module 203 includes a buffer memory 204. After the timing control module 201 quickly transmits the transmit data packet to the regional backlight control module 203 via a differential circuit, the regional backlight control module 203 temporarily stores the transmit data packet in the buffer memory 204 to provide a buffer between the transmit data packet generation speed and the scanning speed. According to some embodiments, the timing control module 201 sends a synchronization signal Vsync to the regional backlight control module 203 to synchronize the timing control module 201 with the regional backlight control module 203 and avoid screen tearing. According to some embodiments, the regional backlight control module 203 sends a return data packet containing compensation data for the backlight light sources 101 to the timing control module 201, allowing the timing control module 201 to adjust the brightness information corresponding to each backlight light source 101 based on the compensation data. According to some embodiments, the backlight control device 200 provides unidirectional, half-duplex, or full-duplex data transmission to meet simultaneous or non-simultaneous data transmission requirements.

[0040] Description of reference numerals:

[0041] 101: Backlight

[0042] 102: Backlight panel

[0043] 200, 200': Backlight control device

[0044] 201: Timing control module

[0045] 2011: First differential circuit

[0046] 2012: Second differential circuit

[0047] 2013: The Third Differential Circuit

[0048] 2014: Fourth receiving circuit

[0049] 2015: Timing Controller

[0050] 203: Regional backlight control module

[0051] 2031: First receiving circuit

[0052] 2032: Second receiving circuit

[0053] 2033: third receiving circuit

[0054] 2034: Fourth differential circuit

[0055] 2035: Backlight controller

[0056] 204: Buffer memory

[0057] 205: zoom control module

[0058] 206: System on a Chip

[0059] 207:Gamma module

[0060] 208: Power Management Module

[0061] 209: Cable

[0062] 210: LCD panel

[0063] a, b, c: transmission direction

[0064] D: Image data

[0065] Data: first differential signal

[0066] DEN: Data enable signal

[0067] Drive: drive data signal

[0068] E: Validity period

[0069] F:Frame

[0070] GIP: Gate drive signal

[0071] P0, P1, P2, P3: Send data packets

[0072] R: resistance

[0073] S: Differential signal

[0074] Vsync: synchronization signal

[0075] X, Y: Scan axis

Claims

1. A backlight control device, adapted to control a plurality of backlight light sources, the backlight control device comprising: a timing control module, configured to generate a transmission data packet according to a first custom content specification, wherein the transmission data packet includes control information and brightness information, and wherein the timing control module includes a first differential circuit, wherein the first differential circuit is configured to transmit the transmission data packet according to a differential level; and a regional backlight control module, comprising a first receiving circuit electrically connected to the first differential circuit, the first receiving circuit being configured to receive the transmitted data packet, and the regional backlight control module being configured to issue a light source control signal based on the control information and the brightness information; in, The regional backlight control module further includes a fourth differential circuit for transmitting a return data packet containing compensation data for each backlight light source according to a differential level. The timing control module further includes a fourth receiving circuit electrically connected to the fourth differential circuit, and the fourth receiving circuit is configured to receive the return data packet. The timing control module adjusts the brightness information corresponding to each backlight light source according to the compensation data in the return data packet. The first receiving circuit is electrically connected to the first differential circuit through a pair of transmission lines, and the fourth receiving circuit is electrically connected to the fourth differential circuit through the pair of transmission lines.

2. The backlight control device according to claim 1, further comprising a buffer memory, wherein the buffer memory is electrically connected to the local backlight control module, and the buffer memory is used to temporarily store the transmitted data packet.

3. The backlight control device according to claim 2, wherein: The regional backlight control module is used to send the light source control signal to the multiple backlight light sources one by one according to a scanning method. When the regional backlight control module scans to the backlight light source, the regional backlight control module reads the brightness information corresponding to the backlight light source from the buffer memory.

4. The backlight control device according to claim 3, wherein: The timing control module is used to generate the sending data packet frame by frame, and the sending data packet includes a plurality of the brightness information corresponding to the plurality of backlight light sources within the range of the frame.

5. The backlight control device according to claim 4, wherein: The timing control module is used to generate a plurality of transmission data packets frame by frame. The timing control module includes a plurality of first differential circuits. The plurality of first differential circuits are used to respectively transmit the plurality of transmission data packets according to the differential levels.

6. The backlight control device according to any one of claims 1 to 5, wherein: The timing control module includes a second differential circuit for transmitting a synchronization signal. The local backlight control module includes a second receiving circuit electrically connected to the second differential circuit. The second receiving circuit is used to receive the synchronization signal.

7. The backlight control device according to claim 6, wherein: The timing control module includes a third differential circuit for transmitting a data enable signal. The local backlight control module includes a third receiving circuit electrically connected to the third differential circuit. The third receiving circuit is used to receive the data enable signal.

8. The backlight control device according to claim 1, wherein: The local backlight control module is further configured to generate a loopback data packet according to a second custom content specification, wherein the loopback data packet includes control information and sensing information.

9. The backlight control device according to claim 1, wherein: The first differential circuit is used to transmit the transmit data packet according to a first duty cycle, and the fourth differential circuit is used to transmit the return data packet according to a second duty cycle, wherein the first duty cycle and the second duty cycle are different.

10. The backlight control device according to claim 1, wherein the backlight control device is adapted to control a plurality of backlight light sources and a liquid crystal panel, and the timing control module is further configured to send a gate driving signal and a driving data signal to the liquid crystal panel to control the liquid crystal panel.

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