Voltage regulator

Abstract

This application relates to voltage regulators, particularly low dropout voltage regulators (LDOs). A regulator (300) has an output stage (102) that receives an input voltage (Vin) and outputs an output voltage (Vout) and includes at least one transistor (103) as an output device configured to deliver an output current to the output based on a drive voltage (V1). A differential amplifier (101) is configured to receive a feedback signal derived from the output voltage and a reference voltage (REF) to generate an amplifier output to control the drive voltage (V1) to minimize any difference between the feedback signal and the reference voltage. A controller (301) is operable to selectively reconfigure the output stage to provide an output current change in response to a load activity signal (ACT) indicating a load activity change that results in a change in the load current demand of a load connected to the output in use.

Description

Technical Field

[0001] The field of representative embodiments of the present disclosure relates to methods, devices, and / or implementations related to or concerning voltage regulators, and more particularly to low dropout voltage regulators and methods of operating the same. Background Art

[0002] There are many applications that may require a voltage regulator, for example, as part of the power supply for some circuits, and in many applications, a low dropout voltage regulator (LDO) can be used. The LDO can be implemented with a relatively small circuit area.

[0003] Figure 1 An example of a general LDO 100 for receiving an input voltage Vin and outputting a regulated output voltage Vout is shown. The LDO 100 includes a differential amplifier 101 that drives an output stage 102 based on the difference between a feedback signal Sfb derived from the output voltage Vout and a reference voltage REF, which can be, for example, a bandgap reference. The output stage 102 includes an output device 103, which typically includes at least one FET for delivering the output current. Figure 1 An example is shown in which there is a single transistor 103 as the output device, and in this example, the single transistor is an NMOS, but it should be understood that other arrangements are possible.

[0004] In operation, the output of the amplifier 101 controls the drive voltage V1 at the control node of the output stage 102, which in this example is the gate terminal of the transistor 103, and some capacitance 104 may be coupled to this node. The capacitance 104 maintains loop stability and can be coupled to ground, for example, or can be coupled as loop feedback. The amplifier 101 drives the output stage 102 to minimize any difference between the feedback signal Sfb and the voltage reference REF, thus regulating the output voltage Vout to the desired level. Figure 1 An example is shown in which the feedback signal Sfb is directly sampled from the output, but it should be understood that the feedback signal can be sampled via a voltage divider or other level shifter to provide the desired scaling between the reference voltage and the regulated output voltage.

[0005] An output capacitor 105 is coupled to the LDO output to maintain the output voltage Vout. In at least some applications, the LDO can be used in applications where the load demand may vary significantly during use. Conventionally, for such applications, the capacitance of the output capacitor 105 of the LDO may be relatively large to cope with the varying load demand.

[0006] An LDO is typically implemented as an integrated circuit on a semiconductor die (i.e., on-chip). Providing a large-value output capacitor as part of such an integrated circuit may require a large circuit area, which may not be practical. Thus, conventionally, the output capacitor 105 may be implemented as a separate (i.e., off-chip) component. Using a separate (i.e., non-integrated or off-chip) capacitor requires connecting external components, thus increasing the pin count of the integrated circuit die, especially if a given chip includes multiple LDOs, which may increase the size and cost of the circuit. SUMMARY OF THE INVENTION

[0007] Embodiments of the present disclosure relate to methods, devices, and systems for voltage regulation that at least mitigate at least these problems, particularly for LDOs.

[0008] According to one aspect of the present disclosure, a voltage regulator is provided that includes:

[0009] An output stage including: an input node for receiving an input voltage; an output node for outputting an output voltage; and an output device including at least one transistor configured to transfer an output current to the output node based on a drive voltage at a control node;

[0010] A differential amplifier configured to receive a feedback signal derived from the output voltage at a first input, receive a reference voltage at a second input, and generate an amplifier output to control the drive voltage of the output stage to minimize any difference between the feedback signal and the reference voltage; and

[0011] A controller operable to selectively reconfigure the output stage to provide an output current change in response to a load activity signal indicating a change in load activity that results in a change in the load current demand of a load connected to the output node in use.

[0012] In some embodiments, the controller is operable to reconfigure the output stage to provide a change in the drive voltage to provide at least some of the output current change.

[0013] In some embodiments, the voltage regulator includes a digital-to-analog converter (DAC) coupled to the control node such that a change in the DAC output causes a change in the drive voltage, and wherein the controller is configured to control the output of the DAC.

[0014] In some examples, the output stage may include a loop capacitor, a first terminal of the loop capacitor being coupled to the control node and the DAC being coupled to a second terminal of the loop capacitor.

[0015] In some examples, the DAC may include a plurality of DAC capacitors, each DAC capacitor having a first terminal coupled to the control node, and wherein a second terminal of each of the DAC capacitors is selectively connectable to one of at least two defined voltages.

[0016] In some examples, the output stage may include a voltage bias source and a loop capacitor, a first terminal of the loop capacitor being coupled to the output of the differential amplifier. The voltage regulator may be configured such that the first terminal of the loop capacitor is selectively connectable to the control node via a first path bypassing the voltage bias source or a second path including the voltage bias source in series. The controller may be configured to control the connection via the first path or the second path.

[0017] In some examples, the output stage may include a loop capacitor, a first terminal of the loop capacitor being coupled to the control node and one or more current sources for pulling or sinking current from the control node. The controller may be configured to control the one or more current sources to selectively charge or discharge the loop capacitor to provide the change in the drive voltage.

[0018] The controller may operate to selectively control a change in the drive voltage applied in response to a change in load activity based on at least one indication of operating conditions. The operating conditions may include at least one of temperature and input voltage.

[0019] The controller may operate to control the change in the drive voltage for a type of load activity change based on one or more stored control settings predetermined for the type of load activity change. In some examples, the controller may further include a monitor for monitoring the output voltage in response to a change in load activity to determine the extent of any change in the output voltage. The controller may be configured to adapt one or more stored control settings during a plurality of load activity changes so as to minimize the extent of any change in the output voltage. The controller may include a processing module for implementing a learning algorithm to adapt the one or more stored control settings.

[0020] In some embodiments, the controller is additionally or alternatively operable to reconfigure the effective size of the output device to provide at least some of the output current variations. The output device may include a first transistor and at least one additional transistor, the at least one additional transistor being selectively coupled in parallel with the first transistor to vary the size of the output device. The gate terminal of the additional transistor may be coupled to the gate terminal of the first transistor, the source terminal of the additional transistor may be coupled to both the source terminal of the first transistor and the output node, and the drain terminal of the additional transistor may be configured to selectively couple to both the drain terminal of the first transistor and the input node.

[0021] In some embodiments, the controller may operate to reconfigure the output stage to provide a change in the body bias voltage applied to the body terminal of at least one transistor of the output device to provide at least some of the output current variations.

[0022] The voltage regulator may operate to selectively regulate the output voltage to one of a plurality of different voltage magnitudes. The controller may be configured to control the output stage in response to a change in the output voltage magnitude to provide a change in the output current from the output device during a transition period to charge or discharge an output capacitor coupled to the output node. The voltage regulator may be configured to selectively change the output voltage magnitude to provide dynamic voltage scaling for a load connected to the output node in use.

[0023] The voltage regulator may include an output capacitor coupled to the output node, and the output capacitor may be integrated with the voltage regulator in a semiconductor die.

[0024] On the other hand, there is provided a voltage regulator for outputting a regulated output voltage, comprising:

[0025] an amplifier configured to receive a feedback signal indicative of the output voltage and a reference voltage and generate an amplifier output to control an output stage as part of a control loop to maintain the regulated output voltage; and

[0026] a controller capable of operating independently of the control loop to selectively control the output stage to provide a change in the output current in response to a load activity signal indicative of a change in the load current demand.

[0027] On the other hand, there is provided a low dropout voltage regulator for providing a regulated output voltage, comprising:

[0028] An amplifier that controls an output stage in response to a feedback signal indicative of the output voltage to provide an output current that maintains the regulated output voltage;

[0029] A controller that controls the output stage in response to a feedforward signal indicative of a desired load current to provide a change in the output current in response to a change in the load current demand.

[0030] It should be noted that any feature described herein can be implemented in combination with any one or more of the other described features, unless there is a clear indication to the contrary herein or it is otherwise clearly incompatible. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] For a better understanding of the examples of the present disclosure and to more clearly show how these examples can be implemented, reference will now be made, by way of example only, to the following drawings, in which:

[0032] Figure 1 An example of a conventional LDO is shown;

[0033] Figure 2 An exemplary waveform showing the response of a conventional LDO to a large change in load current is shown;

[0034] Figure 3 An example of an LDO according to an embodiment is shown;

[0035] Figure 4 An example of an LDO with a bias source is shown, which can be selectively connected to change the drive voltage;

[0036] Figure 5 Shows Figure 4 An exemplary waveform showing the response of the LDO to a large change in load current;

[0037] Figure 6 An example showing that an LDO including a voltage DAC can be selectively connected to change the drive voltage is shown;

[0038] Figure 7 An example of an LDO in which the loop capacitor is formed as part of the voltage DAC is shown;

[0039] Figure 8 An example of an LDO with a controlled current source for controllably changing the drive voltage is shown;

[0040] Figure 9 Another example of an LDO including a voltage DAC for controllably changing the control voltage of the output transistor is shown;

[0041] Figure 10An example of an LDO is shown in which the effective width of the output device can be controllably varied;

[0042] Figure 11 Another example is shown in which the effective width of the output device can be controllably varied; and

[0043] Figure 12 An example of a suitable controller is shown. Detailed Description

[0044] The following description presents exemplary embodiments in accordance with the present disclosure. Further exemplary embodiments and implementations will be apparent to those of ordinary skill in the art. Additionally, those of ordinary skill in the art will recognize that various equivalent techniques may be applied in lieu of or in combination with the embodiments discussed below, and all such equivalents should be considered to be covered by the present disclosure.

[0045] Embodiments of the present disclosure relate to voltage regulators, and more particularly to LDOs and their operation.

[0046] One problem that can occur with LDOs is the response to relatively large and relatively fast load changes. For example, in some implementations, the load current may exhibit a step change of up to 100:1 or greater.

[0047] As an example, Figure 2 Some exemplary waveforms are shown of an LDO (such as the LDO 100 shown in Figure 1 ) in response to a large step change in the load current. Figure 1 It shows how the load current ILoad, the drive voltage V1, and the output voltage Vout can vary over time.

[0048] Figure 2An example is shown where the load current is initially at a substantially stable level I1 and then, at time t1, the load current significantly increases to a higher level I2. The increase in the load current will discharge the output capacitor 105 until the loop of the LDO responds to meet the increased current demand. To provide the increased current demand, the amplifier 101 will need to charge the capacitor 104 (which will be referred to herein as the loop capacitor) to increase the drive voltage V1, i.e., the gate voltage, such that the transistor 103 conducts the increased current. For stability reasons, there may be a limit to the speed at which the loop dynamics respond to transients at the output, and in some applications, such as for use in battery-powered devices, it may be desirable to keep the power consumption as low as possible, which may limit the driving ability of the amplifier 101. Therefore, for a significant change in the load current, the LDO will need some time to respond and charge the loop capacitor 104 to increase the drive voltage V1 by an appropriate amount. During this time, the significantly increased load current may cause the output voltage Vout to drop by a relatively significant amount.

[0049] For example, by way of example only, the initial load current I1 may be about 10 μA, which increases to a current I2 of about 1 mA at time t2. Assuming the FET 103 operates in weak inversion, the required change in the drive voltage ΔV1 may be about 140 mV or so, and as previously mentioned, the amplifier 101 may take some time to increase the drive voltage V1 by such an amount. During this time, the output voltage Vout may drop by an amount of about 140 mV or so, which may be undesirable in many applications.

[0050] Figure 2 It is also shown that when the current demand is relatively large and rapidly decreases (shown in this example as the load current dropping back from level I2 to I1 at time t2), the gate drive voltage V1 will be driven to a lower value, but the control loop of the LDO also takes some time to respond, and this may cause the output voltage Vout to exhibit a relatively significant overvoltage above the nominal output voltage.

[0051] The change in the output voltage caused by the load variation can be slightly mitigated by using a large capacitance Cout for the output capacitor 105. However, as mentioned above, integrating a sufficiently large capacitance with the LDO circuit on the same semiconductor die may be impractical, and using a separate off-chip capacitor requires additional die connections, which increases the pin count and may also be undesirable.

[0052] In addition, in some embodiments, it may be desirable for a voltage regulator to be selectively adjustable to different output voltages in use. For example, it may be able to dynamically change from regulating to a first output voltage amplitude Voutl to regulating to a different output voltage amplitude Vout2 in use, such as to implement dynamic voltage scaling. In such cases, a large output capacitance may be undesirable in terms of allowing the regulated output voltage to change relatively quickly.

[0053] Embodiments of the present disclosure relate to voltage regulators, particularly LDOs, where the voltage regulator can be selectively controlled to provide an output current change independent of the operation of the normal control loop of the voltage regulator. In other words, the voltage regulator can be controlled to implement an output current change at any time without waiting for the control loop to respond to a change in the load current demand. The output current change can be a relatively significant output current change and can be implemented quickly, such as implemented as an effective step change in the output current. The output current change can be controlled based on a known or expected change in the load current demand. For example, it can be timed such that the output current change occurs substantially simultaneously with the change in the load current demand.

[0054] The load current required by a particular load typically depends on the activity or operating state of the load. For example, the load can include one or more components that may not be used continuously, i.e., one or more components that may be disabled or in an inactive or sleep state for part of the time. The required load current may then depend on whether the component is enabled. In many cases, this requirement may be known to the circuit. By way of example only, the load can include one or more digital processing blocks or modules that can be selectively enabled. The load current of a given processing block may be relatively low when inactive, but when the processing block is enabled, the dynamic power consumption may be large. As another example, a radio transmitter may be in a standby state at least part of the time but will be turned on for data transmission, resulting in an increased current demand. Analog circuits can similarly be enabled only when needed. As another example, the load can include one or more LEDs that are driven at a known current when enabled.

[0055] In embodiments of the present disclosure, the LDO can thus be controlled independently of the normal control loop for regulating the output voltage such that the output current can be rapidly varied based on knowledge of changes in load activity when needed. In view of changes in load activity, the output current of the LDO can thus be controlled at or to a level of output current that is relatively close to that suitable for the new load current demand. Due to the change in load current demand (i.e., based on changes in load activity), this rapid change in output current can thus provide at least some of the desired change in output current. Accordingly, the requirement for the control loop to respond to meet changes in load current demand is reduced or even eliminated in some cases, which can reduce the amount by which the output capacitor is discharged or overcharged and thus reduce the extent of any unnecessary change in output voltage. Additionally or alternatively, reducing the requirement for the control loop to respond to meet significant changes in load current demand can allow the power consumption of amplifier 101 to remain relatively low, thus improving the power demand of the system while maintaining stability within the operating conditions range.

[0056] Figure 3 An example of an embodiment is generally shown. Figure 3 Shows in relation to Figure 1 an LDO similar to the LDO shown in Figure 3 and like parts are shown by the same reference numerals. Also, it should be understood that

[0057] Figure 3 the LDO 300 of

[0058] includes a controller 301 for controlling the LDO to selectively provide a rapid change in output current independently of the control loop of the LDO. The controller 301 is configured to selectively reconfigure the output stage 102 to provide a change in output current, which can be an effective step change in output current.

[0059] The controller 301 responds to a load activity signal ACT that indicates the activity of a related load 302 powered by an output voltage Vout. In at least some applications, at least a portion of the load 302 can be enabled or disabled by a control signal, and the related control signal can thus provide the load activity signal ACT. However, in general, any signal that indicates a change in load activity, which results in a change in load current demand, can be used as the load activity signal.

[0060] The load activity signal ACT can thus provide an indication of the active state or operating mode of the load and can signal the controller 301 when the load's current demand is about to change significantly. When the controller 301 determines that the load current demand is about to change significantly, the controller 301 can selectively reconfigure the output stage 102 via a control signal Scon to provide an appropriate change in output current, which can be an effective step change in the output current.

[0061] The load activity signal ACT can thus be regarded as a feedforward signal indicating a change in load current demand and the controller 301 responds to this signal. The operation of reconfiguring the output stage of the LDO by the controller 301 in response to the load activity signal is carried out independently of the normal control loop of the LDO, i.e., it does not depend on the feedback signal Sfb or the output of the amplifier 101. However, it should be understood that the normal control loop will also continue to operate, and the role of the control loop will be to continue to attempt to maintain the output voltage Vout at the desired level based on the comparison of the feedback signal Sfb with the reference REF.

[0062] Thus, the LDO 300 can be regarded as operable in different operating states, where the controller 301 is operable to control the operating state of the LDO based on the load activity signal. When operating in any given operating state, the control loop of the LDO can remain active, and thus the role of the feedback loop and the amplifier 101 will be to control the drive voltage V1 to keep the feedback signal Sfb equal to the reference voltage REF, thus maintaining the output voltage at the desired level.

[0063] As an example, consider that the load 302 includes a processing module that can be enabled or disabled as needed, and the processing module significantly increases the load current demand when enabled. Initially, the load can operate in a first operating mode with the related processing module disabled, and the controller 301 can control the LDO 300 to operate in a first state. The processing module can be enabled by a control signal such that the load begins to operate in a second operating mode with an increased current demand. This control signal is received by the controller 301 as the load activity signal ACT, and when the control signal enables the processing module, the controller 301 controls the LDO to operate in a second state, which provides a significant increase in output current to meet at least some of the increased current demand.

[0064] In the first or second operating state of the LDO, the control loop of the LDO 300 will continue to operate and will thus respond to any output voltage change from the desired output. Thus, it will be appreciated that each of the first and second states of the LDO 300 is an LDO operating state in which the LDO is enabled and active to provide the output voltage Vout and can thus provide a non-zero output current. It should be noted that for some conventional LDOs, it may be the case that the LDO can be arranged to be disabled or inactive if its associated load is disabled, and thus the LDO can be controlled to be activated only when the load is activated. However, it should be understood that embodiments of the present invention include a controller that is operable to reconfigure the LDO to provide an output current change when the LDO is active. Thus, the controller can selectively control the LDO to adopt a selected operating state among at least two different active operating states.

[0065] As described above, the controller 301 can reconfigure the output stage 102 of the LDO 300 to provide a rapid output current change in a variety of different ways, and in some embodiments, the output stage can be reconfigured to provide a change in the drive voltage V1 (i.e., the gate voltage of the transistor 103) in order to provide at least some of the output current change.

[0066] Figure 4 An example is shown of how the LDO circuit 300 can be reconfigured to provide a rapid drive voltage change. Figure 4 The output stage is shown to include a voltage bias source 401 that can be selectively controlled to contribute to the control voltage V1 at the gate of the transistor 103. In Figure 4 the example, the selector switch 402 is controlled by the controller 301 to selectively connect the voltage bias source 401 in series between the loop capacitor 104 and the gate terminal of the transistor 103, but it should be understood that other arrangements are possible.

[0067] The controller 301 controls the selector switch 402, for example via a switch control signal S1, to provide a first state, as shown in connection A, or a second state, as shown in connection B. In the first state, the capacitor 104 is connected to the gate terminal of the transistor 103 via a first path that bypasses the bias source 401. In this state, the drive voltage V1 at the gate of the transistor 103 is substantially equal to the voltage V C1 maintained by the capacitor 104. In the second state, the loop capacitor 104 is connected to the gate terminal of the transistor 103 via a second path that includes the series-connected bias source 401. In this state, the drive voltage V1 at the gate of the transistor 103 is substantially equal to the voltage V C1in combination with the voltage Vb of the bias source 401.

[0068] The voltage Vb provided by the voltage bias source 401 can be based on the change in the drive voltage required to meet the expected variation in the load current demand. For example, referring back to the Figure 2 discussed example, it can be expected that the load current demand changes from level I1 to level I2 based on a portion of the load being enabled. In this example, where the load current demand I1 is approximately 10 μA and the load current demand I2 is approximately 1 mA, the required voltage change ΔV1 of the drive voltage V1 for providing the required output current change can be approximately 140 mV. In such a case, the bias source 401 can be implemented to provide a bias voltage Vb of approximately 140 mV.

[0069] Figure 5 shows Figure 4 some exemplary waveforms of the LDO 300 shown in

[0070] Figure 5 response to a large step change in the load current. An example of the load activity signal ACT is shown, in which case the load activity signal ACT can take on a high value HI or a low value LO to enable or disable modules of the load, respectively. In this example, the load activity signal is initially at the low value LO while the load current demand ILoad is at a stable first level 11.

[0071] The controller 301 receives the load activity signal and controls the selector switch 402 based on the load activity signal. Before time t1, the controller 301 thus controls the switch 401, for example via the control signal Scon, to provide connection A. Before t1, the LDO can thus be considered to be operating in a first state, in which the loop capacitor 104 is directly connected to the gate terminal of the transistor 103 and the drive voltage V1 is equal to the voltage V C1 maintained by the loop capacitor 104. Due to the operation of the control loop of the LDO, the drive voltage V1 is maintained at a level such that the output transistor 103 provides an output current Iout that matches the load current demand and maintains the output voltage Vout at a regulated level.

[0072] At time t1, the load activity signal goes high and enables the relevant modules of the load. This results in a significant increase in the load current demand to a higher level I2. The load activity signal ACT going high also causes the controller 301 to control the selector switch 401 to switch to connection B, which switches the LDO to a second state, in which the bias source 401 is connected in series between the loop capacitor 104 and the gate terminal of the transistor 103. The voltage V C1Basically remains unchanged, but the additional bias voltage Vb causes a step change in the drive voltage V1 at the gate terminal of the transistor 103. This provides a subsequent step change in the output current Iout.

[0073] If the bias voltage Vb correctly matches the voltage change ΔV1 required for the new current demand, then the output current Iout will correctly match the new current demand and the output voltage Vout will be maintained with no significant change. In this case, the feedback signal will be substantially undisturbed. In practice, the bias voltage may not exactly match the required voltage change, and there may be some mismatch between the output current and the current demand immediately after the LDO changes state. Additionally or alternatively, propagation delays, etc. may cause some minor timing mismatch between the change in the load current demand and the output current.

[0074] Any such mismatch in the output current and the load current demand may cause some change in the output voltage Vout. However, compared with the Figure 2 example, the magnitude and / or duration of any such mismatch in the output current and the load current demand may be significantly reduced, and the operation of the feedback loop may thus be able to maintain the output voltage within an acceptable limit of the desired output voltage.

[0075] Figure 5 It is also shown that at time t2, the load activity signal ACT may go low to disable the relevant components of the load, thereby subsequently reducing the load current demand. The controller 301 then controls the selection switch 402 back to connection A, such that the LDO switches back to the first state. The contribution of the bias voltage Vb will thus be removed and the drive voltage V1 will return to the level V of the capacitor 104 C1 , thereby subsequently reducing the output current.

[0076] Figure 6 Another example is shown of how the LDO circuit 300 can be reconfigured to provide a rapid change in the drive voltage V1. In this example, the first terminal of the loop capacitor 104 is coupled to the control node of the drive voltage V1 and the second terminal of the loop capacitor is coupled to a variable voltage, in this case the voltage provided by a voltage DAC (Digital - to - Analog Converter) 601.

[0077] In use, the controller 301 controls the DAC 601 to control the voltage at the second terminal of the loop capacitor 104. The operating state of the output stage 102 of the LDO 300 can be changed by the controller 301 by selectively changing the DAC voltage (e.g., by providing a suitable input to the DAC via the control signal Scon).

[0078] In use, for a relatively stable load current demand, the LDO can operate in one state with a given selected DAC output voltage (in some embodiments, the DAC output voltage can be selected as zero in one state). In steady-state operation, the control loop will operate to maintain the drive voltage V1 at a level that provides an appropriate output current to maintain the output voltage Vout at a regulated level. The loop capacitor 104 will thus be charged to the capacitor voltage V C1 . When the controller 301 determines that there is a significant change in the load current demand based on the load activity signal ACT, the controller 301 can control the DAC 601 to change the DAC output voltage by the desired amount. This change in the DAC output voltage at the second terminal of the loop capacitor 104 will result in a corresponding change at the first terminal, and thus will result in a change in the drive voltage V1. The change in the DAC output voltage can be controlled to correspond to the expected change in the drive voltage V1 required for the expected load current demand.

[0079] For example, referring to the example discussed in Figure 5 , but now considering the operation of the embodiment of Figure 6 , when the load activity signal ACT changes at time t1, Figure 6 the controller 301 of the embodiment of

[0080] can control the voltage DAC 601 such that the output voltage increases by an amount ΔV1 sufficient to provide the expected load current. For the specific example discussed above, the output of the DAC 601 can thus increase by about 140 mV at time t1.

[0081] Additionally or alternatively, the use of the DAC may allow adjustment of the amount of change in the drive voltage, such as calibration to a voltage change suitable for a given change in load activity and / or accounting for any change in operating conditions. Thus, the use of the DAC may allow adjustment of the change in the drive voltage to account for PVT (process-voltage-temperature) variations, etc. The relevant DAC control settings required for a given load activity pattern or operating condition may be determined during a learning process, which in some cases may be implemented by the controller 301 by machine learning or a suitable learning algorithm, as will be discussed in more detail below.

[0082] Figure 6 It is shown that the DAC may be coupled to a loop capacitor. In some embodiments, the loop capacitor 104 may effectively be provided as part of the DAC, as Figure 7 shown.

[0083] Figure 7 An example of an LDO in which the output stage includes a DAC 701 is shown, the DAC including a plurality of DAC capacitors 702a - 702d (which may be referred to individually or collectively by the reference numeral 702). The DAC capacitors 702 may have different capacitance values, and in Figure 7 the example there are four DAC capacitors 702 with binary weighted capacitances, but it should be understood that other examples may use different numbers of capacitors and / or different weightings. In this example, the first terminal of each DAC capacitor 702 is coupled to a control node of the drive voltage, and the second terminal of each capacitor may be selectively connected to either of at least two defined voltages, which in this case are ground and a non-zero voltage Va. In some cases, these two voltages may be the ground voltage and a fixed supply voltage. The controller 301 selectively controls which of the DAC capacitors are connected to ground and which are connected to the defined voltage Va, and may change the drive voltage V1 by switching the configuration of the capacitors connected to ground or the bias voltage.

[0084] For example, if the second terminals of all capacitors 702a - 702d are initially connected to ground, then in steady - state operation, all capacitors will be charged to the same voltage (which will be equal to the current value of the drive voltage V1). If all capacitors are switched simultaneously to alternatively connect their second terminals to a defined voltage Va, the voltage across each capacitor will remain the same, and the voltage at the first terminal will increase by an amount equal to the defined voltage, which will thus increase the drive voltage V1 by an amount equal to Va. However, if only some of the capacitors 702 are connected to the defined voltage Va while the remaining capacitors remain connected to ground, this will cause a charge redistribution to equalize the voltage at the first terminals of all capacitors. The result will be that the drive voltage V1 increases by a certain fraction of the defined voltage Va, where the fraction corresponds to the fraction of the total capacitance switched to be connected to the defined voltage Va.

[0085] Thus, the DAC capacitors 702a - 702d form part of the DAC 701, but also provide the functionality of the loop capacitor in maintaining the drive voltage during operation in any given state.

[0086] Figure 8 Another example of an LDO according to an embodiment is shown, where the controller 301 controls the change in the drive voltage V1 by controlling at least one current source 801 to pull or sink current from the control node. In effect, current is injected or removed to charge or discharge the loop capacitor 104 independently of the control loop in order to change the drive voltage V1 at the control node.

[0087] Thus, Figure 8 The output stage 102 of the LDO is shown to include two current sources in this example: a first current source 801p for charging the loop capacitor 104 and a second current source 801n for discharging the loop capacitor 104. If the load activity signal ACT indicates that the load current demand will increase significantly, the controller 301 can thus activate the current source 801p to supply a defined current and increase the drive voltage V1, while if the load activity signal ACT indicates that the load current demand will decrease significantly, the controller 301 can activate the current source 801n to sink a defined current and decrease the drive voltage V1. The change in the control voltage V1 will depend on the value of the defined current and the duration for which the defined current is supplied. In some embodiments, the magnitude of the defined current can be fixed and the controller 301 can control the duration for which the defined current is applied, i.e., the period for which the associated current source is active, to control the extent of the voltage change. However, in some embodiments, each current source can be a variable current source and the controller 301 can be arranged to control the magnitude of the defined current additionally or alternatively.

[0088] Using a current source would mean that the drive voltage would ramp up or down during the period in which the current is applied. The magnitude of the defined current can be relatively high such that the time required to change the drive voltage V1 based on load activity changes is relatively short. Generally, the period during which the current is applied should be short enough to avoid any unwanted interference or significant interference with the output voltage. The magnitude of the defined current can be set based on the capacitance of the loop capacitor 104 and the expected maximum change in the drive voltage in use, such that the maximum voltage change can be provided within a certain maximum duration. It should be understood that in this embodiment, the current sources 801p and 801n are only activated when a rapid change in the control voltage V1 needs to be provided. Thus, the LDO 300 can operate in a first state with the current sources deactivated until the load activity signal ACT indicates a significant change in the load current demand. At that time, the controller 301 can switch to a second operating state and activate the relevant current sources for an appropriate period to provide the desired change in the control voltage. After the appropriate period, the current sources will be deactivated, and the LDO will return to the first operating state, but the drive voltage is set to a new operating point.

[0089] In the embodiment discussed above, the controller 301 can thus operate to reconfigure the output stage of the LDO to provide a rapid change in the drive voltage V1. Additionally or alternatively, in some embodiments, the configuration or operation of the output device (i.e., the output transistor) can be varied to change the output current for a given drive voltage.

[0090] Figure 9 An embodiment of an LDO including a variable voltage source is shown, in this case the variable voltage source being a DAC 901, which is operated by the controller 301 to selectively control the control voltage Vblk in response to the load activity signal. In Figure 9 the embodiment, the voltage Vblk from the DAC 901 is not used to modulate the drive voltage V1, but is applied to change the operation of the output device and, in this case, is applied as a bias voltage to the body terminal of the output transistor 103 to change conduction and thus change the output current for a given drive voltage V1.

[0091] Figure 10 An embodiment is shown in which the output stage can be reconfigured to provide an output device of variable size. Those skilled in the art will understand that the current conducted by a MOS transistor (i.e., the drain-source current) depends on and is proportional to the physical width of the transistor (i.e., the width of the channel region). Thus, changing the effective width of the output transistor can change the output current for a given drive voltage.

[0092] In Figure 10In the example of, the output stage 102 includes a first transistor 103a and a second transistor 103b, both of which are coupled to an input voltage and each is configured to receive a drive voltage V1 as a gate voltage. The first transistor 103a and the second transistor 103b thus jointly provide an output device. The second transistor 103b can be selectively coupled in parallel with the first transistor 103a, in this example through a switch 1001 on the source side of the transistor 103b. In use, with the switch 1001 open, the first transistor 103a provides all of the output current and outputs a specific current for a given drive voltage V1. If the switch 1001 is closed, the second transistor 103b will also contribute to the output current. The sizes of the transistors 103a and 103b can be designed to give a desired change in the output current. For example, if the width of the first transistor 103a is W and the width of the second transistor 103b is equal to 99*W, then for a given drive voltage V1, when the second transistor 103b is enabled, the output current will increase by 100 times.

[0093] The first transistor 103a and the second transistor 103b can thus be implemented with respective widths selected for an expected variation in the load current demand for a particular application (e.g., the expected load current demand when the modules of the load are respectively disabled / inactive or enabled / active). The controller 301 can control the switch 1001 to enable the second transistor 103b in response to a load activity signal ACT indicating a significant increase in the load current demand (e.g., indicating that the module of the load is enabled). Enabling the second transistor 103b will increase the total output current for the current drive voltage V1. In a similar manner as described above, if the increased output current correctly matches the load current demand, the output voltage Vout will remain unchanged and there may be no significant perturbation to the control loop of the LDO. In the case of any mismatch between the output current and the load current demand, the control loop will operate to maintain the output voltage Vout and will reach a new correct operating point faster than in other cases (where the width of the output device does not change). If later the load activity signal ACT indicates that the load current demand will significantly decrease, e.g., the load module is disabled, the controller 301 can control the switch 901 to stop the second transistor 103b from contributing to the output current, thus providing a reduced output current for a given drive voltage V1.

[0094] Figure 11 Another example is shown in which the output stage can be reconfigured to provide an output device of variable size. Figure 11 The LDO of also has a first transistor 103a and a second transistor 103b that receive the same drive voltage V1, and in which the second transistor 103b can be selectively coupled to contribute to the output current. However, in Figure 11In the example of, the second transistor 103b is selected by, for example, turning on the drain side by means of the control switch 1101.

[0095] Closing the switch 1101 changes the effective size of the output device, where the second transistor contributes to the output current in a similar manner as discussed with respect to Figure 10 the output current is contributed in a similar way.

[0096] However, additionally, closing the switch 1101 adds the gate-drain capacitance of the second transistor 103b to the gate-drain capacitance of the first transistor 103a. As will be understood by those skilled in the art, there will be parasitic gate-drain capacitances associated with each of the first transistor 103a and the second transistor 103b, as Figure 11 shown by the capacitances cpa and cpb in. When the switch 1101 is open, the capacitance between the control node and the input voltage is caused only by the capacitance cpa of the first transistor. Closing the switch 1001 increases the capacitance cpb, which increases the effective capacitance, and the resulting charge redistribution will tend to raise the voltage on the loop capacitor 104 and thus also raise the drive voltage V1. Charging the drain-gate capacitance cpb of the second transistor 103b adds charge to the shared gate signal, thereby boosting the drive voltage. Thus, selectively switching the output transistor 103b on the drain side can not only provide a change in the effective size of the output device (i.e., the total width of the output transistor), which provides a greater output current for a given drive voltage, but the switching can also provide a change in the drive voltage V1.

[0097] It should be understood that Figure 10 and Figure 11 the first transistor 103a and the second transistor 103b are shown as being selectable to change the effective size of the output device between two values, but in some embodiments, the output device may include one or more additional selectable transistors in order to provide more than two different selectable effective widths. It should also be understood that although discussed as separate transistors, in some embodiments, the first and second transistors may be implemented together as part of a segmented variable-width device.

[0098] It should also be understood that any of these techniques for controllably changing the output current can be implemented in combination. Thus, for example, reconfiguring the output device (to provide an output current change for a given drive voltage) can be implemented in conjunction with a controlled change in the drive voltage in order to provide a desired output current change for a given change in load activity. For example, an LDO may have a variable-size output device such as Figure 10 shown, as well as a controllable DAC for applying a controlled change to the drive voltage, such as Figure 6as shown in FIGS. 6 or 7. The controller can be configured to controllably vary one or both of the size of the output device and the voltage output by the DAC to provide a desired output current change. Changing the size of the output device as well as using the DAC to change the drive voltage can reduce the required output range of the DAC to provide the desired output current change compared to using the DAC alone to change the drive voltage. Similarly, using the DAC to change the drive voltage can reduce the need for output device size changes to provide all of the changes in output current. In some embodiments, the device size change can provide a relatively large output current change, while the DAC can have a relatively fine output resolution to allow the change in output current to be controlled to a relatively fine degree. Thus, the device size change can allow for coarse control of the output current, and the DAC can be controlled to provide fine control.

[0099] As described above, using a DAC to provide a controllably variable voltage change to provide an output current change (such as those discussed with respect to the examples of FIGS. Figure 6 , Figure 7 and Figure 9 (whether implemented with an output device of variable size or not)) can be advantageous in allowing adjustment or calibration to correctly match the output current change with a given load activity change and / or account for operating conditions such as temperature. Similarly, the variable duration (and / or defined current amplitude) of the examples of FIGS. Figure 8 will also allow adjustment of the resulting voltage change and thus the output current change.

[0100] The controller 301 can thus control the LDO based on one or more stored control settings for a given load activity change, where the settings have been previously determined. For example, for an example such as that discussed with reference to FIGS. Figure 6 or Figure 7 where the controller 301 controls the DAC, the relevant DAC code (i.e., the control input to the DAC) can be determined as part of an initial learning process. An initial learning process can be implemented to learn the correct waveform of the DAC output as a function of the load activity change.

[0101] In some cases, the DAC code or settings for a given load activity change can be determined by simulation or testing. For example, for a given application, a series of simulated load activity changes can be performed, varying operating conditions such as temperature and voltage, simulating various process variations, and typical mismatches of DAC elements. By analyzing the simulation, the optimal DAC code that minimizes the overall output voltage change (e.g., output voltage ripple) across a range of devices can be determined. In use, when the load activity signal indicates the relevant load activity change, the controller can then control the DAC according to the predetermined DAC code.

[0102] In some examples, the relevant DAC code can be determined as the optimal code across a range of different expected operating conditions. However, in some examples, as described above, the controller can be arranged to consider one or more operating conditions and can thus selectively change control settings, such as the DAC code for a given load activity change based on an indication of an operating condition such as temperature or voltage.

[0103] Figure 12 An example of a controller 301 operable to consider operating conditions is shown. The controller 301 in this example includes a processing module 1201 configured to receive a load activity signal ACT. In some applications, the load activity signal ACT may be just a two-level logic signal of a component for enabling or disabling the load, which will result in a significant change in the load current demand. In such a case, the controller 301 can respond to any change in the load activity signal. However, in some embodiments, the load activity signal may be more complex and can, for example, indicate the operating states of multiple different components of the load and / or indicate multiple different possible changes in the load current demand. If needed, the processing module 1201 can apply some analysis to the load activity signal ACT to detect any load activity change that will result in a significant change in the load current and / or identify the type of load activity change.

[0104] The processing module 1201 can also receive at least one indication of an operating condition (such as temperature and / or supply voltage, e.g., a signal PVT from a PVT module (not shown)). In the case of detecting any change in the load activity, the processing module can retrieve some stored control settings, such as a DAC code, from a memory 1202 that can be implemented as a look-up table or the like, and generate an appropriate control signal Scon. Additionally or alternatively, the controller 301 can include some circuitry (not shown) for providing an indication of a change in an operating condition such as temperature or supply voltage. For example, a ring oscillator can be provided, where the drive strength of the ring elements (e.g., inverters) is based on the supply voltage. The oscillation frequency will depend on the supply voltage as well as process factors and conditions such as temperature, so the frequency of the oscillator can be monitored using a counter, for example, to provide an indication of the operating condition.

[0105] Additionally or alternatively, in some embodiments, the controller 301 can be implemented to be self-calibrating. In some examples, the controller can thus be operable to apply learning techniques (e.g., machine learning) to control the operation of the LDO, particularly to determine the correct control setting change for a given load activity change to minimize unwanted output voltage changes.

[0106] Therefore, Figure 12It is shown that the controller 301 includes a monitor 1203 for monitoring the output voltage after a change in load activity. The monitor 1203 can thus be configured to receive a version of the output voltage or a feedback signal Sfb or some other signal indication of the output voltage. The monitor can be configured to monitor the extent of any unwanted output voltage change after a change in load activity. The monitor 1203 can, for example, determine the magnitude of any voltage ripple after a change in load activity.

[0107] The processing module 1201 can receive an indication from the monitor 1203 of the extent of any unwanted output voltage change (e.g., ripple), and apply a learning or optimization process to optimize the control settings, such as the DAC code used, to minimize the unwanted output voltage change.

[0108] For example, the DAC code for a given event (i.e., a given change in load activity) can be optimized by recording the extent of any ripple and adjusting the DAC code when the next event of the same type occurs. A simple scheme (which can be regarded as a kind of hill-climbing algorithm) can take the previously used DAC code and change the DAC code so as to, for example, slightly increase or decrease the output voltage by changing the DAC code by one least significant bit (LSB). The ripple generated using the changed code is compared with the previous ripple. If the ripple is improved, the code can be gradually changed in the same way, i.e., by increasing or decreasing again, until no further improvement is obtained. However, it should be understood that more complex algorithms are possible and / or various machine learning methods can be used to learn the optimal control settings as a function of the change in load activity, and using a learning algorithm or machine learning to optimize the control of the LDO represents a novel aspect of the present disclosure.

[0109] It should be understood that any overvoltage period (i.e., the situation where the magnitude of the LDO output voltage is higher than the nominal magnitude of the regulated voltage) may be undesirable in terms of power efficiency. However, any undervoltage period (i.e., the situation where the magnitude of the LDO output voltage is lower than the nominal magnitude of the regulated voltage) may also be undesirable because it may affect the correct operation of the load and may, in some cases, cause a reset of at least some parts of the load or the wider system. In some cases, the optimal control setting may be a setting that minimizes the overvoltage extent but without the risk of undervoltage.

[0110] Therefore, embodiments of the present disclosure relate to voltage regulators, particularly LDOs, which monitor load activity to determine when the load current demand will change significantly and respond to the detection of such an expected change in load current demand independently of the normal control loop. Thus, the LDO can have a controller that operates independently of the control loop to provide an output current change that meets at least some of the new load current demands.

[0111] It should be noted that the controller operates independently of the control loop because the response of the controller is not determined by the control loop or as part of the control loop. Instead, the controller responds to a separate load activity signal. To avoid ambiguity, it should be understood that the control loop will continue to function and, in some embodiments, the controller can affect the output current variation by modulating the drive voltage within the control loop. It should also be understood that the control loop itself also responds to any output voltage variation caused by the changing load current demand.

[0112] By monitoring the load activity to detect or predict changes in the load current demand and controlling the LDO to provide an output current variation that substantially matches the new current demand, the amount of unwanted voltage variation at the output can be significantly reduced. As a result, the need for a large value of the output capacitor can be reduced, thereby allowing the output capacitor to be easily integrated with the LDO on the same die without being too large.

[0113] Embodiments can also be advantageously used to provide a voltage regulator, particularly an LDO, where the value of the regulated output voltage can be controllably varied in use. In some applications, it may be advantageous for the LDO to be able to output a variable voltage, for example, operable to selectively regulate the output voltage to one of a plurality of different possible voltage magnitudes. For example, one possible application is to allow dynamic voltage scaling (DVS) for a load including digital processing circuitry (e.g., computing elements). In the DVS operating mode, the voltage supply to the computing elements is adjusted in response to the amount of computation to be performed, i.e., the higher the voltage, the faster the operation and the more computations can be performed.

[0114] The regulated output voltage of the LDO can be controlled by controlling the reference voltage REF. If the magnitude of the reference voltage REF changes, the control loop of the LDO will operate to reduce the difference between the feedback signal Sfb and the new reference voltage, and thus will drive the output voltage to a new level related to the new reference voltage.

[0115] Conventionally, this would require the control loop to increase or decrease the output current until the output capacitor 105 has been charged or discharged to the new regulated output voltage level. If the value of the output capacitor 105 is large, for example, in the case where a conventional LDO mitigates the effects of load current demand changes, it may take some time to change the output voltage to the new regulated level. Embodiments of the present disclosure can allow the use of a smaller output capacitor than otherwise, which means that the output voltage can be changed to the new regulated output level more quickly.

[0116] In some embodiments, the controller 301 may additionally be operable to provide an output current change to assist in changing the regulated output voltage. Thus, if the regulated output voltage increases, the controller can be configured to control the output stage of the LDO to provide an increased output current to charge the output capacitor to the new output value more quickly by increasing the magnitude of the reference voltage REF. Similarly, if the regulated output voltage decreases, the controller can be configured to control the output stage of the LDO to provide an increased output current to discharge the output capacitor to the new output value more quickly.

[0117] In some cases, a change in the regulated output voltage value of the LDO may be implemented due to a change in load activity and may thus occur simultaneously with or approximately simultaneously with the expected current change in the load current demand. In such cases, the controller can control the output stage of the LDO to provide an output current change that at least partially meets the new current demand as discussed above. This can reduce the time taken to charge or discharge the output capacitor 105 to reach the new regulated voltage level. However, in some cases, the controller 301 can operate to control the output current to vary over time.

[0118] For example, consider an LDO initially operating in a relatively stable state with the reference voltage REF at a first reference magnitude to regulate the output voltage to a first output magnitude, and with the initial load current demand at level I1. Then the operating mode of the load changes, which requires the output voltage to have a second, higher output magnitude, and where the load current demand will be at a higher level I2. In response to the mode change, the value of the reference voltage can be changed to a second, higher reference magnitude corresponding to the required second output voltage magnitude. In some cases, the controller 301 can be configured to control the associated reference voltage magnitude in response to a load activity signal, as Figure 3 shown.

[0119] The controller 301 also controls the output stage to provide an increased output current and controls the output stage to vary the output current over time. The controller can thus control the output stage during the transition period to provide a first increased output current to meet the new load demand and also charge the output capacitor, for example for Figure 6 or Figure 7In an embodiment, the controller can control the DAC to increase the DAC output voltage to a first increased level during a transition period. The output current during such a transition can be greater than the load current demand I2 to help charge the output capacitor 105. After the transition period, the controller 301 then controls the output stage of the LDO to reduce the output current, but to a level that still increases above the original output current before the load activity change. Ideally, the output current should be set to a level equal to or close to the load current demand I2 such that the output current of the LDO meets the new load current demand. Thus, the operation of the controller provides at least some of the desired changes in the output voltage and the load current, and can significantly reduce the time required for the LDO to operate at the new voltage level compared to the response of the control loop alone.

[0120] To reduce the output voltage and the load current demand, the controller can operate in a similar manner to reduce the output current to a low level for a period of time to help discharge the output capacitor, and then control the LDO to provide an output current that matches the new current demand.

[0121] The various control settings applied during and after the transition period and / or the duration of the transition period can be predetermined and stored in a suitable memory and / or can be adjusted or calibrated in a manner similar to that discussed above through a learning process or machine learning.

[0122] The embodiment can be implemented as an integrated circuit. The embodiment can be implemented in a host device, especially a portable and / or battery-powered host device (such as a mobile computing device (e.g., a laptop computer, notebook, or tablet computer), a gaming console, a remote control device, a home automation controller including a home temperature or lighting control system or a household appliance, a toy, a machine such as a robot, an audio player, a video player, or a mobile phone (e.g., a smart phone)). The device can be a wearable device, such as a smart watch. It should be understood that the embodiment can be implemented as part of a system provided in a household appliance or a vehicle or an interactive display. The voltage regulator can be part of a power supply, which can be a power supply for at least one processing or computing element that can be enabled and disabled as needed, but it should be understood that the voltage regulator can be used to power other circuits. A host device incorporating the above embodiment is also provided.

[0123] Those skilled in the art will recognize that some aspects of the above-described apparatus and methods (such as the learning method) can be embodied as processor control code located, for example, on a non-volatile carrier medium (such as a magnetic disk, CD-ROM, or DVD-ROM, a programmed memory (such as a read-only memory (firmware))) or on a data carrier (such as an optical or electrical signal carrier). For many applications, the implementation will be on a DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), or FPGA (Field Programmable Gate Array). Thus, the code can include conventional program code or microcode, or (for example) code for setting or controlling an ASIC or FPGA. The code can also include code for dynamically configuring a reconfigurable device (such as a reprogrammable logic gate array). Similarly, the code can include code for a hardware description language (such as Verilog TM or VHDL (Very High Speed Integrated Circuit Hardware Description Language)).

[0124] Those skilled in the art should understand that the code can be distributed among multiple coupled components that communicate with each other. In appropriate cases, code that runs on a field-programmable (re)programmable analog array or similar device to configure analog hardware can also be used to implement the described embodiments.

[0125] It should be noted that the above-described embodiments illustrate rather than limit the invention, and those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps other than those listed in the claims, "a" or "an" does not exclude a plurality, and a single feature or other unit can perform the functions of several units recited in the claims. Any reference signs or labels in the claims should not be construed as limiting their scope.

Claims

1. A voltage regulator, which comprises: an output stage, the output stage comprising: an input node for receiving an input voltage; an output node for outputting an output voltage; and an output device comprising at least one transistor configured to transfer an output current to the output node based on a drive voltage at a control node; a differential amplifier configured in a control loop for the output stage to receive a feedback signal derived from the output voltage at a first input, receive a reference voltage at a second input, and generate an amplifier output to control the drive voltage of the output stage to minimize any difference between the feedback signal and the reference voltage; and a controller operable to selectively reconfigure the output stage to provide an output current change in response to a load activity signal indicative of a change in load activity that causes a change in the load current demand of a load connected to the output node in use, wherein the reconfiguration of the output stage results in a current change independent of the operation of the control loop such that a given value of the amplifier output will produce different values of the output current before and after the reconfiguration of the output stage.

2. The voltage regulator according to claim 1, wherein the controller is operable to reconfigure the output stage to provide a change in the drive voltage so as to provide at least some of the output current change.

3. The voltage regulator according to claim 2, comprising a digital-to-analog converter DAC coupled to the control node such that a change in the DAC output causes a change in the drive voltage, and wherein the controller is configured to control the output of the DAC.

4. The voltage regulator according to claim 3, wherein the output stage comprises a loop capacitor, a first terminal of the loop capacitor being coupled to the control node and the DAC being coupled to a second terminal of the loop capacitor.

5. The voltage regulator according to claim 3, wherein the DAC comprises a plurality of DAC capacitors, each DAC capacitor having a first terminal coupled to the control node, and wherein a second terminal of each of the DAC capacitors is selectively connectable to one of at least two defined voltages.

6. The voltage regulator according to claim 2, wherein the output stage comprises a loop capacitor, a first terminal of the loop capacitor being coupled to the output of the differential amplifier and a voltage bias source, and the voltage regulator being configured such that the first terminal of the loop capacitor is selectively connectable to the control node via a first path bypassing the voltage bias source or a second path including the voltage bias source in series, and wherein the controller is configured to control the connection via the first path or the second path.

7. The voltage regulator according to claim 2, wherein the output stage includes a loop capacitor, a first terminal of the loop capacitor being coupled to the control node and one or more current sources for pulling or sinking current from the control node, and wherein the controller is configured to control the one or more current sources to selectively charge or discharge the loop capacitor to provide the change in the drive voltage.

8. The voltage regulator according to any one of claims 2 to 7, wherein the controller is operable to selectively control the change in the drive voltage applied in response to a change in load activity based on at least one indication of operating conditions.

9. The voltage regulator according to claim 8, wherein the operating conditions include at least one of temperature and input voltage.

10. The voltage regulator according to any one of claims 2 to 7, wherein the controller is operable to control the change in the drive voltage for a type of load activity change based on one or more stored control settings predetermined for the type of load activity change.

11. The voltage regulator according to claim 10, wherein the controller further includes a monitor for monitoring the output voltage in response to a change in load activity to determine the extent of any change in the output voltage, and wherein the controller is configured to adapt the one or more stored control settings during a plurality of load activity changes so as to minimize the extent of any change in the output voltage.

12. The voltage regulator according to claim 11, wherein the controller includes a processing module for implementing a learning algorithm to adapt the one or more stored control settings.

13. The voltage regulator according to any one of claims 1 to 7, wherein the controller is operable to reconfigure the effective size of the output device to provide at least some of the change in the output current.

14. The voltage regulator according to claim 13, wherein the output device includes a first transistor and at least one additional transistor, the at least one additional transistor being selectively coupled in parallel with the first transistor to change the size of the output device.

15. The voltage regulator according to claim 14, wherein a gate terminal of the additional transistor is coupled to a gate terminal of the first transistor, a source terminal of the additional transistor is coupled to both a source terminal of the first transistor and the output node, and wherein a drain terminal of the additional transistor is configured to be selectively coupled to both a drain terminal of the first transistor and the input node.

16. The voltage regulator according to any one of claims 1 to 7, wherein the controller is operable to reconfigure the output stage to provide a change in the body bias voltage applied to a body terminal of at least one transistor of the output device to provide at least some of the change in the output current.

17. The voltage regulator according to any one of claims 1 to 7, wherein the voltage regulator is operable to selectively regulate the output voltage to one of a plurality of different voltage amplitudes, and wherein the controller is configured to control the output stage in response to a change in the output voltage amplitude to provide a change in the output current from the output device within a transition period to charge or discharge an output capacitor coupled to the output node.

18. The voltage regulator according to claim 17, wherein the voltage regulator is configured to selectively change the output voltage amplitude to provide dynamic voltage scaling for a load connected to the output node in use.

19. The voltage regulator according to any one of claims 1 to 7, comprising an output capacitor coupled to the output node, wherein the output capacitor is integrated with the voltage regulator in a semiconductor die.

20. A voltage regulator for outputting a regulated output voltage, which comprises: an amplifier configured to receive a feedback signal indicative of the output voltage and a reference voltage and generate an amplifier output to control an output stage as part of a control loop to maintain the regulated output voltage; and a controller capable of operating independently of the control loop to selectively control the output stage to provide a change in the output current without any change in the amplifier output in response to a load activity signal indicative of a change in the load current demand.

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