Softwareized Signal Processing System and Method for Phased Array Radar Based on Multi-Core CPU

Abstract

The present invention discloses a phased array radar software-based signal processing system and method based on a multi-core CPU. The system includes: a data acquisition module that uses a multi-threaded ping-pong structure to transfer data to the server memory; a shared memory communication module that opens a buffer area to form a producer-consumer structure, disassembles the data according to the radar data source frame format, and converts it into a radar data structure; a signal processing module that obtains three beams, namely the sum beam, the azimuth difference beam, and the elevation difference beam, through beamforming processing, and acquires the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, and RCS information of the target. The multi-core parallel method is adopted to perform parallel processing on different beams and algorithm units within each beam; a track display module that receives the track information sent by the signal processing through TCP and displays it on the upper computer interface. The present invention is applicable to radar working modes with different data volumes and has the characteristics of softwareization, modularization, flexibility, controllability, and easy expansion.

Description

Technical Field

[0001] The present invention belongs to the field of radar signal processing, and particularly relates to a phased array radar software signal processing system and method based on a multi-core CPU. Background Art

[0002] Multi-beam phased array radars usually have multiple working modes. Due to differences in working frequency, sampling points, etc., the executed algorithm processing is different. The conventional FPGA+DSP architecture signal processing system has low reuse rate, is prone to resource waste, and it is difficult to guarantee real-time performance when the data volume is too large. At present, the signal processing platform based on a general-purpose processor provides developers with rich software and hardware resources and a debugging environment. It has the advantages of good versatility, scalability, and upgradeability, and has powerful computing capabilities, meeting multi-task processing and providing the possibility for the realization of a multi-functional mode radar system. Developing a software radar signal processing system based on a general-purpose processor that meets real-time performance, scalability, upgradeability, and reconfigurability has a very strong application background and urgent practical needs. Currently, mainstream CPUs generally have 2 to 8 processing cores, and server-level CPUs even have dozens of processing cores, providing a good platform guarantee for parallel computing. OpenMP is a parallel programming language for a thread-level shared memory architecture, and its underlying architecture can be uniform memory access or non-uniform memory access of shared memory, used to write portable multi-threaded parallel applications, and has an obvious effect on accelerating multi-core CPUs. Summary of the Invention

[0003] The purpose of the present invention is to provide a phased array radar software signal processing system and method based on a multi-core CPU.

[0004] The technical solution to achieve the purpose of the present invention is as follows: In the first aspect, the present invention provides a phased array radar signal processing system based on a multi-core CPU, including a data acquisition module, a shared memory communication module, a signal processing module, and a track display module;

[0005] The data acquisition module is used to transfer the data of the data acquisition card to the server memory in a multi-threaded ping-pong structure through a driver program;

[0006] The shared memory communication module is used to open a buffer area to form a producer-consumer structure, disassemble the data according to the radar data source frame format, and convert it into a radar data structure and send it to signal processing;

[0007] The signal processing module is used to perform beamforming, pulse compression, moving target indication, moving target detection, constant false alarm rate processing, clutter map processing, target aggregation, azimuth angle measurement, elevation angle measurement, and obtain the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, and RCS information of the target;

[0008] The track display module is used to receive the track information sent by the signal processing through TCP and display it on the upper computer interface.

[0009] In a second aspect, the present invention provides a phased array radar signal processing method based on a multi-core CPU, including the following steps:

[0010] Step 1, after the radar is turned on, the operator pre-sets the signal processing parameters in the configuration file, and starts the radar, data acquisition module, shared memory communication module, signal processing module, and track display module;

[0011] Step 2, the data acquisition module collects a packet of data into the CPU memory every other CPI through the driver;

[0012] Step 3, the shared memory communication module parses the received CPI data packet, checks whether the buffer areas buffer[0]-buffer[4] are all full, and if an unused buffer area is found, the data is stored in this buffer area, otherwise it checks again after sleeping for a period of time;

[0013] Step 4, the signal processing module has three parallel threads. When the program starts, the data receiving thread is triggered to check whether there is a buffer area with data in buffer[0]-buffer[4]. If found, the signal processing thread is triggered to send the data to the signal processing thread for signal processing. If not found, it checks again after sleeping for a period of time;

[0014] Step 5, after receiving the data, the signal processing thread in the signal processing module calls the signal processing dynamic library according to the parameters passed in by the configuration file and the radar status information in the data packet to perform a process of processing, obtains the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, and RCS information of the target, and sends the track information structure to the packet assembly and track sending thread;

[0015] Step 6, after receiving the track structure, the packet assembly and track sending thread in the signal processing module assembles the packet according to the communication protocol with the track display module, and then sends the track packet to the track display module through TCP network port communication;

[0016] Step 7, after receiving the TCP data, the track display module parses it and sends the track information to the upper computer interface for dynamic display.

[0017] In a third aspect, the present invention provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the method described in the second aspect when executing the program.

[0018] Compared with the prior art, the significant advantages of the present invention are as follows: (1) The present invention is applicable to radar working modes with different data volumes. The size of the opened memory and the number of threads can be adjusted according to the working mode, and it has the characteristics of softwareization, modularization, flexibility, controllability, and easy expansion; (2) The shared memory communication module of the present invention realizes inter-process communication by using the shared memory on Linux, synchronizes with the signal processing module, and is decoupled from each other, improving the processing efficiency of the system; (3) The signal processing module of the present invention realizes parallel processing of data fetching threads, signal processing threads, and tracklet packet sending threads by using a CPU thread pool; (4) In the signal processing algorithm of the signal processing module of the present invention, on the basis of parallel processing of three beams by a multi-core CPU, OpenMP is nested to start multiple threads to perform parallel acceleration on the signal processing algorithm within each beam; Different implementation methods of the OpenMP thread pool by the GCC compiler of GNU and the ICC compiler of Intel have a great impact on the nested parallel performance. Compiling the OpenMP program with the ICC compiler obtains better acceleration performance than GCC. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is the overall structural block diagram of the signal processing system.

[0020] Figure 2 It is the flowchart of the driver program interface function implemented by the ping-pong structure DMA transmission of the signal processing system.

[0021] Figure 3 It is the data flow chart for storing data in the shared memory communication module of the signal processing system.

[0022] Figure 4 It is the data flow chart for retrieving data from the signal processing module of the signal processing system.

[0023] Figure 5 It is the flowchart of the signal processing module of the signal processing system.

[0024] Figure 6 It is the parallel processing flowchart of the signal processing module of the signal processing system. DETAILED DESCRIPTION OF THE INVENTION

[0025] As Figure 1 shown, the present invention provides a phased array radar softwareized signal processing system based on a multi-core CPU, including a data acquisition module, a shared memory communication module, a signal processing module, and a tracklet display module;

[0026] The data acquisition module is used to transfer data to the server memory at a high speed by using a multi-threaded ping-pong structure through a driver program;

[0027] The shared memory communication module is used to open a buffer area to form a producer-consumer structure, decompose the data into frames according to the radar data source frame format, convert it into a radar data structure and send it to the signal processing;

[0028] The signal processing module is used to obtain target information such as range, speed, azimuth, pitch angle, amplitude, signal-to-noise ratio, RCS, etc. through algorithm steps such as beamforming, pulse compression, moving target display, moving target detection, constant false alarm processing, clutter map processing, target cohesion, azimuth angle measurement, and pitch angle measurement;

[0029] The dot trace display module is used to receive the dot trace information sent by signal processing through TCP network port communication and display it on the host computer interface.

[0030] Furthermore, the data acquisition module leverages PCIe 3.0 bus technology, achieving higher data transmission efficiency than traditional buses. The driver uses a multi-threaded ping-pong architecture to implement DMA operations, completing data exchange between kernel and user space, and rapidly transferring radar echo data from DDR to CPU memory.

[0031] Furthermore, the shared memory communication module is responsible for inserting data into the buffer (producer), while the signal processing module is responsible for receiving and processing data (consumer). Producer and consumer tasks use a shared memory mechanism to implement a cross-process shared buffer pool, and semaphores are used to achieve mutually exclusive access to the buffer pool. The two modules do not directly interact or couple with each other, supporting concurrency and uneven workloads.

[0032] Furthermore, the signal processing module includes a beamforming unit, a pulse compression unit, a moving target display unit, a moving target detection unit, a constant false alarm processing unit, a clutter map detection unit, a target aggregation unit, and an angle measurement unit; wherein,

[0033] The CFAR processing unit implements both one-dimensional and two-dimensional CFAR modes, depending on the radar environment. The one-dimensional CFAR implements algorithms such as unit averaging, unit selection, and ordered statistics. Commands can be quickly modified to apply different processing algorithms based on specific scenarios, effectively suppressing noise and clutter interference in echoes.

[0034] The clutter map detection unit implements two algorithms: point detection technology and surface detection technology. The threshold value obtained by the clutter map surface detection technology is more stable and more linear, and the corresponding calculation amount will also be greater.

[0035] The target aggregation unit aggregates the target information obtained by the constant false alarm processing unit into point information. Connected domain target aggregation adopts the idea of graph theory to aggregate connected points that cross the threshold and select the point with the largest amplitude. This is achieved by depth-first search traversal in the graph theory algorithm.

[0036] Furthermore, a large number of FFT transforms are required for pulse compression and moving target detection in the signal processing module. The high-performance FFTW algorithm is selected for acceleration. Since it takes a long time to establish an FFTW transformation plan once, only one transformation plan is established during the transformation process, and this transformation plan is recycled. FFTW has significantly better performance for transforms with lengths having small prime factors than other transform lengths. A function is developed to calculate the length with small prime factors closest to a certain transform length, and high-speed FFT can be obtained without padding a large number of zeros.

[0037] Furthermore, the signal processing module is divided into three threads: a thread for receiving data from shared memory, a signal processing thread, and a thread for packetizing and sending traces. The three threads are placed in a thread pool for parallel processing. Inside the signal processing thread, OpenMP is used to accelerate the signal processing program based on a multi-core CPU. OpenMP is used to perform parallel processing on three beams. On the basis of the parallel processing of the three beams, OpenMP nesting is used to start multiple threads to perform parallel acceleration on the internal processing modules of each beam. The GNU GCC compiler and the Intel ICC compiler have different implementation methods for the OpenMP thread pool, which have a greater impact on the nested parallel performance. Compiling the OpenMP program with the ICC compiler obtains better acceleration performance than GCC.

[0038] Furthermore, in the signal processing module, when using OpenMP multi-threading to accelerate the program, the core binding technology of the CPU is utilized. The sched_setaffinity function is used to bind each thread to multiple specified cores to complete the program operation. The constant false alarm rate algorithm adopts the sliding window method. In two adjacent sliding windows, there is partial overlap between the reference unit coverage area of the previous sliding window and the reference unit coverage area of the next sliding window. Reusing the overlapping variables can improve the algorithm efficiency.

[0039] Furthermore, the signal processing module is applicable to radar working modes with different data volumes, and has the characteristics of modularity, flexibility, controllability, and easy expansion. When it is detected that the working parameters change, the current memory space is released, and memory is newly allocated according to the current data volume, effectively avoiding memory waste caused by small data volumes while ensuring flexibility. When the data volume changes, the number of opened threads can be adaptively adjusted, and good acceleration effects can be achieved in different radar working modes.

[0040] Based on the same inventive concept, the present invention also provides a phased array radar software-based signal processing method based on a multi-core CPU. This method is implemented based on the foregoing system, and specifically includes the following steps:

[0041] Step 1: The radar turns on a certain working mode. The operator pre-sets signal processing parameters in the configuration file, such as pulse compression parameters, moving target indication parameters, constant false alarm rate parameters, clutter map parameters, etc., and then starts the radar, data acquisition module, shared memory communication module, signal processing module, and track display module.

[0042] Step 2: The data acquisition module collects one packet of data into the CPU memory every other coherent processing interval (CPI) through the driver.

[0043] Step 3: The shared memory communication module parses the received CPI data packets and checks whether the buffers buffer[0]-buffer[4] are all full. If an unused buffer is found, the data is stored in this buffer; otherwise, it checks again after sleeping for a period of time.

[0044] Step 4: The signal processing module has three parallel threads. When the program starts, the received data thread is triggered to check whether there is a buffer with data in buffer[0]-buffer[4]. If found, the signal processing thread is triggered, and the data is sent to the signal processing thread for signal processing. If not found, it checks again after sleeping for a period of time.

[0045] Step 5: After receiving the data, the signal processing thread in the signal processing module calls the signal processing dynamic library for a process of processing according to the parameters passed in from the configuration file and the radar status information in the data packet, obtains information such as the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, radar cross section (RCS) of the target, and sends the track information structure to the packet assembly and track sending thread.

[0046] Step 6: After receiving the track structure, the packet assembly and track sending thread in the signal processing module assembles the packets according to the communication protocol with the track display module, and then sends the track information to the track display module through TCP network interface communication.

[0047] Step 7: After receiving the TCP data, the track display module parses it and sends the track information to the host computer interface for dynamic display.

[0048] The structure and working process of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0049] Embodiment

[0050] In combination with Figure 1, the present invention provides a phased array radar software signal processing system based on a multi-core CPU. With a multi-core server as the core and adopting a multi-process architecture of sub-modules, it has the characteristics of modularity, flexibility, controllability, and easy expansion. It includes a data acquisition module, a shared memory communication module, a signal processing module, and a track display module. After collecting data from the radar front end through a PCIe acquisition card and transmitting it to the CPU memory using a driver, it is passed to the signal processing module through shared memory communication. The server calls multiple threads to process the radar data in parallel, generates tracks, and sends them to the track display module.

[0051] The data acquisition module is used to transmit the data of the acquisition card to the CPU memory at a high speed through a driver program;

[0052] The shared memory communication module is used to create a buffer area to form a producer-consumer structure, disassemble the data according to the radar data source frame format, and convert it into a radar data structure and send it to signal processing;

[0053] The signal processing module is used to obtain information such as the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, and RCS of the target through algorithm steps such as beamforming, pulse compression, moving target indication, moving target detection, constant false alarm rate processing, clutter map processing, target aggregation, azimuth angle measurement, and elevation angle measurement;

[0054] The track display module is used to receive the track information sent by signal processing through TCP network port communication and display it on the upper computer interface.

[0055] Combined with Figure 2 , for the implementation of the read function of the driver program in the data acquisition module, first set the interrupt flag, then set the source address, destination address registers of the DMA write operation, and the length of a single transmission. After completion, perform the DMA write operation and enter the interrupt service program. When a single DMA operation is completed, an interrupt signal is triggered, waking up the waiting thread and clearing the interrupt flag. When performing the DMA write operation, if there is data in another DMA buffer, copy the data in the buffer to the user space.

[0056] Combined with Figure 3 、 Figure 4 , the shared memory communication module parses the received CPI data packet, checks whether the buffer area buffer[0]-buffer[4] is fully filled. If an unused buffer area is found, the data is stored in this buffer area; otherwise, after sleeping for a period of time, check again. When the signal processing module program starts, it triggers the receiving data thread to check whether there is a buffer area with data in buffer[0]-buffer[4]. If found, it triggers the signal processing thread and sends the data to the signal processing thread for signal processing. If not found, after sleeping for a period of time, check again.

[0057] The shared memory communication module implements the producer task, and the signal processing module implements the consumer task. Cross-process data interaction is achieved between the producer task and the consumer task through the shared memory mechanism. A semaphore is supported in the data structure of the shared memory. The mutual exclusive access to the shared buffer pool is realized through the PV operations of the semaphore. When the producer task is accessing the buffer, the consumer task cannot access the buffer. When the consumer task is accessing the buffer, the producer task cannot access the buffer. After parsing the data, the producer task will apply for a buffer and put the data into the buffer. Then the consumer task takes the data from a buffer for signal processing.

[0058] Combined with Figure 5 , the signal processing module includes algorithm components such as beamforming, pulse compression, moving target indication, moving target detection, constant false alarm rate (CFAR) processing, clutter map processing, target aggregation, azimuth angle measurement, and elevation angle measurement. Among them:

[0059] The CFAR processing unit implements two methods of one-dimensional CFAR and two-dimensional CFAR according to different radar environments. Among them, the one-dimensional CFAR implements CFAR algorithms such as cell averaging, cell selection maximum, and ordered statistics. Considering that the detection range is relatively far in the search state and the clutter environment varies greatly throughout the process, if a constant T is multiplied throughout the process, the detection effect in a certain distance segment may be reduced. Therefore, in order to improve the overall detection effect, the algorithm adds a method of multiplying different constants for different distance cells. The full distance cells are divided into multiple distance segments, and each segment is multiplied by a different constant respectively to further improve the detection effect. Since the radar will detect in various different environments, therefore, by making full use of the scalability and other characteristics of the software-defined radar, the above CFAR processing methods are all implemented in software, and then the radar operator can select one of the CFAR methods for processing in real time according to the specific detection background.

[0060] The clutter map detection unit implements two algorithms: point detection technology and surface detection technology. The threshold value obtained by the clutter map surface detection technology is more stable and more inclined to a straight line, and the corresponding calculation amount is also larger.

[0061] The target aggregation unit. For the connected-domain target aggregation, the idea of graph theory is adopted to aggregate the connected points above the threshold, and the point with the maximum amplitude is selected. The depth-first search traversal in the graph theory algorithm is used to achieve this. When performing the depth-first search, first start from the starting point. If a point above the threshold with a value of 1 is encountered, set its value to 0, push its coordinates into the container, and save its amplitude as the maximum value. Then traverse the positions of the four points above, below, left, and right of this point (automatically return when encountering the boundary), set their values to 0, compare the amplitude of this point with the maximum amplitude. If it is greater than the maximum amplitude, take out the coordinates of the previous point, push this point into the container, and update the maximum amplitude. In this way, a connected area can be aggregated into a single point, and traversing the entire graph can aggregate all target areas. At the same time, the volatile keyword is used to synchronize multiple threads.

[0062] Combine Figure 6 , the parallel structure of the signal processing module first uses the CPU thread pool to asynchronously process the data fetching thread, the signal processing thread, and the tracklet packet sending thread. Secondly, in the signal processing algorithm components, based on the parallel processing of three beams, the omp_set_nested(1) instruction is used to enable OpenMP nested multi-threading to parallelly accelerate each signal processing algorithm component. There are a large number of for-loop structures in the beamforming algorithm, pulse compression algorithm, moving target indication algorithm, moving target detection algorithm, constant false alarm rate processing algorithm, and clutter map detection algorithm. OpenMP multi-threading is used to start multiple threads in these algorithm components, and each thread processes multiple pulse groups. Thread synchronization is achieved during the processing. The arrays of the three beam algorithms opened up all have three indices, and each index corresponds to a beam, avoiding multiple threads accessing the same piece of memory simultaneously. The GNU GCC compiler and the Intel ICC compiler have different implementation methods for the OpenMP thread pool, which have a greater impact on the nested parallel performance. Compiling the OpenMP program using the ICC compiler can obtain better acceleration performance than GCC.

[0063] Both pulse compression and moving target detection require a large number of FFT transforms. The high-performance FFTW algorithm is selected for acceleration. Since it takes a long time to establish an FFT transform plan once, and multiple threads execute different pulse groups with the same transform length, format, etc., only one transform plan is established during the transform process, and the fftw_execute_dft function is used to recycle this transform plan in a loop. The performance of FFTW for transforms with lengths having small prime factors is significantly better than other transform lengths. A function is developed to calculate the length of the closest small prime factor after a certain transform length, and high-speed FFT can be obtained without padding a large number of zeros. When making the judgment, select the common divisor of the small prime numbers 2 or 3 or 5 closest to the data length. [[ID=,9]]

[0064] Using the CPU core binding technology, the sched_setaffinity function is used to bind a fixed-size core to the signal processing thread that needs to process a large amount of data, reducing the overhead of frequent inter-core scheduling. The constant false alarm rate algorithm adopts the sliding window method. In two adjacent sliding windows, there is partial overlap between the coverage area of the reference unit in the previous sliding window and the coverage area of the reference unit in the next sliding window. Reusing the overlapping variables can improve the algorithm efficiency.

Claims

1. A phased array radar signal processing system based on a multi-core CPU, characterized in that, It includes a data acquisition module, a shared memory communication module, a signal processing module, and a track display module; The data acquisition module is used to transfer the data of the data acquisition card to the server memory in a multi-threaded ping-pong structure through a driver; The shared memory communication module is used to create a buffer area to form a producer-consumer structure, disassemble the data according to the radar data source frame format, and convert it into a radar data structure and send it to signal processing; The signal processing module is used to perform beamforming, pulse compression, moving target indication, moving target detection, constant false alarm rate processing, clutter map processing, target aggregation, azimuth angle measurement, elevation angle measurement, and obtain the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, and RCS information of the target; the signal processing module includes multiple signal processing algorithms, and each signal processing algorithm uses OpenMP multi-threading for parallel acceleration; each signal processing algorithm adapts to multiple radar operating modes, and when the radar switches to different operating modes, it adaptively adjusts the size of the allocated memory and the number of threads according to the data volume and characteristics; both pulse compression and moving target detection require FFT transformation, and the FFTW algorithm is selected for acceleration; Only one transformation plan is established during the transformation process, and this transformation plan is reused in a loop; multi-level parallelization processing is performed on the program; The signal processing module is divided into three threads, a thread for receiving data from the shared memory, a signal processing thread, and a thread for packetizing and sending tracks. The three threads are placed in the CPU thread pool for parallel processing; within the signal processing thread, OpenMP is used to accelerate the signal processing program based on a multi-core CPU; OpenMP is used to parallelize the processing of three beams, and on the basis of the parallel processing of the three beams, OpenMP is used to nest and start multiple threads to parallelize and accelerate each algorithm processing unit component; when accelerating the program with multiple threads, the CPU core binding technology is used, and the sched_setaffinity function is used to bind each thread to a specified multiple cores to complete; the constant false alarm rate algorithm uses a sliding window method, and in two adjacent sliding windows, there is partial overlap between the reference unit coverage area of the previous sliding window and the reference unit coverage area of the next sliding window; The track display module is used to receive the track information sent by signal processing through TCP and display it on the upper computer interface.

2. The phased array radar signal processing system based on a multi-core CPU according to claim 1, wherein The data acquisition module uses PCIe3.0 bus technology to implement DMA operations through a multi-threaded ping-pong structure, complete the data interaction between the kernel space and the user space, and transfer the radar echo data from DDR to the CPU memory.

3. The phased array radar signal processing system based on a multi-core CPU according to claim 1, characterized in that The shared memory communication module is responsible for putting data into the buffer area, and the signal processing module is responsible for receiving and processing. The producer task and the consumer task realize a cross-process shared buffer pool through the shared memory mechanism, and use semaphores to realize mutually exclusive access to the buffer pool.

4. A method according to any one of the signal processing systems based on claims 1 to 3, characterized in that, It includes the following steps: Step 1, after the radar is turned on, the operator pre-sets the signal processing parameters in the configuration file, and starts the radar, data acquisition module, shared memory communication module, signal processing module, and track display module; Step 2: The data acquisition module collects a packet of data into the CPU memory every other CPI through the driver; Step 3: The shared memory communication module parses the received CPI data packet, checks whether the buffers buffer[0] - buffer[4] are all full. If an unused buffer is found, the data is stored in this buffer; otherwise, it checks again after sleeping for a period of time; Step 4: The signal processing module has three parallel threads. When the program starts, the data receiving thread is triggered to check whether there is a buffer with data in buffer[0] - buffer[4]. If found, the signal processing thread is triggered to send the data to the signal processing thread for signal processing. If not found, it checks again after sleeping for a period of time; Step 5: After receiving the data, the signal processing thread in the signal processing module calls the signal processing dynamic library according to the parameters passed in by the configuration file and the radar status information in the data packet to perform a process, obtaining the distance, speed, azimuth angle, elevation angle, amplitude, signal-to-noise ratio, and RCS information of the target, and sending the trace information structure to the packet assembling and sending trace thread; Step 6: After receiving the trace structure, the packet assembling and sending trace thread in the signal processing module assembles the packet according to the communication protocol with the trace display module, and then sends the trace packet to the trace display module through TCP network port communication; Step 7: After receiving the TCP data, the trace display module parses it and sends the trace information to the upper computer interface for dynamic display.

5. The method according to claim 4, characterized in that, In Step 1, the preset signal processing parameters include pulse compression parameters, moving target display parameters, constant false alarm parameters, and clutter map parameters.

6. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the method described in Claim 4.

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