A verification method of a NAND flash controller empty page test method

Abstract

The application discloses a verification method of a NANDFlash controller empty page test method, and the method comprises the following stages: data preparation, read command sending, result returning and data processing and analysis. In the data preparation stage, different empty page scenes are constructed, and in the read command sending stage, different modes of read commands are sent according to the data preparation. In the result returning stage, whether an empty page is read and the number of empty pages are returned. In the data processing and analysis stage, the test result is compared with an expected result, and a visual report is generated. The application can verify whether a flash memory controller can effectively identify an empty page, and improve the reliability of a system.

Description

Technical Field

[0001] This invention relates to the field of storage, and more particularly to the field of storage testing, specifically a verification method for testing empty pages in a NAND Flash controller. Background Technology

[0002] NAND Flash is a type of flash memory with advantages such as fast write speed and large capacity, and is widely used in various solid-state drives (SSDs). NAND Flash reads data page by page. To determine whether a storage page has been written to, it typically includes a free page detection module. For example, the controller performs low-density parity check (LDPC) decoding and verification using the stored page codeword to identify free pages in the NAND Flash. The free page detection algorithm is relatively complex, and to ensure its correct functionality, a detailed verification of the free page detection function within the NAND Flash controller is necessary. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a verification method for testing empty pages of NAND Flash controllers, which verifies whether the flash controller (NAND Flash Controller, i.e. NFC) can effectively identify empty pages (pages without data storage are called empty pages), thereby improving the reliability of the system.

[0004] To solve the aforementioned technical problem, the technical solution adopted by the present invention is: a verification method for a NAND Flash controller empty page test method, comprising the following steps:

[0005] A verification method for testing empty pages in a NAND Flash controller includes the following steps:

[0006] S01) Data preparation, information initialization and construction of different empty page scenarios;

[0007] S02) Send read commands: Based on the prepared data, send read commands in different modes;

[0008] S03) Result return: Based on the sent read command, the system returns whether an empty page was read and the number of empty pages. The returned data is called the test result.

[0009] S04) Data processing and analysis: Compare and analyze the test results with the expected results. If the test results are consistent with the expected results, the blank page test method is correct; otherwise, it is incorrect.

[0010] Furthermore, different empty page scenarios can be constructed by erasing, writing data, and reading operations in different modes.

[0011] Furthermore, empty page scenarios include reading directly without writing data after erasing, inconsistent data writing blocks and data reading blocks, different flash memory types being read and written, and correct data writing and reading.

[0012] Furthermore, the verification process of reading directly without writing data after erasure is as follows: Starting from the starting block sequence number, for each round of operation, a single erase operation is first sent to the NAND Flash controller. After the erase operation is completed, a single-plane read operation is sent. When the start and end blocks are erased, a multi-plane read operation is performed. For each read operation, the expected value of the empty page read is set, and an empty page judgment interface is encapsulated. The empty page judgment interface judges the actual empty page read by the read operation.

[0013] In this empty page scenario, the expected result is set as follows: If two blocks are operated on, for single-plane reads, the expected empty page value is set to 1 when the block number of the operation is even and to 2 when the block number of the operation is odd; for multi-plane reads, the expected empty page value is set to 3.

[0014] Furthermore, the verification process for the inconsistency between the data block being written and the data block being read is as follows: select the block with an even number to be erased, write data, and perform different modes of read operations on this block and the block with this block number +1, and verify the number of empty pages read.

[0015] In this empty page scenario, the expected result is set as follows: for single-plane reads, if the number of blocks in this operation is even, the expected empty page value is set to 0; if the number of blocks in the operation is odd, the expected empty page value is set to 2; for multi-plane reads, the expected empty page value is set to 2.

[0016] Furthermore, the verification process for different flash memory types is as follows: Select a flash memory type different from the one being written, perform a read operation on this block, and the NAND Flash controller returns a command execution failure, indicating an LDPC check error. If the number of empty pages is 0, the LDPC data check error is not caused by empty pages. If the number of empty pages is greater than or equal to 1, then the LDPC data check error is caused by empty pages.

[0017] Furthermore, the verification process for correct data writing and reading includes: 1. Erasing the block with an even block number, writing data to the block with block number +1, and performing single-plane read operations on these two blocks respectively, followed by multi-plane reads, verifying the number of empty pages read. During single-plane reads, if the block number being operated on is even, the expected value for empty pages is set to 1; if the block number being operated on is odd, the expected value for empty pages is 0. During multi-plane reads, the expected value for empty pages is set to 1. 2. Writing data to the block with an even block number, performing multi-plane reads, verifying the number of empty pages read, and setting the expected value for empty pages to 0.

[0018] Furthermore, the initialization information includes NAND storage organization information, determining the channel, chip, LUN, block number, transfer size, and transfer method for the operation.

[0019] The beneficial effects of this invention are: 1) Customizable design for verifying empty pages. Each test scenario is divided into two parts: data preparation and read command sending. Data preparation can include the NAND channel, block size, transmission size, transmission method, etc., while read command sending can define the block start number, mstype type, etc. Through customized design, effective verification of empty pages can be achieved.

[0020] 2) The test commands are automated through scripts, and each empty page scenario is tested separately to calculate the expected value. The ingenious design of this invention covers different test scenarios in the entire test process, shortening the entire test cycle and test time.

[0021] 3) The test results are clear, which helps in statistical analysis and improves testing efficiency and quality. Attached Figure Description

[0022] Figure 1 This is a flowchart of the present invention. Detailed Implementation

[0023] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0024] Example 1

[0025] This embodiment discloses a verification method for testing empty pages in a NAND Flash controller, such as... Figure 1 As shown, it includes the following steps:

[0026] S01) Data preparation, information initialization and construction of different empty page scenarios;

[0027] S02) Send read commands: Based on the prepared data, send read commands in different modes;

[0028] S03) Result return: Based on the sent read command, the system returns whether an empty page was read and the number of empty pages. The returned data is called the test result.

[0029] S04) Data processing and analysis: Compare and analyze the test results with the expected results to verify different scenarios of empty page testing.

[0030] In this embodiment, different empty page scenarios are constructed through erasing, writing data, and different read modes. Specifically, the empty page scenarios include reading directly without writing data after erasing, the data block being written to being inconsistent with the data block being read, different flash memory types being read and written, and correct data writing and reading.

[0031] In this embodiment, the data processing and analysis involves comparing the test results with the expected results. Specifically, it compares whether the test results and the expected results are consistent. If they are consistent, the empty page test method (empty page detection module) is correct; otherwise, it is incorrect.

[0032] In this embodiment, the initialization information includes NAND storage organization structure information, determining the channel, chip, LUN, block number, transmission size, and transmission method of the operation.

[0033] In this embodiment, the specific steps of the verification method are as follows:

[0034] 1. Initialize the NAND storage organization structure to be operated, including channel, chip, LUN and start and end block sequence numbers, and set the data transfer size and transfer method.

[0035] 2. Starting from the initial block sequence number, for each round of operations, a single erase operation is first sent to the NFC. After the erase operation is completed, a single-plan read operation is sent. Once the start and end blocks have been erased, a multi-plane read operation is performed. For each read operation, based on the NAND manufacturer type and the total number of blocks being operated on, the expected number of empty pages to be read is designed, and an empty page judgment interface is encapsulated. This interface determines the actual empty pages read during the read operation.

[0036] 3. After NFC completes the process, it returns a result. The returned data is compared with the expected data. If they match, the empty page detection is correct.

[0037] 4. Select the even-numbered block that was erased in step 1, write data to it, and perform different modes of read operations on this block and the block with the same block number +1, and verify the number of empty pages read.

[0038] 5. Select a flash memory type different from the one used to write data in step 4, and perform a read operation on this block. For example, if the data was written using tlc (Trinary Level Cell), then the data should be read using slc (Single Level Cell). NFC will return a command execution failure and an LDPC verification error will occur. However, the number of empty pages is 0, indicating that the LDPC data verification error is not caused by empty pages.

[0039] 6. Erase the blocks with even block numbers, write data to the block with block number +1, and perform single-plane read operations on these two blocks respectively, followed by multi-plane reads, and verify the number of empty pages read.

[0040] 7. Write data to the even-numbered block, perform multi-plane read, and verify the number of empty pages read.

[0041] 8. Analyze the results returned by the above operations, analyze the data, and generate a test report.

[0042] The above process of preparing and reading data simultaneously enables the verification of empty pages in NAND flash memory.

[0043] In this embodiment, the expected value of empty pages for various empty page scenarios is set as follows:

[0044] After erasing, data is read directly without writing data: If two blocks are operated on, for single-plane reads, the expected empty page value is set to 1 when the block number of the operation is even and 2 when the block number of the operation is odd; for multi-plane reads, the expected empty page value is set to 3.

[0045] The block for writing data is inconsistent with the block for reading data: In this empty page scenario, the expected result is set as follows: For single-plane reads, if the number of blocks in this operation is even, the expected empty page value is set to 0; if the number of blocks in the operation is odd, the expected empty page value is set to 2. For multi-plane reads, the expected empty page value is set to 2.

[0046] The verification process for correct data writing and reading includes: 1. Erasing the block with an even block number, writing data to the block with block number +1, and performing single-plane read operations on these two blocks respectively, followed by multi-plane reads, verifying the number of empty pages read. During single-plane reads, if the block number being operated on is even, the expected value for empty pages is set to 1; if the block number being operated on is odd, the expected value for empty pages is 0. During multi-plane reads, the expected value for empty pages is set to 1. 2. Writing data to the block with an even block number, performing multi-plane reads, verifying the number of empty pages read, and setting the expected value for empty pages to 0.

[0047] This invention divides each test scenario into two parts: data preparation and read command sending. Data preparation may include the NAND channel, block size, transmission size, transmission method, etc., while read command sending may define the block start number, mstype type, etc. Through customized design, effective verification of empty pages can be achieved.

[0048] The test commands are automated through scripts, and each empty page scenario is tested separately to calculate the expected value. The ingenious design of this invention covers different test scenarios in the entire test process, shortening the entire test cycle and test time.

[0049] This method provides clear test results, which is helpful for statistical analysis and improves testing efficiency and quality.

[0050] The above description only illustrates the basic principles and preferred embodiments of the present invention. Improvements and substitutions made by those skilled in the art based on the present invention are within the scope of protection of the present invention.

Claims

1. A verification method for a NAND Flash controller empty page test method, characterized in that: Includes the following steps: S01) Data preparation, information initialization and construction of different empty page scenarios, including reading directly without writing data after erasure, the data block being inconsistent with the data block being read, different flash memory types being read and written, and correct data writing and reading; The verification process for reading directly without writing data after erasure is as follows: Starting from the starting block sequence number, for each round of operation, a single erase operation is first sent to the NAND Flash controller. After the erase operation is completed, a single plane read operation is sent. When the start and end blocks are erased, a multi-plane read operation is performed. For each read operation, the expected value of the empty page read is set, and an empty page judgment interface is encapsulated. The empty page judgment interface judges the actual empty page read by the read operation. In this empty page scenario, the expected result is set as follows: If two blocks are operated on, for single-plane reads, the expected empty page value is set to 1 when the block number of the operation is even and to 2 when the block number of the operation is odd; for multi-plane reads, the expected empty page value is set to 3. S02) Send read commands: Based on the prepared data, send read commands in different modes; S03) Result return: Based on the sent read command, the system returns whether an empty page was read and the number of empty pages. The returned data is called the test result. S04) Data processing and analysis: Compare and analyze the test results with the expected results. If the test results are consistent with the expected results, the blank page test method is correct; otherwise, it is incorrect.

2. The verification method for the NAND Flash controller empty page test method according to claim 1, characterized in that: Different empty page scenarios are constructed by erasing, writing data, and reading in different modes.

3. The verification method for the NAND Flash controller empty page test method according to claim 1, characterized in that: The verification process for the discrepancy between the block for writing data and the block for reading data is as follows: Select the block with an even number to be erased, write data, and perform different modes of read operations on this block and the block with this block number +1, and verify the number of empty pages read. In this empty page scenario, the expected result is set as follows: for single-plane reads, if the number of blocks in this operation is even, the expected empty page value is set to 0; if the number of blocks in the operation is odd, the expected empty page value is set to 2; for multi-plane reads, the expected empty page value is set to 2.

4. The verification method for the NAND Flash controller empty page test method according to claim 1, characterized in that: The verification process for different flash memory types is as follows: Select a flash memory type different from the one being written, perform a read operation on this block, and the NAND Flash controller returns a command execution failure, indicating an LDPC check error. If the number of empty pages is 0, the LDPC data check error is not caused by empty pages. If the number of empty pages is greater than or equal to 1, then the LDPC data check error is caused by empty pages.

5. The verification method for the NAND Flash controller empty page test method according to claim 1, characterized in that: The verification process for correct data writing and reading includes:

1. Erasing the block with an even block number, writing data to the block with block number +1, and performing single-plane read operations on these two blocks respectively, followed by multi-plane reads, verifying the number of empty pages read. During single-plane reads, if the block number being operated on is even, the expected value for empty pages is set to 1; if the block number being operated on is odd, the expected value for empty pages is 0. During multi-plane reads, the expected value for empty pages is set to 1.

2. Writing data to the block with an even block number, performing multi-plane reads, verifying the number of empty pages read, and setting the expected value for empty pages to 0.

6. The verification method for the NAND Flash controller empty page test method according to claim 1, characterized in that: Initialization information includes NAND storage organization information, which determines the channel, chip, LUN, block number, transfer size, and transfer method for the operation.

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