Regulation circuit and reference circuit with high power rejection ratio and switching circuit

Abstract

A regulating circuit and a reference circuit and a switch circuit with a high power rejection ratio. The switch circuit includes: a switch, a first driver and a supply transistor. The switch is coupled to a main circuit to control the electrical parameters of the main circuit, wherein the power rejection ratio of the main circuit is determined according to the switch. The first driver is used to drive the switch, wherein the first driver is powered by a supply current. The supply transistor is used to generate a supply current, wherein the supply transistor is biased in a primary threshold voltage region, so that the power rejection ratio of the main circuit is higher than a preset level in a preset band.

Description

Technical Field

[0001] The present invention relates to a regulating circuit and a reference circuit, and more particularly to a regulating circuit and a reference circuit with a high power supply rejection ratio (PSRR). The present invention also relates to a switch circuit that can be used in the regulating circuit and the reference circuit to achieve a high power supply rejection ratio. Background Art

[0002] Figure 1 A reference circuit of the prior art (reference circuit 1000) is shown. Figure 1 As shown, the NMOS switch M0 is used to adjust the temperature coefficient of the reference signal Vref, wherein the switch M0 is a switch with a high aspect ratio to reduce the influence of the on-resistance of the switch M0. Figure 1 As shown, the power supply noise 206 of the input power supply VDD will be injected into an input terminal of the amplifier 105 by the driver 205 through, for example, the parasitic capacitance Cgd of the switch M0 .

[0003] A typical method for filtering power supply noise to improve the power supply rejection ratio is to Figure 2 The output terminal shown is added with a low pass filter 305 (usually an RC filter, i.e., a filter including a resistor and a capacitor). However, the above method requires a higher resistor value and a higher capacitor value to provide a sufficient bandwidth for the low pass filter 300. For example, a low pass filter with a cutoff frequency of 1K Hz requires a 10M ohm capacitor and a 10p Farad capacitor. Figure 3 As shown, the low-pass filter 300 with a cutoff frequency of 1 kHz starts to remove power supply noise from 1 kHz, that is, noise with a frequency lower than 1 kHz cannot be removed. On the other hand, if a low-pass filter with a lower cutoff frequency is used, a larger chip area is required, and the cost will also increase accordingly.

[0004] Compared to Figure 1 Compared with the prior art, the present invention can improve the power rejection ratio in a wide frequency range, thereby reducing the chip area and cost. Summary of the invention

[0005] From one viewpoint, the present invention provides a switching circuit, comprising: a switch coupled to a main circuit for controlling an electrical parameter of the main circuit, wherein a power supply rejection ratio (PSRR) of the main circuit is determined according to the switch; a first driver for driving the switch, wherein the first driver is powered by a supply current; and a supply transistor for generating the supply current, wherein the supply transistor is biased in a primary critical voltage region so that the power supply rejection ratio of the main circuit is higher than a preset level in a preset band.

[0006] In a preferred embodiment, the switch circuit further includes a filter capacitor, wherein the filter capacitor is coupled to an output terminal of the first driver.

[0007] In a preferred embodiment, the switching circuit further includes a current mirror circuit, wherein the current mirror circuit includes the supply transistor, which is used to mirror a bias current to generate the supply current, wherein when the supply transistor is biased within the range of the sub-threshold voltage region, the ratio of the bias current to the supply current is greater than 1.

[0008] In a preferred embodiment, the supply transistor comprises a PMOS transistor coupled to a power source and a power terminal of the first driver.

[0009] In a preferred embodiment, the switch circuit further comprises a bypass transistor, wherein the bypass transistor is connected in parallel to the supply transistor for momentarily bypassing the supply transistor.

[0010] In a preferred embodiment, the switch circuit further includes a second driver for driving the bypass transistor, wherein the second driver is powered by a current power supply.

[0011] In a preferred embodiment, the bypass transistor includes a PMOS transistor coupled to a power source and a power terminal of the first driver.

[0012] From another perspective, the present invention also provides a reference circuit, comprising: a pair of reference elements having a preset bandgap; an amplifier circuit coupled to the pair of reference elements for generating a reference signal according to the preset bandgap of the pair of reference elements; and a switch circuit coupled to the amplifier circuit for controlling a gain of a feedback network coupled to the amplifier circuit, wherein the switch circuit comprises: a switch, wherein a power supply rejection ratio (PSRR) of the reference circuit is determined according to the switch; a first driver for driving the switch, wherein the first driver is powered by a supply current; and a supply transistor for generating the supply current, wherein the supply transistor is biased in a primary critical voltage region so that the power supply rejection ratio of the reference circuit is higher than a preset level in a preset band.

[0013] In a preferred embodiment, the switch is coupled to a resistor of the feedback network, wherein the reference circuit adjusts the gain of the feedback network by controlling the conduction and non-conduction of the switch.

[0014] In a preferred embodiment, the reference circuit further comprises a filter circuit, wherein the filter circuit comprises a resistor and a capacitor, and is configured as a low-pass filter by filtering the reference signal.

[0015] In a preferred embodiment, the filter circuit further includes a second bypass transistor, wherein the second bypass transistor is used to bypass the low pass filter in a bypass mode.

[0016] From another perspective, the present invention also provides a regulation circuit for generating a regulation output signal, the regulation circuit comprising: a reference circuit for generating a reference signal; an error amplifier for generating an error amplified signal according to a difference between the reference signal and a feedback signal, wherein the feedback signal is related to the regulation output signal; and an output transistor for converting an input power supply into the regulation output signal through the control of the error amplified signal; wherein the reference circuit comprises: a pair of reference elements having a preset energy band gap; an amplifier circuit coupled to the pair of reference elements for generating a reference signal according to the preset energy band gap of the pair of reference elements; and a switch circuit coupled to the amplifier circuit for controlling a gain of a feedback network coupled to the amplifier circuit, wherein the switch circuit comprises: a switch, wherein a power supply rejection ratio (PSR) of the reference circuit A reference circuit is provided for providing a power supply rejection ratio (PSRR) of the reference circuit according to the switch; a first driver for driving the switch, wherein the first driver is powered by a supply current; and a supply transistor for generating the supply current, wherein the supply transistor is biased in a primary threshold voltage region so that the power supply rejection ratio (PSRR) of the reference circuit is higher than a preset level in a preset band.

[0017] The following detailed description through specific embodiments will make it easier to understand the purpose, technical content, characteristics and effects achieved by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A prior art reference circuit is shown.

[0019] Figure 2 A prior art reference circuit is shown.

[0020] Figure 3 A frequency response graph showing a prior art technique.

[0021] Figure 4 A schematic diagram showing an embodiment of a reference circuit of the present invention.

[0022] Figure 5 A schematic diagram showing an embodiment of a current mirror circuit in a switch circuit of the present invention.

[0023] Figure 6 Frequency response graph showing the power supply rejection ratio (PSRR) of the reference circuit in different configurations.

[0024] Figure 7 A schematic diagram showing an embodiment of a switch circuit in a reference circuit of the present invention.

[0025] Figure 8 Displays the instantaneous waveform corresponding to the change of the adjustment signal.

[0026] Fig. 9 A schematic diagram showing an embodiment of a reference circuit of the present invention.

[0027] Fig.10 A schematic diagram showing an embodiment of the regulating circuit of the present invention.

[0028] Fig.11 A frequency response graph showing the PSRR of a prior art regulating circuit and an embodiment of a regulating circuit of the present invention.

[0029] Explanation of symbols in the figure

[0030] 100: Amplifier circuit

[0031] 105: Amplifier

[0032] 1000, 2000, 4000, 7000, 9000: Reference circuit

[0033] 1010: Regulation circuit

[0034] 200, 205, 208: Driver

[0035] 206: Power supply noise

[0036] 210: Current Source

[0037] 300, 390: Filter circuit

[0038] 500, 700: Switching circuit

[0039] 510: Current mirror circuit

[0040] 600: Feedback Network

[0041] 601~603, 1101~1103: PSRR curve

[0042] 800: Error amplifier

[0043] 801, 802: Waveform

[0044] CF1: filter capacitor

[0045] CF2: Capacitor

[0046] Cgd: parasitic capacitance

[0047] EO2: Error amplification signal

[0048] IB: Bias current

[0049] Isp: Supply current

[0050] M0: Switch

[0051] M11~M17:MOS transistor

[0052] MB0, MB3: bypass transistor

[0053] MP: Output transistor

[0054] Ms: Supply transistor

[0055] Q1, Q2: Bipolar transistors

[0056] R1-1, R1-2, R2, R3, RF: resistors

[0057] S0: Control signal

[0058] SBP: Signal Bypass

[0059] TRB: Adjustment signal

[0060] VDD: Input power supply

[0061] Vfb: feedback signal

[0062] Vout: regulated output signal

[0063] Vref: reference signal DETAILED DESCRIPTION

[0064] The drawings in the present invention are all schematic, and are mainly intended to show the coupling relationship between various circuits and the relationship between various signal waveforms. The circuits, signal waveforms and frequencies are not drawn according to scale.

[0065] See also Figure 4 , Figure 4 A schematic diagram of an embodiment of the reference circuit (reference circuit 4000) of the present invention is shown. In one embodiment, the reference circuit 4000 includes a pair of reference elements, an amplifier circuit 100, and a switch circuit 500. In this embodiment, the reference elements are bipolar transistors (BJT) Q1 and Q2, and the amplifier circuit 100 is coupled to the bipolar transistors Q1 and Q2 to generate a reference signal Vref according to the energy band gap of the bipolar transistors Q1 and Q2. It is worth noting that the pair of reference elements in the reference circuit can be selected to use other types of elements, such as metal oxide semiconductor (MOS) transistors with a band gap difference to generate the reference signal Vref.

[0066] Please continue reading Figure 4, the switch circuit 500 is coupled to the amplifier circuit 100 to control the gain of the feedback network 600 coupled to the amplifier circuit 100. In the present embodiment, the feedback network 600 includes a resistor R1-1, a resistor R1-2, a resistor R2, and a resistor R3 to provide a variable gain control, thereby adjusting the temperature coefficient of the reference circuit 4000. In one embodiment, the amplifier circuit 100 generates an error amplification signal EO1 according to the base-emitter voltage difference of the bipolar transistors Q1 and Q2 to control the transistors M1 and M2, thereby generating a reference signal Vref' and a reference signal Vref in a feedback manner, wherein the reference signal Vref is generated after the reference signal Vref' is filtered.

[0067] In one embodiment, the switch circuit 500 includes a switch M0, a first driver 200, and a supply transistor Ms. In this embodiment, the switch M0 is connected in parallel to the resistor R1-2, and the gain of the feedback network 600 can be adjusted by controlling the conduction and non-conduction of the switch M0, thereby adjusting the temperature coefficient of the reference circuit 4000. Figure 4 As shown, since the switch M0 is coupled to the input terminal of the amplifier circuit 100, as previously described, the noise of the input power source VDD is easily injected into the amplifier circuit 100 through the parasitic capacitance Cgd of the switch M0, thereby interfering with the reference signal Vref. In other words, the power rejection ratio of the reference circuit 4000 is at least partially determined by the switch M0.

[0068] The first driver 200 is used to drive the switch M0 according to the adjustment signal TRB. To improve the power rejection ratio, in the present embodiment, the first driver 200 is powered by a supply current Isp, wherein the supply current Isp is generated by a supply transistor Ms. In one embodiment, when providing the supply current Isp, the supply transistor Ms is biased in a subthreshold region or a deep subthreshold region, so that the power rejection ratio of the reference circuit 4000 is higher than a preset level in a preset band.

[0069] Please also see Figure 4 and Figure 5 , Figure 5 A schematic diagram of an embodiment of a current mirror circuit (current mirror circuit 510) in a switch circuit of the present invention is shown. In this embodiment, the switch circuit 500 further includes a current mirror circuit 510, wherein the current mirror circuit 510 includes a supply transistor Ms for mirroring a bias current IB to generate a supply current Isp. In a preferred embodiment, the ratio of the bias current IB to the supply current Isp can be much greater than 1. For example, in a preferred embodiment, the ratio of the bias current IB to the supply current Isp can be as high as tens of thousands, so that the supply current Isp is close to the leakage current of the supply transistor Ms of approximately the same level.

[0070] In a preferred embodiment, if Figure 5 As shown, the bias current IB is 30 nanoamperes (nA), and the MOS transistors M11-M17 and the supply transistor Ms form a cascade current mirror, providing bias current ratios of 1:20, 1:10, 1:10 and 1:5, respectively. In this embodiment, the ratio of the supply current Isp to the bias current IB is 1:10000, and the supply current Isp can be as small as 3 picoamperes (pA), so that the supply transistor Ms operates in the subthreshold voltage region or the deep subthreshold voltage region. It should be noted that all the numbers listed in this embodiment are only for the convenience of explanation and are not used to limit the scope of the invention.

[0071] Please continue reading Figure 4 and Figure 5 In one embodiment, the filter capacitor CF1 is coupled to the current path of the supply current Isp to perform a greater degree of filtering so that the power supply noise can be further filtered out. Figure 4 As shown, the filter capacitor CF1 is coupled to the output terminal of the first driver 200. From one point of view, when the control signal S0 is pulled high by the first driver 200, the supply transistor Ms and the filter capacitor CF1 substantially form a filter. Since the supply transistor Ms is biased in the deep subthreshold voltage region, it has a very high equivalent resistance value, so that the filter has a sufficiently low cutoff frequency. Figure 4 and Figure 5 As shown, in one embodiment, the supply transistor Ms is a PMOS transistor, and is coupled to the power supply terminal of the first driver 200 of the input power source VDD.

[0072] From one point of view, when the supply transistor Ms operates in the sub-threshold voltage region, its equivalent resistance value can be high to a certain extent, so that the cut-off frequency achieved by the combination of the supply transistor Ms and the filter capacitor CF1 can be significantly lower than that of a traditional RC (resistor, capacitor) filter, and the chip size occupied will also be smaller than that of a traditional RC filter.

[0073] See also Figure 4 In one embodiment, the reference circuit 4000 further includes a filter circuit 300, wherein the filter circuit 300 includes a resistor RF and a capacitor CF2, wherein the resistor RF and the capacitor CF2 are configured as a low-pass filter. The filter circuit 300 is used to further filter power supply noise in a higher frequency band.

[0074] See also Figure 6 , Figure 6The frequency response curves of the power supply rejection ratio (PSRR) of the reference circuit in different configurations are shown. Figure 1 The PSRR curve 601 of the reference circuit 2000 (corresponding to the prior art) is not filtered and is represented by the short dashed line. Figure 2 The PSRR curve 602 of the prior art) is shown by the long dashed line after RC filtering at the output. Figure 4 The PSRR curve 603 of the present invention (technique) is shown, after filtering by the supply transistor Ms and the filter circuit 300, as represented by a solid line.

[0075] In one embodiment, the resistor RF=5 Mohm and the capacitor CF2=5 pF, combined with the switch circuit 500 and the filter circuit 300, can filter out the supply noise starting from 100 Hz (PSRR curve 603), as shown in FIG. Figure 6 As shown, the cut-off frequency of PSRR curve 603 is much lower than that of the two prior art circuits (PSRR curves 601 and 602). In addition, in an example of a silicon chip, the resistance value of resistor RF and the capacitance value of capacitor CF2 are both lower than Figure 2 The prior art shown enables the chip size to be reduced by up to 30%, thereby achieving the goal of lower cost.

[0076] See also Figure 7 , Figure 7 A schematic diagram of an embodiment of a switch circuit in the reference circuit of the present invention (reference circuit 7000 and switch circuit 700) is shown. The switch circuit 700 is similar to the above-mentioned embodiment. The switch circuit 700 further includes a bypass transistor MB0. The bypass transistor MB0 is connected in parallel to the supply transistor Ms to bypass the supply transistor Ms in transient or bypass mode. Specifically, in one embodiment, the second driver 208 controls the bypass transistor MB0 according to the adjustment signal TRB. Please also refer to Figure 7 and Figure 8 , Figure 8 Displays the instantaneous waveform corresponding to the change of the adjustment signal TRB. Figure 8 As shown, when bypass transistor MB0 is configured (curve 801 ), control signal S0 increases faster than when bypass transistor MB0 is not configured (curve 802 ). In other embodiments, bypass mode may be controlled by command or may be implemented at startup.

[0077] Please continue reading Figure 7 In one embodiment, the switch circuit 500 further includes a second driver 208 for driving the bypass transistor MB0. To avoid noise from the input power source VDD, the second driver 208 is powered by a current source 210.

[0078] See also Fig. 9 , Fig. 9 A schematic diagram of an embodiment of the reference circuit (reference circuit 9000) of the present invention is shown. In one embodiment, the filter circuit 390 is similar to the aforementioned filter circuit 300, and further includes a second bypass transistor MB3, which is used to bypass the low-pass filter composed of the resistor RF and the capacitor CF2 in the bypass mode. The second bypass transistor MB3 is connected in parallel to the resistor RF and is controlled by the bypass signal SBP.

[0079] See also Fig.10 , Fig.10 The schematic diagram of an embodiment of the regulating circuit of the present invention is shown in FIG. The regulating circuit 1010 is used to generate a regulating output signal Vout according to a reference signal Vref. In this embodiment, the regulating circuit 1010 includes a reference circuit, an error amplifier 800 and an output transistor MP.

[0080] The reference circuit may be any reference circuit in the aforementioned embodiments, for example: Figure 4 , Figure 5 , Figure 7 or Fig. 9 A reference circuit is provided for generating a reference signal Vref.

[0081] The error amplifier 800 is used to generate an error amplified signal EO2 according to the difference between the reference signal Vref and the feedback signal Vfb, wherein the feedback signal Vfb is related to the regulated output signal Vout, for example: Fig.10 As shown, the feedback signal Vfb is the divided voltage of the output signal Vout.

[0082] The output transistor MP is controlled by the error amplifier signal EO2 to convert the input power source (eg, VDD) into a regulated output signal Vout.

[0083] See also Fig.11 , Fig.11 The frequency response curves of the PSRR of a prior art regulating circuit and a regulating circuit embodiment of the present invention are shown. Figure 1 The PSRR curve 1101 of the prior art) is shown in FIG. 1 , where the reference signal Vref is not filtered and is represented by a short dashed line. Figure 2 The PSRR curve 1102 of the prior art shown in FIG. 100 , where the reference signal Vref is filtered by RC, is represented by a long dashed line. Fig.10 The PSRR curve 1103 of the present invention (shown in FIG. 1 ) is shown as a solid line after filtering by the supply transistor Ms and the filter circuit 300. Fig.11As shown, the present invention can cover a wider bandwidth with a higher PSRR (corresponding to a lower PSRR gain value in the figure).

[0084] It is worth noting that the aforementioned switch circuit can be applied to other types of main circuits to control other electrical parameters therein. As long as the PSRR is determined by the switch Ms, the aforementioned circuit system can be used to improve the PSRR of the main circuit.

[0085] In summary, in order to improve PSRR at low frequency, the present invention uses a current mirror operating in a deep subthreshold voltage region to bias and control the switch, thereby limiting the power supply noise coupled from the switch. The combination of a switch circuit and a low-pass filter circuit is configured at the output end to filter out the power supply noise in a wider bandwidth. It is worth noting that when a switch of any main circuit is connected to a node that is sensitive to power supply noise, the switch circuit of the present invention that can improve PSRR can be applied to the main circuit.

[0086] The present invention has been described above with respect to the preferred embodiment, but the above is only to make it easy for those skilled in the art to understand the content of the present invention, and is not used to limit the scope of rights of the present invention. The various embodiments described are not limited to individual applications, but can also be used in combination. For example, two or more embodiments can be used in combination, and part of the components in one embodiment can also be used to replace the corresponding components in another embodiment. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or calculating or generating an output result according to a certain signal", which is not limited to the signal itself, but also includes, when necessary, converting the signal to voltage and current, current and voltage, and / or ratio conversion, and then processing or calculating according to the converted signal to generate an output result. It can be seen from this that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations, and there are many combinations, which are not listed one by one here. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

Claims

1. A switching circuit, comprising: A switch coupled to a main circuit for controlling an electrical parameter of the main circuit, wherein a power rejection ratio of the main circuit is determined according to the switch; a first driver for driving the switch, wherein the first driver is powered by a supply current; A supply transistor for generating the supply current, wherein the supply transistor is biased in a primary threshold voltage region so that the power rejection ratio of the main circuit is higher than a preset level in a preset band; as well as a current mirror circuit, wherein the current mirror circuit includes the supply transistor, and is used to mirror a bias current to generate the supply current; When the supply transistor is biased within the sub-threshold voltage region, a ratio of the bias current to the supply current is greater than 1.

2. The switching circuit according to claim 1, wherein: A filter capacitor is also included, wherein the filter capacitor is coupled to an output terminal of the first driver.

3. The switch circuit according to claim 1, wherein: The supply transistor includes a PMOS transistor coupled to a power source and a power terminal of the first driver.

4. The switch circuit according to claim 1, wherein: A bypass transistor is also included, wherein the bypass transistor is connected in parallel with the supply transistor for temporarily bypassing the supply transistor.

5. The switch circuit according to claim 4, wherein: A second driver is also included for driving the bypass transistor, wherein the second driver is powered by a current power supply.

6. The switch circuit according to claim 4, wherein: The bypass transistor includes a PMOS transistor coupled to a power source and a power terminal of the first driver.

7. A reference circuit comprising: a pair of reference elements having a predetermined energy band gap; an amplifier circuit coupled to the pair of reference elements, for generating a reference signal according to the preset energy band gaps of the pair of reference elements; as well as A switch circuit is coupled to the amplifier circuit and is used to control a gain of a feedback network coupled to the amplifier circuit, wherein the switch circuit comprises: a switch, wherein a power rejection ratio of the reference circuit is determined according to the switch; a first driver for driving the switch, wherein the first driver is powered by a supply current; a supply transistor for generating the supply current, wherein the supply transistor is biased in a primary threshold voltage region so that the source rejection ratio of the reference circuit is higher than a predetermined level in a predetermined band; and a current mirror circuit, wherein the current mirror circuit includes the supply transistor, and is used to mirror a bias current to generate the supply current; When the supply transistor is biased within the sub-threshold voltage region, a ratio of the bias current to the supply current is greater than 1.

8. The reference circuit as claimed in claim 7, wherein: The switch is coupled to a resistor of the feedback network, wherein the reference circuit adjusts the gain of the feedback network by controlling the conduction and non-conduction of the switch.

9. The reference circuit as claimed in claim 7, wherein: The switch circuit further includes a filter capacitor, wherein the filter capacitor is coupled to an output terminal of the first driver.

10. The reference circuit as claimed in claim 7, wherein: A filter circuit is also included, wherein the filter circuit includes a resistor and a capacitor, and is configured as a low-pass filter by filtering the reference signal.

11. The reference circuit as claimed in claim 10, wherein: The filter circuit further includes a second bypass transistor, wherein the second bypass transistor is used to bypass the low pass filter in a bypass mode.

12. A regulating circuit for generating a regulated output signal, the regulating circuit comprising: a reference circuit for generating a reference signal; an error amplifier for generating an error amplified signal according to a difference between the reference signal and a feedback signal, wherein the feedback signal is related to the regulated output signal; as well as an output transistor, controlled by the error amplification signal to convert an input power source into the regulated output signal; The reference circuit includes: a pair of reference elements having a predetermined energy band gap; an amplifier circuit coupled to the pair of reference elements, for generating a reference signal according to the preset energy band gaps of the pair of reference elements; and A switch circuit is coupled to the amplifier circuit and is used to control a gain of a feedback network coupled to the amplifier circuit, wherein the switch circuit comprises: a switch, wherein a power rejection ratio of the reference circuit is determined according to the switch; a first driver for driving the switch, wherein the first driver is powered by a supply current; a supply transistor for generating the supply current, wherein the supply transistor is biased in a primary threshold voltage region so that the source rejection ratio of the reference circuit is higher than a predetermined level in a predetermined band; and a current mirror circuit, wherein the current mirror circuit includes the supply transistor, and is used to mirror a bias current to generate the supply current; When the supply transistor is biased within the sub-threshold voltage region, a ratio of the bias current to the supply current is greater than 1.

13. The regulating circuit according to claim 12, wherein: The switch circuit further includes a filter capacitor, wherein the filter capacitor is coupled to an output terminal of the first driver.

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