Memory-limited qlc writing method, device and computer equipment

Abstract

The application relates to a memory-restricted QLC writing method, device, computer equipment and storage medium, wherein the method comprises the following steps: reserving part of SLC physical blocks in a solid state disk; whenever a host writes data, the data is preferentially written into the SLC physical blocks; reserving a small memory area as a WL Buffer in the solid state disk; after the data is written into the SLC physical blocks, the data is read out from the SLC physical blocks to the WL Buffer and transmitted to QLC physical blocks of a corresponding DIE; the WL Buffer is released, and QLC programming of the corresponding DIE is initiated; the WL Buffer is used to sequentially perform the same processing on other DIEs, and QLC programming of all the DIEs is waited to be completed. The application greatly reduces the memory requirement of QLC multiple programming in the memory-restricted solid state disk, and further reduces the cost.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solid state disk, in particular to a QLC write-in method and device with limited memory, computer equipment and storage medium. BACKGROUND

[0002] SSD (Solid State Disk) has been widely used in various occasions, and has gradually replaced the traditional HDD in the PC market, providing better experience for users in terms of reliability and performance.

[0003] With the evolution of NAND technology, it has evolved from the early 1bit / cell (SLC) to 2bit / cell (MLC), 3bit / cell (TLC), 4bit / cell (QLC) in turn, and the storage data capacity is getting larger and larger, but due to the increase of the number of bits per cell, the programming model becomes more and more complex. Typical NAND such as SLC / MLC / TLC only needs to program once to complete data storage, and then it can be normally read, while QLC needs multiple programming due to its complex NAND Cell voltage distribution to truly complete data storage for subsequent data reading.

[0004] In addition, due to the need to eliminate the influence between adjacent Wordlines, this multiple programming needs to be staggered between multiple Wordlines, so that the number of WLs (Wordlines) in an unstable state is large, and since it cannot be read out, the corresponding data needs to be cached in other places that can be correctly read. If it needs to be cached in the SOC memory, it will cause a large demand for memory, which is not feasible in the consumer SSD scenario restricted by cost factors. Therefore, how to optimize the QLC write-in model is a very key factor for the memory cost optimization of SSD. SUMMARY

[0005] Therefore, it is necessary to provide a QLC write-in method and device with limited memory, computer equipment and storage medium in view of the above technical problems.

[0006] A QLC write-in method with limited memory, the method comprising:

[0007] Reserve part of SLC physical blocks inside the solid state disk, and always preferentially write data into the SLC physical blocks when the host writes data;

[0008] Reserve a small memory area as a WL Buffer inside the solid state disk;

[0009] read out the data from the SLC physical block to the WL Buffer and transmit the data to the QLC physical block of the corresponding DIE after the data is written into the SLC physical block;

[0010] release the WL Buffer and initiate the QLC programming of the corresponding DIE;

[0011] use the WL Buffer to sequentially perform the same processing on other DIEs and wait for the QLC programming of all the DIEs to be completed.

[0012] In one embodiment, the step of reading out the data from the SLC physical block to the WL Buffer and transmitting the data to the QLC physical block of the corresponding DIE after the data is written into the SLC physical block further comprises:

[0013] only move the data from the SLC physical block to the QLC physical block within the same DIE.

[0014] In one embodiment, the step of reserving part of the SLC physical blocks inside the solid state disk and always preferentially writing into the SLC physical blocks whenever the host writes data further comprises:

[0015] the host writes data and judges whether the current SLC physical block has been written full;

[0016] if the current SLC physical block has been written full, then re-allocate a new set of blank SLC physical blocks.

[0017] In one embodiment, the step of using the WL Buffer to sequentially perform the same processing on other DIEs and waiting for the QLC programming of all the DIEs to be completed further comprises:

[0018] if the data in the SLC physical block are all moved to the QLC physical block, then release the SLC physical block for storing the data subsequently written by the host.

[0019] A memory-limited QLC writing device, comprising:

[0020] a writing module, configured to reserve part of SLC physical blocks inside a solid state disk and always preferentially write into the SLC physical blocks whenever the host writes data;

[0021] a reservation module, configured to reserve a smaller memory area inside the solid state disk as a WL Buffer;

[0022] a transmission module, configured to read out the data from the SLC physical block to the WL Buffer and transmit the data to the QLC physical block of the corresponding DIE after the data is written into the SLC physical block;

[0023] A programming module, which is used to release the WL Buffer and initiate QLC programming for the corresponding DIE;

[0024] A repetition processing module is used to perform the same processing on other DIEs sequentially using the WL Buffer, and wait for the QLC programming of all DIEs to be completed.

[0025] In one embodiment, the transmission module is further configured to:

[0026] Data transfer from SLC physical blocks to QLC physical blocks is performed only within the same DIE.

[0027] In one embodiment, the device further includes a determining module, the determining module being used to:

[0028] The host writes data and determines whether the current SLC physical block is full.

[0029] If the current SLC physical block is full, a new set of empty SLC physical blocks will be reallocated.

[0030] In one embodiment, the device further includes a release module, the release module being used for:

[0031] If all the data in the SLC physical block is moved to the QLC physical block, then the SLC physical block is released to store the data subsequently written by the host.

[0032] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of any of the methods described above.

[0033] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above methods.

[0034] The aforementioned memory-constrained QLC writing method, apparatus, computer device, and storage medium reserve a portion of SLC physical blocks within the solid-state drive (SSD). Whenever the host writes data, it prioritizes writing to these SLC physical blocks. A small memory area is reserved within the SSD as a write-level buffer (WL Buffer). After data is written to the SLC physical blocks, it is read from the SLC physical blocks into the WL Buffer and transferred to the QLC physical block of the corresponding DIE. The WL Buffer is released, and QLC programming for the corresponding DIE is initiated. The same process is then performed on other DIEs sequentially using the WL Buffer, and the process waits for all DIEs to complete their QLC programming. This invention optimizes the data migration rules and buffer release, enabling data migration to be completed with minimal memory usage. This significantly reduces the memory requirements for multiple QLC programming operations in memory-constrained SSDs, thereby lowering costs. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of a typical NAND flash memory structure in existing technologies;

[0036] Figure 2 A schematic diagram illustrating multi-pass programming in existing technologies;

[0037] Figure 3 This is a flowchart illustrating a memory-constrained QLC write method in one embodiment;

[0038] Figure 4 This is a schematic diagram of a QLC writing method introduced in one embodiment;

[0039] Figure 5 This is a sequence diagram of NAND operations of multiple DIEs along a time axis in one embodiment;

[0040] Figure 6 This is a flowchart illustrating a memory-constrained QLC write method in another embodiment;

[0041] Figure 7 This is a block diagram of a memory-constrained QLC writing device in one embodiment;

[0042] Figure 8 This is a block diagram of a memory-constrained QLC writing device in another embodiment;

[0043] Figure 9 This is a block diagram of a memory-constrained QLC writing device in another embodiment;

[0044] Figure 10 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0046] Typical NAND components include Figure 1 As shown, DIE represents a unit that can be operated independently and concurrently; Block is a unit that can be erased independently, and the entire Block must be erased before the next write after the data at each physical location within it is written; WL: Wordline, a programming unit, which includes one or more Pages; Pages within the same physical block must be programmed in sequence: 0->1->2->3…; Page is a reading unit.

[0047] DIE's physical blocks can work in different modes. Taking QLC as an example, it can work in SLC mode, where each WL contains one Page, and only one programming is needed to complete the data solidification for subsequent reading; it can also work in QLC mode, where each WL contains four Pages, and two programmings are needed to complete the data solidification, i.e., 2Pass. When only 1Pass programming is completed, the data cannot be read.

[0048] like Figure 2 As shown, taking an SSD containing 8 internal DIEs as an example, for ease of explanation, the maximum number of WLs that have not completed 2Pass programming is 5: When the host writes data, the SSD internally writes to the QLC physical block. To ensure concurrency, each DIE has one QLC physical block for data writing. Each QLC physical block is programmed according to the WL order: WL 0 -> WL 1 -> WL 2 -> WL 3. Each WL needs to be programmed twice, and the WLs are interleaved according to certain rules: taking the diagram as an example, the programming is performed in the following order: WL0Pass1, WL 1Pass1, WL 2Pass1, WL 3Pass1, WL 4Pass1, WL 0Pass2, WL 5Pass1, WL 1Pass2... For any given pass of programming, the corresponding WL data, i.e., the data of 4 pages, needs to be transferred to the corresponding DIE for programming. Before the Pass 2 programming for any given WL is completed, its data cannot be correctly read from the corresponding QLC physical block WL / Page. Therefore, when writing to the QLC in this SSD, a maximum of 5*4*8=160 physical pages, corresponding to several MB of data, are in an unstable state (unable to be read from the already written NAND physical block), thus requiring the corresponding data to be cached in memory.

[0049] Note that if concurrency is further increased (more physical blocks are in concurrent programming state), the corresponding unstable data area will increase linearly. In existing DRAMLESS SSD applications, such a large memory overhead will greatly exacerbate the demand for on-chip memory of the SOC, thereby greatly increasing the cost of SOC / SSD.

[0050] Based on this, the present invention proposes a memory-constrained QLC writing method, which aims to reduce the memory requirements for multiple QLC programming in memory-constrained SSDs.

[0051] In one embodiment, such as Figure 3 As shown, a memory-constrained QLC write method is provided, which includes:

[0052] Step 302: Reserve a portion of SLC physical blocks inside the solid-state drive, and always write data to the SLC physical blocks first whenever the host writes data;

[0053] Step 304: Reserve a small memory area inside the solid-state drive as a WL buffer;

[0054] Step 306: After the data is written to the SLC physical block, the data is read from the SLC physical block into the WL Buffer and transferred to the QLC physical block of the corresponding DIE.

[0055] Step 308: Release the WL Buffer and initiate QLC programming for the corresponding DIE;

[0056] Step 310: Use WL Buffer to perform the same processing on the other DIEs in sequence, and wait for the QLC programming of all DIEs to be completed.

[0057] This embodiment provides a memory-constrained QLC writing method. Addressing the shortcomings of existing solutions, this method first writes host data to a physical block (such as an SLC) that can be read using 1-pass programming. Then, it uses limited memory to migrate the data from the SLC to the QLC. Furthermore, to avoid read / write conflicts between multiple DIEs, this solution optimizes the data migration rules and buffer release, enabling data migration to be completed with minimal memory usage.

[0058] Specifically, refer to Figure 4 The diagram illustrates the introduced QLC write method. First, a portion of SLC physical blocks are reserved within the SSD. When all the SLC physical blocks are used up, a new set of blank SLC physical blocks is allocated. When the host writes data, it is always written to the SLC physical blocks first.

[0059] In addition, a small memory area is reserved inside the SSD: the WL Buffer, which contains a single DIE concurrent programming unit, such as a WL, which is four Pages.

[0060] After user data is written to the SLC physical block, the data is read from the SLC physical block into the WL Buffer and transferred to the QLC physical block of the corresponding DIE. The WL Buffer is then released, and programming of the QLC physical block of the corresponding DIE is initiated. Using the same WL Buffer, the same process is performed on other DIEs in sequence.

[0061] Wait for the QLC programming to complete, repeat the above process, and once all the data in the SLC physical block has been moved to the QLC physical block, the SLC physical block can be released to store data subsequently written by the host.

[0062] In this scheme, a single WL Buffer (only tens of KB) is used for time-division multiplexing among multiple DIEs: it stores the data read from the SLC and then transmits it to the QLC physical block. The corresponding DIE can then release the buffer, and QLC programming is performed internally within the DIE. The released WL Buffer can then be used as a data transfer for the next DIE to initiate QLC programming.

[0063] It's important to note that QLC programming time is significantly longer than SLC read time, as well as the time required to transfer data from NAND to the WL buffer or vice versa. Therefore, even with time-division multiplexing of the limited WL buffer, concurrent programming of the QLC physical blocks of each DIE can still be guaranteed, thus ensuring performance.

[0064] In this embodiment, a portion of SLC physical blocks are reserved inside the solid-state drive (SSD), and data is always written to these SLC physical blocks first whenever the host writes data. A small memory area is reserved inside the SSD as a WL buffer. After data is written to the SLC physical blocks, the data is read from the SLC physical blocks into the WL buffer and transferred to the QLC physical block of the corresponding DIE. The WL buffer is released, and QLC programming for the corresponding DIE is initiated. The same process is then performed on other DIEs using the WL buffer, and the system waits for all DIEs to complete their QLC programming. This solution optimizes the data migration rules and buffer release, enabling data migration to be completed with less memory, significantly reducing the memory requirements for multiple QLC programming operations in memory-constrained SSDs, thereby reducing costs.

[0065] In one embodiment, after data is written to the SLC physical block, the step of reading the data from the SLC physical block to the WLBuffer and transferring it to the QLC physical block of the corresponding DIE further includes: performing data transfer from the SLC physical block to the QLC physical block only within the same DIE.

[0066] When a DIE is performing QLC programming, it cannot respond to the command to read the SLC physical block. Therefore, in order to avoid the SLC read being blocked and the WL Buffer being invalidally occupied, this embodiment further restricts the data transfer from the SLC physical block to the QLC physical block to only within the same DIE.

[0067] For specific details, please refer to Figure 5 The diagram shows the NAND operation sequence of multiple DIEs along the time axis:

[0068] 5.1. DIE 0-7 concurrently write host data to SLC: SLC Program.

[0069] 5.2 DIE 0-7 concurrently read SLC physical blocks.

[0070] 5.3 DIE 0 initiates the loading of data into the WL Buffer.

[0071] 5.4. DIE 0 initiates data transmission to the QLC physical block.

[0072] 5.5. DIE 0 initiates QLC physical block programming.

[0073] 5.6 DIE 1 initiates the loading of data into the WL Buffer.

[0074] 5.7 DIE 1 initiates data transmission to the QLC physical block.

[0075] 5.8. DIE 1 initiates QLC physical block programming.

[0076] 5.9. Initiate similar actions for DIE 2-7 in sequence.

[0077] During this process, only “Data Load to WL Buffer” and “Data Out to QLC Block” need to be executed serially in each DIE. Since the data migration from SLC to QLC physical blocks can only be performed within the same DIE, there will be no situation where SLC reads are blocked by QLC programming and thus cannot be executed for a long time.

[0078] In one embodiment, the step of reserving a portion of SLC physical blocks inside the solid-state drive, and always prioritizing writing data to the SLC physical blocks whenever the host writes data, further includes:

[0079] The host writes data and determines whether the current SLC physical block is full.

[0080] If the current SLC physical block is full, a new set of empty SLC physical blocks will be reallocated.

[0081] In one embodiment, after performing the same processing on other DIEs sequentially using the WL Buffer and waiting for the QLC programming of all DIEs to complete, the method further includes:

[0082] If all the data in the SLC physical block is moved to the QLC physical block, then the SLC physical block is released to store the data subsequently written by the host.

[0083] In one embodiment, such as Figure 6 As shown, a memory-constrained QLC write method is provided. The specific implementation process of this method includes:

[0084] 6.1. Host writes data.

[0085] 6.2 Determine if the current SLC Buffer is full. If yes, continue to 6.3; otherwise, jump to 6.4.

[0086] 6.3. Allocate a new set of blank SLC Buffers.

[0087] 6.4 Write host data to SLC Buffer.

[0088] 6.5 Read the data from the DIE 0SLC Buffer into the WL Buffer.

[0089] 6.6 Transfer the WL Buffer to the DIE 0QLC Block, initiate the programming of the corresponding WL Pass, and release the WL Buffer.

[0090] 6.7 Read the data from the DIE 1SLC Buffer into the WL Buffer.

[0091] 6.8 Transfer the WL Buffer to the DIE 1QLC Block, initiate the programming of the corresponding WL and Pass, and release the WL Buffer.

[0092] 6.9. Use the WL Buffer sequentially to initiate the programming of the corresponding QLC and WL Pass for other DIEs (2 / 3 / ...).

[0093] 6.10. Wait for the QLC programming of all DIEs to complete.

[0094] 6.11. Determine if there are other WL passes that require programming. If yes, proceed to 6.5; otherwise, proceed to 6.1.

[0095] In this embodiment, only a single concurrent QLC WL memory buffer is retained to complete the data migration from SLC to QLC. After the data transfer to the QLC physical block is completed, the buffer can be released for data migration of other DIEs, which greatly reduces the memory requirements for multiple QLC programming in memory-constrained SSDs, thereby reducing costs.

[0096] It should be understood that, although Figures 1-6 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figures 1-6 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0097] In one embodiment, such as Figure 7 As shown, a memory-constrained QLC writing device 700 is provided, the device comprising:

[0098] The write module 701 is used to reserve a portion of the SLC physical blocks inside the solid-state drive, and to always write data to the SLC physical blocks first whenever the host writes data.

[0099] The retention module 702 is used to retain a small memory area inside the solid-state drive as a WL buffer;

[0100] The transmission module 703 is used to read data from the SLC physical block into the WL Buffer and transmit it to the QLC physical block of the corresponding DIE after the data is written to the SLC physical block.

[0101] Programming module 704, the programming module is used to release the WL Buffer and initiate QLC programming of the corresponding DIE;

[0102] The repetition processing module 705 is used to perform the same processing on other DIEs sequentially using the WL Buffer, and wait for the QLC programming of all DIEs to be completed.

[0103] In one embodiment, the transmission module 703 is further configured to:

[0104] Data transfer from SLC physical blocks to QLC physical blocks is performed only within the same DIE.

[0105] In one embodiment, such as Figure 8 As shown, a memory-constrained QLC writing device 700 is provided, which further includes a judgment module 706, the judgment module being used for:

[0106] The host writes data and determines whether the current SLC physical block is full.

[0107] If the current SLC physical block is full, a new set of empty SLC physical blocks will be reallocated.

[0108] In one embodiment, such as Figure 9 As shown, a memory-constrained QLC writing device 700 is provided, which further includes a release module 707, the release module being used for:

[0109] If all the data in the SLC physical block is moved to the QLC physical block, then the SLC physical block is released to store the data subsequently written by the host.

[0110] For specific limitations on memory-constrained QLC writing devices, please refer to the limitations on memory-constrained QLC writing methods mentioned above, which will not be repeated here.

[0111] In one embodiment, a computer device is provided, the internal structure of which can be shown as follows: Figure 10 As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a memory-constrained QLC (Quick Catch-Checked) writing method.

[0112] Those skilled in the art will understand that Figure 10 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0113] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps in the various method embodiments described above.

[0114] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps in the various method embodiments described above.

[0115] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0116] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0117] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A memory-constrained QLC writing method, the method comprising: A portion of SLC physical blocks are reserved inside the solid-state drive, and data is always written to these SLC physical blocks first whenever the host writes data. It also includes: the host writes data and determines whether the current SLC physical block is full; if the current SLC physical block is full, a new set of blank SLC physical blocks is reallocated. A small memory area is reserved inside the solid-state drive as a WL buffer; After data is written to the SLC physical block, the data is read from the SLC physical block into the WL Buffer and transferred to the QLC physical block of the corresponding DIE; it also includes: data transfer from SLC physical block to QLC physical block only within the same DIE; Release the WL Buffer and initiate QLC programming for the corresponding DIE; The same process is performed on other DIEs sequentially using the WL Buffer, and the QLC programming of all DIEs is waited for to be completed; it also includes: if all the data in the SLC physical block is moved to the QLC physical block, the SLC physical block is released to store the data subsequently written by the host.

2. A memory-constrained QLC writing device, characterized in that, The memory-constrained QLC writing device includes: The write module is used to reserve a portion of the SLC physical blocks inside the solid-state drive, and the data is always written to the SLC physical blocks first whenever the host writes data. A reservation module is used to reserve a small memory area inside the solid-state drive as a WLBuffer. The transmission module is used to read data from the SLC physical block to the WL Buffer and transmit it to the QLC physical block of the corresponding DIE after the data is written to the SLC physical block; the transmission module is also used to perform data transfer from SLC physical block to QLC physical block only within the same DIE. A programming module, which is used to release the WL Buffer and initiate QLC programming for the corresponding DIE; A repetition processing module is used to perform the same processing on other DIEs sequentially using the WL Buffer, and wait for the QLC programming of all DIEs to be completed; The device further includes a judgment module, which is used to: write data to the host and determine whether the current SLC physical block is full; if the current SLC physical block is full, then reallocate a new set of blank SLC physical blocks. The device further includes a release module, which is used to: release the SLC physical block to store data subsequently written by the host after all the data in the SLC physical block has been moved to the QLC physical block.

3. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method of claim 1.

4. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method of claim 1.

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