A method for detecting a direct current fault of a hybrid multi-terminal direct current system

Abstract

The application discloses a DC fault detection method of a hybrid multi-terminal DC system, comprising the following steps: S1, establishing a simplified model of the hybrid multi-terminal DC system for DC fault analysis; S2, deriving a time-domain analytical expression of an initial DC fault current based on the simplified model of the hybrid multi-terminal DC system for DC fault analysis established in step S1; and S3, detecting the DC fault of the hybrid multi-terminal DC system by calculating the average value of the DC reactor voltage within a specified time period T based on the simplified model of the hybrid multi-terminal DC system for DC fault analysis established in step S1 and the time-domain analytical expression of the initial DC fault current in step S2. The time-domain analytical expression of the initial DC fault current of the hybrid multi-terminal DC system is derived based on the simplified model of the hybrid multi-terminal DC system for DC fault analysis, and the DC fault of the hybrid multi-terminal DC system can be quickly and accurately judged without high sampling frequency.

Description

Technical Field

[0001] This invention relates to the field of power technology, and more specifically to a method for detecting DC faults in a hybrid multi-terminal DC system. Background Technology

[0002] With the large-scale integration of new energy sources and the rapid development of flexible DC transmission technology (VSC-HVDC), flexible DC transmission technology is increasingly being concentrated in multi-terminal grids. Compared with AC grids, DC grids have many advantages: 1) Most renewable energy sources such as wind and solar can be directly connected to the grid through DC boosting, improving the utilization rate of new energy generation; 2) DC grids do not have problems with frequency and power angle stability; 3) They can achieve fast and flexible power flow control, enabling wide-area power regulation and mutual assistance.

[0003] However, while the integration of new energy sources into the DC power grid and the interconnection of AC and DC power bring significant economic benefits, the operation of the interconnected power grid has undergone substantial changes, resulting in complex AC / DC hybrid structures and posing new challenges to fault detection in multi-terminal DC systems. For example, there is a lack of effective new methods for multi-terminal DC fault detection. Existing multi-terminal DC protection systems mostly employ high-speed traveling wave protection, achieving rapid fault isolation by detecting the rate of change of current and voltage in the faulty line. However, this method requires extremely high sampling frequencies, has poor fault tolerance, and limited resistance to excessive resistance. Therefore, it is essential to design new methods suitable for multi-terminal DC fault detection, taking into account the fault characteristics of multi-terminal DC systems. Summary of the Invention

[0004] In order to overcome the shortcomings of the above technologies, the present invention provides a DC fault detection method for a hybrid multi-terminal DC system.

[0005] Terminology Explanation:

[0006] 1. HVDC: High Voltage Direct Current.

[0007] 2. MTDC: Multi-terminal HVDC, a hybrid multi-terminal DC system.

[0008] 3. LCC: Line Commutated Converter.

[0009] 4. MMC: Modular Multilevel Converter.

[0010] The technical solution adopted by this invention to overcome its technical problems is:

[0011] A method for detecting DC faults in a hybrid multi-terminal DC system includes the following steps:

[0012] S1. Establish a simplified model of a hybrid multi-terminal DC system for DC fault analysis;

[0013] S2. Based on the simplified model of the hybrid multi-terminal DC system established in step S1 for DC fault analysis, derive the time-domain analytical expression of the initial DC fault current.

[0014] S3. Based on the simplified model of the hybrid multi-terminal DC system for DC fault analysis established in step S1 and the time-domain expression of the initial DC fault current in step S2, the DC fault of the hybrid multi-terminal DC system is detected by calculating the average value of the DC reactor voltage within a specified time period T.

[0015] Furthermore, the simplified model of the hybrid multi-terminal DC system used for DC fault analysis is specifically described by the following equations:

[0016]

[0017]

[0018] Equation (1) represents the equation of the LCC model, and equation (2) represents the equation of the MMC model;

[0019] In equation (1), i d and u d These represent the DC bus current and voltage, respectively; Δ represents the general deviation from equilibrium; Δi d and Δu d Let L represent the changes in DC bus current and DC bus voltage during a fault compared to their equilibrium states, respectively; s is the complex frequency of the Laplace transform; L d The inductance of the smoothing reactor; d γ Let d be the equivalent commutation resistance, where d γ =3ω s L γ / π,ω s Let L be the angular frequency of the system. γ k is the equivalent inductance between the LCC and its connected AC power source. α α is the correlation coefficient; α is the firing angle of the LCC. and These are the proportional gain and integral gain of the LCC constant current control, respectively; Vo is the ideal no-load voltage of the LCC, where... E is the root mean square line voltage of the AC power supply; R L and C LThese are the equivalent resistance and capacitance of the LCC-based rectifier, respectively, considering the control effect; α0 and α1 represent the initial steady-state and post-fault steady-state of the firing angle, respectively;

[0020] In equation (2), R M L M C M These are the equivalent resistance, equivalent inductance, and equivalent capacitance of an MMC-based rectifier considering control effects; C sm The equivalent capacitance for each MMC submodule; N is the number of MMC submodules; R arm and L arm These are the equivalent arm resistance and equivalent arm inductance, respectively; ∑R on The sum of the on-resistances of the insulated gate bipolar transistors in each bridge arm.

[0021] Furthermore, in equation (1), Specifically, it is obtained by simplifying the following equations simultaneously:

[0022] The dynamic equations of the LCC model are described as follows:

[0023]

[0024] The constant current control equation for an LCC converter-type power supply is:

[0025]

[0026] In equation (1-2), Reference DC bus current;

[0027] Using the Taylor expansion of cosα within the specific interval [α0, α1], we obtain the following expression:

[0028]

[0029] Based on equations (1-1), (1-2), and (1-3), a simplified model of the LCC converter for DC fault analysis is obtained by combining and simplifying these equations:

[0030]

[0031] Furthermore, in step S2, the time-domain analytical expression of the initial DC fault current can be described by the following equation:

[0032]

[0033]

[0034] Equation (3) represents the time-domain analytical expression of the initial DC fault current without fault resistor, and Equation (4) represents the time-domain analytical expression of the initial DC fault current with fault resistor.

[0035] In the above formula, the parameter at the fault point is marked as 0; the parameter at the fault line rt is marked as rt; the line parameters pt and qt are marked as pt and qt, respectively; i r0 The current flowing into fault point 0 from port r; i pt is the port current flowing out of line pt; u0 is the voltage at the fault point before the fault occurred.

[0036] τ r τ p These are constants used to simplify the formula; R br0 L br0 These are the branch resistance and branch inductance between port r and the fault point, respectively; R bpt L bpt These are the branch resistance and branch inductance of line pt, respectively; L bqt R is the branch inductance of line qt; lt0 L lt0 The equivalent resistance and equivalent inductance between line lt and fault point 0; k rt Indicate i r0 with i t0 The ratio of i to i t0 R represents the current flowing from line lt into the fault point; f This is the fault resistor.

[0037] Furthermore, equation (3) is obtained by simplifying the following equations simultaneously:

[0038] The faulty line current can be directly calculated based on the circuit to the left of the fault point:

[0039]

[0040] In equation (3-1), C r This represents the branch capacitance at port r;

[0041] Define the branch impedances of the pt and qt lines as:

[0042]

[0043] In equation (3-2), Z bpt Z bqt Let C be the branch impedances of lines pt and qt, respectively; p R represents the branch capacitance at port p; bqt C represents the branch resistance of line qt; q Let be the branch capacitance at port q;

[0044] Kirchhoff's voltage law and Kirchhoff's current law yield the following equation:

[0045]

[0046] In equation (3-3), u t i is the port voltage of line qt; qt i is the port current flowing out of line qt; t0 The current flowing from line lt into fault point 0;

[0047] By combining equations (3-1), (3-2), and (3-3) and simplifying, we obtain the final time-domain expression:

[0048]

[0049] Furthermore, formula (4) is obtained by simplifying the following equations simultaneously:

[0050] For the Laplace fault component circuit of a hybrid multi-terminal DC system, the fault resistor R is included. f DC faults are addressed by introducing an equivalent branch fault resistance R. fr0 and R ft0 The original circuit is decoupled into two independent parts based on the fault point, as follows:

[0051]

[0052] In equation (4-1), R fr0 R is the equivalent branch fault resistance on the port r side; ft0 i is the equivalent branch fault resistance on the lt side of the line; t0 The current flowing into fault point 0 from line lt; k rt Indicate i r0 with i t0 The ratio, i.e., k rt =i r0 / i t0 ;

[0053] Using Kirchhoff's voltage law and Kirchhoff's current law, i r0 and i t0 Described as:

[0054]

[0055] According to equation (4-2), k rt It can be represented as follows:

[0056]

[0057] Combining equations (4-2) and (4-3), k is reduced by neglecting the resistance and capacitance components in the high-frequency region. rt Further simplification yields the final time-domain expression:

[0058]

[0059] Furthermore, in step S3, the single-ended DC fault detection scheme based on the transient average value of the DC reactor voltage can be described by the following formula:

[0060]

[0061] In the above formula, Indicates DC reactor L tmn The average value of the voltage across the terminals over a specified time period T; and These are the lower and upper limits of the voltage threshold, respectively; K rel To account for the reliability factor of the model error; u n This refers to the nominal DC bus voltage. and L represents the average voltage across the smoothing reactor tmn and across the smoothing reactor tnm during the time period T; tmn and L tnm L represents the inductance of smoothing reactor tmn and smoothing reactor tnm, respectively; bmn and L bnm L represents the equivalent inductance of branches mn and nm, respectively; bzn and L bkn L represents the equivalent inductance of branch zn and branch kn, respectively; tnk This represents the inductance of the smoothing reactor tnk.

[0062] The beneficial effects of this invention are:

[0063] 1. This invention proposes for the first time a simplified model of a hybrid multi-terminal DC system for DC fault analysis. Specifically, it is based on a simplified line circulating current model for DC fault analysis. By ignoring the resistance and capacitance components in the high-frequency domain, the original network analysis is significantly simplified. The LCC-based rectifier with control effect is regarded as an equivalent RLC circuit. The time-domain analytical expression of the initial DC fault current of the system is derived based on the simplified model of DC fault analysis of the hybrid multi-terminal DC system. This method can quickly and accurately determine the DC fault of the hybrid multi-terminal DC system without requiring a high sampling frequency.

[0064] 2. Based on the control equations commonly used in converter-type power supplies, this invention derives the constraints of converter-type power supplies under different control modes.

[0065] 3. This invention also provides detection criteria for quickly and accurately identifying DC faults in MTDC systems, providing theoretical guidance for the design of various controllers. Attached Figure Description

[0066] Figure 1 This is a flowchart of a DC fault detection method for a hybrid multi-terminal DC system according to an embodiment of the present invention;

[0067] Figure 2 This is a schematic diagram of the LCC model for DC fault analysis as described in an embodiment of the present invention;

[0068] Figure 3 This is a schematic diagram of the basic structure and DC fault model of the MMC described in an embodiment of the present invention;

[0069] Figure 4 This is a schematic diagram of the three-terminal hybrid HVDC system described in an embodiment of the present invention;

[0070] Figure 5 This is a schematic diagram of a three-terminal hybrid HVDC system as illustrated in an embodiment of the present invention;

[0071] Figure 6 This is a schematic diagram of the Laplace circuit of the fault element network of the system studied under the inter-pole short-circuit fault according to the embodiments of the present invention;

[0072] Figure 7 The figure shows the simulation results of DC fault detection in the MTDC system according to an embodiment of the present invention. Detailed Implementation

[0073] To facilitate a better understanding of the present invention by those skilled in the art, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The following are merely exemplary and do not limit the scope of protection of the present invention.

[0074] This embodiment describes a DC fault detection method for a hybrid multi-terminal DC system. By using a simplified model of the hybrid multi-terminal DC system for DC fault analysis and combining it with actual system parameters, the method can quickly and accurately determine the fault problem of the system. Specifically, as shown... Figure 1 As shown, it includes the following steps:

[0075] S1. Establish a simplified model of a hybrid multi-terminal DC system for DC fault analysis.

[0076] Specifically, the simplified model of a hybrid multi-terminal DC system used for DC fault analysis requires the simultaneous establishment of two models: the LCC model and the MMC model.

[0077]

[0078]

[0079] Equation (1) represents the equation of the LCC model, and equation (2) represents the equation of the MMC model.

[0080] Specifically, in formula (1), Specifically, it is obtained by simplifying the following equations simultaneously:

[0081] The dynamic equations of the LCC model are described as follows:

[0082]

[0083] In equation (1-1), i d and u d These represent the DC bus current and voltage, respectively, where Vo is the ideal no-load voltage of the LCC. E is the root mean square line voltage of the AC power supply; α is the firing angle of the LCC; d γ Let d be the equivalent commutation resistance, where d γ =3ω s L γ / π,ω s Let L be the angular frequency of the system. γ L is the equivalent inductance between the LCC and its connected AC power source; d The inductance of the smoothing reactor;

[0084] The constant current control equation for an LCC converter-type power supply is:

[0085]

[0086] In equation (1-2), and These are the proportional gain and integral gain of the LCC constant current control, respectively.

[0087] Using the Taylor expansion of cosα within the specific interval [α0, α1], we obtain the following expression:

[0088]

[0089] In equation (1-3), α0 and α1 represent the initial steady state and the post-fault steady state of the firing angle, respectively;

[0090] Based on equations (1-1), (1-2), and (1-3), a simplified model of the LCC converter for DC fault analysis is obtained by combining and simplifying these equations:

[0091]

[0092] In the above formula, Δ represents the general deviation from equilibrium; Δi d and Δu dLet represent the changes in DC bus current and DC bus voltage during a fault compared to their equilibrium state, respectively; s is the complex frequency of the Laplace transform; k α The correlation coefficient;

[0093] Based on the above transfer function, the LCC rectifier can be equivalently represented as a series-connected RLC circuit.

[0094] like Figure 2 As shown, Figure 2 This is a schematic diagram of an LCC model used for DC fault analysis.

[0095] An LCC rectifier can be represented by an equivalent series-connected RLC circuit, R L and C L The equivalent resistance and capacitance of an LCC-based rectifier, considering control effects, can be expressed as follows:

[0096]

[0097] Please see Figure 3 , Figure 3 A schematic diagram of the basic structure and DC fault model of MMC;

[0098] The inductance, resistance, and capacitance in its terminal characteristic equivalent circuit diagram depend only on its physical parameters and are constants, which can be described as follows:

[0099]

[0100] In equation (2), R M L M C M These are the equivalent resistance, equivalent inductance, and equivalent capacitance of an MMC-based rectifier considering control effects; C sm The equivalent capacitance for each MMC submodule; N is the number of MMC submodules; R arm and L arm These are the equivalent arm resistance and equivalent arm inductance, respectively; ∑R on The sum of the on-resistances of the insulated gate bipolar transistors in each bridge arm.

[0101] S2. Based on the simplified model of the hybrid multi-terminal DC system established in step S1 for DC fault analysis, derive the time-domain analytical expression of the initial DC fault current.

[0102] like Figure 4 As shown, Figure 4 This is a schematic diagram of a three-terminal hybrid HVDC system. In the diagram, L... tmn This represents the inductance of the DC reactor on the mn line and near the m side. (B) mn This refers to the DC circuit breaker near the m side of the mn line.

[0103] like Figure 6 As shown, Figure 6 This is a schematic diagram of the Laplace circuit of the fault element network of the system under inter-pole short-circuit fault.

[0104] The time-domain analytical expression of the initial DC fault current can be described by the following equation:

[0105]

[0106]

[0107] Equation (3) represents the time-domain analytical expression of the initial DC fault current without fault resistance, and Equation (4) represents the time-domain analytical expression of the initial DC fault current with fault resistance. The parameter at the fault point is labeled 0; the parameter at the fault line rt is labeled rt; the parameters of the pt and qt lines are labeled pt and qt, respectively; i r0 This represents the current flowing into fault point 0 from port r, i pt This represents the port current flowing out of line pt.

[0108] Figure 5 Taking a DC fault on line 14 as an example, let r = 1, p = 2, q = 3, the branch parameters can be described as follows:

[0109]

[0110] Specifically, equation (3) is obtained by simplifying the following equations simultaneously:

[0111] The fault line current can be directly calculated based on the circuit to the left of the fault point (LHS):

[0112]

[0113] In equation (3-1), u0 is the voltage at the fault point before the fault occurs; R br0 L br0 These are the branch resistance and branch inductance between port r and the fault point, respectively; C r This represents the branch capacitance at port r;

[0114] Define the branch impedances of the pt and qt lines as:

[0115]

[0116] In equation (3-2), Z bpt Z bqt Let C be the branch impedances of lines pt and qt, respectively; p R represents the branch capacitance at port p; bqt C represents the branch resistance of line qt; qLet be the branch capacitance at port q;

[0117] From Kirchhoff's Voltage Law (KVL) and Current Law (KCL), we obtain the following equation:

[0118]

[0119] In equation (3-3), u t i is the port voltage of line qt; qt i is the port current flowing out of line qt; t0 The current flowing from line lt into fault point 0;

[0120] By combining equations (3-1), (3-2), and (3-3) and simplifying, we obtain the final time-domain expression:

[0121]

[0122] In the above formula, τ r τ p These are constants used to simplify the formula; R bpt L bpt These are the branch resistance and branch inductance of line pt, respectively; L bqt R is the branch inductance of line qt; lt0 L lt0 The equivalent resistance and equivalent inductance between line lt and fault point 0; k rt Indicate i r0 with i t0 The ratio of i to i t0 R represents the current flowing from line lt into the fault point; f This is the fault resistor.

[0123] Specifically, formula (4) is obtained by simplifying the following equations simultaneously:

[0124] For the Laplace fault component circuit of a hybrid multi-terminal DC system, the fault resistor R is included. f DC faults are addressed by introducing an equivalent branch fault resistance R. fr0 and R ft0 The original circuit is decoupled into two independent parts based on the fault point, as follows:

[0125]

[0126] In equation (4-1), R fr0 R is the equivalent branch fault resistance on the port r side; ft0 i is the equivalent branch fault resistance on the lt side of the line; t0 The current flowing into fault point 0 from line lt; k rt Indicate i r0with i t0 The ratio, i.e., k rt =i r0 / i t0 .

[0127] Using Kirchhoff's voltage law and Kirchhoff's current law, i r0 and i t0 Described as:

[0128]

[0129] According to equation (4-2), k rt It can be represented as follows:

[0130]

[0131] Combining equations (4-2) and (4-3), k is reduced by neglecting the resistance and capacitance components in the high-frequency region. rt Further simplification yields the final time-domain expression:

[0132]

[0133] S3. Based on the simplified model of the hybrid multi-terminal DC system established in step S1 for DC fault analysis and the time-domain analytical expression of the initial DC fault current in step S2, and by calculating the average value of the DC reactor voltage over a specified time period T, the DC fault in the hybrid multi-terminal DC system is detected. Specifically,

[0134]

[0135] In the above formula, Indicates DC reactor L tmn The average value of the voltage across the terminals over a specified time period T; and These are the lower and upper limits of the voltage threshold, respectively; K rel To account for the reliability factor of the model error; u n This refers to the nominal DC bus voltage. and L represents the average voltage across the smoothing reactor tmn and across the smoothing reactor tnm during the time period T; tmn and L tnm L represents the inductance of smoothing reactor tmn and smoothing reactor tnm, respectively; bmn and L bnm L represents the equivalent inductance of branches mn and nm, respectively; bzn and L bkn L represents the equivalent inductance of branch zn and branch kn, respectively; tnk This represents the inductance of the smoothing reactor tnk.

[0136] The following uses B 24 Taking the most severe fault scenario as an example, the upper and lower limits of the fault protection criteria can be described as follows:

[0137]

[0138] Its operating principles can be described as follows:

[0139]

[0140] in, and These are the lower and upper limits of the voltage threshold, respectively; K rel A reliability factor is included to account for model errors; L represents the average voltage across the smoothing reactor t24 and across the smoothing reactor t42 within time period T; t24 and L t42 L represents the inductance of smoothing reactor t24 and smoothing reactor t42, respectively; b24 and L b42 L represents the equivalent inductance of branch 24 and branch 42, respectively; b14 and L b34 L represents the equivalent inductance of branch 14 and branch 34, respectively; t43 This represents the inductance of the smoothing reactor t43.

[0141] Based on the simplified model of the hybrid multi-terminal DC system established for DC fault analysis and the derived time-domain expression of the short-circuit current, DC faults in the MTDC system can be detected quickly and accurately by using this judgment criterion and combining it with actual parameters.

[0142] Table 1 shows... Figure 5 The relevant parameters for the system simulation shown are as follows.

[0143] Table 1

[0144]

[0145]

[0146] Please see Figure 7 , Figure 7 The figure shows the simulation results of DC fault detection in the MTDC system. Figure 7Three models—the detailed model, the RL model, and the proposed model—are used to describe the dynamic changes of DC reactor voltage under various fault conditions. The detailed model, a frequency-varying parameter model, is the most accurate, considering the distributed parameters and frequency characteristics of the line. The RL model is a simplified model obtained by modeling the line using equivalent resistance and inductance. The proposed model is the model described in this invention. Of the three models, the detailed model is the most realistic, considering many complex factors, making it difficult to analyze and requiring numerical calculations. The proposed model, through appropriate simplification, reflects the basic characteristics of the detailed model while reducing complexity, enabling analytical theoretical analysis. The RL model is the simplest model, considering only equivalent R and L, ignoring many characteristics, and cannot derive analytical protection expressions.

[0147] Specifically, Figure 7 (a) Comparison of L t24 When a metallic fault occurs on line 24 (the furthest fault within the zone), L in the three models t24 The voltage. Due to the traveling wave process, L in the detailed model t24 The voltage oscillates around the RL model and the proposed model. For example... Figure 7 As shown in (b), the detailed model can effectively suppress reactor voltage fluctuations by calculating the transient voltage mean, compared to Figure 7 In (a), where the detailed model does not include transient voltage mean calculation, it is clear that calculating the transient voltage mean effectively suppresses reactor voltage fluctuations; Figure 7 In (b), the average transient voltage of the reactor in the detailed model exceeds the threshold at t = 3.0009s and remains above the threshold for several milliseconds, indicating that the average transient voltage is a more stable indicator for DC fault detection. Figure 7 (c) describes L t43 When the most severe external fault occurs between line 34 and line 34, L t24 The average transient voltage of the model is much smaller than the threshold, and the maximum average transient voltage of the detailed model (39.49kV) is much smaller than the threshold, so the protection will not malfunction. In addition, under this condition, the average transient voltage of all three models is much smaller than the threshold, so none of them will malfunction. Figure 7 (d) and Figure 7 (e) are respectively L d Between line 14 and L d Simulation verification results of protection performance under DC fault conditions on the left side, such as... Figure 7 As shown in (d), after a fault in the reverse region, the average transient voltage of the three models rapidly drops below the threshold, enabling them to operate correctly; while for Figure 7 (e) shows a fault outside the reverse zone. The average transient voltage of the three models is still higher than the threshold, and no false alarm will occur. The simulation results verify the selectivity and accuracy of the fault detection scheme.

[0148] In summary, this invention, based on a reasonably simplified DC fault analysis model for hybrid multi-terminal DC (MTDC) systems and a time-domain expression for short-circuit current, can quickly identify DC faults in MTDC systems with high accuracy, providing a reference for controller setup and design.

[0149] The above description only outlines the basic principles and preferred embodiments of the present invention. Those skilled in the art can make many changes and modifications based on the above description, and these changes and modifications should fall within the protection scope of the present invention.

Claims

1. A method for detecting DC faults in a hybrid multi-terminal DC system, characterized in that, Includes the following steps: S1. Establish a simplified model of a hybrid multi-terminal DC system for DC fault analysis; S2. Based on the simplified model of the hybrid multi-terminal DC system established in step S1 for DC fault analysis, derive the time-domain analytical expression of the initial DC fault current. S3. Based on the simplified model of the hybrid multi-terminal DC system for DC fault analysis established in step S1 and the time-domain expression of the initial DC fault current in step S2, the DC fault of the hybrid multi-terminal DC system is detected by calculating the average value of the DC reactor voltage within a specified time period T. In step S1, the simplified model of the hybrid multi-terminal DC system used for DC fault analysis is specifically described by the following equations: ； Equation (1) represents the equation of the LCC model, and equation (2) represents the equation of the MMC model; In equation (1), i d and u d These represent the DC bus current and voltage, respectively; Δ represents the general deviation from equilibrium; Δi d and Δu d Let L represent the changes in DC bus current and DC bus voltage during a fault compared to their equilibrium states, respectively; s is the complex frequency of the Laplace transform; L d The inductance of the smoothing reactor; d γ The equivalent commutation resistance is given by, where, , Let L be the angular frequency of the system. γ The equivalent inductance between the LCC and the AC power supply to which it is connected; α is the correlation coefficient; α is the firing angle of the LCC; and These are the proportional gain and integral gain of the LCC constant current control, respectively; Vo is the ideal no-load voltage of the LCC, where... E is the root mean square line voltage of the AC power supply. and These are the equivalent resistance and capacitance of the LCC-based rectifier, respectively, considering the control effect; α0 and α1 represent the initial steady-state and post-fault steady-state of the firing angle, respectively; In equation (2), R M L M C M These are the equivalent resistance, equivalent inductance, and equivalent capacitance of an MMC-based rectifier considering control effects; C sm The equivalent capacitance for each MMC submodule; N is the number of MMC submodules; and These are the equivalent arm resistance and equivalent arm inductance, respectively; The sum of the on-resistances of the insulated gate bipolar transistors in each bridge arm.

2. The DC fault detection method for a hybrid multi-terminal DC system according to claim 1, characterized in that, In equation (1), Specifically, it is obtained by simplifying the following equations simultaneously: The dynamic equations of the LCC model are described as follows: （1-1） The constant current control equation for an LCC converter-type power supply is: （1-2） In equation (1-2), Reference DC bus current; Using the Taylor expansion of cosα within the specific interval [α0, α1], we obtain the following expression: （1-3） Based on equations (1-1), (1-2), and (1-3), a simplified model of the LCC converter for DC fault analysis is obtained by combining and simplifying these equations: 。 3. The DC fault detection method for a hybrid multi-terminal DC system according to claim 1, characterized in that, In step S2, the time-domain analytical expression of the initial DC fault current can be described by the following equation: （3） （4） Equation (3) represents the time-domain analytical expression of the initial DC fault current without fault resistance, and Equation (4) represents the time-domain analytical expression of the initial DC fault current with fault resistance. In the above formula, the parameter at the fault point is marked as 0; the parameter at the fault line rt is marked as rt. The pt and qt line parameters are labeled pt and qt respectively; i r0 The current flowing into fault point 0 from port r; i pt This refers to the port current flowing out of line pt; The voltage at the fault point before the fault occurred; , These are constants used to simplify the formula; R br0 L br0 These are the branch resistance and branch inductance between port r and the fault point, respectively; R bpt L bpt These are the branch resistance and branch inductance of line pt, respectively; L bqt R is the branch inductance of line qt; lt0 L lt0 The equivalent resistance and equivalent inductance between line lt and fault point 0; express and The ratio of, where This represents the current flowing from line lt into the fault point; This is the fault resistor.

4. The DC fault detection method for a hybrid multi-terminal DC system according to claim 3, characterized in that, Equation (3) is obtained by simplifying the following equations simultaneously: The faulty line current can be directly calculated based on the circuit to the left of the fault point: （3-1） In equation (3-1), C r This represents the branch capacitance at port r; Define the branch impedances of the pt and qt lines as: （3-2） In equation (3-2), Z bpt Z bqt These are the branch impedances of lines pt and qt, respectively; C p This represents the branch capacitance at port p; R bqt C represents the branch resistance of line qt; q Let be the branch capacitance at port q; Kirchhoff's voltage law and Kirchhoff's current law yield the following equation: （3-3） In equation (3-3), u t i is the port voltage of line qt; qt i is the port current flowing out of line qt; t0 The current flowing from line lt into fault point 0; By combining equations (3-1), (3-2), and (3-3) and simplifying, we obtain the final time-domain expression: 。 5. The DC fault detection method for a hybrid multi-terminal DC system according to claim 3, characterized in that, Formula (4) is obtained by simplifying the following equations simultaneously: For the Laplace fault component circuit of a hybrid multi-terminal DC system, the fault resistor R is included. f DC faults are addressed by introducing an equivalent branch fault resistance R. fr0 and R ft0 The original circuit is decoupled into two independent parts based on the fault point, as follows: （4-1） In equation (4-1), R fr0 R is the equivalent branch fault resistance on the port r side; ft0 i is the equivalent branch fault resistance on the lt side of the line; t0 The current flowing into fault point 0 from line lt; k rt Indicate i r0 with i t0 The ratio, i.e., k rt = i r0 / i t0 ; Using Kirchhoff's voltage law and Kirchhoff's current law, i r0 and i t0 Described as: （4-2） According to equation (4-2). It can be represented as follows: （4-3） Combining equations (4-2) and (4-3), k is reduced by neglecting the resistance and capacitance components in the high-frequency region. rt Further simplification yields the final time-domain expression: 。 6. The DC fault detection method for a hybrid multi-terminal DC system according to claim 1, characterized in that, In step S3, the single-ended DC fault detection scheme based on the transient average value of the DC reactor voltage can be described by the following formula: ； In the above formula, Indicates DC reactor The average value of the voltage across the terminals over a specified time period T; and These are the lower and upper limits of the voltage threshold, respectively; A reliability factor is included to account for model errors; This refers to the nominal DC bus voltage. and L represents the average voltage across the smoothing reactor tmn and across the smoothing reactor tnm during the time period T; tmn and L tnm L represents the inductance of smoothing reactor tmn and smoothing reactor tnm, respectively; bmn and L bnm L represents the equivalent inductance of branches mn and nm, respectively; bzn and L bkn L represents the equivalent inductance of branch zn and branch kn, respectively; tnk This represents the inductance of the smoothing reactor tnk.

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