Circuit driving method and display device

Abstract

The application provides a circuit driving method and a display device. The circuit driving method is applied to a gate driving circuit, and the circuit driving method comprises the following steps: in a first stage, a first high-level signal is provided, a first reset module responds to the first high-level signal, and voltage reset is performed on the gate driving circuit before a frame of picture is displayed; in a second stage, a second high-level signal is provided, the gate driving circuit responds to the second high-level signal, and a signal output end of the gate driving circuit outputs a gate driving signal; in a third stage, a third high-level signal is provided, a main pull-down module responds to the third high-level signal, and the signal output end of the gate driving circuit is maintained at a low-level signal; and in a fourth stage, a fourth high-level signal is provided, a second reset module responds to the fourth high-level signal, and voltage reset is performed on the gate driving circuit after a frame of picture is displayed. The technical scheme of the application can reduce the characteristic drift of a TFT control switch.

Description

Technical Field

[0001] This application relates to the field of display driving technology, and in particular to a circuit driving method and a display device. Background Technology

[0002] In the display field, gate drive circuits incorporate numerous TFT (Thin Film Transistor) control switches. Consequently, the performance of these TFT control switches often influences the overall driving performance of the gate drive circuit. However, due to prolonged use, TFT control switches are susceptible to external factors such as moisture, leading to characteristic drift and subthreshold swing anomalies. This is particularly true for IGZO (Indium Gallium Zinc Oxide) TFTs, which, due to their high mobility, exhibit significantly superior performance compared to a-Si (Amorphous Silicon) TFTs in high refresh rate and high resolution applications. However, they are also prone to characteristic drift and subthreshold swing anomalies, which can ultimately cause switching failure and display malfunctions. Summary of the Invention

[0003] One objective of this application is to provide a circuit driving method and display device that can reduce characteristic drift and subthreshold swing abnormalities of TFT control switches, thereby reducing the occurrence of display abnormalities.

[0004] According to one aspect of this application, a circuit driving method is provided, applied to a gate driving circuit, the gate driving circuit including a first reset module, a second reset module, and a main pull-down module, the circuit driving method including:

[0005] In the first stage, a first high-level signal is provided, and the first reset module responds to the first high-level signal to perform a voltage reset on the gate drive circuit before a frame of image is displayed;

[0006] In the second stage, a second high-level signal is provided, and the gate driving circuit responds to the second high-level signal to output a gate driving signal at the signal output terminal of the gate driving circuit.

[0007] In the third stage, a third high-level signal is provided, and the main pull-down module responds to the third high-level signal to keep the signal output terminal of the gate drive circuit at a low level.

[0008] In the fourth stage, a fourth high-level signal is provided, and the second reset module responds to the fourth high-level signal to perform a voltage reset on the gate drive circuit after a frame is displayed.

[0009] In one aspect, the gate drive circuit further includes an auxiliary pull-down module, and the circuit driving method further includes:

[0010] In the fifth stage, a fifth high-level signal is provided, and the first reset module responds to the fifth high-level signal to perform a voltage reset on the gate drive circuit before the next frame is displayed;

[0011] In the sixth stage, a sixth high-level signal is provided, and the gate driving circuit responds to the sixth high-level signal to output a gate driving signal at the signal output terminal of the gate driving circuit.

[0012] In the seventh stage, a seventh high-level signal is provided, and the auxiliary pull-down module responds to the seventh high-level signal to keep the signal output terminal of the gate drive circuit at a low level.

[0013] In the eighth stage, an eighth high-level signal is provided, and the second reset module responds to the eighth high-level signal to perform a voltage reset on the gate drive circuit after the next frame is displayed.

[0014] In one aspect, the gate drive circuit includes a drive module, the drive module including a waveform control line and a lower-level output line, the waveform control line being connected to the signal output terminal of the drive module, the waveform control line being used to generate the gate drive signal, the lower-level output line being used to transmit the next frame input signal, the gate drive circuit also including a low-voltage power supply terminal, the low-voltage power supply being used to provide a low-level signal, the low-voltage power supply terminal being connected to a first low-voltage line and a second low-voltage line, the voltage of the first low-voltage line being less than the voltage of the second low-voltage line;

[0015] The first reset module includes: a first reset switch and a second reset switch; the second reset module includes: a fourth reset switch, a fifth reset switch and a sixth reset switch.

[0016] In the first stage, the control terminal of the first reset switch responds to the first high-level signal to provide the voltage of the first low-voltage line to the waveform control line; the control terminal of the second reset switch responds to the first high-level signal to provide the voltage of the first low-voltage line to the next-stage output line.

[0017] In the fourth stage, the control terminal of the fourth reset switch responds to the fourth high-level signal to provide the voltage of the first low-voltage line to the waveform control line; the control terminal of the fifth switch responds to the fourth high-level signal to provide the voltage of the first low-voltage line to the next-stage output line; and the control terminal of the sixth reset switch responds to the fourth high-level signal to provide the voltage of the second low-voltage line to the signal output terminal.

[0018] In one aspect, the first reset module further includes a first reset control terminal, which is used to provide the first high-level signal;

[0019] The control terminal of the first reset switch is connected to the first reset control terminal, the first terminal of the first reset switch is connected to the first low-voltage line, and the second terminal of the first reset switch is connected to the waveform control line; the control terminal of the second reset switch is connected to the first reset control terminal, the first terminal of the second reset switch is connected to the first low-voltage line, and the second terminal of the second reset switch is connected to the lower-level output line; the second reset module further includes a second reset control terminal, which is used to provide the fourth high-level signal.

[0020] The control terminal of the fourth reset switch is connected to the second reset control terminal, the first terminal of the fourth reset switch is connected to the first low-voltage line, and the second terminal of the fourth reset switch is connected to the waveform control line; the control terminal of the fifth reset switch is connected to the second reset control terminal, the first terminal of the second reset switch is connected to the first low-voltage line, and the second terminal of the second reset switch is connected to the downstream output line; the control terminal of the sixth reset switch is connected to the second reset control terminal, the first terminal of the sixth reset switch is connected to the second low-voltage line, and the second terminal of the sixth reset switch is connected to the signal output terminal.

[0021] In one aspect, the main pull-down module includes: a first main switch, a second main switch, and a third main switch, wherein a first end of the first main switch is connected to the waveform control line, and a second end is connected to the first low-voltage line; a first end of the second main switch is connected to the lower-level output line, and a second end is connected to the first low-voltage line; and a first end of the third main switch is connected to the signal output terminal, and a second end is connected to the second low-voltage line.

[0022] In the third stage:

[0023] The control terminal of the first main switch is used to respond to the third high-level signal to pull down the voltage of the waveform control line to the voltage of the first low-voltage line;

[0024] The control terminal of the second main switch is used to respond to the third high-level signal to pull down the voltage of the lower-level output line to the voltage of the first low-voltage line;

[0025] The control terminal of the third main switch is used to respond to the third high-level signal to pull down the voltage of the signal output terminal to the voltage of the second low-voltage line.

[0026] In one aspect, the auxiliary pull-down module includes: a first auxiliary switch, a second auxiliary switch, and a third auxiliary switch, wherein a first end of the first auxiliary switch is connected to the waveform control line, and a second end is connected to the first low-voltage line; a first end of the second auxiliary switch is connected to the lower-level output line, and a second end is connected to the first low-voltage line; and a first end of the third auxiliary switch is connected to the signal output terminal, and a second end is connected to the second low-voltage line.

[0027] In the seventh stage:

[0028] The control terminal of the first auxiliary switch is used to respond to the seventh high-level signal to pull down the voltage of the waveform control line to the voltage of the first low-voltage line;

[0029] The control terminal of the second auxiliary switch is used to respond to the seventh high-level signal to pull down the voltage of the lower-level output line to the voltage of the first low-voltage line;

[0030] The control terminal of the third auxiliary switch is used to respond to the seventh high-level signal to pull down the voltage of the signal output terminal to the voltage of the second low-voltage line.

[0031] In one aspect, the gate drive circuit includes a main control terminal and an auxiliary control terminal;

[0032] The control terminals of the first main switch, the second main switch, and the third main switch are connected to the first node; the main pull-down module also includes a fourth main switch and a main voltage source terminal, the first terminal of the fourth main switch is connected to the first node, the second terminal of the fourth main switch is connected to the main voltage source terminal, and the control terminal of the fourth main switch is connected to the main control terminal;

[0033] In the third stage, the control terminal of the fourth main switch is used to respond to the signal of the main control terminal to provide the third high-level signal of the main voltage source terminal to the first node;

[0034] The control terminals of the first auxiliary switch, the second auxiliary switch, and the third auxiliary switch are connected to the second node; the auxiliary pull-down module also includes a fourth auxiliary switch and an auxiliary voltage source terminal, the first terminal of the fourth auxiliary switch is connected to the second node, the second terminal of the fourth auxiliary switch is connected to the auxiliary voltage source terminal, and the control terminal of the fourth auxiliary switch is connected to the auxiliary control terminal;

[0035] In the seventh stage, the control terminal of the fourth auxiliary switch responds to the signal from the auxiliary control terminal to provide a seventh high-level signal from the auxiliary voltage source terminal to the second node.

[0036] In one aspect, the main pull-down module further includes a fifth main switch, the control terminal of which is connected to the auxiliary control terminal, the first terminal of which is connected to the first low-voltage line, and the second terminal of which is connected to the first node;

[0037] In the seventh stage, the control terminal of the fifth main switch is used to respond to the signal of the auxiliary control terminal to provide the voltage of the first low-voltage line to the first node;

[0038] The auxiliary pull-down module also includes a fifth auxiliary switch. The control terminal of the fifth auxiliary switch is connected to the main control terminal. The first terminal of the fifth auxiliary switch is connected to the first low-voltage line, and the second terminal of the fifth auxiliary switch is connected to the second node.

[0039] In the third stage, the control terminal of the fifth auxiliary switch is used to respond to the signal of the main control terminal to provide the voltage of the first low-voltage line to the second node.

[0040] In one aspect, the drive module includes a first control switch, a first end of which is connected to the waveform control line, a second end of which is connected to the high-voltage power supply terminal, and a control terminal of which is connected to the input control terminal.

[0041] The main pull-down module also includes: a sixth main switch and a seventh main switch;

[0042] The control terminal of the sixth main switch is connected to the waveform control line, the first terminal of the sixth main switch is connected to the first low-voltage line, and the second terminal of the sixth main switch is connected to the first node; the control terminal of the seventh main switch is connected to the input control terminal, the first terminal of the seventh main switch is connected to the first low-voltage line, and the second terminal of the seventh main switch is connected to the first node.

[0043] The auxiliary pull-down module also includes: a sixth auxiliary switch and a seventh auxiliary switch;

[0044] The control terminal of the sixth auxiliary switch is connected to the waveform control line, the first terminal of the sixth auxiliary switch is connected to the first low-voltage line, and the second terminal of the sixth auxiliary switch is connected to the first node; the control terminal of the seventh auxiliary switch is connected to the input control terminal, the first terminal of the seventh auxiliary switch is connected to the first low-voltage line, and the second terminal of the seventh auxiliary switch is connected to the first node.

[0045] In one aspect, the gate drive circuit further includes a pull-down switch, a first end of which is connected to the first low-voltage line and a second end of which is connected to the waveform control line;

[0046] In the first stage, the control terminal of the pull-down switch is used to respond to a reset signal to provide the voltage of the first low-voltage line to the waveform control line.

[0047] To address the aforementioned issues, this application also provides a display device comprising a light-emitting unit, a driving board, and a gate driving circuit. The gate driving circuit employs the circuit driving method described above. The gate driving circuit is disposed on the driving board, which is connected to the light-emitting unit. The gate driving circuit is used to control the illumination of the light-emitting unit.

[0048] In the technical solution of this application, in the first stage, the first reset module responds to the first high-level signal and performs a voltage reset on the gate drive circuit before a frame of image is displayed, reducing the impact of characteristic drift of the TFT control switch. In the second stage, the drive signal output terminal outputs the gate drive signal to display the image. In the third stage, after the output of the gate drive signal is completed, the main pull-down module responds to the third high-level signal to keep the signal output terminal of the gate drive circuit at a low level, reducing the gate drive signal fluctuation caused by characteristic drift of the TFT control switch or subthreshold swing. Furthermore, in the fourth stage, after a frame of image is displayed, a voltage reset is performed again. The second reset module responds to the fourth high-level signal to perform a voltage reset on the gate drive circuit. This further reduces characteristic drift and subthreshold swing abnormalities of the TFT control switch, thereby reducing the occurrence of display abnormalities.

[0049] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0050] The above and other objectives, features and advantages of this application will become more apparent from a detailed description of exemplary embodiments thereof with reference to the accompanying drawings.

[0051] Figure 1 This is a schematic flowchart illustrating the steps of the main pull-down module's operation in the circuit driving method of the first embodiment of this application.

[0052] Figure 2 This is a schematic flowchart illustrating the steps of the auxiliary pull-down module in the circuit driving method of the first embodiment of this application.

[0053] Figure 3 This is a schematic flowchart of steps S110 and S410 in the circuit driving method of the first embodiment of this application.

[0054] Figure 4 This is a schematic flowchart of steps S110, S310 and S410 in the circuit driving method of the first embodiment of this application.

[0055] Figure 5 This is a schematic flowchart of step S710 in the circuit driving method of the first embodiment of this application.

[0056] Figure 6 This is a schematic flowchart of step S320 in the circuit driving method of the first embodiment of this application.

[0057] Figure 7 This is a schematic flowchart of step S720 in the circuit driving method of the first embodiment of this application.

[0058] Figure 8 This is a schematic flowchart of step S330 in the circuit driving method of the first embodiment of this application.

[0059] Figure 9 This is a schematic flowchart of step S730 in the circuit driving method of the first embodiment of this application.

[0060] Figure 10 This is a schematic diagram of the gate drive circuit in this application.

[0061] Figure 11 This application Figure 10 A schematic diagram of the connection of the drive module of the gate drive circuit.

[0062] Figure 12 This application Figure 10 A connection diagram of the main drop-down module.

[0063] Figure 13 This application Figure 10 A connection diagram of the middle auxiliary drop-down module.

[0064] Figure 14 This application Figure 10 A schematic diagram of the connection of the first reset module.

[0065] Figure 15 This application Figure 10 A schematic diagram of the connection of the second reset module.

[0066] Figure 16 This is a schematic diagram of the connection of the gate drive circuit with the third reset switch in this application.

[0067] Figure 17 This application Figure 16 An enlarged connection diagram of the first reset module.

[0068] Figure 18 This is a schematic flowchart of step S111 in the circuit driving method of the first embodiment of this application.

[0069] Figure 19This is the timing control diagram of the gate drive circuit of this application.

[0070] Figure 20 This is a connection diagram of the display device according to the second embodiment of this application.

[0071] The annotations in the attached figures are explained as follows:

[0072] 1. Display device; 2. Driver board; 3. Light-emitting unit;

[0073] 10. Drive module; 20. Control module; 30. Main pull-down module; 40. Auxiliary pull-down module; 50. Low-voltage power supply terminal; 60. First reset module; 70. Second reset module;

[0074] 110, Signal output terminal; 120, Waveform control line; 130, Subsequent output line; 140, High-voltage power supply terminal; 150, Input control terminal; 160, Clock signal terminal; 170, Reset terminal; C, Capacitor; T1, First control switch; T2, Second control switch; T3, Third control switch; M1A, First main switch; M2A, Second main switch; M3A, Third main switch; M4A, Fourth main switch; M5A, Fifth main switch; M6A, Sixth main switch; M7A, Seventh main switch; 210, Main control terminal; 220, Auxiliary control terminal; 310, Main voltage source terminal; 320, First node;

[0075] M0, pull-down switch; M1B, first auxiliary switch; M2B, second auxiliary switch; M3B, third auxiliary switch; M4B, fourth auxiliary switch; M5B, fifth auxiliary switch; M6B, sixth auxiliary switch; M7B, seventh auxiliary switch; 410, auxiliary voltage source terminal; 420, second node; 510, first low-voltage line; 520, second low-voltage line; F1, first reset switch; F2, second reset switch; F3, third reset switch; F4, fourth reset switch; F5, fifth reset switch; F6, sixth reset switch; 610, first reset control terminal; 710, second reset control terminal. Detailed Implementation

[0076] Although this application can be readily embodied in various forms of implementation, only some specific embodiments are shown in the accompanying drawings and will be described in detail in this specification. It is understood that this specification should be regarded as an exemplary illustration of the principles of this application and is not intended to limit the application to what is described herein.

[0077] Therefore, a feature described in this specification is used to illustrate one feature of one embodiment of this application, and does not imply that every embodiment of this application must have the described feature. Furthermore, it should be noted that this specification describes many features. While certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0078] In the embodiments shown in the accompanying drawings, the directional indications (such as up, down, left, right, front, and back) used to explain the structure and movement of the various elements of this application are relative rather than absolute. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the positions of these elements changes, these directional indications also change accordingly.

[0079] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided to make the description of this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The drawings are merely illustrative of this application and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0080] The preferred embodiments of this application will be further described in detail below with reference to the accompanying drawings.

[0081] Example 1

[0082] See Figure 1 and Figure 10 As shown, this application provides a circuit driving method applied to a gate driving circuit, which includes a first reset module 60, a second reset module 70, and a main pull-down module 30. The circuit driving method includes:

[0083] In step S10, during the first stage, a first high-level signal is provided. The first reset module 60 responds to the first high-level signal to perform a voltage reset on the gate drive circuit before displaying a frame. Since the images are displayed frame by frame, performing a voltage reset before each frame ensures that the gate drive circuit has a unified initial voltage point. Reset can also be understood as initialization, which involves pulling down the voltage at the signal output terminal or in the signal output line to prevent it from sending out random control signals. This voltage reset can be performed on the signal output terminal or on the control signal output line.

[0084] In step S20, in the second stage, a second high-level signal is provided. The gate drive circuit responds to the second high-level signal to output a gate drive signal at its signal output terminal. The gate drive signal is typically a square wave signal. After receiving the second high-level signal, the gate drive circuit controls its signal output terminal to output the gate drive signal.

[0085] In step S30, during the third stage, a third high-level signal is provided. The main pull-down module 30 responds to the third high-level signal to maintain the signal output terminal of the gate drive circuit at a low level. The display time of one frame includes an active area and a blank area. The active area typically refers to the time during which the gate drive signal is output. The time from the completion of the gate drive signal output to the start of the next frame is the blank area. During the blank area, i.e., the third stage, the main pull-down module responds to the third high-level signal to pull the voltage down. This maintains the signal output terminal of the gate drive circuit at a low level, reducing the likelihood of abnormal signals being emitted from the signal output terminal.

[0086] The first terminal of the main pull-down module 30 is connected to the signal output terminal 110 of the drive module 10, and the second terminal is connected to the low-voltage power supply terminal 50. The control terminal of the main pull-down module 30 is used to respond to a third high-level signal. The first and second terminals of the main pull-down module 30 are turned on to maintain the signal output terminal 110 of the drive module 10 at a low-level signal corresponding to the low-voltage power supply terminal 50. Under the action of the third high-level signal, the main pull-down module 30 turns on the signal output terminal 110 of the drive module 10 and the low-voltage power supply terminal 50. In this way, the output waveform of the drive signal output by the drive module 10 is pulled down and maintained at the output voltage of the low-voltage power supply terminal 50, that is, the output waveform is maintained at a low-level signal.

[0087] In step S40, in the fourth stage, a fourth high-level signal is provided. The second reset module 70 responds to the fourth high-level signal to perform a voltage reset on the gate drive circuit after one frame is displayed. After one frame is fully displayed, a voltage reset is performed again to reduce the impact of any existing charge on the TFT control switch.

[0088] In this embodiment, in the first stage, the first reset module 60 responds to a first high-level signal to perform a voltage reset on the gate drive circuit before a frame is displayed, reducing the impact of characteristic drift of the TFT control switch. In the second stage, the drive signal output terminal outputs a gate drive signal to display the image. In the third stage, after the output of a gate drive signal is completed, the main pull-down module 30 responds to a third high-level signal to maintain the signal output terminal of the gate drive circuit at a low level, reducing the gate drive signal fluctuation caused by characteristic drift of the TFT control switch or subthreshold swing. Furthermore, in the fourth stage, after a frame is displayed, a voltage reset is performed again. The second reset module 70 responds to a fourth high-level signal to perform a voltage reset on the gate drive circuit. This further reduces characteristic drift and subthreshold swing abnormalities of the TFT control switch, thereby reducing the occurrence of display abnormalities.

[0089] In other words, except for the second stage when the gate drive signal is output, the signal output terminal of the gate drive circuit is controlled in the first, third, and fourth stages. By maintaining it at a low level, characteristic drift of the TFT control switch or gate drive signal fluctuations caused by subthreshold swing is prevented. Furthermore, adverse factors such as moisture in the surrounding environment are less likely to affect the TFT control switch. This reduces switching failures due to long-term use of the TFT control switch, further reducing the occurrence of display abnormalities.

[0090] The gate drive circuit is reset by the first reset module 60 and the second reset module 70, which reduces residual charge and thus reduces noise in the circuit. The first reset module 60 and the second reset module 70 operate separately. Generally, the first reset module 60 performs a reset after one frame is displayed, and the second reset module 70 performs a reset before the next frame is displayed.

[0091] The signal output terminal 110 can be connected to other switches or the light-emitting unit 3. When the drive signal is high, the other switches are turned on or the light-emitting unit 3 is lit. When the drive signal is low, the other switches are turned off or the light-emitting unit 3 is turned off. When the drive module 10 outputs a low-level signal, in order to reduce the jitter of the low-level signal, the output waveform of the drive signal needs to be maintained in the shape of a low-level signal. This can prevent waveform jitter from causing other switches to turn on or the light-emitting unit 3 to light up unexpectedly.

[0092] See Figure 2As shown, to reduce TFT control switch failure caused by long-term operation of the main pull-down module, the gate drive circuit also includes an auxiliary pull-down module 40. The main pull-down module 30 and the auxiliary pull-down module 40 can operate separately and be used alternately. Specifically, the circuit driving method also includes:

[0093] In step S50, in the fifth stage, a fifth high-level signal is provided, and the first reset module 60 responds to the fifth high-level signal to reset the voltage of the gate drive circuit before the next frame is displayed; before the gate drive signal is output, the first reset module 60 repeats the work of the first stage to reset the voltage of the gate drive circuit.

[0094] In step S60, a sixth high-level signal is provided in the sixth stage. The gate driving circuit responds to the sixth high-level signal, causing its signal output terminal to output a gate driving signal. The sixth stage can also refer to the second stage, where the gate driving circuit's signal output terminal outputs a gate driving signal. The gate driving signals output in the second and sixth stages may be the same or different. If the displayed image remains unchanged, the gate driving signals output in the second and sixth stages are the same. If the displayed image changes, the gate driving signals output in the second and sixth stages are different.

[0095] In step S70, a seventh high-level signal is provided in the seventh stage. The auxiliary pull-down module 40 responds to the seventh high-level signal to keep the signal output of the gate drive circuit at a low level. Both the seventh and third stages maintain the signal output of the gate drive circuit at a low level, but the third stage uses the main pull-down module 30, while the seventh stage uses the auxiliary pull-down module 40. They work alternately to avoid a single pull-down module operating at a single time. The alternation interval can be once per frame, once every 100 frames, or according to a predetermined time, such as once every 100 seconds.

[0096] The first terminal of the auxiliary pull-down module 40 is connected to the signal output terminal 110 of the drive module 10, and the second terminal is connected to the low-voltage power supply terminal 50. The control terminal of the auxiliary pull-down module 40 is used to respond to the seventh high-level signal. The first and second terminals of the auxiliary pull-down module 40 are turned on to maintain the signal output terminal 110 of the drive module 10 at a low-level signal corresponding to the low-voltage power supply terminal 50. Under the action of the seventh high-level signal, the drive module 10 and the low-voltage power supply terminal 50 are turned on through the action of the auxiliary pull-down module 40. In this way, the output waveform of the drive signal output by the drive module 10 is pulled down and maintained at the output voltage of the low-voltage power supply terminal 50, that is, the output waveform is maintained at a low-level signal. Through the maintaining action of the main pull-down module 30 and the auxiliary pull-down module 40, the output waveform is maintained at a low-level signal for a certain period of time, thereby reducing the fluctuation and jitter of the low-level signal.

[0097] In step S80, in the eighth stage, an eighth high-level signal is provided. The second reset module responds to the eighth high-level signal to perform a voltage reset on the gate drive circuit after the next frame is displayed. The eighth stage works the same as the fourth stage, both performing a voltage reset on the gate drive circuit after one frame is displayed. The first stage to the eighth stage constitute a cycle, driving the gate drive circuit to output a gate drive signal.

[0098] In this embodiment, one end of the main pull-down module 30 is connected to the signal output terminal 110 of the drive module 10, and the other end is connected to the low-voltage power supply terminal 50. After the control terminal of the main pull-down module 30 receives the third high-level signal, the signal output terminal 110 of the drive module 10 is connected to the low-voltage power supply terminal 50. At this time, the waveform of the drive signal of the drive module 10 is maintained on the low-voltage power supply terminal 50, that is, the drive signal of the drive module 10 is maintained at a low level. One end of the auxiliary pull-down module 40 is connected to the signal output terminal 110 of the drive module 10, and the other end is connected to the low-voltage power supply terminal 50. After the control terminal of the auxiliary pull-down module 40 receives the seventh high-level signal, the signal output terminal 110 of the drive module 10 is connected to the low-voltage power supply terminal 50. At this time, the waveform of the drive signal of the drive module 10 is maintained on the low-voltage power supply terminal 50, that is, the drive signal of the drive module 10 is maintained at a low level. By alternating the operation of the main pull-down module 30 and the auxiliary pull-down module 40, the service life of the main pull-down module 30 and the auxiliary pull-down module 40 is increased. This reduces the likelihood of TFT control switches failing due to prolonged use, thereby reducing the occurrence of display malfunctions.

[0099] The gate drive circuit includes a drive module 10, which outputs a gate drive signal. The drive module 10 includes a waveform control line 120 and a lower-level output line 130. The waveform control line 120 is connected to the signal output terminal 110 of the drive module 10 and is used to generate a drive signal. The lower-level output line 130 is used to transmit the lower-level input signal. A low-voltage power supply terminal 50 is connected to a first low-voltage line 510 and a second low-voltage line 520. The voltage of the first low-voltage line 510 is lower than the voltage of the second low-voltage line 520; for example, the voltage of the first low-voltage line 510 is -12 volts, and the voltage of the second low-voltage line 520 is -6 volts. The voltage of the first low-voltage line 510 can also be -15 volts. The output voltage of the low-voltage power supply terminal 50 is a low-voltage DC voltage. The first low-voltage line 510 is used to pull down the voltage of the waveform control line 120 and the lower-level output line 130, and the second low-voltage line 520 is used to pull down the voltage of the signal output terminal 110.

[0100] See Figure 10 and Figure 14As shown, the first reset module 60 includes a first reset switch F1 and a second reset switch F2. The control terminal of the first reset switch F1 is used to respond to a first high-level signal to provide the voltage of the first low-voltage line 510 to the waveform control line 120. The voltage of the waveform control line 120 is equal to the voltage of the first low-voltage line 510, and the residual charge is cleared and removed. This is equivalent to performing a zeroing operation or initialization on the waveform control line 120. Of course, the voltage of the zeroing operation is not necessarily zero; it can be the voltage of the first low-voltage line 510.

[0101] See Figure 3 As shown, in step S110, in the first stage, the control terminal of the first reset switch F1 responds to the first high-level signal to provide the voltage of the first low-voltage line 510 to the waveform control line 120; the control terminal of the second reset switch F2 responds to the first high-level signal to provide the voltage of the first low-voltage line 510 to the lower-level output line 130; the control terminal of the second reset switch F2 is used to respond to the first high-level signal to provide the voltage of the first low-voltage line 510 to the lower-level output line 130; similarly, the lower-level output line 130 is reset, and the voltage of the lower-level output line 130 is reset to the voltage of the first low-voltage line 510.

[0102] See Figure 10 and Figure 15 As shown, the second reset module 70 includes a fourth reset switch F4, a fifth reset switch F5, and a sixth reset switch F6. The control terminal of the fourth reset switch F4 responds to a fourth high-level signal to provide the voltage of the first low-voltage line 510 to the waveform control line 120; under the control of the fourth high-level signal, the voltage of the waveform control line 120 is equal to the voltage of the first low-voltage line 510. The control terminal of the fifth reset switch F5 responds to a fourth high-level signal to provide the voltage of the first low-voltage line 510 to the lower-level output line 130; under the control of the fourth high-level signal, the voltage of the lower-level output line 130 is equal to the voltage of the first low-voltage line 510. The control terminal of the sixth reset switch F6 responds to a fourth high-level signal to provide the voltage of the second low-voltage line 520 to the signal output terminal 110. Under the control of the fourth high-level signal, the voltage of the signal output terminal 110 is equal to the voltage of the second low-voltage line 520.

[0103] In step S410, in the fourth stage, the control terminal of the fourth reset switch F4 responds to the fourth high-level signal to provide the voltage of the first low-voltage line 510 to the waveform control line 120; the control terminal of the fifth switch F5 responds to the fourth high-level signal to provide the voltage of the first low-voltage line 510 to the next-stage output line 130; and the control terminal of the sixth reset switch F6 responds to the fourth high-level signal to provide the voltage of the second low-voltage line 520 to the signal output terminal 110.

[0104] The first reset module 60 also includes a first reset control terminal 610, which provides a first high-level signal. The control terminal of the first reset switch F1 is connected to the first reset control terminal 610. The first terminal of the first reset switch F1 is connected to the first low-voltage line 510, and the second terminal of the first reset switch F1 is connected to the waveform control line 120. Thus, after receiving the first high-level signal, the control terminal of the first reset switch F1 turns on both the first and second terminals, and the voltage of the first low-voltage line 510 is supplied to the waveform control line 120.

[0105] The control terminal of the second reset switch F2 is connected to the first reset control terminal 610, the first terminal of the second reset switch F2 is connected to the first low-voltage line 510, and the second terminal of the second reset switch F2 is connected to the lower-level output line 130. Thus, after the control terminal of the second reset switch F2 receives the first high-level signal, the first terminal and the second terminal of the second reset switch F2 are turned on, and the voltage of the first low-voltage line 510 is provided to the lower-level output line 130.

[0106] The second reset module 70 also includes a second reset control terminal 710, which is used to provide a fourth high-level signal. The control terminal of the fourth reset switch F4 is connected to the second reset control terminal 710. The first terminal of the fourth reset switch F4 is connected to the first low-voltage line 510, and the second terminal of the fourth reset switch F4 is connected to the waveform control line 120. Thus, after receiving the fourth high-level signal, the control terminal of the fourth reset switch F4 turns on the first and second terminals, and the voltage of the first low-voltage line 510 is provided to the waveform control line 120.

[0107] The control terminal of the fifth reset switch F5 is connected to the second reset control terminal 710. The first terminal of the second reset switch F2 is connected to the first low-voltage line 510, and the second terminal of the second reset switch F2 is connected to the lower-level output line 130. Thus, after receiving the fourth high-level signal, the control terminal of the fifth reset switch F5 turns on the first and second terminals of the fifth reset switch F5, and the voltage of the first low-voltage line 510 is supplied to the lower-level output line 130.

[0108] The control terminal of the sixth reset switch F6 is connected to the second reset control terminal 710, the first terminal of the sixth reset switch F6 is connected to the second low-voltage line 520, and the second terminal of the sixth reset switch F6 is connected to the signal output terminal 110. Therefore, after receiving the fourth high-level signal, the control terminal of the sixth reset switch F6 turns on both the first and second terminals, and the voltage of the second low-voltage line 520 is supplied to the signal output terminal 110.

[0109] See Figure 12 As shown, the main pull-down module 30 includes: a first main switch M1A, a second main switch M2A, and a third main switch M3A.

[0110] The first terminal of the first main switch M1A is connected to the waveform control line 120, and the second terminal is connected to the first low-voltage line 510. The control terminal of the first main switch M1A is used to respond to the third high-level signal to pull down the voltage of the waveform control line 120 to the voltage of the first low-voltage line 510. Under the action of the third high-level signal, the first terminal and the second terminal of the first main switch M1A are turned on, so that the voltage of the first low-voltage line 510 is provided to the waveform control line 120, and the voltage of the waveform control line 120 is maintained at the voltage state of the first low-voltage line 510.

[0111] The first terminal of the second main switch M2A is connected to the lower-level output line 130, and the second terminal is connected to the first low-voltage line 510. The control terminal of the second main switch M2A is used to respond to a third high-level signal to pull down the voltage of the lower-level output line 130 to the voltage of the first low-voltage line 510. Under the action of the third high-level signal, the first and second terminals of the second main switch M2A are turned on, so that the voltage of the first low-voltage line 510 is provided to the lower-level output line 130, maintaining the voltage of the lower-level output line 130 at the voltage state of the first low-voltage line 510. The lower-level input signal is transmitted through the lower-level output line 130, controlling the operation of the next gate drive circuit.

[0112] The first terminal of the third main switch M3A is connected to the signal output terminal 110, and the second terminal is connected to the second low-voltage line 520. The control terminal of the third main switch M3A is used to respond to a third high-level signal to pull down the voltage of the signal output terminal 110 to the voltage of the second low-voltage line 520. Under the action of the third high-level signal, the first and second terminals of the third main switch M3A are turned on, so that the voltage of the second low-voltage line 520 is provided to the signal output terminal 110, maintaining the voltage of the signal output terminal 110 at the voltage state of the first low-voltage line 510.

[0113] Therefore, see Figure 4 As shown, step S310 is in the third stage:

[0114] The control terminal of the first main switch M1A is used to respond to the third high-level signal to pull down the voltage of the waveform control line to the voltage of the first low-voltage line 510.

[0115] The control terminal of the second main switch M2A is used to respond to the third high-level signal to pull down the voltage of the lower-level output line to the voltage of the first low-voltage line 510.

[0116] The control terminal of the third main switch M3A is used to respond to the third high-level signal to pull down the voltage of the signal output terminal to the voltage of the second low-voltage line 520.

[0117] See Figure 13As shown, the auxiliary pull-down module 40 includes: a first auxiliary switch M1B, a second auxiliary switch M2B, and a third auxiliary switch M3B.

[0118] The first terminal of the first auxiliary switch M1B is connected to the waveform control line 120, and the second terminal is connected to the first low-voltage line 510. The control terminal of the first auxiliary switch M1B is used to respond to the seventh high-level signal to pull down the voltage of the waveform control line 120 to the voltage of the first low-voltage line 510. Under the action of the seventh high-level signal, the first terminal and the second terminal of the first auxiliary switch M1B are turned on, so that the voltage of the first low-voltage line 510 is provided to the waveform control line 120, and the voltage of the waveform control line 120 is maintained at the voltage state of the first low-voltage line 510.

[0119] The first terminal of the second auxiliary switch M2B is connected to the lower-level output line 130, and the second terminal is connected to the first low-voltage line 510. The control terminal of the second auxiliary switch M2B is used to respond to the seventh high-level signal to pull down the voltage of the lower-level output line 130 to the voltage of the first low-voltage line 510. Under the action of the seventh high-level signal, the first terminal and the second terminal of the second auxiliary switch M2B are turned on, so that the voltage of the first low-voltage line 510 is provided to the lower-level output line 130, and the voltage of the lower-level output line 130 is maintained at the voltage state of the first low-voltage line 510.

[0120] The first terminal of the third auxiliary switch M3B is connected to the signal output terminal 110, and the second terminal is connected to the second low-voltage line 520. The control terminal of the third auxiliary switch M3B is used to respond to the seventh high-level signal to pull down the voltage of the signal output terminal 110 to the voltage of the second low-voltage line 520. Under the action of the seventh high-level signal, the first and second terminals of the third auxiliary switch M3B are turned on, so that the voltage of the second low-voltage line 520 is provided to the signal output terminal 110, maintaining the voltage of the signal output terminal 110 at the voltage state of the first low-voltage line 510.

[0121] Therefore, see Figure 5 As shown, in step S710, in the seventh stage:

[0122] The control terminal of the first auxiliary switch M1B is used to respond to the seventh high-level signal to pull down the voltage of the waveform control line 120 to the voltage of the first low-voltage line 510.

[0123] The control terminal of the second auxiliary switch M2B is used to respond to the seventh high-level signal to pull down the voltage of the lower output line 130 to the voltage of the first low-voltage line 510.

[0124] The control terminal of the third auxiliary switch M3B is used to respond to the seventh high-level signal to pull down the voltage of the signal output terminal to the voltage of the second low-voltage line 520.

[0125] See Figure 10 See also Figure 12 and Figure 13 As shown, the gate drive circuit includes a control module 20, which includes a main control terminal 210 and an auxiliary control terminal 220. The main control terminal 210 and the auxiliary control terminal 220 can be two independent control ports, which facilitates the individual control of the main pull-down module 30 and the auxiliary pull-down module 40.

[0126] The control module 20 can be understood as an MCU (Micro Controller Unit). It should be noted that the control module 20 can simultaneously output the third and seventh high-level signals, or it can output the third and seventh high-level signals alternately in a time-sharing manner. When simultaneously outputting the third and seventh high-level signals, only one of the main pull-down module 30 and the auxiliary pull-down module 40 operates. For example, if the main pull-down module 30 receives a high-level third high-level signal, then the main pull-down module 30 operates. If the auxiliary pull-down module 40 receives a low-level seventh high-level signal, then the auxiliary pull-down module 40 stops operating. In short, under the control of the control module 20, the main pull-down module 30 and the auxiliary pull-down module 40 operate alternately. Only one of the main pull-down module 30 and the auxiliary pull-down module 40 is working at any given time, thus reducing the possibility of either the main pull-down module 30 or the auxiliary pull-down module 40 operating continuously. The alternating operation of the main pull-down module 30 and the auxiliary pull-down module 40 increases their lifespan.

[0127] The control terminals of the first main switch M1A, the second main switch M2A, and the third main switch M3A are connected to the first node 320; that is, the control terminals of the first main switch M1A, the second main switch M2A, and the third main switch M3A are connected to the same control line.

[0128] The main pull-down module 30 also includes a fourth main switch M4A and a main voltage source terminal 310. The first terminal of the fourth main switch M4A is connected to the first node 320, the second terminal of the fourth main switch M4A is connected to the main voltage source terminal 310, and the control terminal of the fourth main switch M4A is connected to the main control terminal 210.

[0129] See Figure 6As shown, in step S320, in the third stage, the control terminal of the fourth main switch M4A is used to respond to the signal of the main control terminal 210 to provide the third high-level signal of the main voltage source terminal 310 to the first node 320; the voltage output by the main voltage source terminal 310 is a high-level voltage, that is, the high-level voltage output by the main voltage source terminal 310 is the third high-level signal. After the fourth main switch M4A responds to the signal of the main control terminal 210, the first and second terminals of the fourth main switch M4A are turned on, so that the voltage of the main voltage source terminal 310 is provided to the first node 320. When the first node 320 is at a high-level voltage, the first main switch M1A, the second main switch M2A, and the third main switch M3A can be turned on, thereby pulling down the voltage of the waveform control line 120, the lower-level output line 130, and the signal output terminal 110, respectively.

[0130] The control terminals of the first auxiliary switch M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B are connected to the second node 420; that is, the control terminals of the first auxiliary switch M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B are connected to the same control line.

[0131] The auxiliary pull-down module 40 also includes a fourth auxiliary switch M4B and an auxiliary voltage source terminal 410. The first terminal of the fourth auxiliary switch M4B is connected to the second node 420, the second terminal of the fourth auxiliary switch M4B is connected to the auxiliary voltage source terminal 410, and the control terminal of the fourth auxiliary switch M4B is connected to the auxiliary control terminal 220.

[0132] See Figure 7 As shown, in step S720, in the seventh stage, the control terminal of the fourth auxiliary switch M4B responds to the signal from the auxiliary control terminal 220 to provide the seventh high-level signal from the auxiliary voltage source terminal 410 to the second node 420. The voltage output by the auxiliary voltage source terminal 410 is a high-level voltage, that is, the high-level voltage output by the auxiliary voltage source terminal 410 is the seventh high-level signal. After the fourth auxiliary switch M4B responds to the signal from the auxiliary control terminal 220, the first and second terminals of the fourth auxiliary switch M4B are turned on. Thus, the voltage of the auxiliary voltage source terminal 410 is provided to the second node 420. When the second node 420 is at a high-level voltage, the first auxiliary switch M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B can be turned on, thereby pulling down the voltage of the waveform control line 120, the lower-level output line 130, and the signal output terminal 110, respectively. Here, the main voltage source terminal 310 and the auxiliary voltage source terminal 410 can be the same voltage source terminal. This reduces the number of voltage sources and reduces space. Generally speaking, the first main switch M1A, the second main switch M2A, and the third main switch M3A are simultaneously turned on or off, and the first auxiliary switch M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B are also simultaneously turned on or off.

[0133] To further reduce the drive signal fluctuation at the signal output terminal 110, ensuring that only one of the main pull-down module 30 and the auxiliary pull-down module 40 is in a working state, the main pull-down module 30 also includes a fifth main switch M5A. The control terminal of the fifth main switch M5A is connected to the auxiliary control terminal 220. The first terminal of the fifth main switch M5A is connected to the first low-voltage line 510, and the second terminal of the fifth main switch M5A is connected to the first node 320. When the auxiliary pull-down module 40 is in operation, the voltage output of the auxiliary control terminal 220 is supplied to the control terminal of the fifth main switch M5A. Since the auxiliary pull-down module 40 is in a working state, the auxiliary control terminal 220 outputs a high level.

[0134] See Figure 8 As shown, in step S730, in the seventh stage, after the fifth main switch M5A receives a high level, the first and second terminals of the fifth main switch M5A are turned on, and the voltage of the first low-voltage line 510 is supplied to the first node 320. Thus, the control terminals of the first main switch M1A, the second main switch M2A, and the third main switch M3A receive a low level from the first low-voltage line 510, thereby disconnecting the first main switch M1A, the second main switch M2A, and the third main switch M3A. In this way, while the auxiliary pull-down module 40 is working, the main pull-down module 30 can be further prevented from participating in the operation.

[0135] The auxiliary pull-down module 40 also includes a fifth auxiliary switch M5B. The control terminal of the fifth auxiliary switch M5B is connected to the main control terminal 210. The first terminal of the fifth auxiliary switch is connected to the first low-voltage line 510, and the second terminal of the fifth auxiliary switch M5B is connected to the second node 420. When the main pull-down module 30 is in operation, the voltage output of the main control terminal 210 is supplied to the control terminal of the fifth auxiliary switch M5B. Since the main pull-down module 30 is in operation, the main control terminal 210 outputs a high level.

[0136] See Figure 9 As shown, in step S330, in the third stage, after the fifth auxiliary switch M5B receives a high level, the first and second terminals of the fifth auxiliary switch M5B are turned on, and the voltage of the first low-voltage line 510 is supplied to the second node 420. Thus, the control terminals of the first auxiliary switches M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B receive a low level from the first low-voltage line 510, thereby disconnecting the first auxiliary switches M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B. In this way, while the main pull-down module 30 is working, the auxiliary pull-down module 40 can be further prevented from participating in the operation.

[0137] See Figure 11As shown, in order to further improve the reliability of the gate drive circuit, the drive module 10 includes a first control switch T1, the first end of the first control switch T1 is connected to the waveform control line 120, the second end of the first control switch T1 is connected to the high voltage power supply terminal 140, and the control terminal of the first control switch T1 is connected to the input control terminal 150; the gate drive circuit also includes a clock signal terminal 160 and a second control switch T2.

[0138] The control terminal of the second control switch T2 is connected to the waveform control line 120. The first terminal of the second control switch T2 is connected to the lower-level output line 130. The second terminal of the second control switch T2 is connected to the clock signal terminal 160. When the waveform control line 120 is high, the first and second terminals of the second control switch T2 are turned on, and the signal from the clock signal terminal 160 is transmitted to the lower-level output line 130, thereby controlling the operation of the lower-level gate drive circuit.

[0139] The driving module 10 also includes a capacitor C. After the first control switch T1 is turned on, the voltage of the high-voltage power supply terminal 140 is output to the waveform control line 120. At this time, the level on the waveform control line 120 increases, charging the capacitor C. The gate driving circuit also includes a clock signal terminal 160 and a third control switch T3. The control terminal of the third control switch T3 is connected to the waveform control line 120. The first terminal of the third control switch T3 is connected to the signal output terminal 110, and the second terminal of the third control switch T3 is connected to the clock signal terminal 160. When the clock signal terminal 160 outputs a high level, the high level of the clock signal output is superimposed on the high level of the waveform control line 120, thereby forming a high-level signal at the signal output terminal 110.

[0140] The main pull-down module 30 also includes: a sixth main switch M6A and a seventh main switch M7A.

[0141] The control terminal of the sixth main switch M6A is connected to the waveform control line 120. The first terminal of the sixth main switch M6A is connected to the first low-voltage line 510, and the second terminal of the sixth main switch M6A is connected to the first node 320. When the waveform control line 120 is at a high level, it means that the waveform of the waveform control line 120 does not need to be maintained at a low level. When the control terminal of the sixth main switch M6A receives the high level of the waveform control line 120, the first terminal and the second terminal of the sixth main switch M6A are turned on, and the voltage of the first low-voltage line 510 is provided to the first node 320. As a result, the first main switch M1A, the second main switch M2A and the third main switch M3A are disconnected to prevent the voltage of the waveform control line 120 from being pulled down.

[0142] The control terminal of the seventh main switch M7A is connected to the input control terminal 150. The first terminal of the seventh main switch M7A is connected to the first low-voltage line 510, and the second terminal of the seventh main switch M7A is connected to the first node 320. When the input control terminal 150 is at a high level, the voltage of the high-voltage power supply terminal 140 is supplied to the waveform control line 120 through the first control switch T1. To avoid affecting the high-level waveform control line 120, the first and second terminals of the seventh main switch M7A are turned on, and the voltage of the first low-voltage line 510 is supplied to the first node 320. As a result, the first main switch M1A, the second main switch M2A, and the third main switch M3A are disconnected to prevent the voltage of the waveform control line 120 from being pulled low.

[0143] The auxiliary pull-down module 40 also includes: a sixth auxiliary switch M6B and a seventh auxiliary switch M7B.

[0144] The control terminal of the sixth auxiliary switch M6B is connected to the waveform control line 120. The first terminal of the sixth auxiliary switch M6B is connected to the first low-voltage line 510, and the second terminal of the sixth auxiliary switch M6B is connected to the first node 320. Similarly, when the waveform control line 120 is at a high level, it means that the waveform of the waveform control line 120 does not need to be maintained at a low level. When the control terminal of the sixth auxiliary switch M6B receives the high level of the waveform control line 120, the first terminal and the second terminal of the sixth auxiliary switch M6B are connected, and the voltage of the first low-voltage line 510 is provided to the second node 420. As a result, the first auxiliary switch M1B, the second auxiliary switch M2B and the third auxiliary switch M3B are disconnected to prevent the voltage of the waveform control line 120 from being pulled low.

[0145] The control terminal of the seventh auxiliary switch M7B is connected to the input control terminal 150. The first terminal of the seventh auxiliary switch M7B is connected to the first low-voltage line 510, and the second terminal of the seventh auxiliary switch M7B is connected to the first node 320. When the input control terminal 150 is at a high level, the voltage of the high-voltage power supply terminal 140 is supplied to the waveform control line 120 through the first control switch T1. To avoid affecting the high-level waveform control line 120, the first and second terminals of the seventh auxiliary switch M7B are turned on, and the voltage of the first low-voltage line 510 is supplied to the second node 420. As a result, the first auxiliary switch M1B, the second auxiliary switch M2B, and the third auxiliary switch M3B are turned off to prevent the voltage of the waveform control line 120 from being pulled low.

[0146] See Figure 16 and Figure 17 As shown, the first reset module 60 also includes a third reset switch F3.

[0147] The control terminal of the third reset switch F3 is used to respond to the first high-level signal to provide the voltage of the second low-voltage line 520 to the signal output terminal 110; the signal output terminal 110 is reset to the voltage of the second low-voltage line 520.

[0148] The control terminal of the third reset switch F3 is connected to the first reset control terminal 610, the first terminal of the third reset switch F3 is connected to the second low-voltage line 520, and the second terminal of the third reset switch F3 is connected to the signal output terminal 110. Thus, after the control terminal of the third reset switch F3 receives the first high-level signal, the first and second terminals of the third reset switch F3 are turned on, and the voltage of the second low-voltage line 520 is provided to the signal output terminal 110.

[0149] See again Figure 10 As shown, the gate drive circuit also includes a pull-down switch M0. The first end of the pull-down switch M0 is connected to the first low-voltage line 510, and the second end of the pull-down switch M0 is connected to the waveform control line 120.

[0150] See Figure 18 As shown, in step S111, in the first stage, the control terminal of the pull-down switch M0 is used to respond to the reset signal to provide the voltage of the first low-voltage line 510 to the waveform control line 120. The control terminal of the pull-down switch M0 is connected to the reset terminal 170. The pull-down switch M0 can provide the voltage of the first low-voltage line 510 to the waveform control line 120, ensuring that the voltage of the waveform control line 120 is at a low level. Based on this, through the maintenance effect of the main pull-down module 30 and the auxiliary pull-down module 40 on the waveform control line 120, fluctuations in the waveform of the waveform control line 120 are avoided for a certain period of time.

[0151] See Figure 19 As shown, combined with Figure 19 The timing diagram further illustrates this embodiment. Figure 19 The state can be either the main pull-down module or the auxiliary pull-down module in operation. The control process is divided into three stages: Stage I, Stage II, and Stage III. In Stage I, the input control terminal 150 outputs a high level, the first control switch T1 is turned on, and the voltage from the high-voltage power supply terminal 140 is supplied to the waveform control line 120, causing the waveform on the waveform control line 120 to rise and charge capacitor C. In Stage II, the clock signal terminal 160 outputs a high level, and the waveform control line 120 continues to rise on top of the rise in Stage I, with the signal output terminal 110 outputting a high-level signal. In Stages I and II, the level of the first node 320 or the second node 420 is low; at this time, the main pull-down module and the auxiliary pull-down module are not working. In Stage III, the reset terminal 170 outputs a high-level signal, the pull-down switch M0 is turned on, and the voltage on the waveform control line 120 is pulled low. At the same time, the level of the first node 320 or the second node 420 is at a high level, thus playing a role in maintaining the voltage of the waveform control line 120, the lower-level output line 130 and the signal output terminal 110 at a low level.

[0152] Example 2

[0153] See Figure 20As shown, this application also provides a display device 1, which includes a light-emitting unit 3, a driving board 2 and a gate driving circuit. The gate driving circuit adopts the circuit driving method described above. The gate driving circuit is disposed on the driving board 2, and the driving board 2 is connected to the light-emitting unit 3. The gate driving circuit is used to control the lighting of the light-emitting unit 3.

[0154] The embodiments of the display device 1 of the present invention include all the technical solutions of all the embodiments of the above-described circuit driving method, and the technical effects achieved are exactly the same, so they will not be repeated here.

[0155] Although this application has been described with reference to several typical embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Since this application can be embodied in many forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A circuit driving method characterized by, The application is applied to a gate drive circuit, the gate drive circuit comprises a first reset module, a second reset module, a main pull-down module, an auxiliary pull-down module, a drive module and a low-voltage power supply end, the drive module comprises a waveform control line and a lower output line, the waveform control line is connected to a signal output end of the drive module, the waveform control line is used for generating the gate drive signal, the lower output line is used for transmitting a next frame input signal, the low-voltage power supply is used for providing a low-level signal, the low-voltage power supply end is connected to a first low-voltage line and a second low-voltage line, and the voltage of the first low-voltage line is less than the voltage of the second low-voltage line; The first reset module comprises a first reset switch and a second reset switch, the second reset module comprises a fourth reset switch, a fifth reset switch and a sixth reset switch, and the circuit drive method comprises: In a first stage, a first high-level signal is provided, the first reset module responds to the first high-level signal to reset the voltage of the gate drive circuit before a frame of picture is displayed; In a second stage, a second high-level signal is provided, the gate drive circuit responds to the second high-level signal to make the signal output end of the gate drive circuit output a gate drive signal; In a third stage, a third high-level signal is provided, the main pull-down module responds to the third high-level signal to make the signal output end of the gate drive circuit maintain at a low-level signal; In a fourth stage, a fourth high-level signal is provided, the second reset module responds to the fourth high-level signal to reset the voltage of the gate drive circuit after a frame of picture is displayed; In a fifth stage, a fifth high-level signal is provided, the first reset module responds to the fifth high-level signal to reset the voltage of the gate drive circuit before a next frame of picture is displayed; In a sixth stage, a sixth high-level signal is provided, the gate drive circuit responds to the sixth high-level signal to make the signal output end of the gate drive circuit output a gate drive signal; In a seventh stage, a seventh high-level signal is provided, the auxiliary pull-down module responds to the seventh high-level signal to make the signal output end of the gate drive circuit maintain at a low-level signal; In an eighth stage, an eighth high-level signal is provided, the second reset module responds to the eighth high-level signal to reset the voltage of the gate drive circuit after a next frame of picture is displayed; In the first stage, a control end of the first reset switch responds to the first high-level signal to provide the voltage of the first low-voltage line to the waveform control line, and a control end of the second reset switch responds to the first high-level signal to provide the voltage of the first low-voltage line to the lower output line. In the fourth stage, the control end of the fourth reset switch is responsive to the fourth high level signal to provide the voltage of the first low voltage line to the waveform control line; the control end of the fifth reset switch is responsive to the fourth high level signal to provide the voltage of the first low voltage line to the lower output line; and the control end of the sixth reset switch is responsive to the fourth high level signal to provide the voltage of the second low voltage line to the signal output end.

2. The circuit driving method according to claim 1, wherein The first reset module further comprises a first reset control end for providing the first high level signal; The control end of the first reset switch is connected to the first reset control end, the first end of the first reset switch is connected to the first low voltage line, and the second end of the first reset switch is connected to the waveform control line; the control end of the second reset switch is connected to the first reset control end, the first end of the second reset switch is connected to the first low voltage line, and the second end of the second reset switch is connected to the lower output line; the second reset module further comprises a second reset control end for providing the fourth high level signal; The control end of the fourth reset switch is connected to the second reset control end, the first end of the fourth reset switch is connected to the first low voltage line, and the second end of the fourth reset switch is connected to the waveform control line; the control end of the fifth reset switch is connected to the second reset control end, the first end of the second reset switch is connected to the first low voltage line, and the second end of the second reset switch is connected to the lower output line; and the control end of the sixth reset switch is connected to the second reset control end, the first end of the sixth reset switch is connected to the second low voltage line, and the second end of the sixth reset switch is connected to the signal output end.

3. The circuit driving method according to claim 1, wherein The main pull-down module comprises: a first main switch, a second main switch, and a third main switch, the first end of the first main switch is connected to the waveform control line, and the second end is connected to the first low voltage line; the first end of the second main switch is connected to the lower output line, and the second end is connected to the first low voltage line; and the first end of the third main switch is connected to the signal output end, and the second end is connected to the second low voltage line. In the third stage: The control end of the first main switch is responsive to the third high level signal to pull down the voltage of the waveform control line to the voltage of the first low voltage line; The control end of the second main switch is responsive to the third high level signal to pull down the voltage of the lower output line to the voltage of the first low voltage line; The control end of the third main switch is responsive to the third high level signal to pull down the voltage of the signal output end to the voltage of the second low voltage line.

4. The circuit driving method according to claim 3, wherein The auxiliary pull-down module comprises: a first auxiliary switch, a second auxiliary switch, and a third auxiliary switch, the first end of the first auxiliary switch is connected to the waveform control line, and the second end is connected to the first low voltage line; the first end of the second auxiliary switch is connected to the lower output line, and the second end is connected to the first low voltage line; and the first end of the third auxiliary switch is connected to the signal output end, and the second end is connected to the second low voltage line. In the seventh stage: The control end of the first auxiliary switch is configured to, in response to the seventh high-level signal, pull down the voltage of the waveform control line to the voltage of the first low voltage line. The control end of the second auxiliary switch is configured to, in response to the seventh high-level signal, pull down the voltage of the lower output line to the voltage of the first low voltage line. The control end of the third auxiliary switch is configured to, in response to the seventh high-level signal, pull down the voltage of the signal output end to the voltage of the second low voltage line.

5. The circuit driving method according to claim 4, wherein The gate drive circuit comprises a master control end and an auxiliary control end. The control end of the first main switch, the control end of the second main switch, and the control end of the third main switch are connected to a first node; the main pull-down module further comprises a fourth main switch and a main voltage source end, a first end of the fourth main switch is connected to the first node, a second end of the fourth main switch is connected to the main voltage source end, and a control end of the fourth main switch is connected to the master control end. In the third stage, the control end of the fourth main switch is configured to, in response to a signal of the master control end, provide a third high-level signal of the main voltage source end to the first node. The control end of the first auxiliary switch, the control end of the second auxiliary switch, and the control end of the third auxiliary switch are connected to a second node; the auxiliary pull-down module further comprises a fourth auxiliary switch and an auxiliary voltage source end, a first end of the fourth auxiliary switch is connected to the second node, a second end of the fourth auxiliary switch is connected to the auxiliary voltage source end, and a control end of the fourth auxiliary switch is connected to the auxiliary control end. In the seventh stage, the control end of the fourth auxiliary switch is configured to, in response to a signal of the auxiliary control end, provide a seventh high-level signal of the auxiliary voltage source end to the second node.

6. The circuit driving method according to claim 5, wherein The main pull-down module further comprises a fifth main switch, a control end of the fifth main switch is connected to the auxiliary control end, a first end of the fifth main switch is connected to the first low voltage line, and a second end of the fifth main switch is connected to the first node. In the seventh stage, the control end of the fifth main switch is configured to, in response to a signal of the auxiliary control end, provide the voltage of the first low voltage line to the first node. The auxiliary pull-down module further comprises a fifth auxiliary switch, a control end of the fifth auxiliary switch is connected to the master control end, a first end of the fifth auxiliary switch is connected to the first low voltage line, and a second end of the fifth auxiliary switch is connected to the second node. In the third stage, the control end of the fifth auxiliary switch is configured to, in response to a signal of the master control end, provide the voltage of the first low voltage line to the second node.

7. The circuit driving method according to claim 5, wherein The drive module comprises a first control switch, a first end of the first control switch is connected to the waveform control line, a second end of the first control switch is connected to a high voltage source end, and a control end of the first control switch is connected to an input control end. The main pull-down module further comprises a sixth main switch and a seventh main switch. A control end of the sixth main switch is connected to the waveform control line, a first end of the sixth main switch is connected to the first low-voltage line, and a second end of the sixth main switch is connected to the first node; a control end of the seventh main switch is connected to the input control end, a first end of the seventh main switch is connected to the first low-voltage line, and a second end of the seventh main switch is connected to the first node. The auxiliary pull-down module further includes a sixth auxiliary switch and a seventh auxiliary switch. A control end of the sixth auxiliary switch is connected to the waveform control line, a first end of the sixth auxiliary switch is connected to the first low-voltage line, and a second end of the sixth auxiliary switch is connected to the first node; a control end of the seventh auxiliary switch is connected to the input control end, a first end of the seventh auxiliary switch is connected to the first low-voltage line, and a second end of the seventh auxiliary switch is connected to the first node.

8. The circuit driving method according to claim 1, wherein The gate drive circuit further includes a pull-down switch, a first end of the pull-down switch is connected to the first low-voltage line, and a second end of the pull-down switch is connected to the waveform control line. In the first stage, a control end of the pull-down switch is used to provide a voltage of the first low-voltage line to the waveform control line in response to a reset signal.

9. A display device, characterized by comprising: The display device includes light emitting units, a driving board, and a gate drive circuit, the gate drive circuit adopts the circuit driving method according to any one of claims 1 to 8, the gate drive circuit is arranged on the driving board, the driving board is connected to the light emitting units, and the gate drive circuit is used to control lighting of the light emitting units.

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