Pixel circuit, driving method thereof and display device

Abstract

The application provides a pixel electrode, a driving method thereof and a display device. In a forward scanning stage, a reset signal transmitted by a first input module and a data signal transmitted by a second input module are transmitted to a driving transistor through a first connecting module; in a reverse scanning stage, a reset signal transmitted by the second input module and a data signal transmitted by the first input module are transmitted to the driving transistor through a second connecting module, so that the pixel circuit can realize compatibility of forward scanning and reverse scanning.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more specifically, to a pixel circuit, a driving method thereof, and a display device. Background Technology

[0002] Self-emissive display devices possess advantages such as self-illumination, low driving voltage, high luminous efficiency, fast response speed, thinness, and high contrast, and are considered to be the most promising next-generation display devices. A self-emissive display device includes a scanning driving circuit and N rows of pixels. Each pixel includes a pixel circuit and a light-emitting element electrically connected to the pixel circuit, where N is an integer not less than 2.

[0003] The scan drive circuit is electrically connected to the pixel circuit. When the scan drive circuit scans N rows of pixels, it provides corresponding drive signals to the pixel circuit according to a set timing sequence. The pixel circuit operates under the control of the corresponding drive signals, causing the drive transistors of the pixel circuit to generate drive current. Ultimately, the light-emitting element responds to this drive current and emits light. Therefore, the scan drive circuit and the pixel circuit are indispensable components in a self-emissive display device. Summary of the Invention

[0004] In view of this, the present invention provides a pixel electrode and its driving method and display device, which effectively solves the existing technical problems, and the pixel circuit can achieve compatibility of forward scanning and reverse scanning.

[0005] To achieve the above objectives, the technical solution provided by the present invention is as follows:

[0006] A pixel circuit includes: a driving transistor, a first input module, a second input module, a first connection module, a second connection module, a light emission control module, and a storage capacitor;

[0007] The first input module is configured to transmit a first input signal to a first terminal of the driving transistor in response to a first control signal, and the second input module is configured to transmit a second input signal to a second terminal of the driving transistor in response to a second control signal, wherein when the first input signal is a reset signal, the second input signal is a data signal; and when the first input signal is the data signal, the second input signal is the reset signal;

[0008] The first connection module is used to electrically connect the first terminal of the driving transistor to the gate of the driving transistor in response to the first scan signal, and the second connection module is used to electrically connect the second terminal of the driving transistor to the gate of the driving transistor in response to the second scan signal.

[0009] The light-emitting control module is used to respond to the light-emitting control signal and output the driving signal generated by the driving transistor to the light-emitting element. The first plate of the storage capacitor is electrically connected to the gate of the driving transistor, and the second plate of the storage capacitor is electrically connected to the power supply voltage terminal.

[0010] Accordingly, the present invention also provides a display device, wherein the pixel circuit described above is present in the display device.

[0011] Accordingly, the present invention also provides a driving method for a pixel circuit, for driving the aforementioned pixel circuit, the driving method including a forward scanning stage and a reverse scanning stage;

[0012] The forward scanning phase includes a forward reset phase, a forward data writing phase, and a forward light emission phase performed sequentially, wherein:

[0013] During the positive reset phase, the first input module operates in response to the first control signal, and the first connection module operates in response to the first scan signal, transmitting the reset signal to the gate of the driving transistor;

[0014] During the forward data writing phase, the second input module operates in response to the second control signal, and the first connection module operates in response to the first scan signal, transmitting the data signal to the gate of the driving transistor;

[0015] During the forward light emission phase, the light emission control module responds to the light emission control signal and outputs the driving signal generated by the driving transistor to the light emission element;

[0016] Furthermore, the reverse scanning phase includes a reverse reset phase, a reverse data writing phase, and a reverse light emission phase performed sequentially, wherein:

[0017] During the reverse reset phase, the second input module operates in response to the second control signal, and the second connection module operates in response to the second scan signal, transmitting the reset signal to the gate of the driving transistor;

[0018] During the reverse data writing phase, the first input module operates in response to the first control signal, and the second connection module operates in response to the second scan signal, transmitting the data signal to the gate of the driving transistor;

[0019] During the reverse light emission phase, the light emission control module responds to the light emission control signal and outputs the driving signal generated by the driving transistor to the light emission element.

[0020] Compared with the prior art, the technical solution provided by the present invention has at least the following advantages:

[0021] The present invention provides a pixel electrode and its driving method and display device. In the forward scanning phase, the reset signal transmitted by the first input module and the data signal transmitted by the second input module can be transmitted to the driving transistor through the first connection module, and in the reverse scanning phase, the reset signal transmitted by the second input module and the data signal transmitted by the first input module can be transmitted to the driving transistor through the second connection module, so that the pixel circuit can achieve compatibility between forward scanning and reverse scanning. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0025] Figure 3 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention;

[0026] Figure 4 A timing diagram of the pixel circuit access signal during forward scanning is provided in an embodiment of the present invention;

[0027] Figure 5 This invention provides a timing diagram of the pixel circuit access signal during reverse scanning.

[0028] Figure 6 This is a schematic diagram of another display device provided in an embodiment of the present invention;

[0029] Figure 7 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0030] Figure 8 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0031] Figure 9 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0032] Figure 10 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0033] Figure 11 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0034] Figure 12 This is a schematic diagram of the structure of a signal switching module provided in an embodiment of the present invention;

[0035] Figure 13 This is a schematic diagram of another signal switching module provided in an embodiment of the present invention;

[0036] Figure 14 This is a schematic diagram of another signal switching module provided in an embodiment of the present invention;

[0037] Figure 15 This is a schematic diagram of another display device provided in an embodiment of the present invention. Detailed Implementation

[0038] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0039] As described in the background section, the pixel circuit operates under the control of a corresponding driving signal, causing the driving transistor of the pixel circuit to generate a driving current. Ultimately, the light-emitting element responds to this driving current and emits light. Therefore, the scanning driving circuit and the pixel circuit are indispensable components in a self-emissive display device. However, due to the structural limitations of existing pixel circuits, the pixel circuit cannot achieve compatible driving of both forward and reverse scanning of the scanning driving circuit. That is, the scanning driving circuit can only drive the pixel circuit to perform forward scanning from the first row of pixels to the Nth row of pixels, but cannot drive the pixel circuit to perform reverse scanning from the Nth row of pixels to the first row of pixels.

[0040] Based on this, embodiments of the present invention provide a pixel electrode and its driving method and display device, which effectively solve the existing technical problems, and the pixel circuit can achieve compatibility between forward scanning and reverse scanning.

[0041] To achieve the above objectives, the technical solutions provided by the embodiments of the present invention are as follows, in detail... Figures 1 to 15 The technical solutions provided in the embodiments of the present invention will be described in detail.

[0042] refer to Figure 1The diagram shown is a schematic diagram of a pixel circuit provided in an embodiment of the present invention. The pixel circuit includes: a driving transistor M0, a first input module 101, a second input module 102, a first connection module 201, a second connection module 202, a light emission control module 300, and a storage capacitor C.

[0043] The first input module 101 is used to transmit the first input signal V1 to the first terminal of the driving transistor M0 in response to the first control signal S1, and the second input module 102 is used to transmit the second input signal V2 to the second terminal of the driving transistor M0 in response to the second control signal S2, wherein when the first input signal V1 is a reset signal, the second input signal V2 is a data signal; and when the first input signal V1 is the data signal, the second input signal V2 is the reset signal.

[0044] The first connection module 201 is used to electrically connect the first terminal of the driving transistor M0 to the gate of the driving transistor M0 in response to the first scan signal S1N, and the second connection module 202 is used to electrically connect the second terminal of the driving transistor M0 to the gate of the driving transistor M0 in response to the second scan signal S2N.

[0045] The light-emitting control module 300 is used to respond to the light-emitting control signal EM and output the driving signal generated by the driving transistor M0 to the light-emitting element 400. The first plate of the storage capacitor C is electrically connected to the gate of the driving transistor M0, and the second plate of the storage capacitor C is electrically connected to the power supply voltage terminal PVDD.

[0046] It is understood that the first input signal provided in the embodiments of the present invention can be selected as a reset signal and a data signal, and when the first input signal is a reset signal, the second input signal is a data signal; and when the first input signal is a data signal, the second input signal is a reset signal. Thus, in the forward scanning phase, the reset signal transmitted by the first input module and the data signal transmitted by the second input module can be transmitted to the driving transistor through the first connection module, and in the reverse scanning phase, the reset signal transmitted by the second input module and the data signal transmitted by the first input module can be transmitted to the driving transistor through the second connection module, so that the pixel circuit can achieve compatibility between forward scanning and reverse scanning.

[0047] The pixel circuit provided in the embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. (Refer to...) Figure 2The diagram shows another pixel circuit structure provided in an embodiment of the present invention. The first input module 101 includes a first transistor M1, with its first terminal connected to the first input signal V1, its second terminal electrically connected to the first terminal of the driving transistor M0, and its gate connected to the first control signal S1. The second input module 102 includes a second transistor M2, with its first terminal connected to the second input signal V2, its second terminal electrically connected to the second terminal of the driving transistor M0, and its gate connected to the second control signal S2.

[0048] Combination Figure 1 He Ru Figure 2 As shown, the first connection module 210 provided in this embodiment of the invention includes a third transistor M3, the first terminal of the third transistor M3 being electrically connected to the first terminal of the driving transistor M0, the second terminal of the third transistor M3 being electrically connected to the gate of the driving transistor M0, and the gate of the third transistor M3 being connected to the first scan signal S1N; and the second connection module 202 includes a fourth transistor M4, the first terminal of the fourth transistor M4 being electrically connected to the second terminal of the driving transistor M0, the second terminal of the fourth transistor M4 being electrically connected to the gate of the driving transistor M0, and the gate of the fourth transistor M4 being connected to the second scan signal S2N.

[0049] Continue as Figure 2 As shown, the light-emitting control module 300 provided in this embodiment of the invention includes a fifth transistor M5 and a sixth transistor M6. The first terminal of the fifth transistor M5 is electrically connected to the power supply voltage terminal PVDD, the second terminal of the fifth transistor M5 is electrically connected to one terminal of the driving transistor M0, the other terminal of the driving transistor M0 is electrically connected to the first terminal of the sixth transistor M6, the second terminal of the driving transistor M6 is electrically connected to the light-emitting element 400, and the other terminal of the light-emitting element 400 is electrically connected to the cathode voltage terminal PVEE. The gates of both the fifth transistor M5 and the sixth transistor M6 are connected to the light-emitting control signal EM.

[0050] It should be noted that any one of the driving transistor, first transistor, second transistor, third transistor, fourth transistor, fifth transistor, and sixth transistor provided in the embodiments of the present invention can be an N-type transistor or a P-type transistor, and the present invention does not impose specific limitations on this. To facilitate a more detailed explanation of the working principle of the pixel circuit, the following description uses an example where the third and fourth transistors in the pixel circuit are N-type transistors and the remaining transistors are P-type transistors.

[0051] It is understood that the first control signal, second control signal, first scan signal, second scan signal, and light emission control signal provided in the embodiments of the present invention are all provided by the scan driving circuit. Specifically, in conjunction with... Figure 3 The diagram shown is a schematic representation of a display device according to an embodiment of the present invention. The display device includes pixels arranged in a first row (111) to an Nth row (11n) along the column direction Y. Each row includes multiple pixels (not shown), and each pixel includes a pixel circuit. N is an integer greater than or equal to 2. Within the same row of pixels, the pixel circuit receives the same first control signal S1, second control signal S2, first scan signal S1N, second scan signal S2N, and light emission control signal EM.

[0052] Continue as Figure 3 As shown, in the row direction X, the display device includes a scan driving circuit located on one side of all pixel rows. The scan driving circuit includes a first-level scan circuit 121 to an Nth-level scan circuit 12n cascaded together, and a virtual-level scan circuit 120 cascaded with the first-level scan circuit 121. In the virtual-level scanning circuit 120, the first-level scanning circuit 121 to the Nth-level scanning circuit 12n, each level of the scanning circuit outputs a first control signal S1, a second control signal S2, a first scanning signal S1N, and a second scanning signal S2N. Furthermore, the first control signal S1 accessed by the current row pixel is the second control signal S2 accessed by the previous row pixel; that is, the i-th level scanning circuit provides the second control signal S2 for the i-th row pixel and simultaneously provides the first control signal S1 for the (i+1)-th row pixel. The second scanning signal S2N accessed by the current row pixel is the first scanning signal S1N accessed by the previous row pixel; that is, the i-th level scanning circuit provides the first scanning signal S1N for the i-th row pixel and simultaneously provides the second scanning signal S2N for the (i+1)-th row pixel. The light emission control signal EM accessed by the i-th row pixel is provided by the i-th level scanning circuit, where i is an integer not less than 1 and not greater than N. And the first control signal S1 and the second scanning signal S2N accessed by the first row pixel 111 are provided by the virtual-level scanning circuit 120.

[0053] In one embodiment of the present invention, the display device provided by the present invention can realize forward scanning and reverse scanning. Forward scanning means scanning along the direction from the first row of pixels 111 to the Nth row of pixels 11n when displaying a frame, while reverse scanning means scanning along the direction from the Nth row of pixels 11n to the first row of pixels 111 when displaying a frame; wherein, in the forward scanning stage and the reverse scanning stage, the enable timing of the control signal and the scanning signal is reversed. (Specifically combined with...) Figure 4 and Figure 5 As shown, Figure 4 This invention provides a timing diagram of the pixel circuit access signal during forward scanning, according to an embodiment of the invention. Figure 5The following is a timing diagram of the pixel circuit access signal during reverse scanning provided in an embodiment of the present invention. It can be seen that the enabling timing of the first scanning signal S1N is reversed in the forward scanning stage and the reverse scanning stage. Similarly, the enabling timing of the second scanning signal S2N, the first control signal S1, and the second control signal S2 is also reversed. That is, in the forward scanning stage, the enabling of the second scanning signal S2N is before the enabling of the first scanning signal S1N, while in the reverse scanning stage, the enabling of the second scanning signal S2N is after the enabling of the first scanning signal S1N; and in the forward scanning stage, the enabling of the first control signal S1 is before the enabling of the second control signal S2, while in the reverse scanning stage, the enabling of the first control signal S1 is after the enabling of the second control signal S2.

[0054] It is understood that the scanning driving circuit provided in this embodiment of the invention reverses the timing of the output scanning signal and control signal during the forward scanning phase and the reverse scanning phase. Therefore, existing pixel circuits are limited by their structure and cannot operate in response to the signal timing during the reverse scanning phase. It should be noted that the scanning circuits at each stage provided in this embodiment of the invention can be a single integrated circuit, where both the scanning signal and control signal are generated when the integrated circuit is operating; or, the scanning circuit can include three sub-circuits, where one sub-circuit generates the scanning signal, one sub-circuit generates the control signal, and one sub-circuit generates the light emission control signal. This invention does not impose specific limitations on these aspects, and specific design is required based on the actual application.

[0055] Combination Figure 2 , Figure 4 and Figure 5 The working principle of the pixel circuit provided in the embodiments of the present invention during forward and reverse scanning is described in detail. Figure 2 and Figure 4 As shown, in the forward scanning stage provided by this embodiment of the invention, the second scanning signal S2N connected to the pixel circuit is first enabled to a high level, while the other scanning signals and control signals are all in the disabled stage, at which time the pixel circuit maintains its current state; then, the second scanning signal S2N enters the disabled stage, while the first scanning signal S1N connected to the pixel circuit enters the enabled stage to a high level, and the pixel circuit sequentially performs the forward reset stage T1a, the forward data writing stage T2a, and the forward light emission stage T3a.

[0056] During the forward reset phase T1a, the first scan signal S1N is enabled at a high level, and the third transistor M3 is controlled to be in the on state; at the same time, the first control signal S1 is enabled at a low level, and the first transistor M1 is controlled to be in the on state. The first transistor M1 and the third transistor M3 transmit the reset signal of the first input signal V1 during the forward scan phase to the gate of the driving transistor M0 for reset.

[0057] At the forward data write node T2a, the first scan signal S1N remains enabled at a high level, and the third transistor M3 is controlled to be in the on state; at the same time, the second control signal S2 is enabled at a low level, and the second transistor M2 is controlled to be in the on state. The second transistor M2 transmits the data signal of the second input signal V2 during the forward scan phase to the second terminal of the driving transistor M0, and after passing through the driving transistor M0 and the third transistor M3, the data signal is transmitted to the gate of the driving transistor M0.

[0058] During the forward light emission stage T3a, the light emission control signal EM is enabled at a low level, and the fifth transistor M5 and the sixth transistor M6 are controlled to be in the on state, thereby transmitting the driving current generated by the driving transistor M0 to the light emission element 400, and the light emission element 400 emits light in response to the driving current.

[0059] Furthermore, during the reverse scanning phase, the first scan signal S1N connected to the pixel circuit is first enabled to a high level, while the remaining scan signals and control signals are in the disabled phase, at which time the pixel circuit maintains its current state; then, the first scan signal S1N enters the disabled phase, while the second scan signal S2N connected to the pixel circuit enters the enabled phase to a high level, and the pixel circuit sequentially performs the reverse reset phase T1b, the reverse data writing phase T2b, and the reverse light emission phase T3b.

[0060] During the reverse reset phase T1b, the second scan signal S2N is enabled at a high level, and the fourth transistor M4 is controlled to be in the on state; at the same time, the second control signal S2 is enabled at a low level, and the second transistor M2 is controlled to be in the on state. The second transistor M2 and the fourth transistor M4 transmit the reset signal of the second input signal V2 during the reverse scan phase to the gate of the driving transistor M0 for reset.

[0061] At the reverse data write node T2b, the second scan signal S2N remains enabled at a high level, and the fourth transistor M4 is controlled to be in the on state; at the same time, the first control signal S1 is enabled at a low level, and the first transistor M1 is controlled to be in the on state. The first transistor M1 transmits the data signal of the first input signal V1 during the reverse scan phase to the first terminal of the driving transistor M0, and after passing through the driving transistor M0 and the fourth transistor M4, the data signal is transmitted to the gate of the driving transistor M0.

[0062] During the reverse light emission stage T3b, the light emission control signal EM is enabled at a low level, and the fifth transistor M5 and the sixth transistor M6 are controlled to be in the on state, thereby transmitting the driving current generated by the driving transistor M0 to the light emission element 400, and the light emission element 400 emits light in response to the driving current.

[0063] In one embodiment of the present invention, the display device provided by the present invention includes only a scanning driving circuit located on one side of the pixel row, i.e., as shown below. Figure 3 The structure of the scan driving circuit is shown. Alternatively, the display device provided in this embodiment of the invention may have scan driving circuits on both sides of the pixel row to improve signal transmission performance; see details below. Figure 6 The diagram shows another display device provided by an embodiment of the present invention. In the row direction X, a scanning driving circuit is included on both sides of the pixel row. The first-side scanning driving circuit includes a cascaded virtual-level scanning circuit 120, a first-level scanning circuit 121 to an Nth-level scanning circuit 12n. The second-side scanning driving circuit also includes a virtual-level scanning circuit 120', a first-level scanning circuit 121' to an Nth-level scanning circuit 12n'. Furthermore, the first-side and second-side scanning driving circuits are connected to the pixel circuits of the pixels in the same row in the same way. By simultaneously providing relevant signals to the pixel circuits of the same row of pixels through the first-side and second-side scanning driving circuits, the significant difference in signal delay caused by different transmission distances between the scanning circuits and different pixel circuits in the same row is avoided, ensuring a high display effect of the display device.

[0064] like Figure 7 The diagram shown is a structural schematic of another pixel circuit provided in an embodiment of the present invention. The pixel circuit provided in this embodiment of the present invention further includes a reset module 500. The reset module 500 is used to respond to the reset control signal Sf and transmit the auxiliary reset signal Vf to the connection end between the light emission control module 300 and the light emission element 400. Then, the light emission element 400 is reset by the auxiliary reset signal Vf, thereby further improving the performance of the pixel circuit.

[0065] refer to Figure 8The diagram shows a schematic of another pixel circuit provided in an embodiment of the present invention. The reset module 500 provided in this embodiment includes a seventh transistor M7. The first terminal of the seventh transistor M7 is connected to the auxiliary reset signal Vf, and the second terminal of the seventh transistor M7 is electrically connected to the connection terminal of the light-emitting control module 300 and the light-emitting element 400. The gate of the seventh transistor M7 is connected to the reset control signal Sf. Optionally, the reset module 500 provided in this embodiment can operate in the reset stage or data writing stage of the forward scanning stage or the reverse scanning stage. Therefore, the auxiliary reset signal Vf can reuse the first control signal S1 or the second control signal S2. That is, when the conduction type of the seventh transistor M7 provided in this embodiment is the same as the conduction type of the third transistor M3, the auxiliary reset signal Vf can reuse the first control signal S1; or, when the conduction type of the seventh transistor M7 is the same as the conduction type of the fourth transistor M4, the auxiliary reset signal Vf can reuse the second control signal S2, thereby reducing the number of control signal ports and optimizing the pixel circuit wiring.

[0066] In one embodiment of the present invention, the first transistor and / or the second transistor provided by the present invention can be a dual-gate transistor, such as... Figure 9 The diagram shown is a structural schematic of another pixel circuit provided in an embodiment of the present invention. In this embodiment, the first transistor M1 and the second transistor M2 are dual-gate transistors, which can improve the response speed of the first transistor M1 and the second transistor M2 and improve the performance of the pixel circuit.

[0067] In order to shield the input signal from interference from external signals, the pixel circuit provided in this embodiment of the invention can also shield the external signals from the first transistor and / or the second transistor through a shielding layer. For example... Figure 10 The diagram shown illustrates the structure of another pixel circuit provided in an embodiment of the present invention. The pixel circuit provided in this embodiment includes:

[0068] Substrate 10.

[0069] Signal shielding layer 20 located on the substrate 10

[0070] A transistor array layer 30 is located on the side of the signal shielding layer 20 opposite to the substrate 10. The transistor array layer 30 includes the first transistor M1 and the second transistor M2. The transistor array layer 30 includes a first insulating layer 310 on the signal shielding layer 20; a semiconductor layer 320 on the first insulating layer 310, the semiconductor layer 320 including an active region forming a transistor; a gate insulating layer 330 on the semiconductor layer 320; a gate layer 340 on the gate insulating layer 330, the gate layer 340 including a gate forming a transistor; an interlayer insulating layer 350 on the gate layer 340; and a source / drain layer 360 on the interlayer insulating layer 350, the source / drain layer 360 including a source and a drain forming a transistor, and the source and drain are in contact with the active region through vias.

[0071] In the direction perpendicular to the plane of the substrate 10, the signal shielding layer 20 has an overlapping area with the first transistor M1 and / or the second transistor M2.

[0072] Understandably, in this embodiment of the invention, the shielding layer overlaps with the first transistor and / or the second transistor, thereby blocking interference from external signals to the first and second transistors and ensuring high signal transmission efficiency. Optionally, the shielding layer provided in this embodiment of the invention completely covers the area occupied by the first and second transistors, minimizing interference from external signals to the input signal.

[0073] In one embodiment of the present invention, the shielding layer provided by the present invention is a conductive shielding layer, which can be made of metal or other materials, and the present invention does not impose specific limitations on it. In this embodiment, the signal shielding layer is electrically connected to the power supply voltage terminal, thereby improving the shielding effect of the shielding layer.

[0074] In one embodiment of the present invention, the third transistor and / or the fourth transistor provided by the present invention are oxide transistors, which can reduce the leakage current of the third transistor and the fourth transistor and improve the performance of the pixel circuit.

[0075] In one embodiment of the present invention, the first input signal and the second input signal provided by the present invention transmit different signals in the forward scanning phase and the reverse scanning phase, which can be achieved by signal switching. (See reference) Figure 11The diagram shown illustrates the structure of another pixel circuit provided in an embodiment of the present invention. The pixel circuit further includes a signal switching module 600, which comprises a first output terminal OUT1, a second output terminal OUT2, a first input terminal IN1, and a second input terminal IN2. The first input terminal IN1 of the signal switching module 600 is connected to the reset signal Vref, and the second input terminal IN2 is connected to the data signal Vdata. The first output terminal OUT1 of the signal switching module 600 outputs the first input signal V1, and the second output terminal OUT2 of the signal switching module 600 outputs the second input signal V2.

[0076] Understandably, the signal switching module provided in this embodiment of the invention connects its first input terminal to its first output terminal and its second input terminal to its second output terminal during the forward scanning phase, so that the first input signal is a reset signal and the second input signal is a data signal. Furthermore, during the reverse scanning phase, the signal switching module connects its first input terminal to its second output terminal and its second input terminal to its first output terminal, so that the first input signal is a data signal and the second input signal is a reset signal, thus completing the signal switching between the first and second input signals in different scanning phases.

[0077] For details, please refer to the following: Figure 12 The diagram shown is a structural schematic of a signal switching module provided in an embodiment of the present invention. The signal switching module 600 provided in this embodiment includes an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, and an eleventh transistor M11. The gate of the eighth transistor M8 is connected to a first switching control signal SW1, the gate of the ninth transistor M9 is connected to a second switching control signal SW2, the gate of the tenth transistor M10 is connected to a third switching control signal SW3, and the gate of the eleventh transistor M11 is connected to a fourth switching control signal SW4.

[0078] The first terminal of the eighth transistor M8 and the first terminal of the tenth transistor M10 are connected to form the first input terminal IN1 of the signal switching module 600; the first terminal of the ninth transistor M9 and the first terminal of the eleventh transistor M11 are connected to form the second input terminal IN2 of the signal switching module 600; the second terminal of the eighth transistor M8 and the second terminal of the ninth transistor M9 are connected to form the first output terminal OUT1 of the signal switching module 600; the second terminal of the tenth transistor M10 and the second terminal of the eleventh transistor M11 are connected to form the second output terminal OUT2 of the signal switching module 600.

[0079] Understandably, in the forward scanning phase, the signal switching module provided in this embodiment of the invention enables the first and fourth switching control signals while deactivating the second and third switching control signals. This connects the first input and first output terminals of the signal switching module via an eighth transistor, and connects the second input and second output terminals via an eleventh transistor. Conversely, in the reverse scanning phase, the first and fourth switching control signals deactivate, while enabling the second and third switching control signals. This connects the first input and second output terminals of the signal switching module via a tenth transistor, and connects the second input and first output terminals via a ninth transistor, thereby completing the signal switching between the first and second input signals in different scanning phases.

[0080] Furthermore, in the embodiments of the present invention, the eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor all have the same conduction type; the first switching control signal and the fourth switching control signal are the same as a first multiplexed switching control signal; and the second switching control signal and the third switching control signal are the same as a second multiplexed switching control signal, thereby reducing the number of control ports and optimizing the pixel circuit. Figure 13 The diagram shown is a structural schematic of another signal switching module provided in an embodiment of the present invention. In this module, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, and the eleventh transistor M11 have the same conduction type. The first switching control signal SW1 and the fourth switching control signal SW4 are the same switching control signal SWx1. The second switching control signal SW2 and the third switching control signal SW3 are the same switching control signal SWx2.

[0081] Understandably, in the forward scanning phase, the signal switching module provided in this embodiment of the invention enables the switching control signal multiplexed with the first and fourth switching control signals, while disabling the switching control signal multiplexed with the second and third switching control signals. This connects the first input terminal and the first output terminal of the signal switching module through the eighth transistor, and connects the second input terminal and the second output terminal of the signal switching module through the eleventh transistor. Furthermore, in the reverse scanning phase, the switching control signal multiplexed with the first and fourth switching control signals is disabled, while enabling the switching control signal multiplexed with the second and third switching control signals. This connects the first input terminal and the second output terminal of the signal switching module through the tenth transistor, and connects the second input terminal and the first output terminal of the signal switching module through the ninth transistor, thereby completing the signal switching between the first input signal and the second input signal in different scanning phases.

[0082] Or refer to Figure 14 The diagram shows a structural schematic of another signal switching module provided in an embodiment of the present invention. In this embodiment, the eighth transistor M8 and the eleventh transistor M11 have a first conduction type, and the ninth transistor M9 and the tenth transistor M10 have a second conduction type. The first and second conduction types are opposite. The first switching control signal SW1, the second switching control signal SW2, the third switching control signal SW3, and the fourth switching control signal SW4 are the same switching control signal SWx. When the first conduction type is N-type, the second conduction type is P-type; conversely, when the first conduction type is P-type, the second conduction type is N-type. The present invention does not impose specific limitations on this.

[0083] Understandably, in the forward scanning phase, the signal switching module provided in this embodiment of the invention uses a switching control signal multiplexed from the first to the fourth switching control signals at a first level that controls the conduction of the eighth and eleventh transistors, such that the first input terminal and the first output terminal of the signal switching module are connected through the eighth transistor, and the second input terminal and the second output terminal of the signal switching module are connected through the eleventh transistor. Furthermore, in the reverse scanning phase, the switching control signal multiplexed from the first to the fourth switching control signals is a second level that controls the conduction of the ninth and tenth transistors, such that the first input terminal and the second output terminal of the signal switching module are connected through the tenth transistor, and the second input terminal and the first output terminal of the signal switching module are connected through the ninth transistor, thereby completing the signal switching between the first input signal and the second input signal in different scanning phases.

[0084] Accordingly, embodiments of the present invention also provide a display device, the display device including the pixel circuit provided in any of the above embodiments.

[0085] refer to Figure 15 The diagram shown is a structural schematic of another display device provided in an embodiment of the present invention. The display device 1000 provided in this embodiment of the present invention can be a mobile terminal, and the display device 1000 includes the pixel circuit provided in any of the above embodiments.

[0086] It should be noted that the display device provided in the embodiments of the present invention can also be a laptop, tablet computer, computer, wearable device, etc., and the present invention does not impose specific limitations on it.

[0087] Accordingly, embodiments of the present invention also provide a driving method for a pixel circuit, used to drive the pixel circuit provided in the above embodiments, the driving method including a forward scanning stage and a reverse scanning stage;

[0088] The forward scanning phase includes a forward reset phase, a forward data writing phase, and a forward light emission phase performed sequentially, wherein:

[0089] During the positive reset phase, the first input module operates in response to the first control signal, and the first connection module operates in response to the first scan signal, transmitting the reset signal to the gate of the driving transistor;

[0090] During the forward data writing phase, the second input module operates in response to the second control signal, and the first connection module operates in response to the first scan signal. The data signal is input from the second terminal of the driving transistor and, after passing through the driving transistor, is transmitted to the gate of the driving transistor.

[0091] During the forward light emission phase, the light emission control module responds to the light emission control signal and outputs the driving signal generated by the driving transistor to the light emission element;

[0092] Furthermore, the reverse scanning phase includes a reverse reset phase, a reverse data writing phase, and a reverse light emission phase performed sequentially, wherein:

[0093] During the reverse reset phase, the second input module operates in response to the second control signal, and the second connection module operates in response to the second scan signal, transmitting the reset signal to the gate of the driving transistor;

[0094] During the reverse data writing phase, the first input module operates in response to the first control signal, and the second connection module operates in response to the second scan signal. The data signal is input from the first terminal of the driving transistor and, after passing through the driving transistor, is transmitted to the gate of the driving transistor.

[0095] During the reverse light emission phase, the light emission control module responds to the light emission control signal and outputs the driving signal generated by the driving transistor to the light emission element.

[0096] It should be noted that the driving method provided in the embodiments of the present invention can be specifically referred to. Figure 2 , Figure 4 and Figure 5 The pixel circuit and related timing are described in detail, but the present invention will not elaborate further on them.

[0097] This invention provides a pixel electrode, its driving method, and a display device. During the forward scanning phase, a reset signal transmitted by a first input module and a data signal transmitted by a second input module can be transmitted to a driving transistor via a first connection module. During the reverse scanning phase, a reset signal transmitted by a second input module and a data signal transmitted by a first input module can be transmitted to a driving transistor via a second connection module, enabling the pixel circuit to achieve compatibility between forward and reverse scanning.

[0098] In the description of this invention, it should be understood that terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0099] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0100] In this invention, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between components; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0101] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0102] In this invention, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0103] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A pixel circuit, characterized in that, include: The components include a driving transistor, a first input module, a second input module, a first connection module, a second connection module, a light-emitting control module, and a storage capacitor. The first input module is configured to transmit a first input signal to a first terminal of the driving transistor in response to a first control signal, and the second input module is configured to transmit a second input signal to a second terminal of the driving transistor in response to a second control signal, wherein when the first input signal is a reset signal, the second input signal is a data signal; and when the first input signal is the data signal, the second input signal is the reset signal; The first connection module is used to electrically connect the first terminal of the driving transistor to the gate of the driving transistor in response to the first scan signal, and the second connection module is used to electrically connect the second terminal of the driving transistor to the gate of the driving transistor in response to the second scan signal. The light-emitting control module is used to respond to the light-emitting control signal and output the driving signal generated by the driving transistor to the light-emitting element. The first plate of the storage capacitor is electrically connected to the gate of the driving transistor, and the second plate of the storage capacitor is electrically connected to the power supply voltage terminal.

2. The pixel circuit according to claim 1, characterized in that, The first input module includes a first transistor, a first terminal of the first transistor is connected to the first input signal, a second terminal of the first transistor is electrically connected to the first terminal of the driving transistor, and the gate of the first transistor is connected to the first control signal. Furthermore, the second input module includes a second transistor, a first terminal of the second transistor is connected to the second input signal, a second terminal of the second transistor is electrically connected to the second terminal of the driving transistor, and the gate of the second transistor is connected to the second control signal.

3. The pixel circuit according to claim 2, characterized in that, The first transistor and / or the second transistor are dual-gate transistors.

4. The pixel circuit according to claim 2, characterized in that, The pixel circuit includes: a substrate; Signal shielding layer located on the substrate; A transistor array layer located on the side of the signal shielding layer opposite to the substrate, the transistor array layer including the first transistor and the second transistor; In a direction perpendicular to the plane of the substrate, the signal shielding layer has an overlapping area with the first transistor and / or the second transistor.

5. The pixel circuit according to claim 4, characterized in that, The signal shielding layer is electrically connected to the power supply voltage terminal.

6. The pixel circuit according to claim 1, characterized in that, The first connection module includes a third transistor, the first terminal of which is electrically connected to the first terminal of the driving transistor, the second terminal of which is electrically connected to the gate of the driving transistor, and the gate of the third transistor is connected to the first scan signal. Furthermore, the second connection module includes a fourth transistor, the first terminal of which is electrically connected to the second terminal of the driving transistor, the second terminal of which is electrically connected to the gate of the driving transistor, and the gate of the fourth transistor is connected to the second scan signal.

7. The pixel circuit according to claim 6, characterized in that, The third transistor and / or the fourth transistor are oxide transistors.

8. The pixel circuit according to claim 1, characterized in that, The light-emitting control module includes a fifth transistor and a sixth transistor. The first terminal of the fifth transistor is electrically connected to the power supply voltage terminal, the second terminal of the fifth transistor is electrically connected to the second terminal of the driving transistor, the first terminal of the driving transistor is electrically connected to the first terminal of the sixth transistor, and the second terminal of the sixth transistor is electrically connected to the light-emitting element. The gates of both the fifth transistor and the sixth transistor are connected to the light-emitting control signal.

9. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes a reset module, which is used to respond to a reset control signal and transmit an auxiliary reset signal to the connection end between the light-emitting control module and the light-emitting element.

10. The pixel circuit according to claim 9, characterized in that, The reset module includes a seventh transistor, the first terminal of which is connected to the auxiliary reset signal, the second terminal of which is electrically connected to the connection terminal of the light-emitting control module and the light-emitting element, and the gate of which is connected to the reset control signal.

11. The pixel circuit according to claim 10, characterized in that, The auxiliary reset signal reuses either the first control signal or the second control signal.

12. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a signal switching module, which includes a first output terminal, a second output terminal, a first input terminal, and a second input terminal. The first input terminal of the signal switching module is connected to the reset signal, and the second input terminal of the signal switching module is connected to the data signal. The first output terminal of the signal switching module outputs the first input signal, and the second output terminal of the signal switching module outputs the second input signal.

13. The pixel circuit according to claim 12, characterized in that, The signal switching module includes an eighth transistor, a ninth transistor, a tenth transistor, and an eleventh transistor; The gate of the eighth transistor is connected to the first switching control signal, the gate of the ninth transistor is connected to the second switching control signal, the gate of the tenth transistor is connected to the third switching control signal, and the gate of the eleventh transistor is connected to the fourth switching control signal. The first terminal of the eighth transistor and the first terminal of the tenth transistor are connected to form the first input terminal of the signal switching module, and the first terminal of the ninth transistor and the first terminal of the eleventh transistor are connected to form the second input terminal of the signal switching module. The second terminal of the eighth transistor and the second terminal of the ninth transistor are connected to form the first output terminal of the signal switching module, and the second terminal of the tenth transistor and the second terminal of the eleventh transistor are connected to form the second output terminal of the signal switching module.

14. The pixel circuit according to claim 13, characterized in that, The eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor all have the same conduction type; the first switching control signal and the fourth switching control signal are the same as the first multiplexed switching control signal; and the second switching control signal and the third switching control signal are the same as the second multiplexed switching control signal.

15. The pixel circuit according to claim 13, characterized in that, The conduction type of the eighth transistor and the eleventh transistor is a first conduction type, and the conduction type of the ninth transistor and the tenth transistor is a second conduction type, with the first conduction type and the second conduction type being opposite. The first switching control signal, the second switching control signal, the third switching control signal, and the fourth switching control signal are the same switching control signal.

16. A display device, characterized in that, The display device includes the pixel circuit according to any one of claims 1-15.

17. A driving method for a pixel circuit, characterized in that, The driving method is used to drive the pixel circuit according to any one of claims 1-15, the driving method comprising a forward scanning phase and a reverse scanning phase; The forward scanning phase includes a forward reset phase, a forward data writing phase, and a forward light emission phase performed sequentially, wherein: During the positive reset phase, the first input module operates in response to the first control signal, and the first connection module operates in response to the first scan signal, transmitting the reset signal to the gate of the driving transistor; During the forward data writing phase, the second input module operates in response to the second control signal, and the first connection module operates in response to the first scan signal, transmitting the data signal to the gate of the driving transistor; During the forward light emission phase, the light emission control module responds to the light emission control signal and outputs the driving signal generated by the driving transistor to the light emission element; Furthermore, the reverse scanning phase includes a reverse reset phase, a reverse data writing phase, and a reverse light emission phase performed sequentially, wherein: During the reverse reset phase, the second input module operates in response to the second control signal, and the second connection module operates in response to the second scan signal, transmitting the reset signal to the gate of the driving transistor; During the reverse data writing phase, the first input module operates in response to the first control signal, and the second connection module operates in response to the second scan signal, transmitting the data signal to the gate of the driving transistor; During the reverse light emission phase, the light emission control module responds to the light emission control signal and outputs the driving signal generated by the driving transistor to the light emission element.

Images