A blind pixel suppression structure and implementation method for a linear indium gallium arsenide detector

Abstract

The present invention discloses a blind pixel suppression structure and implementation method for a linear InGaAs detector. The detector is a back-illuminated structure, with n rows × m columns of photosensitive element diffusion holes, where 1 <n≤3,m≥512,保护环扩散孔环绕在光敏区的外圈,每个光敏元独立引出P电极,保护环P区与器件N区通过延伸电极合并引出。其实现方法为在N‑InP / I‑InGaAs / N‑InP结构的外延材料上,通过光刻、刻蚀同步获得n行×m列光敏元扩散孔和保护环扩散孔,同步进行P型掺杂,延伸电极覆盖保护环的P电极孔与器件N电极槽,保护环在光照下产生的光生载流子通过N电极导出。本发明的优点是:该结构采用n行像元作为一行像元应用,每个像元独立引出,只要同一列n个像元有一个正常光敏元,即可实现零盲元应用,将探测器成品率提升n倍。

Description

Technical Field

[0001] The present invention relates to the technology of infrared photodetectors, specifically to a crosstalk suppression structure and implementation method for a linear InGaAs detector, which is applicable to the preparation of a back-illuminated InGaAs linear detector with zero dead pixels, high density, high detectivity, low crosstalk, and room-temperature operation. Background Art

[0002] In the field of infrared photodetectors, short-wave infrared InGaAs detectors have the advantages of uncooled room-temperature operation, high detectivity, and good uniformity in the 0.9μm - 1.7μm band, which is conducive to the realization of high-sensitivity, miniaturized, low-power, and highly reliable infrared detection systems, and has important applications in many fields such as space remote sensing, low-light-level night vision, and spectral detection.

[0003] Short-wave infrared InGaAs detectors adopt a photovoltaic photosensitive element structure, generally a PIN structure, and usually adopt the following two technical solutions: (1) Planar detectors are obtained by P-doping the surface N-type InP layer on N-InP / I-InGaAs / N-InP structural materials. The advantage of this method is that the PN junction of the device is buried in the InP layer, which reduces the difficulty of device passivation and makes the dark current and noise of the device relatively small. However, due to the lateral diffusion of carriers during the P-doping process, the photosensitive elements are enlarged, and crosstalk is likely to occur between adjacent photosensitive elements. (2) Mesa detectors are obtained by physically isolating the photosensitive elements through an etching process on in-situ doped P-InP / I-InGaAs / N-InP structural materials. The etched isolation grooves between adjacent photosensitive elements can effectively suppress the lateral diffusion of carriers, thereby reducing the crosstalk between adjacent photosensitive elements. However, since the mesa detectors have exposed sides, a passivation process is required to reduce the device dark current, and their detectivity is usually lower than that of planar detectors.

[0004] In response to the increasing requirements of infrared optoelectronic systems for the sensitivity of detectors, in order to obtain extremely low dark current and noise, the adoption of a planar technology solution has become the mainstream technology development direction for InGaAs detectors. Planar InGaAs detectors have the advantages of low dark current, high duty cycle, high detectivity, high reliability, etc., and InGaAs detectors have the advantages of operating at room temperature without refrigeration. However, there is crosstalk between adjacent photosensitive elements in planar InGaAs detectors. At the same time, in the field of aerospace remote sensing, the scanning imaging swath of many optoelectronic systems is continuously increasing, and the spatial resolution is continuously improving, requiring the development of ultra-high-density, zero-blind-element superlinear array InGaAs detectors. When the scale of a single linear array reaches several hundred or thousands, the yield of zero-blind-element detectors drops significantly, resulting in a substantial increase in the workload of device research, testing, and screening, with a low yield and high cost of the devices. Therefore, it is necessary to design a blind-element suppression structure for linear array InGaAs detectors. Summary of the Invention

[0005] The present invention proposes a blind-element suppression structure for a linear array InGaAs detector, which is applied to a linear array scanning imaging system that requires zero-blind-element operation. While retaining the advantages of low dark current, high duty cycle, high detectivity, high reliability, etc. of planar detectors, n rows of photosensitive elements are designed. As long as there is at least one normal photosensitive element in the same column among the n rows of pixels, zero-blind-element scanning imaging application of the linear array can be achieved through electronic processing.

[0006] The present invention discloses a blind-element suppression structure for a linear array InGaAs detector, which is characterized in that: n rows × m columns of square photosensitive element diffusion holes D 11 ~D nm are designed, where n is the number of rows, m is the number of columns, 1 < n ≤ 3, m ≥ 512, and a ring-shaped guard ring diffusion hole 1 is designed on the periphery of the photosensitive area. A P electrode hole 2 is provided on each photosensitive element diffusion hole, and one row of guard ring P electrode holes 3 is designed on each of the upper and lower sides of the guard ring, corresponding one-to-one to the P electrode holes 2 of the photosensitive elements. An N electrode groove 4 is provided on each of the upper and lower sides of the guard ring. A P electrode 5 is deposited on each photosensitive element P electrode hole 2, and two extension electrodes 6 are provided on the detector, covering the guard ring P electrode holes 3 and the N electrode grooves 4 on the upper and lower sides respectively to combine and lead out the guard ring P region and the detector N region.

[0007] The implementation method of the present invention is: on the epitaxial material of the N-InP / I-InGaAs / N-InP structure, n rows × m columns of photosensitive element diffusion holes D 11 ~D nm, the guard ring diffusion hole 1 is subjected to a closed-tube diffusion using a Zn3P2 doping source to form the photosensitive element P region and the guard ring P region. An SiNx passivation layer is deposited on the chip surface, and the photosensitive element P electrode hole 2, the guard ring P electrode hole 3, and the N electrode groove 4 are obtained through photolithography and etching respectively. The photosensitive element P electrode 5 and the extended electrode 6 are obtained through photolithography and evaporation of a single layer of Au. The guard ring P electrode hole 3 is connected to the N electrode groove 4 through the extended electrode 6.

[0008] The advantages of the present invention are as follows:

[0009] 1. The planar diffusion process buries the PN junction of the photosensitive element in the InP layer, eliminating the need to consider the side passivation problem of the PN junction, effectively suppressing the dark current and noise of the device;

[0010] 2. The photosensitive element is designed in n rows, and each photosensitive element is independently led out. As long as not all positions in the same column are blind elements, through back-end electronics sampling and data processing, the application requirement of zero-blind-element scanning imaging can be achieved. Compared with the conventional single-row photosensitive element linear array structure, the zero-blind-element yield is increased to n times that of the conventional structure;

[0011] 3. Photosensitive elements or guard rings are arranged around each photosensitive element, effectively isolating the crosstalk between adjacent photosensitive elements;

[0012] 4. The structure of the present invention is simple and the process is convenient, which is suitable for linear array back-illuminated detectors that require zero-blind-element operation and low crosstalk. Description of the Drawings

[0013] Figure 1 It is a schematic diagram of the diffusion holes of a linear array InGaAs detector;

[0014] In the figure: D 11 —— The pixel in the first row and the first column;

[0015] D n1 —— The pixel in the nth row and the first column;

[0016] D 1m —— The pixel in the first row and the mth column;

[0017] D nm —— The pixel in the nth row and the mth column;

[0018] 1—— The guard ring diffusion hole;

[0019] Figure 2 It is a schematic diagram of the electrode holes of a linear array InGaAs detector;

[0020] In the figure: 2—— The photosensitive element P electrode hole;

[0021] 3—— The guard ring P electrode hole;

[0022] 4—— The N electrode groove;

[0023] Figure 3 Schematic diagram of electrodes for a linear InGaAs detector;

[0024] In the figure: 5 - P electrode of photosensitive element;

[0025] 6 - Extended electrode. Specific implementation mode

[0026] The following further elaborates on the specific implementation mode of the present invention in conjunction with the accompanying drawings.

[0027] This embodiment is a 1024×1 element planar InGaAs linear detector.

[0028] A planar InP-based N-InP / I-InGaAs / N-InP epitaxial material grown by molecular beam epitaxy (MBE) is selected. Among them, the thickness of the N-type InP substrate is 350 μm, the diameter is 2 inches, and the carrier concentration is 3×10 18 cm -3 ; the thickness of the N-type InP buffer layer is 1 μm, and the carrier concentration is 3×10 18 cm -3 ; the thickness of the intrinsic InGaAs absorption layer is 2.5 μm, and the carrier concentration is 1×10 16 cm -3 ; the thickness of the N-type InP cap layer is 1 μm, and the carrier concentration is 5×10 16 cm -3 .

[0029] A 300-nm-thick SiNx diffusion mask layer is grown on the N-type InP cap layer by plasma-enhanced chemical vapor deposition (PECVD). As shown in Figure 1 , 3 rows × 1024 columns of photosensitive element diffusion holes D 11 ~D 3,1024 and protection ring diffusion hole 1 are obtained through positive photoresist lithography and reactive ion etching (RIE). The linear scale of the photosensitive elements is 1024 columns, designed with 3 rows. The photosensitive element diffusion holes are square, with a size of 14 μm × 14 μm, the center distance between adjacent photosensitive elements is 20 μm, the protection ring 1 surrounds the outside of the three rows of photosensitive elements, with a width of 14 microns, the inner ring size is 20480 μm × 60 μm, the outer ring size is 20494 μm × 74 μm, and the interval between the inner ring and the photosensitive element diffusion holes is 7 μm.

[0030] The epitaxial material and the Zn3P2 doping source are sealed together in a high-vacuum quartz tube. The sample is diffused at 530 °C for 10 minutes to form the photosensitive element P region and the guard ring P region. A SiNx passivation layer with a thickness of 300 nm is deposited on the chip surface by PECVD. Through positive photoresist lithography and RIE etching, the photosensitive element P electrode holes 2 and the guard ring P electrode holes 3 are obtained, and their sizes are both 8 μm × 8 μm. Then, through positive photoresist lithography, the passivation layer, the diffusion mask layer, the InP cap layer, and the intrinsic InGaAs absorption layer in the selected area are etched away in sequence to enter the InP buffer layer region, and the device N electrode groove 4 is obtained. The depth of the N electrode groove is 4.3 μm to 4.5 μm, and the width is 30 μm.

[0031] Through positive photoresist lithography and electron beam evaporation of a single layer of Au with a thickness of 200 nm, the photosensitive element P electrode 5 and the device N electrode 6 are obtained. The size of the P electrode is 9 μm × 9 μm, and the size of the extended electrode 6 is 20490 μm × 150 μm. Through positive photoresist lithography and thermal evaporation of a single layer of In, the photosensitive element interconnect In balls and the N-region interconnect In balls for flip-chip interconnection are obtained, and the ball diameters are both Φ9 μm and the height is 5 μm. Thick photoresist is spun on the chip surface to protect the In balls, dried with nitrogen, and the 1024-element planar back-illuminated InGaAs detector is fabricated.

Claims

1. A blind pixel suppression structure for a linear indium gallium arsenide detector, the detector being a back-illuminated structure, characterized in that: Design a square photosensitive element diffusion hole D with n rows × m columns on the photosensitive element 11 ~D nm , where n is the number of rows, m is the number of columns, 1 < n ≤ 3, m ≥ 512, and design an annular guard ring diffusion hole (1) on the periphery of the photosensitive area; set a P electrode hole (2) on each photosensitive element diffusion hole, design a row of guard ring P electrode holes (3) on each of the upper and lower sides of the guard ring, and each guard ring P electrode hole (3) corresponds to the P electrode hole (2) of the corresponding photosensitive element one by one, and set an N electrode groove (4) on each of the upper and lower sides of the guard ring; deposit a P electrode (5) on each photosensitive element P electrode hole (2), and the detector is provided with two extension electrodes (6) that respectively cover the guard ring P electrode holes (3) and the N electrode grooves (4) on the upper and lower sides, and lead out the merged guard ring P region and the detector N region; The formation method of the photosensitive element diffusion holes and the guard ring diffusion holes (1) is as follows: on the epitaxial material of the N-InP / I-InGaAs / N-InP structure, n rows and m columns of photosensitive element diffusion holes D are obtained through photolithography and etching. 11 ~D nm , and the guard ring diffusion holes (1), and the photosensitive element P region and the guard ring P region are formed by closed-tube diffusion using a Zn3P2 doping source.

2. A method for implementing a blind pixel suppression structure for a linear indium gallium arsenide detector as described in claim 1, characterized in that The method is as follows: on the epitaxial material of the N-InP / I-InGaAs / N-InP structure, n rows and m columns of photosensitive element diffusion holes D 11 ~D nm and protection ring diffusion holes (1) are obtained through photolithography and etching. Closed-tube diffusion is carried out using a Zn3P2 doping source to form the photosensitive element P region and the protection ring P region. An SiNx passivation layer is deposited on the chip surface, and photosensitive element P electrode holes (2), protection ring P electrode holes (3), and N electrode grooves (4) are obtained through photolithography and etching respectively. Photosensitive element P electrodes (5) and extension electrodes (6) are obtained through photolithography and evaporation of a single layer of Au. The protection ring P region and the device N region are merged and led out through the extension electrodes.

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