A self-synchronization method for self-organizing network devices based on ad-hoc

Abstract

The present invention discloses a self-synchronization method for ad-hoc self-organizing network devices, comprising the following steps: S1, performing frame search using synchronization header information in data frames and obtaining synchronization header timing information; S2, pre-allocating a time slot for the current node and transmitting a data frame; S3, receiving data in the time slots of other nodes and extracting synchronization header information; S4, calculating the time deviation between two adjacent nodes; and S5, adjusting the node clocks based on the calculated time deviation data to complete self-synchronization. This method can reduce clock errors caused by aging network node hardware during the self-synchronization process and reduce dependence on external hardware facilities, thereby improving the accuracy of network information transmission. At the same time, without relying on external equipment, the self-synchronization of ad-hoc self-organizing network devices can be achieved, thereby improving the accuracy of network data transmission and network stability.

Description

Technical Field

[0001] The present invention relates to the technical field of synchronization of self-organizing network equipment, and in particular to a self-synchronization method of self-organizing network equipment based on ad-hoc. Background Art

[0002] Currently, ad-hoc networks typically use time division multiple access (TDMA) as the channel access method for wireless ad hoc networks. However, TDMA has high requirements for network time synchronization. When sharing information and transmitting messages in the ad-hoc network, the entire ad-hoc network needs to synchronize time.

[0003] However, traditional TDMA processing methods often rely on external hardware, such as Beidou and GPS, to provide clock synchronization support. Furthermore, due to issues such as aging hardware in ad-hoc network nodes, clock drift, unstable network line delays, and low clock synchronization accuracy are common. This significantly restricts and limits the synchronization process in ad-hoc networks, making it difficult to effectively support various real-time services.

[0004] Therefore, it is an extremely important research task to study an Ad-hoc network self-synchronization technology that does not rely on external hardware facilities and the hardware accuracy of the network nodes themselves.

[0005] Currently, no effective solutions have been proposed for the problems in related technologies. Summary of the Invention

[0006] In view of the problems in the related art, the present invention proposes a self-synchronization method for network devices based on ad-hoc networks to overcome the above technical problems existing in the existing related art.

[0007] To this end, the specific technical solutions adopted in the present invention are as follows:

[0008] A self-synchronization method for ad-hoc self-organizing network devices, the method comprising the following steps:

[0009] S1. Perform frame search through the synchronization header information in the data frame and obtain the synchronization header timing information;

[0010] S2, pre-allocate the time slot of the current node and transmit the data frame;

[0011] S3, receiving data in the time slot of other nodes and extracting synchronization header information;

[0012] S4. Calculate the time deviation between two adjacent nodes;

[0013] S5. Adjust the node clock according to the calculated time deviation data to complete self-synchronization.

[0014] Furthermore, the data frame includes a frame header, routing information and data.

[0015] Furthermore, the routing information is used to record each node and its adjacent one-hop nodes and adjacent multi-hop nodes;

[0016] The frame header is composed of Gold, and the Gold sequence length is 64.

[0017] Furthermore, performing frame search through synchronization header information in a data frame and obtaining synchronization header timing information includes the following steps:

[0018] S11. When receiving the node, the input frame data is saved through a shift register with a depth of 64;

[0019] S12, compare the 64 data with the local Gold sequence data stored in the node in real time;

[0020] S13. When the similarity between the two reaches 50 / 64 or more, the data frame detection is successful;

[0021] S14: Output the start flag signal of the data frame to obtain the node synchronization header timing information.

[0022] Furthermore, the time deviation includes transmission delay and clock drift.

[0023] Furthermore, the calculation of the time deviation between two adjacent nodes includes the following steps:

[0024] S41. Define the functional relationship between the transmitting time and the receiving time;

[0025] S42, after a node sends data frames multiple times, defining a functional relationship between the sending and receiving times corresponding to each period;

[0026] S43. Define transmission delay as the sum of propagation delay and processing delay;

[0027] S44. Obtain a clock drift function expression based on the relationship between the signal propagation delay in the air and the physical distance between network device nodes;

[0028] S45. Accumulate a number of clock drift values ​​to obtain a function expression of an average value of the accumulated deviation.

[0029] Furthermore, adjusting the node clock according to the calculated time deviation data to complete self-synchronization includes the following steps:

[0030] S51. Estimate the processing delay of data information in node hardware;

[0031] S52, performing judgment processing on the accumulated deviation amount;

[0032] S53: Adjust the clock frequency according to the clock synchronization compensation instruction.

[0033] Furthermore, estimating the processing delay of the data information in the node hardware includes the following steps:

[0034] S511. Define a period for information transmission between two nodes to obtain a function expression of node processing delay.

[0035] S512: Substitute the function expression of the node processing delay into the function expression of the average value of the accumulated deviation to obtain the modified function expression of the accumulated deviation.

[0036] Furthermore, the determination process of the accumulated deviation amount includes the following steps:

[0037] Determine the cumulative value based on the modified deviation cumulative function expression;

[0038] The judgment formula is:

[0039]

[0040] Where th is the synchronization deviation threshold, τ cum is the cumulative deviation.

[0041] Furthermore, adjusting the clock frequency according to the clock synchronization compensation instruction includes the following steps:

[0042] When T adjust = 1, the clock frequency of the node is increased, and the node clock frequency after adjustment is calculated in the next M clock cycles. cum Satisfy -th<τ cum <th;

[0043] When T adjust = -1, the node clock frequency is lowered, and the node clock frequency after adjustment is calculated in the next M clock cycles. cum Satisfy -th<τ cum <th;

[0044] When T adjust = 0, that is, the clock deviation between the current node and the adjacent node is lower than the error threshold, the clock synchronization compensation does not work and the original clock frequency is maintained.

[0045] The beneficial effects of the present invention are:

[0046] 1. The present invention provides a self-synchronization method for ad-hoc self-organizing network devices. This method can reduce clock errors caused by aging network node hardware during the self-synchronization process and reduce dependence on external hardware facilities, thereby improving the accuracy of network information transmission. At the same time, without relying on external equipment, it can achieve self-synchronization of ad-hoc self-organizing network devices, improve the accuracy of network data transmission and network stability.

[0047] 2. The present invention periodically sends a data frame protocol containing time information through the transmitting node. The receiving node calculates the precise clock difference and time slot difference based on the sent timestamp information, and then performs adaptive compensation adjustment on the sampling time of the signal to eliminate the clock drift value with the clock synchronization node, thereby achieving self-synchronization of data transmission and reception, and then achieving clock synchronization of the entire network. Without the need for a high-precision clock source, it solves the clock deviation between devices and ensures reliable data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0049] Figure 1 is a flow chart of a self-synchronization method for ad-hoc network devices according to an embodiment of the present invention;

[0050] Figure 2 This is a flowchart of a method for self-synchronization of ad-hoc network devices according to an embodiment of the present invention;

[0051] Figure 3 This is a specific data frame structure diagram of each node in a self-synchronization method for ad-hoc self-organizing network devices according to an embodiment of the present invention;

[0052] Figure 4 This is a schematic diagram of a clock synchronization adjustment principle in a self-synchronization method for an ad-hoc self-organizing network device according to an embodiment of the present invention;

[0053] Figure 5 1 is a schematic diagram of increasing the clock frequency by a compensation module in a self-synchronization method of an ad-hoc self-organizing network device according to an embodiment of the present invention;

[0054] Figure 62 is a schematic diagram of slowing down the clock frequency by a compensation module in a self-synchronization method of an ad-hoc self-organizing network device according to an embodiment of the present invention;

[0055] Figure 7 1 is a schematic diagram of a test result of a network node clock deviation value in a self-synchronization method for an ad-hoc self-organizing network device according to an embodiment of the present invention;

[0056] Figure 8 1 is a schematic diagram of synchronization convergence time of various schemes in a self-synchronization method of an ad-hoc self-organizing network device according to an embodiment of the present invention;

[0057] Figure 9 Schematic diagram of the relationship between TPSN synchronization error and network node hop count;

[0058] Figure 10 Schematic diagram of the relationship between DDCSS synchronization error and network node hop count;

[0059] Figure 11 The figure is a schematic diagram of the relationship between synchronization error and the number of network node hops in a self-synchronization method of an ad-hoc self-organizing network device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0060] To further illustrate each embodiment, the present invention provides drawings, which are part of the disclosure of the present invention. They are mainly used to illustrate the embodiments and can be used in conjunction with the relevant descriptions in the specification to explain the operating principles of the embodiments. By referring to these contents, ordinary technicians in this field should be able to understand other possible implementation methods and the advantages of the present invention.

[0061] According to an embodiment of the present invention, a self-synchronization method for network devices in an ad-hoc network is provided.

[0062] The present invention will now be further described with reference to the accompanying drawings and specific embodiments. Figure 1-Figure 2 As shown, according to an embodiment of the present invention, a self-synchronization method for an ad-hoc self-organizing network device is provided. The self-synchronization method for an ad-hoc self-organizing network device includes the following steps:

[0063] After the network node is powered on, this is achieved through the following steps:

[0064] S1. Perform frame search through the synchronization header information in the data frame and obtain the synchronization header timing information;

[0065] Wherein, the data frame includes a frame header, routing information and data;

[0066] The routing information is used to record each node and its adjacent one-hop nodes and adjacent multi-hop nodes;

[0067] The frame header is composed of Gold, and the length of the Gold sequence is selected depending on the synchronization accuracy and the number of network nodes. In the present invention, the length of the Gold sequence is 64;

[0068] like Figure 3 As shown, the frame search is performed through the synchronization header information in the data frame, and the synchronization header timing information is obtained, which includes the following steps:

[0069] S11. When receiving the node, the input frame data is saved through a shift register with a depth of 64;

[0070] S12, compare the 64 data with the local Gold sequence data stored in the node in real time;

[0071] S13. When the similarity between the two reaches 50 / 64 or more, the data frame detection is successful;

[0072] S14: Output the start flag signal of the data frame to obtain the node synchronization header timing information.

[0073] S2, pre-allocate the time slot of the current node and transmit the data frame;

[0074] S3, receiving data in the time slot of other nodes and extracting synchronization header information;

[0075] S4. Calculate the time deviation between two adjacent nodes;

[0076] The time deviation includes the transmission delay d k and clock drift τ k , and k=1,2,3,…;

[0077] Specifically, the calculation of the time deviation between two adjacent nodes includes the following steps:

[0078] S41. Define the functional relationship between the transmitting time and the receiving time;

[0079] S42, after a node sends data frames multiple times, defining a functional relationship between the sending and receiving times corresponding to each period;

[0080] S43. Define transmission delay as the sum of propagation delay and processing delay;

[0081] S44. Obtain a clock drift function expression based on the relationship between the signal propagation delay in the air and the physical distance between network device nodes;

[0082] S45, accumulating a number of clock drift values ​​to obtain a function expression of an average value of the accumulated deviation;

[0083] like Figure 4 As shown, specifically, for the transmission time t1 and the reception time t2, it satisfies the following formula:

[0084] t2=t1+d1+τ1

[0085] After a node sends data frames multiple times, the sending and receiving time corresponding to each cycle satisfies the following formula:

[0086]

[0087] Among them, the transmission delay d k It can be approximated that the propagation delay of the signal in the air is τ k,dist and the processing delay τ of data information in the node hardware k,node sum;

[0088] Then the transmission delay d k The calculation formula is:

[0089] d k =τ k,dist +τ k,node

[0090] Among them, the propagation delay of the signal in the air is τ k,dist Related to the physical distance between network device nodes, that is, (d k is the distance between two nodes in the network, c is the speed of light);

[0091] The clock drift τ k The calculation formula is:

[0092]

[0093] Drift M clocks by τ k Accumulate and get the accumulated deviation τ cum The average value of τ cum The calculation formula is:

[0094]

[0095] For the above formula, we only need to accurately estimate τ k,node It is possible to estimate the clock offset τ k The accumulated deviation τ cum .

[0096] S5. Adjust the node clock according to the calculated time deviation data to complete self-synchronization.

[0097] Specifically, adjusting the node clock according to the calculated time deviation data to complete self-synchronization includes the following steps:

[0098] S51. Estimate the processing delay of data information in node hardware;

[0099] The estimating of the processing delay of the data information in the node hardware includes the following steps:

[0100] S511. Define a period for information transmission between two nodes to obtain a function expression of node processing delay.

[0101] S512, substituting the function expression of the node processing delay into the function expression of the average value of the accumulated deviation to obtain the function expression of the transformed accumulated deviation;

[0102] Specifically, first assume that T c1 is the information sending period from node A to node B (A->B), T c2 The information sending period from node B to node A (B->A);

[0103] Depend on Figure 4 It can be seen that the processing delay τ of data information in node hardware k,node The calculation formula for the estimation is:

[0104]

[0105] τ k,node Substitute the estimated calculation formula into τ cum The calculation formula of the deviation accumulation τ cum Transformed into:

[0106]

[0107] S52, performing judgment processing on the accumulated deviation amount;

[0108] Specifically, the determination process of the accumulated deviation amount includes the following steps:

[0109] Determine the cumulative value based on the modified deviation cumulative function expression;

[0110] The judgment formula is:

[0111]

[0112] Where th is the synchronization deviation threshold, τ cum is the cumulative deviation;

[0113] If τ cum≥th, it means that the cumulative average of synchronization deviation is large, that is, the overall time of receiving node B is slower than the overall time of transmitting node A. At this time, T adjust =1, in this case, the clock frequency of the receiving node B needs to be increased to complete the self-synchronization of the network;

[0114] If τ cum <-th, it means that the cumulative average of synchronization deviation is small, that is, the overall time of receiving node B is faster than the overall time of transmitting node A. At this time, T adjust = -1, in this case, it is necessary to slow down the clock frequency of the receiving node B to complete the self-synchronization of the network;

[0115] If -th<τ cum <th, it means that the cumulative average value of synchronization deviation is within the allowable error range. At this time, T adjust =0, in which case there is no need to adjust the clock frequency of the receiving Node B.

[0116] S53, adjusting the clock frequency according to the clock synchronization compensation instruction;

[0117] The step of adjusting the clock frequency according to the clock synchronization compensation instruction comprises the following steps:

[0118] like Figure 5 As shown, when T adjust =1, the node's clock frequency is increased, and the adjusted clock frequency is:

[0119]

[0120] The adjusted node clock frequency makes the τ calculated in the next M clock cycles cum Satisfy -th<τ cum <th, at this time, the Ad-hoc network completes self-synchronization;

[0121] like Figure 6 As shown, when T adjust = -1, the node clock frequency is lowered, and the adjusted node clock frequency is:

[0122]

[0123] The adjusted node clock frequency makes the τ calculated in the next M clock cycles cum Satisfy -th<τ cum <th, at this time, the Ad-hoc network completes self-synchronization;

[0124] When T adjust= 0, that is, the clock deviation between the current node and the adjacent node is lower than the error threshold, the clock synchronization compensation does not work and the original clock frequency is maintained.

[0125] The following describes the application effect of the present invention in detail in combination with simulation and FPGA hardware testing:

[0126] 1. Simulation test conditions:

[0127] In the simulation experiment, 500 nodes are randomly deployed. The communication radius of each node is 10m, the detection area is 500mx500m, the simulation test time is 60min, and the clock center frequency is 8192000Hz.

[0128] 2. Simulation test content 1:

[0129] First, the time synchronization algorithm of the Ad-hoc network is simulated and verified using MATLAB. The local oscillator frequency of the network node clock is 10MHz, and the single simulation test time is 60s.

[0130] like Figure 7 As shown, the test content is to compare the clock deviation, and simulate and compare the deviation value without the clock compensation module and the deviation value with the clock compensation module;

[0131] from Figure 7 The simulation results show that without the clock compensation module, the clock deviation is random, with a mean of 9.61x10-7 and a variance of 4.45x10-7. After adding the clock compensation module, the clock deviation changes more smoothly, with a mean of 1.54x10-8 and a variance of 3.22x10-9.

[0132] Through simulation analysis, it can be seen that the clock compensation solution proposed in the present invention can significantly improve the clock deviation of the node, thereby better realizing the network automatic synchronization function.

[0133] 3. Simulation test content 2:

[0134] like Figure 8 As shown in the figure, as the network scale increases, the synchronization overhead will also continue to increase. This article analyzes the synchronization overhead by comparing and analyzing the time required for synchronization convergence under different network scales, and compares the DDCSS synchronization algorithm and the TPSN synchronization algorithm.

[0135] from Figure 8 The simulation results of the network self-synchronization convergence time of different schemes show that the convergence time of the three algorithms increases with the increase of network scale, among which the self-synchronization convergence time of the DDCSS synchronization algorithm and the TPSN synchronization algorithm are both greater than the self-synchronization convergence time of the present invention.

[0136] 4. Simulation test content three:

[0137] like Figures 9 to 11 As shown in the figure, the relationship between time synchronization deviation and node hop number is analyzed through MATLAB simulation. As the number of network node hops increases, the time synchronization deviation corresponding to different hop numbers is analyzed, and the DDCSS synchronization algorithm and TPSN synchronization algorithm are compared.

[0138] from Figure 11 The comparison results of the relationship between the synchronization error and the number of node hops of the solution of the present invention show that as the number of node hops increases, the network self-synchronization error will gradually increase;

[0139] When the number of node hops reaches 7, the self-synchronization error of the present invention is less than 0.2ms as a whole, while the other two solutions are both greater than 0.2ms. In addition, through multiple tests, the synchronization error of the present invention solution is relatively close to the conclusion of each experiment.

[0140] 5. Hardware test content:

[0141] In order to verify the self-synchronization of the Ad-hoc network devices, the actual frequency changes of different nodes are measured by a frequency meter.

[0142] The frequency meter test results are recorded every 20 seconds. The test results are shown in Table 1:

[0143] Table 1 Frequency changes of node clock adjustment

[0144]

[0145] From the test results in Table 1, we can see that the clock frequency of each node is adaptively adjusted in real time within the range of 10,000,000 Hz and is in a dynamic equilibrium state.

[0146] In summary, with the help of the above technical solutions of the present invention, the self-synchronization method of the ad-hoc self-organizing network device provided by the present invention can reduce the clock error caused by the aging of the network node hardware during the self-synchronization process and reduce the dependence on external hardware facilities, thereby improving the accuracy of network information transmission. At the same time, without relying on external equipment, the self-synchronization of the ad-hoc self-organizing network device is realized, and the accuracy of network data transmission and the stability of the network are improved. The present invention periodically sends a data frame protocol containing time information by the transmitting node, and the receiving node calculates the accurate clock difference and time slot difference based on the sent timestamp information, and then performs adaptive compensation adjustment on the sampling time of the signal to eliminate the clock drift value with the clock synchronization node, thereby realizing self-synchronization of data transmission and reception, and then realizing clock synchronization of the entire network. Without the need for a high-precision clock source, the clock deviation between devices is solved and reliable data transmission is guaranteed.

[0147] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A self-synchronization method for ad-hoc self-organizing network devices, characterized in that: The self-synchronization method of the ad-hoc self-organizing network device comprises the following steps: S1. Perform frame search through the synchronization header information in the data frame and obtain the synchronization header timing information; S2, pre-allocate the time slot of the current node and transmit the data frame; S3, receiving data in the time slot of other nodes and extracting synchronization header information; S4. Calculate the time deviation between two adjacent nodes; S5. Adjust the node clock according to the calculated time deviation data to complete self-synchronization; Calculating the time deviation between two adjacent nodes comprises the following steps: S41. Define the functional relationship between the transmitting time and the receiving time; S42, after a node sends data frames multiple times, defining a functional relationship between the sending and receiving times corresponding to each period; S43. Define transmission delay as the sum of propagation delay and processing delay; S44. Obtain a clock drift function expression based on the relationship between the signal propagation delay in the air and the physical distance between network device nodes; S45, accumulating a number of clock drift values ​​to obtain a function expression of an average value of the accumulated deviation; The self-synchronization of the node clocks according to the calculated time deviation data includes the following steps: S51. Estimate the processing delay of data information in node hardware; S52, performing judgment processing on the accumulated deviation amount; S53, adjusting the clock frequency according to the clock synchronization compensation instruction; The estimating of the processing delay of the data information in the node hardware comprises the following steps: S511. Define a period for information transmission between two nodes to obtain a function expression of node processing delay. S512, substituting the function expression of the node processing delay into the function expression of the average value of the accumulated deviation to obtain the function expression of the transformed accumulated deviation; The determination process of the accumulated deviation amount comprises the following steps: Determine the cumulative value based on the modified deviation cumulative function expression; The judgment formula is: ； Where, is the synchronization deviation threshold, is the cumulative deviation; The step of adjusting the clock frequency according to the clock synchronization compensation instruction comprises the following steps: when When the clock frequency of the node is increased, the node clock frequency after adjustment is calculated in the next M clock cycles. satisfy ; when When the clock frequency of the node is lowered, the clock frequency of the node after adjustment is M Calculated by clock cycles satisfy ; when When the clock deviation between the current node and the adjacent node is lower than the error threshold, the clock synchronization compensation does not work and the original clock frequency is maintained.

2. The self-synchronization method of an ad-hoc self-organizing network device according to claim 1, characterized in that: The data frame includes a frame header, routing information and data.

3. The self-synchronization method of an ad-hoc self-organizing network device according to claim 2, characterized in that: The routing information is used to record each node and its adjacent one-hop nodes and adjacent multi-hop nodes; The frame header is composed of Gold, and the Gold sequence length is 64.

4. The self-synchronization method of an ad-hoc self-organizing network device according to claim 3, characterized in that: The frame search is performed through the synchronization header information in the data frame, and the synchronization header timing information is obtained, which includes the following steps: S11. When receiving the node, the input frame data is saved through a shift register with a depth of 64; S12, compare the 64 data with the local Gold sequence data stored in the node in real time; S13. When the similarity between the two reaches 50 / 64 or more, the data frame detection is successful; S14: Output the start flag signal of the data frame to obtain the node synchronization header timing information.

5. The self-synchronization method of an ad-hoc network device according to claim 1, characterized in that: The time deviation includes transmission delay and clock drift.

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