Distance image pickup element and distance image pickup apparatus
By incorporating a transmission MOS transistor and a charge discharge MOS transistor into a TOF distance image sensor, an N-sided photoelectric conversion element is formed, which solves the problem of inaccurate distance measurement caused by deviations in transmission gate characteristics and achieves higher distance measurement accuracy.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TOPPAN HOLDINGS INC
- Filing Date
- 2021-08-30
- Publication Date
- 2026-07-24
Smart Images

Figure CN116235025B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to distance image capturing elements and distance image capturing devices.
[0002] This application claims priority to Japanese Patent Application No. 2020-180564, filed on October 28, 2020, the contents of which are incorporated herein by reference. Background Technology
[0003] Previously, distance image sensors based on the Time of Flight (TOF) method have been realized. These sensors utilize the known speed of light to measure the distance between the measuring device and the object based on the time of flight of light in space (measurement space).
[0004] In a TOF distance image sensor, a light pulse (e.g., near-infrared light) is irradiated onto the object to be measured. The distance between the measuring device and the object is measured based on the difference between the time of the irradiated light pulse and the time of return of the light pulse (reflected light) reflected by the object in the measuring space, i.e., the time of flight of light between the measuring device and the object (for example, see Patent Document 1).
[0005] In order to accurately measure the distance to an object at a specified distance using such a distance image camera, it is necessary to read out the amount of charge generated by the reflected light from the subject by exchanging the pixels of the distance image sensor through multiple gates.
[0006] In a TOF (Time-of-Flight) distance image sensor, a photoelectric conversion element converts the amount of incident light into electrical charge, stores the converted charge in a charge storage unit, and then converts the analog voltage corresponding to the amount of stored charge into a digital value through an AD converter.
[0007] In addition, the TOF distance image sensor calculates the distance between the measuring device and the object based on the analog voltage corresponding to the charge quantity, the information contained in the digital value, and the time of flight of light between the measuring device and the object.
[0008] Here, in the distance imaging device, the charge generated by the photoelectric conversion element is accumulated in each of the charge accumulation units according to a predetermined period, and the delay time from the moment the light pulse is irradiated to the moment the light pulse reflected by the subject returns is calculated based on the amount of charge accumulated in each charge accumulation unit. Then, the distance from the distance imaging device to the subject is calculated using the aforementioned delay time and the speed of light.
[0009] Therefore, in order to transfer charge from the photoelectric conversion element to the charge storage section, charge transfer gates (transistors) are provided in both the photoelectric conversion element and the charge storage section.
[0010] Existing technical documents
[0011] Patent documents
[0012] Patent Document 1: Japanese Patent No. 4235729 Summary of the Invention
[0013] The problem that the invention aims to solve
[0014] However, when the transmission characteristics of the transmission gate located between the photoelectric conversion element and the charge storage section differ due to the layout, accurate distance measurement is not possible.
[0015] That is, if there is a deviation in the transmission characteristics of the transmission gate, even if the photoelectric conversion element generates the same amount of charge, the amount of charge stored in each charge storage unit will be different when it is exchanged from each transmission gate to each charge storage unit.
[0016] Therefore, due to the deviation in the transmission characteristics of the transmission gate, the charge generated in the photoelectric conversion element cannot be correctly transmitted to each part of the charge storage section, and the accuracy of the measured distance will be reduced.
[0017] The present invention was made in view of this situation, and provides a distance image imaging element and a distance image imaging device, which make the transmission characteristics of the transmission gates that transmit charge from the photoelectric conversion element to the charge storage section the same, so that the charge generated by the photoelectric conversion element is transmitted to the charge storage section with the same transmission efficiency, thereby improving the distance accuracy measured based on the charge stored in the charge storage section.
[0018] Methods for solving problems
[0019] To address the aforementioned issues, the distance imaging sensor of the present invention comprises a pixel circuit formed on a semiconductor substrate. This pixel circuit includes at least: a photoelectric conversion element that generates a charge corresponding to light incident spatially from the object being measured; a charge storage section that stores the charge; a transfer MOS transistor disposed on a transfer path that transfers the charge from the photoelectric conversion element to the charge storage section; and a charge discharge MOS transistor disposed on a discharge path that discharges the charge from the photoelectric conversion element. The photoelectric conversion element, when viewed from above, is formed on the semiconductor substrate in an N-sided shape (N being an integer of 5 or more). The total number of transfer MOS transistors and charge discharge MOS transistors is N or more. On each of the second sides of the photoelectric conversion element, excluding the first side where the charge discharge MOS transistor is disposed, one transfer MOS transistor is provided.
[0020] In the distance image camera element of the present invention, the aforementioned transmission MOS transistor may also be positioned in a position that is linearly symmetrical with respect to an axis perpendicular to any side of the aforementioned N-sided polygon and passing through the center of the N-sided polygon.
[0021] In the distance image imaging element of the present invention, any one side of the N-gon may be the first side on which the charge discharge transistor is disposed.
[0022] In the distance image imaging element of the present invention, the charge accumulation section may also be arranged at a position that is linearly symmetrical with respect to the axis.
[0023] In the distance image imaging element of the present invention, a microlens may be formed on the side of the light incident surface of the pixel circuit, and the optical axis of the microlens may be perpendicular to the incident surface of the photoelectric conversion element and pass through the center of the incident surface.
[0024] The distance image capturing device of the present invention includes: a light receiving unit, which is the light receiving unit of any of the distance image capturing elements; and a distance image processing unit, which calculates the distance from the distance image capturing element to the subject based on the distance image captured by the distance image capturing element.
[0025] The effects of the invention
[0026] As explained above, the present invention can provide a distance image imaging element and a distance image imaging device, such that the transmission characteristics of the transmission gates that transmit charge from the photoelectric conversion element to the charge storage section are the same, and the charge generated by the photoelectric conversion element is transmitted to the charge storage section with the same transmission efficiency, thereby improving the distance accuracy measured based on the charge stored in the charge storage section. Attached Figure Description
[0027] Figure 1 This is a block diagram illustrating the schematic configuration of a distance image camera device according to the first embodiment of the present invention.
[0028] Figure 2 This is a block diagram showing the schematic configuration of the imaging element (distance image sensor 32) used in the distance image imaging device 1 according to the first embodiment of the present invention.
[0029] Figure 3 This is a circuit diagram illustrating an example of the configuration of a pixel circuit 321 disposed within the light-receiving area 320 of the solid-state imaging element, namely the distance image sensor 32 (distance image imaging element), used in the distance image imaging device 1 of the first embodiment of the present invention.
[0030] Figure 4This is a diagram showing an example of the configuration (layout pattern) of the transistors in the pixel circuit 321 in the first embodiment.
[0031] Figure 5 This indicates the first embodiment. Figure 4 A diagram illustrating an example of the configuration of the photoelectric conversion element PD, the transfer transistor G, and the charge discharge transistor GD.
[0032] Figure 6A Indicates the formation of Figure 4 The cross-sectional structure of the semiconductor line segment A-A' of the pixel circuit 321.
[0033] Figure 6B This diagram illustrates the charge transfer from the photoelectric conversion element PD to the floating diffusion region FD in the transfer transistor G.
[0034] Figure 7A Indicates the formation of Figure 5 The cross-sectional structure of the semiconductor at the y-axis of the pixel circuit 321.
[0035] Figure 7B This diagram illustrates the transfer of charge from the photoelectric conversion element PD by the charge discharge transistor GD.
[0036] Figure 8 This is a diagram showing an example of the arrangement (layout pattern) of the transistors in the pixel circuit 321 in the second embodiment.
[0037] Figure 9 It means Figure 8 A diagram illustrating an example of the configuration of the photoelectric conversion element PD, the transfer transistor G, and the charge discharge transistor GD.
[0038] Figure 10 This is a diagram showing the positional relationship between the photoelectric conversion element PD of pixel circuit 321 and microlens ML.
[0039] Figure 11 This is a top view showing a lens array in a portion of a light-receiving area 320 configured with multiple pixel circuits 321.
[0040] Figure 12 yes Figure 11 A cross-sectional view of the lens array with pixel circuit 321 containing microlenses ML.
[0041] Figure 13 yes Figure 11 A cross-sectional view of the lens array with pixel circuit 321 containing microlenses ML. Detailed Implementation
[0042] <First Implementation>
[0043] Hereinafter, the first embodiment of the present invention will be described with reference to the accompanying drawings.
[0044] Figure 1 This is a block diagram illustrating the general configuration of a distance image imaging device using the distance image imaging element of the first embodiment of the present invention. Figure 1 The distance image imaging device 1 shown includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. Figure 1 The object, namely the subject S, for measuring distance in the distance image capturing device 1 is also shown. The distance image capturing element is, for example, the distance image sensor 32 in the light receiving unit 3 (described later).
[0045] The light source unit 2, under control from the distance image processing unit 4, irradiates light pulses PO into the space of the object being photographed, where the distance to the object being measured in the distance image imaging device 1 is located. The light source unit 2 is, for example, a surface-emitting semiconductor laser module such as a vertical-cavity surface-emitting laser (VCSEL). The light source unit 2 includes a light source device 21 and a diffuser plate 22.
[0046] The light source device 21 is a laser light source that emits a near-infrared wavelength (e.g., a wavelength range of 850 nm to 940 nm) that forms a light pulse PO that irradiates the subject S. The light source device 21 is, for example, a semiconductor laser light-emitting element. The light source device 21 emits pulsed laser light according to the control from the timing control unit 41.
[0047] The diffuser plate 22 is an optical component that diffuses the near-infrared laser emitted by the light source device 21 into a surface area that irradiates the subject S. The pulsed laser light diffused by the diffuser plate 22 is emitted as a light pulse PO and irradiates the subject S.
[0048] The light-receiving unit 3 receives the reflected light RL from the light pulse PO reflected by the subject S, whose distance is measured in the distance image imaging device 1, and outputs a pixel signal corresponding to the received reflected light RL. The light-receiving unit 3 includes a lens 31 and a distance image sensor 32 (an example of a distance image imaging element).
[0049] Lens 31 is an optical lens that guides the incident reflected light RL to the distance image sensor 32. Lens 31 directs the incident reflected light RL toward the distance image sensor 32, so that each pixel circuit in the light-receiving area of the distance image sensor 32 is illuminated (incidentally).
[0050] The distance image sensor 32 is an imaging element used in the distance image imaging device 1. The distance image sensor 32 has multiple pixel circuits in a two-dimensional light-receiving area. Each pixel circuit (pixel circuit 321) of the distance image sensor 32 includes a photoelectric conversion element, multiple charge storage sections corresponding to the photoelectric conversion element, and components for distributing charge to each charge storage section.
[0051] The distance image sensor 32, under the control of the timing control unit 41, distributes the charge generated by the photoelectric conversion element to each charge storage unit. Furthermore, the distance image sensor 32 outputs a pixel signal corresponding to the amount of charge distributed to the charge storage units. Multiple pixel circuits are arranged in a two-dimensional matrix within the distance image sensor 32, and each pixel circuit outputs a corresponding one-frame pixel signal.
[0052] The distance image processing unit 4 controls the distance image camera device 1 and calculates the distance to the subject S.
[0053] The distance image processing unit 4 includes a timing control unit 41 and a distance calculation unit 42.
[0054] The timing control unit 41 controls the timing of various control signals required for output distance measurement. These control signals include, for example, signals controlling the illumination of the light pulse PO, signals distributing the reflected light RL to multiple charge accumulation units, and signals controlling the number of distributions per frame. The number of distributions is directed towards the charge accumulation unit CS (see reference). Figure 3 The number of times the charge distribution process is repeated.
[0055] The distance calculation unit 42 outputs distance information obtained by calculating the distance to the subject S based on the pixel signal output from the distance image sensor 32. The distance calculation unit 42 calculates the delay time Td from the illumination light pulse PO to the reception of the reflected light RL based on the amount of charge stored in the multiple charge storage units CS. The distance calculation unit 42 calculates the distance to the subject S based on the calculated delay time Td.
[0056] With this configuration, in the distance image camera device 1, the light receiving unit 3 receives the light pulse PO in the near-infrared band irradiated by the light source unit 2 onto the subject S and the reflected light RL after being reflected by the subject S, and the distance image processing unit 4 outputs distance information obtained by measuring the distance between the subject S and the distance image camera device 1.
[0057] Figure 1 The diagram shows a distance image camera device 1 with a distance image processing unit 4 inside, but the distance image processing unit 4 may also be a component outside the distance image camera device 1.
[0058] Next, the configuration of the distance image sensor 32 used as an imaging element in the distance image imaging device 1 will be described. Figure 2 This is a block diagram showing the schematic configuration of the imaging element (distance image sensor 32) used in the distance image imaging device 1 according to the first embodiment of the present invention.
[0059] like Figure 2 As shown, the distance image sensor 32 includes, for example, a light-receiving area 320 with multiple pixel circuits 321, a control circuit 322, a vertical scanning circuit 323 with allocation operation, a horizontal scanning circuit 324, and a pixel signal processing circuit 325.
[0060] The light-receiving area 320 is the area where multiple pixel circuits 321 are configured. Figure 2 The diagram shows an example of a two-dimensional matrix arrangement of 8 rows and 8 columns. Pixel circuit 321 stores a charge equivalent to the amount of light received. Control circuit 322 controls the operation of each part of distance image sensor 32, for example, according to instructions from timing control unit 41 of distance image processing unit 4.
[0061] The vertical scanning circuit 323 controls the pixel circuits 321 arranged in the light-receiving area 320 row by row according to the control from the control circuit 322. The vertical scanning circuit 323 outputs a voltage signal corresponding to the amount of charge stored in the charge storage section CS of the pixel circuit 321 to the pixel signal processing circuit 325.
[0062] The pixel signal processing circuit 325 performs predetermined signal processing (e.g., noise suppression processing, A / D conversion processing, etc.) on the voltage signals output from the pixel circuits 321 of each column to the corresponding vertical signal lines, according to the control from the control circuit 322.
[0063] The horizontal scanning circuit 324 is a circuit that outputs signals from the pixel signal processing circuit 325 sequentially in a time sequence according to the control from the control circuit 322. Thus, pixel signals equivalent to the charge accumulated in one frame are sequentially output to the distance image processing unit 4. In the following description, it will be assumed that the pixel signal processing circuit 325 performs A / D conversion processing and the pixel signals are digital signals.
[0064] Here, the configuration of the pixel circuit 321 arranged in the light-receiving area 320 of the distance image sensor 32 will be described. Figure 3 This is a circuit diagram illustrating an example of the configuration of a pixel circuit 321 disposed within the light-receiving area 320 of the solid-state imaging element, namely the distance image sensor 32 (distance image imaging element), used in the distance image imaging device 1 of the first embodiment of the present invention. Figure 3The pixel circuit 321 is a configuration example with four pixel signal readout sections.
[0065] The pixel circuit 321 includes a photoelectric conversion element PD, charge discharge transistors GD (GD1 and GD2 described later), and four pixel signal readout units RU (RU1, RU2, RU3, and RU4) that output voltage signals from corresponding output terminals O. Each pixel signal readout unit RU includes a transmission transistor G, a floating diffusion region FD, a charge storage capacitor C, a reset transistor RT, a source follower transistor SF, and a selection transistor SL. The floating diffusion region FD and the charge storage capacitor C constitute a charge storage unit CS.
[0066] exist Figure 3 In the pixel circuit 321 shown, the pixel signal readout unit RU1, which outputs a voltage signal from the output terminal O1, includes a transfer transistor G1 (transfer MOS transistor), a floating diffusion region FD1, a charge storage capacitor C1, a reset transistor RT1, a source follower transistor SF1, and a selection transistor SL1. In the pixel signal readout unit RU1, the charge storage unit CS1 is constructed using the floating diffusion region FD1 and the charge storage capacitor C1. Pixel signal readout units RU2, RU3, and RU4 have the same configuration.
[0067] A photoelectric conversion element (PD) is an embedded photodiode that performs photoelectric conversion on incident light, generates a charge corresponding to the incident light, and stores the generated charge. In this embodiment, the incident light enters from the space of the object being measured.
[0068] In pixel circuit 321, the charge generated by photoelectric conversion element PD through photoelectric conversion of incident light is distributed to four charge storage units CS (CS1, CS2, CS3, CS4) respectively, and the voltage signals corresponding to the amount of charge distributed are output to pixel signal processing circuit 325.
[0069] Furthermore, the configuration of the pixel circuitry arranged in the distance image sensor 32 is not limited to... Figure 3 The configuration shown has four pixel signal readout units RU (RU1, RU2, RU3, RU4). The pixel circuit can also be configured with four or more pixel signal readout units RU.
[0070] In the driving of the pixel circuit 321 of the aforementioned distance image imaging device 1, a light pulse PO is irradiated during the irradiation time To, and the reflected light RL is received by the distance image sensor 32 after a delay time Td. The vertical scanning circuit 323, synchronized with the irradiation of the light pulse PO, distributes the charge generated in the photoelectric conversion element PD in the order of charge accumulation units CS1, CS2, CS3, and CS4, and accumulates the charge in the charge accumulation units CS1, CS2, CS3, and CS4 respectively.
[0071] At this time, the vertical scanning circuit 323 turns on the transfer transistor G1, which is located on the transfer path from the photoelectric conversion element PD to the charge accumulation section CS1. As a result, the charge converted by the photoelectric conversion element PD is accumulated in the charge accumulation section CS1 via the transfer transistor G1. Then, the vertical scanning circuit 323 turns off the transfer transistor G1. This stops the charge transfer to the charge accumulation section CS1. Thus, the vertical scanning circuit 323 causes the charge accumulation section CS1 to accumulate charge. The same applies to the other charge accumulation sections CS2, CS3, and CS4.
[0072] At this time, during the charge accumulation period when charge is distributed to the charge accumulation section CS, the accumulation driving signals TX1, TX2, TX3, and TX4 are repeated to supply the respective accumulation cycles to the transmission transistors G1, G2, G3, and G4.
[0073] Furthermore, via each of the transfer transistors G1, G2, G3, and G4, charges corresponding to the incident light are transferred from the photoelectric conversion element PD to the charge storage sections CS1, CS2, CS3, and CS4, respectively. Multiple storage cycles are repeated during the charge storage period.
[0074] Thus, according to each accumulation cycle of the charge accumulation sections CS1, CS2, CS3 and CS4 during the charge accumulation period, charge is accumulated in the charge accumulation sections CS1, CS2, CS3 and CS4 respectively.
[0075] In addition, the vertical scanning circuit 323 turns on the charge discharge transistors GD1 and GD2 provided on the discharge path from the photoelectric conversion element PD after the charge transfer (exchange) to the charge storage section CS4 ends during the respective storage cycle of the charge storage sections CS1, CS2, CS3 and CS4.
[0076] Therefore, before the start of the accumulation cycle for the charge accumulation section CS1, the charge discharge transistors GD1 and GD2 will discard the charge generated in the photoelectric conversion element PD after the accumulation cycle of the immediate charge accumulation section CS4 (i.e., reset the photoelectric conversion element PD).
[0077] Furthermore, the vertical scanning circuit 323 outputs voltage signals sequentially from each of the pixel circuits 321 arranged within the light-receiving area 320 to the pixel signal processing circuit 325 in units of rows (horizontal arrangement) of the pixel circuits 321.
[0078] Furthermore, the pixel signal processing circuit 325 performs A / D conversion and other signal processing on the input voltage signal and outputs it to the horizontal scanning circuit 324.
[0079] The horizontal scanning circuit 324 outputs the processed voltage signal to the distance calculation unit 42 in the order of the columns of the light-receiving area 320.
[0080] The aforementioned process, involving the accumulation of charge in the charge storage units CS (CS1, CS2, CS3, CS4) by the vertical scanning circuit 323 and the disposal of charge converted by the photoelectric conversion element PD, is repeated over one frame. Thus, a charge equivalent to the amount of light received by the distance image capturing device 1 within a predetermined time interval is accumulated in each of the charge storage units CS. The horizontal scanning circuit 324 outputs an electrical signal equivalent to the amount of charge accumulated in each of the charge storage units CS for one frame to the distance calculation unit 42.
[0081] Based on the relationship between the timing of the illumination light pulse PO and the timing of charge accumulation in each of the charge accumulation units CS1, CS2, CS3, and CS4, a charge amount equivalent to the external light components such as background light preceding the illumination light pulse PO is maintained in charge accumulation unit CS1. Furthermore, a charge amount equivalent to the reflected light RL and the external light components is allocated and maintained in charge accumulation units CS2, CS3, and CS4. The distribution (allocation ratio) of the charge amount allocated to charge accumulation units CS2 and CS3, or charge accumulation units CS3 and CS4, is a ratio corresponding to the delay time Td from the time the light pulse PO is reflected by the subject S and incident on the image capturing device 1.
[0082] The distance calculation unit 42 uses this principle to calculate the delay time Td according to the following formula (1) or formula (2).
[0083] Td=To×(Q3-Q1) / (Q2+Q3-2×Q1)…(1)
[0084] Td=To+To×(Q4-Q1) / (Q3+Q4-2×Q1)…(2)
[0085] Here, To represents the duration of the irradiation pulse PO, Q1 represents the amount of charge stored in charge storage unit CS1, Q2 represents the amount of charge stored in charge storage unit CS2, Q3 represents the amount of charge stored in charge storage unit CS3, and Q4 represents the amount of charge stored in charge storage unit CS4. The distance calculation unit 42 calculates the delay time Td using the above formula (1) when Q4 = Q1, and calculates the delay time Td using the above formula (2) when Q2 = Q1.
[0086] In equation (1) above, the charge generated by the reflected light is accumulated in charge accumulation sections CS2 and CS3, but not in charge accumulation section CS4. On the other hand, in equation (2) above, the charge generated by the reflected light is accumulated in charge accumulation sections CS3 and CS4, but not in charge accumulation section CS2.
[0087] In the above formula (1) or formula (2), the premise is that the amount of charge stored in the charge storage sections CS2, CS3 and CS4 that is equivalent to the external light component is the same as the amount of charge stored in the charge storage section CS1.
[0088] The distance calculation unit 42 multiplies the delay time Td obtained by the above formula (1) or formula (2) by the speed of light (velocity), thereby calculating the round-trip distance from the distance image sensor 32 to the subject S.
[0089] Furthermore, by halving the calculated reciprocating distance, the distance calculation unit 42 can determine the distance from the distance image sensor 32 to the subject S.
[0090] Figure 4 This is a diagram showing an example of the arrangement (layout pattern) of the transistors in the pixel circuit 321 in this embodiment.
[0091] Should Figure 4 The layout pattern represents Figure 3 The pixel circuit 321 (i.e., Figure 2 The layout pattern of the pixel circuit 321.
[0092] Right now, Figure 4 This indicates that the transfer transistors G1, G2, G3, and G4 and the charge discharge transistors GD1 and GD2 (equivalent to...) Figure 3 The positional relationship between the charge discharge transistor (GD) and the photoelectric conversion element (PD) in the configuration.
[0093] In addition, Figure 4The diagram shows the pattern configurations of the transfer transistors G1, G2, G3, G4; the source follower transistors SF1, SF2, SF3, SF4; the select transistors SL1, SL2, SL3, SL4; the reset transistors RT1, RT2, RT3, RT4; the charge discharge transistors GD1, GD2; and the photoelectric conversion element PD. All of these transistors are n-channel MOS transistors formed on a p-type semiconductor substrate.
[0094] For example, the reset transistor RT1 is composed of a drain RT1_D (n-diffusion layer (diffusion layer of n-type impurities)), a source RT1_S (n-diffusion layer) and a gate RT1_G on a p-type semiconductor substrate.
[0095] Additionally, contact RT1_C represents a pattern indicating a contact connected to wiring (not shown) on each diffusion layer of the drain RT1_D (n-diffusion layer) and source RT1_S (n-diffusion layer) of the reset transistor RT1. Other transfer transistors G1, G2, G3, G4, source follower transistors SF1, SF2, SF3, SF4, select transistors SL1 to SL4, reset transistors RT2, RT3, RT4, and charge discharge transistors GD1 and GD2 have the same configuration.
[0096] Furthermore, the configuration of the transfer transistors G1, G2, G3, G4 and the charge discharge transistors GD1, GD2 will be described later.
[0097] Furthermore, the transmission transistor G1 is formed by a floating diffusion region FD1 as the drain, a gate G1_G, and a source (the n-diffusion layer of the photoelectric conversion element PD). Here, the floating diffusion region FD1 is the diffusion layer (n-diffusion layer) that serves as the drain of the transmission transistor G1, accumulating the charge from the photoelectric conversion element PD.
[0098] Additionally, the drain G1_D is connected via contact G1_C and wiring (not shown) to the gate SF1_G of the source follower transistor SF1 and the source RT1_S of the reset transistor RT1, respectively. The other transfer transistors G2, G3, and G4 have the same configuration as transfer transistor G1.
[0099] Figure 4 The diagram shows the individual configurations of the transistors on the semiconductor substrate of the pixel circuit 321. Figure 3 The wiring patterns and charge storage capacitors (C1, C2, C3, C4) are omitted from the diagram. Therefore, the charge storage units CS1, CS2, CS3, and CS4 are respectively positioned at the locations of the floating diffusion regions FD1, FD2, FD3, and FD4.
[0100] In this embodiment, the photoelectric conversion element PD is formed on the semiconductor substrate in the shape of a polygon (N-sided, where N is an integer and is 5 or more, i.e., a pentagon or more) when viewed from above, namely a hexagon (an example of an N-sided shape where N=6, preferably a regular hexagon).
[0101] As described above, in this invention, the polygon is pentagonal or larger, and one transmission transistor G or one charge discharge transistor GD is formed on each side of the polygon. There are four or more transmission transistors G and one or more charge discharge transistors. In this embodiment, the photoelectric conversion element PD is hexagonal, with four transmission transistors G arranged on four sides, totaling four, and two charge discharge transistors GD arranged on two sides, totaling two.
[0102] Here, the transmission transistors G1, G2, G3, and G4 are respectively configured such that gates G1_G, G2_G, G3_G, and G4_G are used as gates, floating diffusion regions FD1, FD2, FD3, and FD4 (n-diffusion layers) are used as drains, and the n-diffusion layer of the photoelectric conversion element PD is used as the source.
[0103] exist Figure 4 In this configuration, transmission transistors G1 and G4 are respectively positioned on opposite sides of the hexagonal photoelectric conversion element PD. Similarly, transmission transistors G2 and G3 are respectively positioned on opposite sides of the hexagonal photoelectric conversion element PD.
[0104] Furthermore, the hexagonal photoelectric conversion elements PD in which charge discharge transistors GD1 and GD2 are configured are formed with parallel sides, and the axis orthogonal to each side is designated as the y-axis. This y-axis passes through the center O of the photoelectric conversion element PD.
[0105] In addition, the axis that is orthogonal to the y-axis and passes through the center O of the photoelectric conversion element PD is set as the x-axis.
[0106] Here, the floating diffusion regions FD1 and FD2 are respectively positioned in a position that is linearly symmetrical with respect to the y-axis.
[0107] Similarly, floating diffusion regions FD3 and FD4 are respectively positioned in a position that is linearly symmetrical with respect to the y-axis.
[0108] In addition, reset transistors RT1 and RT2 are also positioned in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0109] Similarly, reset transistors RT3 and RT4 are also positioned in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0110] In addition, the source follower transistors SF1 and SF2 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0111] Similarly, the source follower transistors SF3 and SF4 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0112] In addition, the selection transistors SL1 and SL2 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0113] Similarly, transistors SL3 and SL4 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0114] Figure 5 It means Figure 4 A diagram illustrating an example of the configuration relationship between the photoelectric conversion element PD, the transfer transistor G, and the charge discharge transistor GD.
[0115] Should Figure 5 This indicates the positional relationship between the transmission transistors G1, G2, G3, and G4 and the charge discharge transistors GD1 and GD2 relative to the photoelectric conversion element PD.
[0116] As in Figure 4 As explained, the photoelectric conversion element PD is formed in the shape of a polygon, namely a hexagon, with transmission transistors G1, G2, G3, G4 and charge discharge transistors GD1 and GD2 respectively arranged on each side.
[0117] That is, the photoelectric conversion element PD is formed in the shape of a polygon, namely a hexagon, and has sides PDE1, PDE2, PDE3, PDE4, PDE5, and PDE6.
[0118] Edge PDE1 and edge PDE2 are formed by a position and a shape that are linearly symmetrical with respect to the y-axis, respectively.
[0119] Similarly, edge PDE3 and edge PDE4 are formed by a position and shape that are linearly symmetrical with respect to the y-axis, respectively.
[0120] On the other hand, edge PDE5 and edge PDE6 can be in a position and shape that are linearly symmetrical with respect to the x-axis, respectively, or they can have different configurations (such as edge length).
[0121] Transmitting transistor G1 is formed on edge PDE1.
[0122] Transmitter G2 is formed on edge PDE2.
[0123] Furthermore, the transmission transistors G1 and G2 are formed on each of side PDE1 and side PDE2 in a position and shape that are linearly symmetrical with respect to the y-axis, respectively. That is, the gates G1_G and G2_G of each of the transmission transistors G1 and G2 are respectively arranged in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0124] In addition, the transmission transistor G3 is formed on edge PDE3.
[0125] Transmitter G4 is formed on edge PDE4.
[0126] Furthermore, the transmission transistors G3 and G4 are formed on each of edge PDE3 and edge PDE4 in a position and shape that are linearly symmetrical with respect to the y-axis, respectively. That is, the gates G3_G and G4_G of each of the transmission transistors G3 and G4 are respectively arranged in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0127] In addition, the transmission transistors G1 to G4 are transistors of the same size, that is, the channel length and channel width are the same.
[0128] Charge discharge transistors GD1 and GD2 are formed on edges PDE5 and PDE6, respectively.
[0129] Furthermore, the charge discharge transistors GD1 and GD2 can be transistors of the same size as the transfer transistors G1 to G4, or they can be transistors of different sizes. The charge discharge transistors GD1 and GD2 can also be transistors of the same size, or they can be different sizes.
[0130] Figure 6A as well as Figure 6B This diagram illustrates the charge transfer from the photoelectric conversion element PD to the floating diffusion region FD by the transfer transistor G.
[0131] Figure 6A Indicates the formation of Figure 4 The cross-sectional structure of the semiconductor at point A-A' of the pixel circuit 321.
[0132] Photoelectric conversion elements (PDs) include, for example, embedded photodiodes with a surface protective layer having a p+ diffusion layer (a diffusion layer of p-type impurities) on its surface.
[0133] The transmission transistor G2 is configured such that the n-diffusion layer of the photoelectric conversion element PD is used as the source and the n+ diffusion layer of the floating diffusion region FD2 is used as the drain.
[0134] Adjacent to the n+ diffusion layer of the aforementioned floating diffusion region FD2, there is an STI (Shallow Trench Isolation) and a pwell (p-type trap, p-diffusion layer) for suppressing charge outflow (discharge) from the n+ diffusion layer (preventing leakage current).
[0135] The transmission transistor G3 is configured such that the n-diffusion layer of the photoelectric conversion element PD is used as the source and the n+ diffusion layer of the floating diffusion region FD3 is used as the drain.
[0136] An STI and a pwell are disposed adjacent to the n+ diffusion layer of the floating diffusion region FD3 to prevent leakage current from the n+ diffusion layer.
[0137] Furthermore, a gate voltage of level "H" is applied to the gate G2_G of the transfer transistor G2, thereby transferring the charge (electrons) generated in the photoelectric conversion element PD to the floating diffusion region FD2, which serves as the drain. Then, the floating diffusion region FD2 accumulates the charge transferred from the transfer transistor G2.
[0138] Similarly, a gate voltage of level "H" is applied to the gate G3_G of the transfer transistor G3, thereby transferring the charge (electrons) generated in the photoelectric conversion element PD to the floating diffusion region FD3, which serves as the drain. The floating diffusion region FD3 then accumulates the charge transferred from the transfer transistor G3.
[0139] Figure 6B express Figure 6A The potential states in each region of the transmission transistor G2, the photoelectric conversion element PD, and the transmission transistor G3 are shown. Figure 6B The horizontal axis represents the location within the region, and the vertical axis represents the height of the electric potential (the lower the axis, the higher the electric potential).
[0140] Figure 6B The diagram shows the potential state when a gate voltage of level "H" is applied to the gate G2_G of transfer transistor G2 and a gate voltage of level "L" is applied to the gate G3_G of transfer transistor G3.
[0141] The gate G3_G of the transfer transistor G3 is at the "L" level, so a potential barrier PB is formed in the region of the gate G3_G. No charge is transferred from the photoelectric conversion element PD to the drain of the transfer transistor G3, i.e., the floating diffusion region FD3 (electrons do not flow into the drain).
[0142] On the other hand, the gate G2_G of the transfer transistor G2 is at the "H" level, so the potential of the region of the gate G2_G rises (no potential barrier is formed), and charge is transferred from the photoelectric conversion element PD to the drain of the transfer transistor G2, i.e., the floating diffusion region FD2 (electrons flow into the drain).
[0143] Figure 7A as well as Figure 7B This diagram illustrates the transfer of charge from the photoelectric conversion element PD by the transfer transistor G1 and the charge discharge transistor GD.
[0144] Figure 7A Indicates the formation of Figure 5 The semiconductor of pixel circuit 321 has a cross-sectional structure along the y-axis.
[0145] The transmission transistor G1 is configured such that the n-diffusion layer of the photoelectric conversion element PD is used as the source and the n+ diffusion layer of the floating diffusion region FD1 is used as the drain.
[0146] An STI and a pwell are disposed adjacent to the n+ diffusion layer of the floating diffusion region FD1 to prevent leakage current from the n+ diffusion layer.
[0147] Furthermore, a gate voltage of "H" level is applied to the gate G1_G of the transfer transistor G1, thereby transferring the charge (electrons) generated in the photoelectric conversion element PD to the floating diffusion region FD1, which serves as the drain. Then, the floating diffusion region FD1 accumulates the charge transferred from the transfer transistor G1.
[0148] The charge discharge transistor GD1 (or GD2) is formed such that the n-diffusion layer of the photoelectric conversion element PD is used as the source, and the n+ diffusion layer connected to the power supply VDD is used as the drain GD_D.
[0149] An STI and a pwell are disposed adjacent to the n+ diffusion layer of the drain GD2_D to prevent leakage current.
[0150] The gate GD1_G of the charge discharge transistor GD1 is subjected to a gate voltage of level "H", thereby transferring the charge (electrons) generated in the photoelectric conversion element PD to the drain GD1_D (discharging the charge of the photoelectric conversion element PD to the power supply VDD).
[0151] Figure 7B express Figure 7A The potential states in each region of the charge discharge transistor GD1, the photoelectric conversion element PD, and the charge discharge transistor GD2 are shown. Figure 7B The horizontal axis represents the location within the region, and the vertical axis represents the height of the electric potential (the lower the axis, the higher the electric potential).
[0152] exist Figure 7B In order to illustrate the shape of the potential, the state of applying a gate voltage of level "H" to the gate GD1_G of charge discharge transistor GD1 and the gate GD2_G of charge discharge transistor GD2 is indicated.
[0153] The gate GD1_G of the charge discharge transistor GD1 is at the "H" level, so the potential of the region of the gate GD1_G rises (no potential barrier is formed), and charge is transferred from the photoelectric conversion element PD to the drain GD1_D of the charge discharge transistor GD1 (charge is discharged to the power supply VDD).
[0154] Similarly, the gate GD2_G of the charge discharge transistor GD2 is at the "H" level, so no potential barrier is formed in the region of the gate GD2_G, and charge is transferred from the photoelectric conversion element PD to the drain GD2_D of the charge discharge transistor GD2 (discharge charge to the power supply VDD).
[0155] In the Figure 6B as well as Figure 7B When comparing the various potential states, the potential rise shape (potential slope) in the respective regions of the gates G1_G, G2_G, G3_G, and G4_G of the transfer transistors G1, G2, G3, and G4 is as steep as the potential rise shape in the respective regions of the gates GD1_G and GD2_G of the charge discharge transistors GD1 and GD2.
[0156] The main reason for this is that each of the transmission transistors G1, G2, G3, and G4, as well as the charge discharge transistors GD1 and GD2, are configured to be at the same distance from the center O of the photoelectric conversion element PD.
[0157] That is, when the distances from each of the transmission transistors G1, G2, G3, G4 and the charge discharge transistors GD1, GD2 to the center O of the photoelectric conversion element PD are the same, the electric field strengths extending into the diffusion layer from each of the transmission transistors G1, G2, G3, G4 and the charge discharge transistors GD1, GD2 in the direction relative to the center O of the photoelectric conversion element PD are the same.
[0158] Since the electric field strength is the same within the diffusion layer, the potential rise shape in the respective regions of gates G1_G, G2_G, G3_G, G4_G, GD1_G, and GD2_G is equally steep.
[0159] According to this embodiment, the transfer transistors G2 and G3 are arranged in the same position with the same shape, so the charge transfer efficiency is the same.
[0160] In addition, the charge transfer transistors G1 and G4 are arranged in the same position with the same shape, so their charge transfer efficiency is the same.
[0161] On the other hand, when the distances of the transmission transistors G2 and G3 from the center O of the photoelectric conversion element PD are different from those of the transmission transistors G1 and G4, the shape of the electric field generated when a voltage is applied to the gate is different in each of the transmission transistors G2 and G3 and each of the transmission transistors G1 and G4.
[0162] Furthermore, since the electric field shapes are different, the potential shapes are also different, and the charge transfer efficiency of transfer transistors G2 and G3 will be different from that of transfer transistors G1 and G4.
[0163] However, since the transfer transistors G1, G2, G3, and G4 are of the same size, and the transfer efficiency of either the group of transfer transistors G1 and G4 or the group of transfer transistors G2 and G3 is matched with the transfer efficiency of the other group, it is easy to make the transfer efficiency appear the same by multiplying the amount of charge accumulated in the charge accumulation section CS corresponding to the other group by a predetermined adjustment factor.
[0164] For example, by multiplying the charge transferred by transmission transistors G2 and G3 by an adjustment factor in a manner that matches the respective transmission efficiencies of transmission transistors G1 and G4, it is easy to make the respective transmission efficiencies of transmission transistors G1, G2, G3, and G4 the same, thereby making the transmission characteristics appear to be the same.
[0165] Therefore, charge can be transferred and stored in each of the charge storage units CS1, CS2, CS3, and CS4 through the same characteristics. Thus, using the amount of charge transferred and stored in the charge storage units CS1, CS2, CS3, and CS4 respectively, the distance between the subject and the distance imaging device can be determined with high accuracy according to the above equations (1) and (2).
[0166] Furthermore, according to this embodiment, when the distances from the gates G1_G, G2_G, G3_G, and G4_G of each of the transfer transistors G1, G2, G3, and G4 to the center O of the photoelectric conversion element PD are the same, the rise shape of the potentials of the gates G1_G, G2_G, G3_G, and G4_G is also the same, which enables consistent charge transfer efficiency and thus identical transfer characteristics. Therefore, the charge generated in the photoelectric conversion element PD can be transferred with high precision from each of the transfer transistors G1, G2, G3, and G4 to the floating diffusion regions FD1, FD2, FD3, and FD4, respectively.
[0167] In this case, based on the fact that each of the transmission transistors G1 and G2 is linearly symmetrical with respect to the y-axis, each of the transmission transistors G3 and G4 is formed with a linearly symmetrical position and a linearly symmetrical shape with respect to the x-axis, and each of the transmission transistors G2 and G4 is also formed with a linearly symmetrical position and a linearly symmetrical shape with respect to the x-axis.
[0168] Furthermore, by fabricating the photoelectric conversion element PD into a regular hexagon when viewed from the surface, it is easy to make the distances from the gates G1_G, G2_G, G3_G, and G4_G of the transmission transistors G1, G2, G3, and G4 to the center O of the photoelectric conversion element PD the same.
[0169] That is, when the transmission transistors G1, G2, G3, and G4 respectively transfer the same amount of charge from the photoelectric conversion element PD to the floating diffusion regions FD1, FD2, FD3, and FD4 respectively, the amount of charge accumulated in the floating diffusion regions FD1, FD2, FD3, and FD4 is the same.
[0170] Therefore, according to this embodiment, the charge generated by the photoelectric conversion element PD can be stored in the charge storage sections CS1 to CS4 with the same transmission efficiency (transmission characteristics). Therefore, using the amount of charge stored in the charge storage sections CS1 to CS4 respectively, the distance between the subject and the distance image capturing device can be determined with high accuracy according to the above formula (1) or the above formula (2).
[0171] <Second Implementation>
[0172] Hereinafter, the second embodiment of the present invention will be described with reference to the accompanying drawings.
[0173] The second implementation method is with Figure 2 The distance image imaging element (distance image sensor 32) in the distance image imaging device is the same as that in the distance image imaging device, and is the same as that in the distance image imaging device. Figure 3 The structure also has the respective structures of pixel signal readout units RU1, RU2, RU3, and RU4.
[0174] Therefore, the operation of calculating the distance between the subject and the distance image capturing device using the charge stored in charge storage units CS1, CS2, CS3, and CS4 respectively, according to the above formula (1) and formula (2) is the same.
[0175] Figure 8 This is a diagram illustrating an example of the configuration (layout pattern) of the transistors in the pixel circuit 321 in the embodiment.
[0176] Should Figure 8 The pattern represents Figure 3The layout pattern of pixel circuit 321 is shown.
[0177] Right now, Figure 8 This indicates the positional relationship between the transmission transistors G1, G2, G3, G4 and the charge discharge transistor GD relative to the photoelectric conversion element PD.
[0178] Furthermore, each of the following transistors—transmission transistors G1, G2, G3, G4, source follower transistors SF1, SF2, SF3, SF4, select transistors SL1, SL2, SL3, SL4, reset transistors RT1, RT2, RT3, RT4, and charge discharge transistor GD (which is the same as the charge discharge transistor GD in the first embodiment)—is an n-channel MOS transistor formed on a p-type semiconductor substrate.
[0179] In this embodiment, the photoelectric conversion element PD is formed on the semiconductor substrate in the shape of a polygon when viewed from above, namely a pentagon (an example of an N-sided polygon where N=5, preferably a regular pentagon).
[0180] Here, the transmission transistor G4 is formed in the same way as the transmission transistors G1 to G3, with the gate G4_G as the gate, the floating diffusion region FD4 as the drain, and the n-diffusion layer of the photoelectric conversion element PD as the source.
[0181] exist Figure 8 In this diagram, the axis orthogonal to the sides of the pentagonal photoelectric conversion element PD in which the charge discharge transistor GD is configured is defined as the y-axis. Furthermore, this y-axis passes through the center O of the photoelectric conversion element PD.
[0182] In addition, the axis that is orthogonal to the y-axis and passes through the center O of the photoelectric conversion element PD is set as the x-axis.
[0183] exist Figure 8 The diagram shows the respective arrangements of each transistor on the semiconductor substrate of the pixel circuit 321 in the second embodiment. Similar to the first embodiment, the wiring patterns and charge storage capacitors (C1 to C4) are omitted. Therefore, the charge storage portions CS1, CS2, CS3, and CS4 are respectively arranged at the respective positions of the floating diffusion regions FD1, FD2, FD3, and FD4.
[0184] Here, the floating diffusion regions FD1 and FD2 are respectively positioned in a position that is linearly symmetrical with respect to the y-axis.
[0185] Similarly, floating diffusion regions FD3 and FD4 are respectively positioned in a position that is linearly symmetrical with respect to the y-axis.
[0186] In addition, reset transistors RT1 and RT2 are also positioned in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0187] Similarly, reset transistors RT3 and RT4 are also positioned in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0188] In addition, the source follower transistors SF1 and SF2 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0189] Similarly, the source follower transistors SF3 and SF4 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0190] In addition, the selection transistors SL1 and SL2 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0191] Similarly, transistors SL3 and SL4 are also positioned in a position that is linearly symmetrical with respect to the y-axis.
[0192] Figure 9 It means Figure 8 A diagram illustrating an example of the configuration of the photoelectric conversion element PD, the transfer transistor G, and the charge discharge transistor GD.
[0193] The photoelectric conversion element PD is formed, for example, in the shape of a polygon, namely a pentagon, and has sides PDE11, PDE12, PDE13, PDE14, and PDE15.
[0194] Edges PDE11 and PDE12 are formed with a position and shape that are linearly symmetrical with respect to the y-axis, respectively.
[0195] Similarly, edge PDE13 and edge PDE14 are formed with a position and shape that are linearly symmetrical with respect to the y-axis, respectively.
[0196] On the other hand, edge PDE15 can also be of a different length than edge PDE11, edge PDE12, and edge PDE13 and edge PDE14.
[0197] Transmitter G1 is formed on edge PDE11.
[0198] Transmitter G2 is formed on edge PDE12.
[0199] Furthermore, the transmission transistors G1 and G2 are formed on each of sides PDE11 and PDE12 in a position and shape that are linearly symmetrical with respect to the y-axis, respectively. That is, the gates G1_G and G2_G of each of the transmission transistors G1 and G2 are respectively arranged in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0200] Additionally, the transmission transistor G3 is formed on edge PDE13.
[0201] Transmitter G4 is formed on edge PDE14.
[0202] Furthermore, the transmission transistors G3 and G4 are formed on each of side PDE13 and side PDE14 with a position and shape that are linearly symmetrical with respect to the y-axis, respectively. That is, the gates G3_G and G4_G of each of the transmission transistors G3 and G4 are respectively arranged in a position that is linearly symmetrical with respect to the aforementioned y-axis.
[0203] In addition, the transmission transistors G1 to G4 are transistors of the same size, that is, the channel length and channel width are the same.
[0204] The charge discharge transistor GD is formed on edge PDE15.
[0205] In addition, the charge discharge transistor GD and the transfer transistors G1 to G4 can each be transistors of the same size or transistors of different sizes.
[0206] According to this embodiment, the transfer transistors G1 and G2 are of the same size and are arranged in the same position with the same shape, so the charge transfer efficiency is the same.
[0207] In addition, the transfer transistors G3 and G4 are of the same size and are arranged in the same position with the same shape, so their charge transfer efficiency is the same.
[0208] On the other hand, when the distances of the transmission transistors G1 and G2 from the center O of the photoelectric conversion element PD are different from those of the transmission transistors G3 and G4, the shape of the electric field generated when a voltage is applied to the gate is different in each of the transmission transistors G1 and G2 and each of the transmission transistors G3 and G4.
[0209] Furthermore, since the electric field shapes are different, the electric potential shapes are also different, resulting in different charge transfer efficiencies.
[0210] However, since the transfer transistors G1 to G4 are of the same size, and the transfer efficiency of either the group of transfer transistors G1 and G2 or the group of transfer transistors G3 and G4 is matched with the transfer efficiency of the other group, the transfer efficiency can be made to appear the same by multiplying the amount of charge accumulated in the charge accumulation section CS corresponding to the other group by a predetermined adjustment factor.
[0211] For example, by multiplying the amount of charge transferred by transmission transistors G3 and G4 (the amount of charge stored in the charge storage section CS) by an adjustment factor in a manner that matches the respective transmission efficiencies of transmission transistors G1 and G2, it is easy to make the respective transmission efficiencies of transmission transistors G1, G2, G3, and G4 consistent, so that the transmission characteristics appear to be the same.
[0212] Therefore, charge can be stored in each of the charge storage sections CS1 to CS4 with the same characteristics. Thus, by using the amount of charge stored in each of the charge storage sections CS1 to CS4, the distance between the subject and the distance image capturing device can be determined with high accuracy according to the above formula (1) and formula (2).
[0213] Furthermore, according to this embodiment, when the distances from the gates G1_G, G2_G, G3_G, and G4_G of each of the transfer transistors G1, G2, G3, and G4 to the center O of the photoelectric conversion element PD are the same, the potential rise patterns of the gates G1_G, G2_G, G3_G, and G4_G are also the same, enabling the same charge transfer efficiency and thus the same transfer characteristics. Therefore, the charge generated in the photoelectric conversion element PD can be transferred with high precision from each of the transfer transistors G1, G2, G3, and G4 to the floating diffusion regions FD1, FD2, FD3, and FD4, respectively.
[0214] In this case, based on the fact that each of the transmission transistors G1 and G2 and each of the transmission transistors G3 and G4 are linearly symmetrical with respect to the y-axis, the photoelectric conversion element PD is made into a regular pentagon when viewed from the surface. This makes it easy to make the distance from each of the gates G1_G, G2_G, G3_G, and G4_G of the transmission transistors G1, G2, G3, and G4 to the center O of the photoelectric conversion element PD the same.
[0215] That is, when the transmission transistors G1, G2, G3, and G4 respectively transfer the same amount of charge from the photoelectric conversion element PD to the floating diffusion regions FD1, FD2, FD3, and FD4 respectively, the amount of charge accumulated in the floating diffusion regions FD1, FD2, FD3, and FD4 is the same.
[0216] Therefore, according to this embodiment, the charge generated by the photoelectric conversion element PD can be stored in the charge storage sections CS1 to CS4 with the same transmission efficiency (transmission characteristics). Therefore, using the amount of charge stored in the charge storage sections CS1 to CS4 respectively, the distance between the subject and the distance image capturing device can be determined with high accuracy according to the above formula (1) or the above formula (2).
[0217] <Third Implementation Method>
[0218] Hereinafter, the third embodiment of the present invention will be described with reference to the accompanying drawings.
[0219] The third implementation method is with Figure 2 The distance image imaging element (distance image sensor 32) in the same distance image imaging device is for... Figure 4 The pixel circuit 321 shown is configured with microlenses for focusing light.
[0220] Figure 10 This is a diagram showing the positional relationship between the photoelectric conversion element PD of pixel circuit 321 and microlens ML.
[0221] The microlens ML is generated by thermally deforming a specified resin material and is formed at a position overlapping the configuration area of the pixel circuit 321 when viewed from above.
[0222] In addition, each of the microlenses ML is disposed on the pixel circuit 321 such that its optical axis (the center of the microlens ML) overlaps with the center O of the photoelectric conversion element PD when viewed from above.
[0223] Figure 11 This is a top view showing a lens array in a portion of a light-receiving area 320 configured with multiple pixel circuits 321.
[0224] The diagram shows the arrangement of pixel circuit 321 and microlens ML in a 3×3 portion of the light-receiving area 320, where microlenses ML are fabricated as a lens array (microlens array).
[0225] Here, when viewed from above, the optical axes of each microlens ML in the lens array overlap with the center O of the respective overlapping pixel circuits 321.
[0226] Figure 12 yes Figure 11 A cross-sectional view of the lens array with pixel circuit 321 containing microlenses ML.
[0227] Should Figure 12 express Figure 11 The cross-sectional shape of the lens array of pixel circuit 321 at line segment B-B'. Additionally, Figure 12 The distance image camera element, namely the distance image sensor 32, is an FSI (Front Side Illumination) type where light is incident from the surface on which the photoelectric conversion element PD, namely the photodiode, is formed.
[0228] Furthermore, a wiring layer 502, which is insulated by an insulating layer, is provided on the upper part of the semiconductor layer 501, and a dielectric layer 503, which serves as a protective layer, is formed on the upper part of the wiring layer 502. Then, the lens array of the aforementioned microlens ML is formed on the upper part of the dielectric layer 503.
[0229] The optical axes OA of the microlenses ML in the lens array are perpendicular to the surface of the photoelectric conversion element PD in the semiconductor layer 501 and pass through the center O of the pixel circuits 321 that overlap when viewed from above.
[0230] Figure 13 yes Figure 11 A cross-sectional view of the lens array with pixel circuit 321 containing microlenses ML.
[0231] Should Figure 13 express Figure 11 The cross-sectional shape of the lens array of pixel circuit 321 at line segment B-B'. Additionally, Figure 10 The distance image camera element, i.e., the distance image sensor 32, is a BSI (Back Side Illumination) type where light is incident from the back of the area where the photoelectric conversion element PD (photodiode) is formed. That is, in... Figure 12 In this example, a surface-illuminated type is used as the component of pixel circuit 321, but as... Figure 13 As shown, the pixel circuit 321 can also be configured as a back-illuminated type.
[0232] Furthermore, a wiring layer 502, which is insulated by an insulating layer, is formed on the upper part of the semiconductor layer 501, and a dielectric layer 504, which serves as a protective layer, is formed on the lower part of the semiconductor layer 501. Then, the lens array of the aforementioned microlens ML is formed on the lower part of the dielectric layer 504.
[0233] The optical axes OA of the microlenses ML in the lens array are perpendicular to the surface of the photoelectric conversion element PD in the semiconductor layer 501 and pass through the center O of the pixel circuits 321 that overlap when viewed from above.
[0234] With the above configuration, according to this embodiment, the light incident on the pixel circuit 321 is focused by the microlens ML and irradiated onto the photoelectric conversion element PD. Therefore, the light incident on the pixel circuit 321 can be efficiently converted into photoelectric signals, and the sensitivity to the incident light can be improved.
[0235] In this embodiment, the configuration of the microlens ML relative to the pixel circuit 321 of the first embodiment has been described. However, by configuring the pixel circuit 321 of the second embodiment in the same way, the sensitivity to incident light can also be improved in the pixel circuit 321 of the second embodiment.
[0236] Industrial availability
[0237] As explained above, the present invention can provide a distance image imaging element and a distance image imaging device, such that the transmission characteristics of the transmission gates that transmit charge from the photoelectric conversion element to the charge storage section are the same, and the charge generated by the photoelectric conversion element is transmitted to the charge storage section with the same transmission efficiency, thereby improving the distance accuracy measured based on the charge stored in the charge storage section.
[0238] Explanation of reference numerals in the attached figures
[0239] 1…distance image camera device
[0240] 2…Light Source Section
[0241] 3…Light-receiving section
[0242] 31…lens
[0243] 32… Distance image sensor (distance image camera element)
[0244] 321…pixel circuit
[0245] 322… control circuit
[0246] 323…Vertical Scan Circuit
[0247] 324… Horizontal Scan Circuit
[0248] 325…pixel signal processing circuit
[0249] 4… Distance Image Processing Unit
[0250] 41…Timing Control Department
[0251] 42…Distance Calculation Unit
[0252] CS…charge accumulation section
[0253] FD1, FD2, FD3, FD4… Floating diffusion regions
[0254] G1, G2, G3, G4… Transmission transistors
[0255] GD, GD1, GD2… Charge discharge transistors
[0256] ML…microlenses
[0257] PD… Photoelectric conversion element
[0258] PO…light pulse
[0259] RT1, RT2, RT3, RT4… Reset transistors
[0260] RU1, RU2, RU3, RU4… Pixel signal readout section
[0261] S…subject
[0262] SF1, SF2, SF3, SF4... source follower transistors
[0263] SL1, SL2, SL3, SL4… select transistors
Claims
1. A distance imaging sensor, comprising a pixel circuit formed on a semiconductor substrate, the pixel circuit comprising at least: a photoelectric conversion element that generates a charge corresponding to incident light reflected by an object in space of the object being measured; a charge storage section that stores the charge; a transfer MOS transistor disposed on a transfer path from the photoelectric conversion element to the charge storage section; and a charge discharge MOS transistor disposed on a discharge path from the photoelectric conversion element to discharge the charge, wherein... The aforementioned photoelectric conversion element is formed in a hexagonal shape on the aforementioned semiconductor substrate when viewed from above. There are four aforementioned transmission MOS transistors and two aforementioned charge discharge MOS transistors. Two charge-discharge MOS transistors are respectively disposed on two opposite first sides of the hexagon, and four transfer MOS transistors are disposed on each of the second sides of the hexagon other than the first sides. If we define the axis perpendicular to the first side and passing through the center of the hexagon as the y-axis, Two of the four aforementioned transmission MOS transistors are arranged in a position that is linearly symmetrical with respect to the aforementioned y-axis. The reset transistor, source follower transistor, and select transistor included in the readout section corresponding to each of the four aforementioned transfer MOS transistors are configured as follows: Two of the four reset transistors are arranged in a position that is linearly symmetrical with respect to the y-axis. Two of the four source follower transistors are arranged in a position that is linearly symmetrical with respect to the y-axis. Two of the four selection transistors are arranged in a position that is linearly symmetrical with respect to the y-axis. The reset transistor, the source follower transistor, and the select transistor, which are positioned in a line-symmetrical manner with respect to the y-axis, are arranged in a straight line parallel to the first side on the outer side of each of the first sides.
2. The distance image capturing element as described in claim 1, wherein, Each of the aforementioned hexagonal sides is the first side on which the aforementioned charge discharge MOS transistor is disposed.
3. The distance image capturing element as described in claim 1 or 2, wherein, A microlens is formed on the side of the surface where the light is incident in the pixel circuit. The optical axis of the microlens is perpendicular to the incident surface of the photoelectric conversion element and passes through the center of the incident surface.
4. A distance image camera device, comprising: The light-receiving part is the light-receiving part provided in the distance image imaging element according to any one of claims 1 to 3; and The distance image processing unit calculates the distance from the distance image camera element to the subject based on the distance image captured by the distance image camera element.