A checkpoint setting method, device, equipment and storage medium

Abstract

The application discloses a checkpoint setting method, device and equipment and a storage medium. When a checkpoint is set in a target program, the soft error tendency instruction and the calculation-intensive code block in the target program are utilized to set the checkpoint in the target program in a targeted manner, so that the resource consumption of the system in saving the checkpoint state operation in the program running process and the resource consumption of the system in the rollback operation after the system failure are reduced.

Description

Technical Field

[0001] This invention relates to the field of checkpoint setting technology, and more specifically, to a checkpoint setting method, apparatus, device, and storage medium. Background Technology

[0002] With the continuous increase in the parallelism of high-performance computing programs and the continuous increase in the scale of computing nodes in high-performance computing clusters, the Mean Time To Failure (MTTF) of high-performance computing clusters will shorten while the individual processing unit remains unchanged. Existing high-performance computing platforms use many methods to minimize the impact of system failures. The main methods can be divided into the following categories: algorithm-based fault tolerance methods, checkpointing / rollback fault tolerance methods, log-based fault tolerance methods, and computational redundancy fault tolerance methods. Among them, checkpointing / rollback fault tolerance methods are the most widely used, and other methods often use checkpointing strategies as the basis for their functionality. In the traditional methods used by existing high-performance computing platforms, checkpoints are placed in the program at fixed time intervals. This method estimates the time interval for placing checkpoints in the system by statistically analyzing the average duration of system failures. However, this method of placing checkpoints at fixed time intervals can result in insufficient checkpoints in program blocks with dense soft error distributions, leading to more system time and computing resources being consumed during Rollback. This method can also result in too many checkpoints being set in program blocks with sparse soft error distributions, causing the system to consume too much system time and resources to save the checkpoint state.

[0003] Therefore, how to reasonably set checkpoints in the program in order to reduce the system's resource consumption is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a checkpoint setting method, apparatus, device, and storage medium to reduce system resource consumption.

[0005] To achieve the above objectives, the present invention provides a checkpoint setting method, comprising:

[0006] Identify soft-error-prone instructions in the target program;

[0007] Locate the computationally intensive code blocks in the target program;

[0008] Checkpoints are set in the target program using soft error-prone instructions and computationally intensive code blocks.

[0009] Preferably, the instructions for identifying soft error tendencies in the target program include:

[0010] Identify error-prone instructions in the target program.

[0011] Preferably, the instruction for identifying error-prone crashes in the target program includes:

[0012] The target program is analyzed using an instruction recognition model to identify error-prone instructions in the target program; wherein the instruction recognition model is trained by the correspondence between the fault-tolerant characteristics of instructions and soft error types.

[0013] Preferably, the instruction for identifying error-prone crashes in the target program includes:

[0014] An error injection experiment was performed on the target program, and the experimental results were obtained.

[0015] Based on the experimental results, identify error-prone instructions from the target program.

[0016] Preferably, the step of finding computationally intensive code blocks in the target program includes:

[0017] Locate the loop code block in the target program.

[0018] Preferably, the step of setting checkpoints in the target program using soft-error-prone instructions and computationally intensive code blocks includes:

[0019] During the traversal process of the target program, if it is detected that the current traversal passes through an error crash-prone instruction, then the first total number of error crash-prone instructions traversed and the second total number of loops are determined.

[0020] Calculate the target quantity using the first total quantity and the second total quantity;

[0021] Determine whether the target quantity is greater than a predetermined threshold;

[0022] If yes, then set a checkpoint after the currently passed error crash tendency instruction, set both the first total and the second total to zero, and continue traversing the target program; if no, then continue traversing the target program.

[0023] Preferably, the step of setting checkpoints in the target program using soft-error-prone instructions and computationally intensive code blocks includes:

[0024] Based on the loop code blocks in the target program, the target program is divided into several target program code blocks, and checkpoints are set after each target program code block;

[0025] The instruction cycle of each target program code block is calculated based on the third total number of error-crash-prone instructions and the fourth total number of loop code blocks within each target program code block.

[0026] For each target program code block, a checkpoint is set after each error-prone instruction cycle in each target program code block.

[0027] To achieve the above objectives, the present invention further provides a checkpoint setting device, comprising:

[0028] The identification module is used to identify soft error-prone instructions in the target program;

[0029] The search module is used to locate computationally intensive code blocks in the target program.

[0030] The configuration module is used to set checkpoints in the target program by utilizing soft error-prone instructions and computationally intensive code blocks in the target program.

[0031] To achieve the above objectives, the present invention further provides an electronic device, comprising:

[0032] Memory, used to store computer programs;

[0033] A processor is used to implement the steps of the checkpoint setting method described above when executing the computer program.

[0034] To achieve the above objectives, the present invention further provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the above-described checkpoint setting method.

[0035] As can be seen from the above solutions, the present invention provides a checkpoint setting method, apparatus, device, and storage medium. When setting checkpoints in the target program, this solution can utilize the soft error-prone instructions and computationally intensive code blocks in the target program to set checkpoints in a targeted manner, thereby reducing the resource consumption of system checkpoint state saving operations during program operation and the resource consumption of rollback operations after system failure. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1This is a schematic flowchart of a checkpoint setting method disclosed in an embodiment of the present invention;

[0038] Figure 2 This is a schematic diagram of a method for generating an instruction recognition model according to an embodiment of the present invention;

[0039] Figure 3 This is a framework diagram of a soft error checkpoint placement method disclosed in an embodiment of the present invention;

[0040] Figure 4 This is a schematic diagram of a checkpoint setting device disclosed in an embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of an electronic device structure disclosed in an embodiment of the present invention. Detailed Implementation

[0042] To clearly explain this invention, the technical terms involved in this invention will be specifically explained below:

[0043] High-performance computing (HPC) refers to the aggregation of computing power to handle data-intensive or computationally intensive tasks that standard servers cannot complete, including numerical simulation, modeling, deep learning, etc.

[0044] Cluster: Multiple servers are organized together through technologies such as high-speed network interconnection (InfiniBand), shared parallel file system (Lustre), and management scheduling software (Load Sharing Facility, LSF) to form a high-performance computing cluster that cooperates with each other and can perform parallel computing.

[0045] High-performance computing (HPC) programs: Large-scale parallel computing programs that run on high-performance computing clusters (platforms). Examples include numerical simulations, temperature simulations, and deep learning programs. These programs require significant computational resources.

[0046] Bit flip: Computers store data in binary. When a computer is affected by alpha particles and high-energy neutrons in the universe, the stored 0s and 1s will change, for example, 001 becomes 000. This change is called a "bit flip". A single bit flip refers to flipping only one bit at a time.

[0047] Soft errors: As chip integration increases, circuits become more susceptible to the effects of alpha particles and high-energy neutrons. High-performance computing clusters (platforms) contain a large number of high-density computing chips, making them more prone to bit flips. Program errors caused by bit flips are called "soft errors." Furthermore, based on the impact of soft errors generated during program execution on the final result, soft errors can be broadly categorized into three types: 1. Soft errors do not change the final result (Masked type); 2. Soft errors cause the program to crash midway without producing a final result (Detected type); 3. Soft errors occur, and the program produces a final result, but the result contains errors (SDC type).

[0048] Error injection is an experimental technique that uses software simulation to mimic the actual occurrence of "soft errors" in hardware.

[0049] Checkpoint: A checkpoint is a collection of all the data and environmental information objects needed to resume program operation at a specific point in the program.

[0050] Rollback: When a program fails due to a runtime error, the system rolls back the program to the most recent checkpoint and restarts it.

[0051] It should be noted that the traditional checkpoint setting method is based on the equal-interval checkpoint method, and involves adding or deleting checkpoints. The specific process is as follows:

[0052] A. Load the program that adds the detector as input to this method;

[0053] B. Deploy initial checkpoints and divide the program into segments;

[0054] C. Calculate the time cost of the program segment;

[0055] D. Determine the sufficiency of checkpoints within the program segment. If there are insufficient checkpoints, add additional checkpoints to the program segment.

[0056] E. Determine whether checkpoints within a program segment are deletable.

[0057] Analysis revealed that 80% of cluster failures were caused by soft errors (Detected type, i.e., error-induced crashes). For example, the average failure time for the BlueGene system was 7.5 days in 2008 and 1.25 failures per day in 2013. This situation worsens with increasing cluster size. The method described above for setting checkpoints ignores the fact that different instruction sequences within a specific program exhibit varying distributions of soft errors, and these errors are not uniformly distributed across different parts of the program. Therefore, using a uniform checkpoint placement interval T has two drawbacks:

[0058] a) In program blocks where soft errors are densely distributed, more checkpoints need to be placed, and the time interval should be less than T. Using a checkpoint with a uniform time interval of T will result in insufficient checkpoints, causing RollBack to consume more system time and computing resources.

[0059] b) In program blocks where soft errors are sparsely distributed, fewer checkpoints are needed, and the time interval should be greater than T. Using a uniform time interval of T for checkpoints will result in too many checkpoints being placed, causing excessive consumption of system time and resources for saving checkpoint states.

[0060] Therefore, in order to solve the above problems, the present invention discloses a checkpoint setting method, apparatus, device and storage medium to reduce system resource consumption. By utilizing soft error-prone instructions and computationally intensive code blocks in the target program, checkpoints are set in the target program in a targeted manner, reducing the resource consumption of system checkpoint state saving operations during program operation and the resource consumption of rollback operations after system failure.

[0061] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0062] See Figure 1 The present invention provides a schematic flowchart of a checkpoint setting method, which specifically includes the following steps:

[0063] S11. Identify soft error-prone instructions in the target program;

[0064] In this embodiment, the target program is a program that requires checkpointing. It can be a high-performance computing (HPC) program or other types of programs, without specific limitations. Furthermore, when identifying soft error-prone instructions from the target program, this can be done through error injection experiments or other artificial intelligence methods, without specific limitations, as long as soft error-prone instructions can be identified from the target program. It should be noted that soft errors have three types: masked errors, detected errors, and SDC errors. However, analysis has shown that most system failures are caused by detected errors. Therefore, in this embodiment, the focus is on identifying detected errors in the target program to more effectively set checkpoints.

[0065] S12. Locate computationally intensive code blocks in the target program;

[0066] In this embodiment, the computationally intensive code block specifically refers to a code block that requires a large amount of computation, such as a loop code block. Therefore, in this solution, the loop code block in the target program can be identified by analyzing the code structure of the target program as the computationally intensive code block, so as to serve as a reference when setting checkpoints.

[0067] S13. Use soft error-prone instructions and computationally intensive code blocks in the target program to set checkpoints in the target program.

[0068] In this embodiment, soft error tendency instructions can reflect the locations in the target program where soft errors are likely to occur, while computationally intensive code blocks can reflect the locations in the target program where computation is high. Therefore, when setting checkpoints based on soft error tendency instructions and computationally intensive code blocks, this application will comprehensively consider the distribution of soft errors and computation in the target program. For example, more checkpoints can be set in program blocks where soft errors are more concentrated, and more checkpoints can be set in programs with higher computation. Alternatively, checkpoints can be set by comprehensively considering both factors.

[0069] In summary, this solution requires identifying the soft error-prone instructions and computationally intensive code blocks in the target program when setting checkpoints. This allows for targeted checkpoint setting by utilizing these soft error-prone instructions and computationally intensive code blocks, thereby reducing resource consumption during program execution for saving checkpoint states and during system failure rollback.

[0070] Based on the previous embodiment, this embodiment of the invention discloses two specific methods for identifying error-prone instructions in a target program.

[0071] Method 1: Perform an error injection experiment on the target program and obtain the experimental results; based on the experimental results, identify error-prone instructions from the target program.

[0072] When identifying error-prone instructions using Method 1, the target program first needs to be run in a parallel computing environment similar to a high-performance computing platform. Then, numerous error-injection experiments are performed on the parallel execution instance of the program code using an error-injection tool. These experiments simulate soft errors in the system, yielding multiple experimental results. These results include: the system execution state and results after error injection, as well as the error injection location, injection instruction, platform interrupt signal, and system error message for each experiment. The error message indicates the type of soft error caused by the injected instruction, including detected (error-prone crash type) and undetected (non-error-prone crash type). While this approach can identify error-prone instructions from the target program based on experimental results, all detected type instructions can be considered error-prone. However, this method identifies a large number of error-prone instructions. Therefore, in this application, the detected type instructions with the most error reports are selected as error-prone instructions. For example, based on actual application requirements, a predefined parameter H is used. In the statistical analysis of the above large number of error injection experiments, if the number of times N, caused by error injection of a certain instruction I, the system generates a system interrupt signal and reports an error (detected type soft error) is greater than or equal to H, then instruction I∈{I|detected-preferred instruction} is defined, and the set of detected-preferred instructions in the target program is obtained.

[0073] Method 2: Analyze the target program using an instruction recognition model to identify error-prone instructions in the target program; wherein, the instruction recognition model is trained by the correspondence between the fault-tolerant characteristics of instructions and soft error types.

[0074] Analysis revealed a relationship between the soft error type of an instruction and certain characteristics of the instruction. Therefore, to quickly and accurately identify error-prone instructions from the target program, this solution refers to the features related to the soft error type of the instruction as fault-tolerant features. The correspondence between the fault-tolerant features and soft error types of the instructions is collected to generate an input dataset. This input dataset is then used as training data to train the model, resulting in the instruction recognition model. This model can then be used to quickly identify error-prone instructions from the target program.

[0075] See Figure 2 The above is a schematic diagram of a method for generating an instruction recognition model according to an embodiment of the present invention. The method for generating the model specifically includes the following steps:

[0076] S21. Run the initial high-performance program in parallel on a high-performance computing platform, and perform error injection operations on the parallel running instance of the high-performance program using an error injection tool to obtain the execution result data.

[0077] S22. Generate an input dataset based on the execution result data; wherein, the input dataset includes the fault tolerance characteristics of each error-injecting instruction in the initial high-performance program and the corresponding soft error types;

[0078] S23. Train the initial deep learning model using the input dataset to obtain the instruction recognition model.

[0079] Specifically, when obtaining the trained model, this solution first runs the initial high-performance program in a parallel computing environment similar to a high-performance computing platform. Then, it uses an error-injecting tool to perform error-injection experiments on the parallel execution instances of the program code. These experiments simulate "soft errors" occurring in the system and generate execution result data after error injection. This execution result data includes: the error-injection location, the error-injection command, and the running status and results of the program instance after the error-injection operation. Based on this running status and results, the error-injection command can be labeled with a soft error type. For example, if the program runs normally and the running result is no different from the actual result, the soft error type of the labeled error-injection command is a masked error type; if the program runs normally, but the running result is different from the actual result, the soft error type of the labeled error-injection command is a result error type (SDC (Silent Data)). If a program crashes midway without producing a final result due to a serious error, the soft error type marked by the error annotation instruction is the error crash type (Detected type). However, in this embodiment, only the soft error types are divided into the following two categories for description: detected type and undetected type, where the undetected type includes Masked type and SDC type.

[0080] By repeating the above error injection experiments and labeling the execution results data after each experiment with soft error types, a small amount of representative labeled execution results data can be obtained and used as the input dataset. Then, an initial deep learning model is used to model the relationship between the fault tolerance features of program instructions and the output results. These fault tolerance features include: instruction type, error injection target register, error injection location and memory access boundary, static slice of the error injection instruction, etc. The output results include: soft error types (detected and undetected types) and runtime context information, etc.

[0081] Specifically, the fault-tolerance feature in this embodiment is a feature related to the detected tendency of an instruction. The detected tendency of an instruction refers to the tendency of an instruction to produce a detected type soft error when a soft error occurs. The fault-tolerance features of this scheme specifically include:

[0082] 1. Instruction type: Generally, more than 90% of the detected errors in programs are segmentation faults (SF), which are caused by accessing out of bounds, i.e., the instruction accessing an illegal memory address. Therefore, this solution believes that the instruction type is related to the detected tendency. Errors occurring in instructions such as mov (data transfer instruction), load (data transfer instruction), and store (data transfer instruction) that access memory are more likely to cause system crashes.

[0083] 2. Injection of target registers: Analysis revealed that the tendency of injection of target registers to be detected is related to the different functions of different CPU (central processing unit) registers during the compilation stage (e.g., the rax register is used to store the return value; the rdi and rsi registers are used to pass parameters; the rbp and rsp registers are used for the stack pointer). Some registers are often used for address memory access.

[0084] 3. Error Injection Location and Memory Access Boundaries: The location of the error injection in a register (high or low bit) affects the probability of an instruction causing a detected error. For example, if an instruction's error is injected in a low bit of a register, it may result in a data access deviation, but if it doesn't exceed the memory access boundary, it may not necessarily lead to a subsequent system crash. Due to the instruction's inherent fault tolerance characteristics, it might produce an SDC or Masked result. Therefore, for instructions with error injection that have caused system crashes, the lower the error injection location, the worse the instruction's fault tolerance characteristics, and the higher the instruction's detectability tendency. Therefore, this approach uses the error injection location and memory access boundaries as part of the input features for training the model.

[0085] 4. Static Program Slicing of Injected Errors: By slicing the static programs of the injected error instructions, we can understand the set of registers subsequently affected by the injected instruction. We select the k closest registers {r1, r2, ..., rk} to create a fault-tolerant feature for the model input, and learn the relationship between this feature and the output. Here, k is a user-defined parameter; typically, detected errors occur close to the injected location.

[0086] It should be noted that this embodiment only uses the above four fault-tolerant features as examples to illustrate this scheme. Other features related to detected tendency can also be used as fault-tolerant features. By extracting the above fault-tolerant features of the error-injection instruction and training the output result to train the initial deep learning model, the instruction recognition model can be obtained. In this embodiment, the initial deep learning model can be an RNN (Recurrent Neural Network) deep learning model, or it can be other models, such as DNN (Deep Neural Networks), LSTM (Long Short-Term Memory), GCN (Graph Convolutional Network), etc., as long as the deep learning model can model the relationship between the fault-tolerant features of the instruction and the error collapse tendency.

[0087] After obtaining the instruction recognition model through the above process, the model can be used to analyze the target program and quickly identify error-prone instructions. This method, by using artificial intelligence technology, reduces the number of bug-injection experiments. By analyzing the results of a small number of experiments, the characteristics of instructions with different fault-tolerance features are summarized and extracted. These features are then used to train the instruction recognition model, which can then be used to quickly find soft-error-prone instructions in the target program.

[0088] Based on any of the above embodiments, this embodiment provides two methods for setting checkpoints in the target program by utilizing soft error-prone instructions and computationally intensive code blocks in the target program.

[0089] Method 1: During the traversal of the target program, if the current traversal passes through an error-crash-prone instruction, determine the first total number of error-crash-prone instructions and the second total number of loops; calculate the target number using the first total number and the second total number; determine whether the target number is greater than a predetermined threshold; if so, set a checkpoint after the currently passed error-crash-prone instruction, set both the first total number and the second total number to zero, and continue traversing the target program; if not, continue traversing the target program.

[0090] Specifically, this method requires traversing the target program from beginning to end. During the traversal, the total number of error-prone instructions and the total number of loops are counted. To distinguish between them, the total number of error-prone instructions is defined as the first total number, and the total number of loops is defined as the second total number. When traversing the target program, if an error-prone instruction is encountered, the target number is calculated based on the currently counted first and second totals. It is then determined whether this target number exceeds a predetermined threshold. If it does, a checkpoint is set after the currently encountered error-prone instruction and before the next error-prone instruction, and then the program traversal continues. The subsequent checkpoint setting process is repeated and will not be elaborated here. It should be noted that after each checkpoint is set, the first and second totals must be reset to zero.

[0091] It should be noted that when calculating the target quantity based on the first total quantity and the second quantity, the sum of the first total quantity and the second quantity can be directly used as the target quantity. Alternatively, weight parameters, such as instruction weight parameters and / or loop weight parameters, can be introduced during the calculation process. In this way, when calculating the target quantity, the first total quantity can be multiplied by the instruction weight parameter and then summed with the second quantity. Alternatively, the second total quantity can be multiplied by the loop weight parameter and then summed with the first quantity. Furthermore, the first total quantity can be multiplied by the instruction weight parameter, and the second total quantity can be multiplied by the loop weight parameter separately, and the products can be added together to obtain the target quantity. Here, we will only use the introduction of loop weight parameters as an example for specific explanation, that is:

[0092] If n + λm > N: checkpoint;

[0093] Where n is the number of soft error-prone instructions executed by the target program after the previous checkpoint is saved, m is the number of loops executed by the target program after the previous checkpoint is saved, λ is a pre-set loop weight parameter, which can be set to a specific value according to the importance of the loop and the amount of computation within the loop, and N is a predetermined threshold.

[0094] Method 2: Divide the target program into several target program code blocks based on the loop code blocks in the target program, and set checkpoints after each target program code block; calculate the instruction cycle of each target program code block based on the third total number of error crash-prone instructions and the fourth total number of loop code blocks in each target program code block; for each target program code block, set checkpoints after each error crash-prone instruction in each instruction cycle of each target program code block.

[0095] Specifically, in this method, when dividing the target program into several target program code blocks, the division rules can be customized. For example, a target program code block can be divided at predetermined intervals of loop code blocks, or the target program code block can be divided into multiple target program code blocks based on the computational load of each loop code block, aiming to make the computational load within each target program code block roughly the same. After dividing into multiple target program code blocks, a checkpoint needs to be set after each target program code block, and the checkpoint method for each target program code block is the same. When setting checkpoints within the target program code blocks, it is necessary to count the total number of error-prone instructions and the total number of loop code blocks within each target program code block. To distinguish them, the total number of error-prone instructions in Method 2 is defined as the third total number, and the total number of loop code blocks in Method 2 is defined as the fourth total number. The instruction cycle is calculated based on the third and fourth total numbers. This instruction cycle indicates that within the target program code block, a checkpoint is set at intervals of instruction cycles of error-prone instructions.

[0096] It should be noted that when calculating the instruction cycle, this solution can preset a fixed maximum cycle based on the application scenario, and calculate the sum of the third total quantity and the fourth total quantity. The quotient of the maximum cycle and the sum of the quantities is taken as the instruction cycle. This calculation method can make the instruction cycle smaller and the checkpoints set when there are more error-prone instructions and / or loop code blocks in the target program code block, and the instruction cycle larger and the checkpoints set when there are fewer error-prone instructions and / or loop code blocks. Furthermore, when calculating the sum of the third and fourth total quantities, weight parameters can be introduced, such as instruction weight parameters and / or loop weight parameters. Thus, when calculating the sum, the third total quantity can be multiplied by the instruction weight parameter and then summed with the fourth quantity; alternatively, the fourth total quantity can be multiplied by the loop weight parameter and then summed with the third quantity; or the third total quantity can be multiplied by the instruction weight parameter and the fourth total quantity by the loop weight parameter separately, and the products can be added together. Here, we will only use the introduction of loop weight parameters as an example for specific explanation:

[0097] The instruction cycle G is calculated using the formula "C / (n+λm)". Within the current target program code block, a checkpoint is set every G error-prone instructions. Here, C is the longest cycle, n is the number of error-prone instructions in the current target program code block, m is the number of loop blocks in the previous target program code block, and λ is a pre-set loop weight parameter.

[0098] See Figure 3 This is a framework diagram of a soft error checkpoint placement method provided in an embodiment of the present invention. Figure 3In this example, we will only use the method described above to identify error-prone crash-prone instructions. Figure 3 In this process, specific HPC applications are run in parallel on an HPC platform. Numerous program errors are injected into each running instance using an error injection tool. An error injection collection module collects experimental results data from each registration experiment, which is labeled with the type of soft error that occurred for each injection instruction. Based on this experimental results data, an error injection experiment analysis module identifies error-prone instructions and computationally intensive code blocks. When setting checkpoints, the checkpoint placement strategy needs to be configured. The checkpoint module optimizes traditional checkpoint prevention strategies by utilizing error-prone instructions, computationally intensive code blocks, and corresponding placement strategies.

[0099] In summary, HPC programs running on high-performance computing clusters typically exhibit high parallelism and consume significant computing resources. When a Detected soft error occurs during platform operation, traditional checkpointing strategies result in substantial waste of computing resources. This solution addresses this issue by analyzing fault injection in specific high-performance programs or introducing artificial intelligence techniques to determine the fault tolerance characteristics of different parts of the program. Based on these characteristics, the fixed-cycle placement strategy of traditional checkpoints is optimized, thereby reducing the overhead of rollback operations after a Detected soft error occurs. In practical applications, a specific placement strategy can be selected based on the fault tolerance level and requirements of the application scenario.

[0100] The checkpoint setting apparatus, device, and storage medium provided in the embodiments of the present invention will be described below. The checkpoint setting apparatus, device, and storage medium described below can be referred to in conjunction with the checkpoint setting method described above.

[0101] See Figure 4 The above is a schematic diagram of a checkpoint setting device provided in an embodiment of the present invention, comprising:

[0102] Identification module 11 is used to identify soft error-prone instructions in the target program;

[0103] The search module 12 is used to search for computationally intensive code blocks in the target program;

[0104] Setting module 13 is used to set checkpoints in the target program using soft error-prone instructions and computationally intensive code blocks in the target program.

[0105] Specifically, the identification module is used to identify error-prone instructions in the target program.

[0106] The identification module includes:

[0107] The first identification unit is used to analyze the target program using an instruction identification model to identify error-prone instructions in the target program; wherein the instruction identification model is trained by the correspondence between the fault-tolerant characteristics of instructions and soft error types.

[0108] The identification module includes:

[0109] The second identification unit is used to perform an error injection experiment on the target program and obtain the experimental results; and to identify error-prone instructions from the target program based on the experimental results.

[0110] Specifically, the search module is used to search for loop code blocks in the target program.

[0111] The settings module includes:

[0112] The determining unit is used to determine the first total number of error-crash-prone instructions and the second total number of loops during the traversal process of the target program if it is detected that the current traversal passes through an error-crash-prone instruction.

[0113] The first calculation unit is used to calculate the target quantity using the first total quantity and the second total quantity;

[0114] The judgment unit is used to determine whether the target quantity is greater than a predetermined threshold; if so, a checkpoint is set after the currently passed error crash tendency instruction, the first total quantity and the second total quantity are both set to zero, and the target program is traversed again; if not, the target program is traversed again.

[0115] The settings module includes:

[0116] A partitioning unit is used to divide the target program into several target program code blocks based on the loop code blocks in the target program;

[0117] The first setting unit is used to set checkpoints after each target program code block;

[0118] The second calculation unit is used to calculate the instruction cycle of each target program code block based on the third total number of error-crash-prone instructions and the fourth total number of loop code blocks within each target program code block.

[0119] The second setting unit is used to set checkpoints for each target program code block after each error-prone instruction cycle in each target program code block.

[0120] See Figure 5 The present invention provides a schematic diagram of an electronic device structure, comprising:

[0121] Memory 21 is used to store computer programs;

[0122] The processor 22 is configured to implement the steps of the checkpoint setting method described in any of the above method embodiments when executing the computer program.

[0123] In this embodiment, the device can be a PC (Personal Computer), or a terminal device such as a smartphone, tablet computer, handheld computer, or portable computer.

[0124] The device may include a memory 21, a processor 22, and a bus 23.

[0125] The memory 21 includes at least one type of readable storage medium, such as flash memory, hard disk, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory 21 can be an internal storage unit of the device, such as the hard disk of the device. In other embodiments, the memory 21 can also be an external storage device of the device, such as a plug-in hard disk, SmartMedia Card (SMC), Secure Digital (SD) card, Flash Card, etc. Furthermore, the memory 21 can include both internal and external storage units of the device. The memory 21 can be used not only to store application software and various types of data installed on the device, such as program code executing checkpoint setting methods, but also to temporarily store data that has been output or will be output.

[0126] In some embodiments, processor 22 may be a central processing unit (CPU), controller, microcontroller, microprocessor or other data processing chip, used to run program code stored in memory 21 or process data, such as program code for executing checkpoint setting method, etc.

[0127] This bus 23 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 5 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0128] Furthermore, the device may also include a network interface 24, which may optionally include a wired interface and / or a wireless interface (such as a Wi-Fi interface, a Bluetooth interface, etc.), typically used to establish communication connections between the device and other electronic devices.

[0129] Optionally, the device may further include a user interface 25, which may include a display, an input unit such as a keyboard, and optionally, a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the device and to display a visual user interface.

[0130] Figure 5 Only devices with components 21-25 are shown; those skilled in the art will understand that... Figure 5 The structure shown does not constitute a limitation on the device and may include fewer or more components than shown, or combine certain components, or have different component arrangements.

[0131] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the checkpoint setting method described in any of the above method embodiments.

[0132] The storage medium may include various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0133] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0134] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A checkpoint setting method characterized by comprising: include: Identify soft-error-prone instructions in the target program; Locate the computationally intensive code blocks in the target program; Checkpoints are set in the target program using soft-error-prone instructions and computationally intensive code blocks. The step of setting checkpoints in the target program using soft-error-prone instructions and computationally intensive code blocks includes: During the traversal process of the target program, if it is detected that the current traversal passes through an error crash-prone instruction, then the first total number of error crash-prone instructions traversed and the second total number of loops are determined. Calculate the target quantity using the first total quantity and the second total quantity; Determine whether the target quantity is greater than a predetermined threshold; If yes, then set a checkpoint after the currently passed error crash tendency instruction, set both the first total and the second total to zero, and continue traversing the target program; if no, then continue traversing the target program.

2. The checkpoint setting method according to claim 1, characterized by, The instructions for identifying soft error tendencies in the target program include: Identify error-prone instructions in the target program.

3. The checkpoint setting method according to claim 2, wherein The instructions for identifying error-prone crashes in the target program include: The target program is analyzed using an instruction recognition model to identify error-prone instructions in the target program; wherein the instruction recognition model is trained by the correspondence between the fault-tolerant characteristics of instructions and soft error types.

4. The checkpoint setting method according to claim 2, wherein The instructions for identifying error-prone crashes in the target program include: An error injection experiment was performed on the target program, and the experimental results were obtained. Based on the experimental results, identify error-prone instructions from the target program.

5. The checkpoint setting method of claim 1, wherein The process of finding computationally intensive code blocks in the target program includes: Locate the loop code block in the target program.

6. The checkpoint setting method according to any one of claims 1 to 5, characterized in that, The step of setting checkpoints in the target program using soft-error-prone instructions and computationally intensive code blocks includes: Based on the loop code blocks in the target program, the target program is divided into several target program code blocks, and checkpoints are set after each target program code block; The instruction cycle of each target program code block is calculated based on the third total number of error-crash-prone instructions and the fourth total number of loop code blocks within each target program code block. For each target program code block, a checkpoint is set after each error-prone instruction cycle in each target program code block.

7. A checkpoint setting device, characterized in that, include: The identification module is used to identify soft error-prone instructions in the target program; The search module is used to locate computationally intensive code blocks in the target program. The configuration module is used to set checkpoints in the target program by utilizing soft error-prone instructions and computationally intensive code blocks in the target program; The settings module includes: The determining unit is used to determine the first total number of error-crash-prone instructions and the second total number of loops during the traversal process of the target program if it is detected that the current traversal passes through an error-crash-prone instruction. The first calculation unit is used to calculate the target quantity using the first total quantity and the second total quantity; The judgment unit is used to determine whether the target quantity is greater than a predetermined threshold; if so, a checkpoint is set after the currently passed error crash tendency instruction, the first total quantity and the second total quantity are both set to zero, and the target program is traversed again; if not, the target program is traversed again.

8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the checkpoint setting method as described in any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the checkpoint setting method as described in any one of claims 1 to 6.

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