Chip transfer substrate, device, and method
By designing heat-deformable grooves on the chip transfer substrate, the chip can be clamped and released, solving the problem of high cost of PDMS material and realizing low-cost, high-efficiency chip transfer and mass production.
Patent Information
- Application Number
- CN202111492346.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-08
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2041-12-08
AI Technical Summary
In the existing micro LED industry, the PDMS material used in mass transfer technology is expensive and has a long delivery time, which affects chip transfer costs and mass production.
A chip transfer substrate with a groove design having first and second states is used to change the groove size by heating and cooling to achieve chip clamping and release. Chip transfer is completed without PDMS by utilizing a thermally expanding and contracting material layer.
It reduces chip transfer costs, shortens process time, and is reusable, making it suitable for mass production.
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Figure CN116247070B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and in particular to a chip transfer substrate, apparatus and method. Background Technology
[0002] In the Micro LED industry, the manufacturing process involves first growing a large number of micron-sized LED chips on a growth substrate, and then transferring and bonding these LED chips to a backplane using mass transfer technology.
[0003] Currently, industry peers have proposed many mass transfer technologies, including Van der Waals technology, laser transfer technology, fluid transfer technology, roller imprinting technology, electrostatic transfer technology, and magnetic transfer technology, each with its own advantages and disadvantages. Among them, Van der Waals technology (stamp-type) is currently the most feasible method due to its advantages of high stability and high yield, and it is gradually becoming one of the most mainstream technologies at present.
[0004] However, Vandewalli technology requires the use of PDMS (polydimethylsiloxane) material, which is not only expensive, but also has most of its raw materials controlled by foreign manufacturers, resulting in very long delivery times. Summary of the Invention
[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide a chip transfer substrate, apparatus and method, which aims to solve the problem of how to achieve chip transfer without PDMS.
[0006] This application provides a chip transfer substrate based on some embodiments, characterized in that the surface of the chip transfer substrate is provided with a groove, the groove having a first state before being heated and a second state after being heated; the size of the groove in the first state is larger than the size of the chip to be transferred, and the size of the groove in the second state is smaller than the size of the chip to be transferred.
[0007] The grooves in the aforementioned chip transfer substrate have a first state before heating and a second state after heating. Therefore, by heating the chip transfer substrate, the grooves in the chip transfer substrate can be changed to the second state. In the second state, the size of the grooves is smaller than the size of the chip to be transferred, thereby clamping the chip to be transferred located in the grooves. After that, the chip transfer substrate can be cooled down, causing the grooves in the chip transfer substrate to change back from the second state to the first state. This releases the chip to be transferred previously clamped in the grooves, realizing chip transfer. The aforementioned chip transfer substrate, by changing the size of the grooves, realizes the clamping and release of the chip, and can complete the chip transfer without PDMS, thereby reducing chip transfer costs and shortening the chip manufacturing process. The aforementioned chip transfer substrate is inexpensive, has a short manufacturing cycle, and can be reused, which is beneficial for subsequent chip mass production.
[0008] Optionally, there may be multiple grooves, and the multiple grooves may be arranged in an array on the surface of the chip transfer substrate.
[0009] The chip transfer substrate described above has multiple grooves, which allows for the transfer of multiple chips, enabling mass transfer. Using the chip transfer substrate described above can easily complete the mass transfer of chips, which not only has high transfer efficiency but also reduces chip production costs.
[0010] Optionally, the chip transfer substrate includes:
[0011] A substrate body, wherein an initial groove is provided on the surface of the substrate body;
[0012] A layer of thermally expandable and contractible material is located at least on the sidewall of the initial groove to form the groove.
[0013] The aforementioned chip transfer substrate uses a thermally expanding and contracting material layer to give the groove a second state after being heated. In the second state, the size of the groove is smaller than the size of the chip to be transferred, which eliminates the need for high costs and has a simple structure. At the same time, the chip transfer substrate using the thermally expanding and contracting material layer can be reused, which is beneficial for subsequent chip mass production.
[0014] Optionally, the substrate body has a receiving cavity; the chip transfer substrate further includes an inner temperature conductive sheet, which is located in the receiving cavity and is in contact with the substrate body.
[0015] Optionally, the surface of the inner lining temperature conductive sheet adjacent to the groove is provided with a raised strip, and the raised strip is provided corresponding to the groove.
[0016] Optionally, the substrate body includes a silicon substrate body, the thermal expansion and contraction material layer includes a metal layer, the inner temperature conductive sheet includes a metal sheet, and the protrusion includes a metal protrusion.
[0017] Based on the same inventive concept, this application also provides a chip transfer apparatus according to some embodiments, comprising:
[0018] The chip transfer substrate provided in any of the above embodiments;
[0019] The temperature control system is placed on the surface of the chip transfer substrate to heat or cool the chip transfer substrate when the chip to be transferred is used.
[0020] The chip transfer apparatus described above includes the chip transfer substrate in some of the aforementioned embodiments; therefore, the technical effects that the chip transfer substrate provided in the aforementioned embodiments can achieve can all be achieved by the chip transfer apparatus described above, and will not be described in detail here.
[0021] Optionally, the groove is located on one surface of the chip transfer substrate, and the temperature control system device is placed on the surface of the chip transfer substrate away from the groove when using the chip transfer substrate to transfer the chip to be transferred.
[0022] Based on the same inventive concept, this application also provides a chip transfer method according to some embodiments, the transfer method being implemented based on the chip transfer apparatus provided in any of the above embodiments, the chip transfer method comprising:
[0023] With the groove in the first state, the chip transfer substrate is placed at the chip to be transferred, and the chip to be transferred is located in the groove;
[0024] The temperature control system device is used to heat the chip transfer substrate, so that the groove is in a second state to clamp the chip to be transferred located in the groove;
[0025] Pick up the chip to be transferred and move it to the backplane;
[0026] The temperature control system is used to cool the chip transfer substrate, and the groove changes from the second state to the first state to release the chip to be transferred, so that the chip to be transferred is transferred to the surface of the backplane.
[0027] The chip transfer method described above is based on the chip transfer apparatus described in some of the foregoing embodiments; therefore, the chip transfer method can achieve all the technical effects that the chip transfer apparatus provided in the foregoing embodiments can achieve, and will not be described in detail here.
[0028] Optionally, the number of chips to be transferred is multiple; after transferring a portion of the chips to be transferred to the surface of the backplane at one time, the chip transfer method further includes:
[0029] Repeat the steps in the chip transfer method provided in the above embodiments until all the chips to be transferred are transferred to the surface of the backplane. Attached Figure Description
[0030] Figure 1 A top view of the chip transfer substrate provided in some embodiments of this application;
[0031] Figure 2 A three-dimensional structural schematic diagram of a chip transfer substrate provided in some embodiments of this application;
[0032] Figure 3 Figure (a) is a top view of a chip transfer substrate provided in some embodiments of this application; Figure 3Figure (b) is Figure 3 A magnified view of region A in figure (a);
[0033] Figure 4 A schematic diagram of the side structure of a chip transfer substrate provided for some embodiments of this application;
[0034] Figure 5 A schematic diagram of the side structure of the inner temperature conductive sheet in a chip transfer substrate provided in some embodiments of this application;
[0035] Figure 6 A side view of the chip transfer substrate provided for other embodiments of this application;
[0036] Figure 7 A top view of the inner temperature conductive sheet in a chip transfer substrate provided in some embodiments of this application;
[0037] Figure 8 A side view of the chip transfer apparatus provided for other embodiments of this application;
[0038] Figure 9 Flowcharts of chip transfer methods provided for some embodiments of this application;
[0039] Figures 10 to 11 This application provides a schematic diagram of step S20 in a chip transfer method according to some embodiments of the present application;
[0040] Figures 12 to 14 This application provides a schematic diagram of step S30 in a chip transfer method for some embodiments of the present application.
[0041] Explanation of reference numerals in the attached figures:
[0042] 1-Chip transfer substrate; 10-Groove; 101-Initial groove; 102-Thermal expansion and contraction material layer; 11-Substrate body; 111-Receiving cavity; 112-Inner lining temperature conduction sheet; 113-Raised strip; 2-Temperature control system device; 3-Chip to be transferred. Detailed Implementation
[0043] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.
[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.
[0045] In the Micro LED industry, the manufacturing process involves first growing a large number of micron-sized LED chips on a growth substrate, and then transferring and bonding these chips to a backplane using mass transfer technology. Currently, the industry has proposed many mass transfer technologies, including Van der Waals technology, laser transfer technology, fluid transfer technology, roller imprinting technology, electrostatic transfer technology, and magnetic transfer technology, each with its own advantages and disadvantages. Among them, Van der Waals technology (stamp-type) is currently the most feasible method due to its high stability and high yield, and it is gradually becoming one of the mainstream technologies at present. However, Van der Waals technology requires the use of PDMS (polydimethylsiloxane) material, which is not only expensive, but most of the raw materials are controlled by foreign manufacturers, resulting in very long delivery times.
[0046] Therefore, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.
[0047] This application provides a chip transfer substrate 1 according to some embodiments; please refer to... Figure 1 and Figure 2 , Figure 1 This is a top view of the chip transfer substrate 1 described above. Figure 2 This is a three-dimensional structural diagram of the chip transfer substrate 1 described above.
[0048] The chip transfer substrate 1 provided in this application has a groove 10 on its surface; the groove 10 can have a first state before being heated and a second state after being heated; the size of the groove 10 in the first state is larger than the size of the chip to be transferred, and the size of the groove 10 in the second state is smaller than the size of the chip to be transferred.
[0049] Currently, most transient substrates use PDMS material, which is not only expensive but also has a very long delivery time, hindering subsequent mass production. The groove 10 in the aforementioned chip transfer substrate 1 has a first state before heating and a second state after heating. Therefore, by heating the chip transfer substrate 1, the groove 10 in the chip transfer substrate 1 changes to the second state. In the second state, the size of the groove 10 is smaller than the size of the chip to be transferred, thus clamping the chip located within the groove 10. Afterward, the chip transfer substrate 1 can be cooled, causing the groove 10 in the chip transfer substrate 1 to change back from the second state to the first state, thereby releasing the chip previously clamped within the groove 10 and realizing chip transfer. The aforementioned chip transfer substrate 1, by changing the size of the groove 10, achieves chip clamping and release, completing chip transfer without PDMS, avoiding bottlenecks in subsequent critical materials; it also reduces chip transfer costs and shortens the chip manufacturing process. The aforementioned chip transfer substrate 1 is inexpensive, has a short manufacturing time, and can be reused, which is beneficial for subsequent chip mass production.
[0050] It should be noted that the groove 10 involved in this application can be controlled individually; that is, by individually controlling the state of one or more grooves 10 on the chip transfer substrate 1, the chip to be transferred can be selectively clamped or released, thereby achieving selective transfer of the chip.
[0051] It is understood that this application does not specifically limit the number of grooves 10; in some embodiments, the number of grooves 10 can be multiple; in this way, multiple chips can be transferred to achieve mass transfer; using the above-mentioned chip transfer substrate 1 can easily complete the mass transfer of chips, which not only has high transfer efficiency, but also reduces chip production costs.
[0052] This application does not specifically limit the arrangement of the grooves 10; based on the above embodiments, multiple grooves 10 can be arranged in an array or other forms on the surface of the chip transfer substrate 1.
[0053] Meanwhile, this application does not limit the form of the chip to be transferred; in some embodiments, the chip to be transferred may include, but is not limited to, a micro light-emitting diode (Micro LED) chip, a micro light-emitting diode chip photodetector diode, a metal-oxide-semiconductor field-effect transistor (MOSFET) device, or a micro-electro-mechanical system (MEMS) device, etc.
[0054] It should be noted that, in some embodiments, the first state involved in this application may refer to the state in which the size of the groove 10 is slightly larger than the size of the chip to be transferred before being heated; the second state may refer to the state in which the groove 10 expands to a size slightly smaller than the size of the chip to be transferred after being heated.
[0055] The structure of the chip transfer substrate 1 will be described in more detail below.
[0056] In some embodiments, the chip transfer substrate 1 may include an integral structure made of a thermally expandable and contractible material, that is, the chip transfer substrate 1 is a transfer substrate made of a thermally expandable and contractible material; the chip transfer substrate 1 is integrally made of a thermally expandable and contractible material, so that the groove 10 has a second state after being heated, and the size of the groove 10 is smaller than the size of the chip to be transferred in the second state, which does not require high cost and has a simple structure; at the same time, the chip transfer substrate made of a thermally expandable and contractible material can be reused, which is beneficial to the subsequent mass production of chips.
[0057] In some other implementations, such as Figure 3 As shown in Figures (a) and (b), Figure 3 Figure (b) is Figure 3 In Figure (a), an enlarged view of region A shows that the chip transfer substrate 1 may include a substrate body 11 and a thermal expansion and contraction material layer 102; wherein, the surface of the substrate body 11 is provided with an initial groove 101; the thermal expansion and contraction material layer 102 is located at least on the sidewall of the initial groove 101 to form a groove 10.
[0058] Specifically, in the chip transfer substrate 1 provided in the above embodiments, the groove 10 may include an initial groove 101 and a thermal expansion and contraction material layer 102.
[0059] The chip transfer substrate 1 described above uses a thermally expandable and contractible material layer 102 to give the groove 10 a second state after being heated. In the second state, the size of the groove 10 is smaller than the size of the chip to be transferred, which does not require high costs and has a simple structure. At the same time, the chip transfer substrate 1 using the thermally expandable and contractible material layer 102 can be reused, which is beneficial for subsequent chip mass production.
[0060] This application does not limit the material of the substrate body 11, as long as the surface of the substrate body 11 can be provided with grooves 10; in some embodiments, the material of the substrate body 11 may include, but is not limited to, silicon (Si), silicon carbide (SiC), sapphire, quartz, gallium nitride (GaN) or gallium arsenide (GaAs), etc., that is, the substrate body 11 may include, but is not limited to, silicon substrate, silicon carbide substrate, sapphire substrate, quartz substrate, gallium nitride substrate or gallium arsenide substrate, etc.
[0061] This application does not limit the material of the thermal expansion and contraction material layer 102, as long as it has good thermal conductivity and can expand significantly when heated; in some embodiments, the thermal expansion and contraction material layer 102 may include, but is not limited to, a metal layer. The material of the metal layer may include metal materials with a high coefficient of thermal expansion, such as aluminum (Al), whose coefficient of thermal expansion is about 23.1 ppm / K; but it is not limited to this, and may also include other metal materials with a high coefficient of thermal expansion, such as one or more alloys of copper (Cu), gold (Au), magnesium (Mg), manganese (Mn), platinum (Pt), silver (Ag), titanium (Ti), zinc (Zn), tin (Sn), tungsten (W) and other metal materials.
[0062] Please see Figures 4 to 6 In some implementations, such as Figure 4 As shown, the substrate body 11 may have a receiving cavity 111; the chip transfer substrate 1 also includes an inner temperature conductive sheet 112, such as Figure 5 As shown; specifically, such as Figure 6 As shown, the inner temperature conductive sheet 112 can be located inside the receiving cavity 111 and in contact with the substrate body 11.
[0063] In the chip transfer substrate 1 described above, the inner temperature conductive sheet 112 is mainly used for temperature transfer. Based on this, by adjusting the position of the inner temperature conductive sheet 112, the chip to be transferred can be picked up at any position of the groove 10, thereby achieving the effect of selective mass transfer.
[0064] For more specific details, please refer to... Figure 5 and Figure 6 See Figure 7 The surface of the inner lining temperature conductive sheet 112 adjacent to the groove 10 may be provided with a protrusion 113, and the protrusion 113 is provided corresponding to the groove 10.
[0065] It is understood that this application does not specifically limit the material of the inner temperature conduction sheet 112. The inner temperature conduction sheet 112 may include, but is not limited to, a metal sheet. The material of the metal sheet may include metal materials with high thermal conductivity, such as aluminum alloy. The thermal conductivity of aluminum alloy is about 230 W / mK, and the metal has good stability, low cost, and is easy to form through processes such as aluminum extrusion. However, it is not limited to this and may also include other metal materials with high thermal conductivity, such as copper or aluminum.
[0066] It should also be understood that this application does not limit the number of protrusions 113; in an embodiment where one or more grooves 10 are arranged in an array on the surface of the chip transfer substrate 1, the number of protrusions 113 may be the same as or less than the number of rows or columns of grooves 10; this application also does not limit the shape of the protrusions 113; such as Figure 7As shown, in some embodiments, the width of the upper surface of the protrusion 113 may be smaller than the width of the lower surface, that is, the protrusion 113 may include a trapezoidal protrusion; this application does not specifically limit the material of the protrusion 113, and the protrusion 113 may include, but is not limited to, a metal protrusion.
[0067] Based on the same inventive concept, this application also provides a chip transfer apparatus according to some embodiments; please refer to Figure 8 The chip transfer device may include the chip transfer substrate 1 and the temperature control system device 2 as provided in any of the above embodiments.
[0068] Specifically, the temperature control system device 2 can be placed on the surface of the chip transfer substrate 1 to heat or cool the chip transfer substrate 1 when the chip to be transferred is transferred using the chip transfer substrate 1.
[0069] The chip transfer apparatus described above includes the chip transfer substrate 1 in some of the aforementioned embodiments; therefore, the technical effects that the chip transfer substrate 1 provided in the aforementioned embodiments can achieve can all be achieved by the aforementioned chip transfer apparatus, and will not be described in detail here.
[0070] It should be noted that the temperature control system device 2 involved in this application can be controlled by computer equipment to heat or cool the chip transfer substrate 1.
[0071] In some implementations, such as Figure 8 As shown, the groove 10 is located on one surface of the chip transfer substrate 1; based on this, when the temperature control system device 2 uses the chip transfer substrate 1 to transfer the chip to be transferred, it is placed on the surface of the chip transfer substrate 1 away from the groove 10.
[0072] Based on the same inventive concept, this application also provides a chip transfer method according to some embodiments, which is implemented based on the chip transfer apparatus provided in any of the above embodiments; please refer to Figure 9 The transfer method may specifically include the following steps:
[0073] S10: With the groove 10 in the first state, the chip transfer substrate 1 is placed at the chip 3 to be transferred, and the chip 3 to be transferred is located in the groove 10.
[0074] S20: The chip transfer substrate 1 is heated using the temperature control system device 2, so that the groove 10 is in the second state to hold the chip to be transferred located in the groove 10.
[0075] S30: Pick up the chip to be transferred and move it to the backplane;
[0076] S40: The temperature control system device 2 is used to cool the chip transfer substrate 1, and the groove 10 changes from the second state to the first state to release the chip to be transferred, so that the chip to be transferred is transferred to the surface of the back plate.
[0077] The aforementioned chip transfer method involves heating the chip transfer substrate 1, causing the groove 10 in the chip transfer substrate 1 to enter a second state. In the second state, the size of the groove 10 is smaller than the size of the chip to be transferred, thereby clamping the chip to be transferred within the groove 10. Afterward, by cooling the chip transfer substrate 1, the groove 10 in the chip transfer substrate 1 changes from the second state back to the first state, thus releasing the chip to be transferred previously clamped within the groove 10, achieving chip transfer. The aforementioned chip transfer method achieves chip clamping and release by changing the size of the groove 10, completing chip transfer without PDMS, which can avoid bottlenecks in subsequent critical materials; it also reduces chip transfer costs and shortens the chip manufacturing process; the aforementioned chip transfer method is inexpensive, the chip transfer substrate 1 used has a short manufacturing time, and it can be reused, which is beneficial for subsequent chip mass production.
[0078] It should be noted that, in some embodiments, the first state involved in this application may refer to the state in which the size of the groove 10 is slightly larger than the size of the chip to be transferred before being heated; the second state may refer to the state in which the groove 10 expands to a size slightly smaller than the size of the chip to be transferred after being heated.
[0079] The following is combined Figures 10 to 14 This section provides a more detailed explanation of the chip transfer method.
[0080] In step S20, please refer to Figure 9 In step S20, the temperature control system device 2 heats the chip transfer substrate 1, causing the groove 10 to be in the second state, such as... Figure 10 As shown; the chip 3 to be transferred is clamped within the groove 10, as... Figure 11 As shown.
[0081] This application does not specifically limit the number of grooves 10; optionally, there can be multiple grooves 10; in this way, multiple chips can be transferred to achieve mass transfer; based on this, in the chip transfer method provided by the above embodiments, the grooves 10 involved can be controlled individually; that is, by individually controlling the state of one or more grooves 10 on the chip transfer substrate 1, the chip to be transferred can be selectively clamped or released to achieve selective chip transfer; the above chip transfer method can easily complete the mass transfer of chips, which not only has high transfer efficiency but also reduces chip production costs.
[0082] In step S30, please combine Figure 9 See S30 in the middle. Figures 12 to 14 Pick up the chip to be transferred 3 and transfer it to the backplane 4.
[0083] In some embodiments, during the transfer of the chip 3 to be transferred, the temperature control system device 2 can continuously heat the chip transfer substrate 1 so that the groove 10 maintains the second state during the transfer of the chip 3 to be transferred; in this way, the chip 3 to be transferred can be prevented from falling off during the transfer process.
[0084] It is understood that this application does not specifically limit the chips to be transferred; in some embodiments, the number of chips to be transferred can be multiple; in this way, multiple chips can be transferred to achieve mass transfer; the above chip transfer method can easily complete the mass transfer of chips, which not only has high transfer efficiency, but also reduces chip production costs.
[0085] Optionally, in some embodiments, the chip transfer method can transfer a portion of the chips to be transferred at a time. Furthermore, after transferring a portion of the chips to be transferred to the surface of the backplane, the chip transfer method can repeat the steps in the chip transfer method provided in the above embodiments until all the chips to be transferred are transferred to the surface of the backplane. That is, after transferring a portion of the chips to be transferred to the surface of the backplane, steps S10 to S40 in the chip transfer method provided in the above embodiments can be repeated until all the chips to be transferred are transferred to the surface of the backplane.
[0086] What should be understood is that, although Figure 9 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 9 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.
[0087] It should also be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A chip transfer substrate, characterized in that, The chip transfer substrate has a groove on its surface. The groove has a first state before being heated and a second state after being heated. The size of the groove in the first state is larger than the size of the chip to be transferred, and the size of the groove in the second state is smaller than the size of the chip to be transferred. The chip transfer substrate includes: A substrate body, wherein an initial groove is provided on the surface of the substrate body; A layer of thermally expandable and contractible material is located at least on the sidewall of the initial groove to form the groove.
2. The chip transfer substrate as described in claim 1, characterized in that, The number of grooves is multiple, and the multiple grooves are arranged in an array on the surface of the chip transfer substrate.
3. The chip transfer substrate as described in claim 1 or 2, characterized in that, The substrate body has a receiving cavity; The chip transfer substrate also includes an inner temperature conductive sheet, which is located inside the receiving cavity and in contact with the substrate body.
4. The chip transfer substrate as described in claim 3, characterized in that, The inner lining temperature conductive sheet has raised strips on the surface adjacent to the groove, and the raised strips are arranged corresponding to the groove.
5. The chip transfer substrate as described in claim 4, characterized in that, The substrate body includes a silicon substrate body, the thermal expansion and contraction material layer includes a metal layer, the inner temperature conduction sheet includes a metal sheet, and the protrusion includes a metal protrusion.
6. A chip transfer device, characterized in that, include: Chip transfer substrate as described in any one of claims 1 to 5; The temperature control system is placed on the surface of the chip transfer substrate to heat or cool the chip transfer substrate when the chip to be transferred is used.
7. The chip transfer apparatus as described in claim 6, characterized in that, The groove is located on one surface of the chip transfer substrate, and when the temperature control system device uses the chip transfer substrate to transfer the chip to be transferred, it is placed on the surface of the chip transfer substrate away from the groove.
8. A chip transfer method, characterized in that, The transfer method is implemented based on the chip transfer apparatus as described in claim 6 or 7; the chip transfer method includes: With the groove in the first state, the chip transfer substrate is placed at the chip to be transferred, and the chip to be transferred is located in the groove; The temperature control system device is used to heat the chip transfer substrate, so that the groove is in a second state to clamp the chip to be transferred located in the groove; Pick up the chip to be transferred and move it to the backplane; The temperature control system is used to cool the chip transfer substrate, and the groove changes from the second state to the first state to release the chip to be transferred, so that the chip to be transferred is transferred to the surface of the backplane.
9. The chip transfer method as described in claim 8, characterized in that, The number of chips to be transferred is multiple; the chip transfer method, after transferring a portion of the chips to be transferred to the surface of the backplane at a time, further includes: Repeat the steps of the transfer method as described in claim 8 until all the chips to be transferred are transferred to the surface of the backplane.
Citation Information
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