Combiner circuits and electronic equipment

By optimizing the topology of the three-way Doherty MMIC amplifiers and improving baseband impedance matching, the problem of insufficient baseband impedance matching in the existing technology is solved, digital predistortion friendliness is improved, and 5G's large bandwidth signal scenarios are adapted.

CN116248057BActive Publication Date: 2025-04-18SUZHOU WATECH ELECTRONICS CO LTD
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Patent Information

Application Number
CN202211625352.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-13
Publication Date
2025-04-18
Estimated Expiration
2042-12-13

AI Technical Summary

Technical Problem

The prior art performs well in RF matching, but fails to effectively consider baseband impedance matching, resulting in challenges in digital predistortion correction of broadband modulated signals.

Method used

By optimizing the topology of the three-way Doherty MMIC amplifier, the baseband capacitance and series resistance are added to improve baseband impedance matching and digital predistortion friendliness.

Benefits of technology

Without affecting RF matching, baseband impedance matching is improved, digital predistortion friendliness is improved, and 5G's large bandwidth signal scenarios are adapted.

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Abstract

The present application provides a combiner circuit and electronic device, wherein the combiner circuit includes a first capacitor module, a first combiner module, and a second combiner module; the first combiner module is used to combine the signal output by the main amplifier with the signal output by the first peak amplifier to obtain a first combined signal; the second combiner module is used to combine the first combined signal with the signal output by the second peak amplifier to obtain a second combined signal. The topology of the conventional three-way Doherty MMIC amplifier is optimized, and the baseband impedance matching is improved without affecting the RF matching, thereby improving its digital pre-distortion friendliness and better adapting to the large bandwidth signal scenario of 5G, thereby solving the problem of how to improve the baseband impedance matching to improve its digital pre-distortion friendliness.
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Description

Technical Field

[0001] The present application relates to the technical field of combiner circuits, and in particular to a combiner circuit and an electronic device. Background Art

[0002] like Figure 1 As shown, a three-way Doherty amplifier includes a main amplifier M and two peak amplifiers (a first peak amplifier P1 and a second peak amplifier P2). In addition, it also includes a dual-section combiner (Q1 and Q2), an output matching network U4, and a phase shift network (U2 and U3). The RF input signal to be amplified is divided into three paths and used for the main amplifier M and the first peak amplifier P1 and the second peak amplifier P2 respectively. The Doherty combiner 2 is used to synthesize the signals amplified by the main amplifier and the peak amplifier at the combining point. The synthesized signal is transmitted to the load RL through an output matching network U4. The phase shift network (U2 and U3) is placed before the first peak amplifier P1 and the second peak amplifier P2 to ensure that the phases of the output signals of the three amplifiers are aligned at the combining point (i.e., the intersection of the second peak amplifier P2, the output matching network U4 and Q2), where U1 is a power divider.

[0003] In MMIC circuit design, especially silicon-based circuits, circuits are usually implemented with lumped components, i.e. inductors L / capacitors C / resistors R, rather than transmission lines. Digital pre-distortion technology is commonly used in 5G scenarios to linearize power amplifiers. The initial signal bandwidth has exceeded 200MHz, and the actual signal bandwidth after digital pre-distortion is usually three times that of the initial signal, which can easily exceed 600MHz. This poses a high challenge to the digital pre-distortion friendliness of the power amplifier. Good digital pre-distortion friendliness requires appropriate baseband impedance matching. The existing solutions can achieve good results in RF, but do not focus on baseband impedance matching, which is not conducive to digital pre-distortion correction of broadband modulated signals. Summary of the invention

[0004] The main purpose of the present application is to provide a combiner circuit and an electronic device to solve the problem of how to improve baseband impedance matching to enhance its digital pre-distortion friendliness.

[0005] According to one aspect of an embodiment of the present invention, a combiner circuit is provided, which includes a first capacitor module, a first combiner module group, and a second combiner module; the first combiner module has a first end and a second end, the first end of the first combiner module group is used to be electrically connected to a main amplifier, the second end of the first combiner module group is electrically connected to the first capacitor module, the second end of the first combiner module group is also used to be electrically connected to a first peak amplifier, and the first combiner module is used to combine a signal output by the main amplifier with a signal output by the first peak amplifier to obtain a first combined signal; the second combiner module has a first end and a second end, the first end of the second combiner module group is electrically connected to the first capacitor module, the first end of the second combiner module group is also used to be electrically connected to the first peak amplifier, the second end of the second combiner module group is used to be electrically connected to the second peak amplifier, and the second combiner module is used to combine the first combined signal with a signal output by the second peak amplifier to obtain a second combined signal.

[0006] Optionally, the first combining module includes a first combining circuit and a first voltage isolation circuit, the first combining circuit having a first end, a second end and a third end, the first end of the first combining circuit serving as the first end of the first combining module, the second end of the first combining circuit serving as the second end of the first combining module, and the third end of the first combining circuit being electrically connected to the first voltage isolation circuit.

[0007] Optionally, the first combining circuit includes a first inductance module, a second inductance module, a third inductance module and a second capacitor module, the first end of the first inductance module serves as the first end of the first combining circuit, the first end of the first inductance module is also electrically connected to the first end of the second capacitor module, the second end of the first inductance module is electrically connected to the first end of the second inductance module and the first end of the third inductance module respectively, the second end of the second inductance module serves as the third end of the first combining circuit, the second end of the third inductance module serves as the second end of the first combining circuit, and the second end of the second capacitor module is grounded.

[0008] Optionally, the first voltage isolation circuit includes a third capacitor module and a fourth capacitor module, the first end of the third capacitor module is electrically connected to the first end of the fourth capacitor module and the third end of the first combining circuit respectively, the first end of the third capacitor module is also used to be electrically connected to a voltage source, and the second end of the third capacitor module and the second end of the fourth capacitor module are grounded respectively.

[0009] Optionally, the first voltage isolation circuit further includes a first resistor module, a first end of the first resistor module is electrically connected to a first end of the third capacitor module, and a second end of the first resistor module is electrically connected to a first end of the fourth capacitor module.

[0010] Optionally, the second combining module includes a second combining circuit and a second voltage isolation circuit, the second combining circuit having a first end, a second end and a third end, the first end of the second combining circuit serves as the first end of the second combining module, the second end of the second combining circuit serves as the second end of the second combining module, and the third end of the second combining circuit is electrically connected to the second voltage isolation circuit.

[0011] Optionally, the second combining circuit includes a fourth inductance module, a fifth inductance module, a sixth inductance module and a fifth capacitor module, the first end of the fourth inductance module serves as the first end of the second combining circuit, the second end of the fourth inductance module is electrically connected to the first end of the fifth inductance module and the first end of the sixth inductance module respectively, the second end of the fifth inductance module serves as the third end of the second combining circuit, the second end of the sixth inductance module serves as the second end of the second combining circuit, the second end of the sixth inductance module is electrically connected to the first end of the fifth capacitor module, and the second end of the fifth capacitor module is grounded.

[0012] Optionally, the second voltage isolation circuit includes a sixth capacitor module and a seventh capacitor module, the first end of the sixth capacitor module is electrically connected to the first end of the seventh capacitor module and the third end of the second combining circuit, respectively, the first end of the sixth capacitor module is also used to be electrically connected to a voltage source, and the second end of the sixth capacitor module and the second end of the seventh capacitor module are grounded, respectively.

[0013] Optionally, the second voltage isolation circuit further includes a second resistor module, a first end of the second resistor module is electrically connected to the first end of the sixth capacitor module, and a second end of the second resistor module is electrically connected to the first end of the seventh capacitor module.

[0014] According to another aspect of an embodiment of the present invention, an electronic device is also provided, comprising any one of the combiner circuits, a main amplifier, a first peak amplifier, and a second peak amplifier, wherein the combiner circuit is electrically connected to the main amplifier, the first peak amplifier, and the second peak amplifier, respectively.

[0015] In an embodiment of the present invention, the topology of a conventional three-way Doherty MMIC amplifier is optimized, and the baseband impedance matching is improved without affecting the RF matching, thereby improving its digital pre-distortion friendliness and better adapting to the large-bandwidth signal scenario of 5G, thereby solving the problem of how to improve the baseband impedance matching to improve its digital pre-distortion friendliness. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 A schematic diagram of a three-way Doherty amplifier of an existing solution is shown;

[0018] Figure 2 A schematic diagram of a combiner circuit according to an embodiment of the present application is shown;

[0019] Figure 3 A schematic diagram showing the process of converting the combiner circuit from the schematic diagram to the combiner circuit of the present application is shown;

[0020] Figure 4 A schematic diagram of the star-angle conversion process is shown.

[0021] The above drawings include the following reference numerals:

[0022] 100, a first combining module; 110, a first combining circuit; 120, a first voltage DC isolation circuit; 200, a second combining module; 210, a second combining circuit; 220, a second voltage DC isolation circuit. DETAILED DESCRIPTION

[0023] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0024] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

[0027] As mentioned in the background technology, the existing solutions can achieve good results in radio frequency, but do not focus on baseband impedance matching, which is not conducive to digital pre-distortion correction of broadband modulated signals. In order to solve the problem of how to improve baseband impedance matching to enhance its digital pre-distortion friendliness, a typical implementation of the present application provides a combiner circuit and electronic device.

[0028] According to an embodiment of the present application, a combiner circuit is provided, such as Figure 2 As shown, the combiner circuit includes a first capacitor module C1, a first combiner module 100 and a second combiner module 200; the first combiner module 100 has a first end and a second end, the first end of the first combiner module 100 is used to be electrically connected to the main amplifier, the second end of the first combiner module 100 is electrically connected to the first capacitor module C1, the second end of the first combiner module 100 is also used to be electrically connected to the first peak amplifier, the first combiner module 100 is used to combine the signal output by the main amplifier with the signal output by the first peak amplifier to obtain a first combined signal; the second combiner module 200 has a first end and a second end, the first end of the second combiner module 200 is electrically connected to the first capacitor module C1, the first end of the second combiner module 200 is also used to be electrically connected to the first peak amplifier, the second end of the second combiner module 200 is used to be electrically connected to the second peak amplifier, the second combiner module 200 is used to combine the first combined signal with the signal output by the second peak amplifier to obtain a second combined signal.

[0029] In the above combiner circuit, the topology of the conventional three-way Doherty MMIC amplifier is optimized to improve the baseband impedance matching without affecting the RF matching, thereby improving its digital pre-distortion friendliness and better adapting to the large-bandwidth signal scenario of 5G, thereby solving the problem of how to improve the baseband impedance matching to improve its digital pre-distortion friendliness.

[0030] Specifically, Figure 3As shown, first, the parallel inductor Lp1 and the parallel capacitor Cp1 are connected to the M node, the parallel inductor Lp1, the parallel inductor Lp2, the parallel capacitor Cp1 and the parallel capacitor Cp2 are connected to the P1 node, and the parallel inductor Lp2 and the parallel capacitor Cp2 are connected to the P2 node. Among them, Lp1 and Cp1, Lp2 and Cp2 are paired in pairs, and all resonate at the center frequency f0. Then, through the star-angle conversion, the two new π-type networks Lp1 / L1 / Lp1 and Lp2 / L2 / Lp2 are converted into two T-type networks Ls_T1 / Lp_T1 / Ls_T1 and Ls_T2 / Lp_T2 / Ls_T2 respectively.

[0031] like Figure 4 As shown, consider a π-type network and a T-type network, which are completely equivalent to each other, both contain 3 nodes X / Y / Z, and 3 elements, whose impedances are represented by ZA / ZB / ZC and Z1 / Z2 / Z3 respectively. The conversion relationship between the elements is as follows:

[0032] Z1=(ZA×ZB) / ((ZA+ZB+ZC));

[0033] Z2 = (ZA × ZC) / ((ZA + ZB + ZC));

[0034] Z3=(ZB×ZC) / ((ZA+ZB+ZC));

[0035] In one embodiment of the present application, Figure 2 As shown, the first combining module 100 includes a first combining circuit 110 and a first voltage DC blocking circuit 120. The first combining circuit 110 has a first end, a second end and a third end. The first end of the first combining circuit 110 serves as the first end of the first combining module 100, the second end of the first combining circuit 110 serves as the second end of the first combining module 100, and the third end of the first combining circuit 110 is electrically connected to the first voltage DC blocking circuit 120. The first combining circuit 110 is used to combine the signal output by the main amplifier with the signal output by the first peak amplifier to obtain a first combined signal, and the first voltage DC blocking circuit 120 is used to prevent the combiner circuit from short-circuiting.

[0036] In one embodiment of the present application, Figure 2As shown, the first combining circuit 110 includes a first inductance module L1, a second inductance module L2, a third inductance module L3 and a second capacitor module C2. The first end of the first inductance module L1 serves as the first end of the first combining circuit 110. The first end of the first inductance module L1 is also electrically connected to the first end of the second capacitor module C2. The second end of the first inductance module L1 is electrically connected to the first end of the second inductance module L2 and the first end of the third inductance module L3 respectively. The second end of the second inductance module L2 serves as the third end of the first combining circuit 110. The second end of the third inductance module L3 serves as the second end of the first combining circuit 110. The second end of the second capacitor module C2 is grounded.

[0037] In one embodiment of the present application, Figure 2 As shown, the first voltage DC isolation circuit 120 includes a third capacitor module C3 and a fourth capacitor module C4, the first end of the third capacitor module C3 is electrically connected to the first end of the fourth capacitor module C4 and the third end of the first combining circuit 110 respectively, the first end of the third capacitor module C3 is also used to be electrically connected to a voltage source, and the second end of the third capacitor module C3 and the second end of the fourth capacitor module C4 are grounded respectively.

[0038] In one embodiment of the present application, Figure 2 As shown, the first voltage isolation circuit 120 further includes a first resistor module R1, a first end of the first resistor module R1 is electrically connected to a first end of the third capacitor module C3, and a second end of the first resistor module R2 is electrically connected to a first end of the fourth capacitor module C4.

[0039] In one embodiment of the present application, Figure 2 As shown, the second combining module 200 includes a second combining circuit 210 and a second voltage DC isolation circuit 220. The second combining circuit 210 has a first end, a second end and a third end. The first end of the second combining circuit 210 serves as the first end of the second combining module 200, the second end of the second combining circuit 210 serves as the second end of the second combining module 200, and the third end of the second combining circuit 210 is electrically connected to the second voltage DC isolation circuit 220. The second combining circuit 210 combines the first combined signal and the signal output by the second peak amplifier to obtain a second combined signal. The second voltage DC isolation circuit 220 is used to prevent the combiner circuit from short-circuiting.

[0040] In one embodiment of the present application, Figure 2As shown, the second combining circuit 210 includes a fourth inductance module L4, a fifth inductance module L5, a sixth inductance module L6 and a fifth capacitor module C5, the first end of the fourth inductance module L4 serves as the first end of the second combining circuit 210, the second end of the fourth inductance module L4 is electrically connected to the first end of the fifth inductance module L5 and the first end of the sixth inductance module L6 respectively, the second end of the fifth inductance module L5 serves as the third end of the second combining circuit 210, the second end of the sixth inductance module L6 serves as the second end of the second combining circuit 210, the second end of the sixth inductance module L6 is electrically connected to the first end of the fifth capacitor module C5, and the second end of the fifth capacitor module C5 is grounded.

[0041] In one embodiment of the present application, Figure 2 As shown, the second voltage DC isolation circuit 220 includes a sixth capacitor module C6 and a seventh capacitor module C7, the first end of the sixth capacitor module C6 is electrically connected to the first end of the seventh capacitor module C7 and the third end of the second combining circuit 210, respectively, the first end of the sixth capacitor module C6 is also used to be electrically connected to a voltage source, and the second end of the sixth capacitor module C6 and the second end of the seventh capacitor module C7 are grounded, respectively.

[0042] In one embodiment of the present application, Figure 2 As shown, the second voltage isolation circuit further includes a second resistor module R2, a first end of the second resistor module R2 is electrically connected to a first end of the sixth capacitor module C6, and a second end of the second resistor module R2 is electrically connected to a first end of the seventh capacitor module C7.

[0043] The corresponding parallel capacitance Cp1 = 0.51 pF and series inductance Lp1 = 7.35 nH, the parallel capacitance Cp2 = 1.53 pF and series inductance Lp2 = 2.45 nH in the equivalent π-type network of the two transmission lines.

[0044] Then, consider the output parasitic capacitance Cdsm=0.65pF of the main amplifier M, the output parasitic capacitance Cdsp1=1.23pF of the first peak amplifier P1, and the output parasitic capacitance Cdsp2=1.30pF of the second peak amplifier P2. On the one hand, because the output parasitic capacitance Cdsm of the M node is greater than Cp1, the capacitance of this node needs to be reduced. On the other hand, because the Cdsp1 / Cdsp2 of the P1 and P2 nodes are both smaller than the node capacitance, the capacitance of this node needs to be increased. Then, the capacitance that needs to be reduced at the M node is 0.14pF, so its corresponding resonant inductance value is 26.745nH. At the same time, the same LC parallel resonant network is also added to the P1 node. For the second section of the transmission line equivalent network, two new LC parallel resonant networks are also added at both ends of the inductor, with an inductance of 5nH and a capacitance of 0.75pF. Afterwards, the parallel capacitances of each node are merged together, and the π-type network is converted into a T-type network respectively. The specific values ​​are as follows: Figure 2 shown.

[0045] Finally, in practical applications, the two parallel inductors and the port connected to GND need to increase the RF capacitor CRF and the baseband capacitor CBB (i.e. Figure 2 C3, C4, C6 and C7 in the baseband capacitor branch can be connected in series with the resistor RBB (i.e. Figure 2 The resistor module in the circuit can be used to further reduce the baseband impedance amplitude. In this way, the inductors can not only play a matching role, but also be used as a drain feeding network.

[0046] According to another aspect of an embodiment of the present invention, an electronic device is also provided, the electronic device comprising any one of the above-mentioned combiner circuits, the main amplifier, the first peak amplifier, and the second peak amplifier, the above-mentioned combiner circuit is electrically connected to the above-mentioned main amplifier, the above-mentioned first peak amplifier, and the above-mentioned second peak amplifier, respectively. The topology of the conventional three-way Doherty MMIC amplifier is optimized, and the baseband impedance matching is improved without affecting the RF matching, thereby improving its digital pre-distortion friendliness, better adapting to the large bandwidth signal scenario of 5G, and thus solving the problem of how to improve the baseband impedance matching to improve its digital pre-distortion friendliness.

[0047] It should be noted that the above electrical connection can be a direct electrical connection or an indirect electrical connection. Direct electrical connection means that two devices are directly connected, and indirect electrical connection means that other devices such as capacitors and resistors are also connected between the connected A and B.

[0048] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0049] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0050] 1) The combiner circuit of the present application optimizes the topology of the conventional three-way Doherty MMIC amplifier, improves the baseband impedance matching without affecting the RF matching, thereby improving its digital pre-distortion friendliness and better adapting to the large-bandwidth signal scenario of 5G, thereby solving the problem of how to improve the baseband impedance matching to improve its digital pre-distortion friendliness.

[0051] 2) The electronic device of the present application optimizes the topology of the conventional three-way Doherty MMIC amplifier, improves the baseband impedance matching without affecting the RF matching, thereby improving its digital pre-distortion friendliness and better adapting to the large-bandwidth signal scenario of 5G, thereby solving the problem of how to improve the baseband impedance matching to improve its digital pre-distortion friendliness.

[0052] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A combiner circuit, characterized in that: include: A first capacitor module; a first combining module, having a first end and a second end, wherein the first end of the first combining module is used to be electrically connected to a main amplifier, the second end of the first combining module is electrically connected to the first capacitor module, the second end of the first combining module is also used to be electrically connected to a first peak amplifier, and the first combining module is used to combine a signal output by the main amplifier with a signal output by the first peak amplifier to obtain a first combined signal; a second combining module, having a first end and a second end, the first end of the second combining module being electrically connected to the first capacitor module, the first end of the second combining module being also used to be electrically connected to the first peak amplifier, the second end of the second combining module being used to be electrically connected to the second peak amplifier, and the second combining module being used to combine the first combined signal and the signal output by the second peak amplifier to obtain a second combined signal; The first combining module includes a first combining circuit and a first voltage DC isolation circuit, the first combining circuit has a first end, a second end and a third end, the first end of the first combining circuit serves as the first end of the first combining module, the second end of the first combining circuit serves as the second end of the first combining module, and the third end of the first combining circuit is electrically connected to the first voltage DC isolation circuit; The first combining circuit includes a first inductance module, a second inductance module, a third inductance module and a second capacitor module, the first end of the first inductance module serves as the first end of the first combining circuit, the first end of the first inductance module is also electrically connected to the first end of the second capacitor module, the second end of the first inductance module is electrically connected to the first end of the second inductance module and the first end of the third inductance module respectively, the second end of the second inductance module serves as the third end of the first combining circuit, the second end of the third inductance module serves as the second end of the first combining circuit, and the second end of the second capacitor module is grounded.

2. The combiner circuit according to claim 1, characterized in that: The first voltage DC isolation circuit includes a third capacitor module and a fourth capacitor module, the first end of the third capacitor module is electrically connected to the first end of the fourth capacitor module and the third end of the first combining circuit respectively, the first end of the third capacitor module is also used to be electrically connected to a voltage source, and the second end of the third capacitor module and the second end of the fourth capacitor module are grounded respectively.

3. The combiner circuit according to claim 2, characterized in that: The first voltage DC isolation circuit further includes a first resistor module, a first end of the first resistor module is electrically connected to a first end of the third capacitor module, and a second end of the first resistor module is electrically connected to a first end of the fourth capacitor module.

4. The combiner circuit according to claim 1, characterized in that: The second combining module includes a second combining circuit and a second voltage isolation circuit, the second combining circuit has a first end, a second end and a third end, the first end of the second combining circuit serves as the first end of the second combining module, the second end of the second combining circuit serves as the second end of the second combining module, and the third end of the second combining circuit is electrically connected to the second voltage isolation circuit.

5. The combiner circuit according to claim 4, characterized in that: The second combining circuit includes a fourth inductance module, a fifth inductance module, a sixth inductance module and a fifth capacitor module, the first end of the fourth inductance module serves as the first end of the second combining circuit, the second end of the fourth inductance module is electrically connected to the first end of the fifth inductance module and the first end of the sixth inductance module respectively, the second end of the fifth inductance module serves as the third end of the second combining circuit, the second end of the sixth inductance module serves as the second end of the second combining circuit, the second end of the sixth inductance module is electrically connected to the first end of the fifth capacitor module, and the second end of the fifth capacitor module is grounded.

6. The combiner circuit according to claim 4, characterized in that: The second voltage isolation circuit includes a sixth capacitor module and a seventh capacitor module, the first end of the sixth capacitor module is electrically connected to the first end of the seventh capacitor module and the third end of the second combining circuit respectively, the first end of the sixth capacitor module is also used to be electrically connected to a voltage source, and the second end of the sixth capacitor module and the second end of the seventh capacitor module are grounded respectively.

7. The combiner circuit according to claim 6, characterized in that: The second voltage isolation circuit further includes a second resistor module, a first end of the second resistor module is electrically connected to a first end of the sixth capacitor module, and a second end of the second resistor module is electrically connected to a first end of the seventh capacitor module.

8. An electronic device, characterized in that: The method comprises a combiner circuit, a main amplifier, a first peak amplifier and a second peak amplifier according to any one of claims 1 to 7, wherein the combiner circuit is electrically connected to the main amplifier, the first peak amplifier and the second peak amplifier respectively.

Citation Information

Patent Citations

  • Multipath Doherty power amplifier and electronic device

    CN114389546A