Method and apparatus for downstream transmission

Abstract

An apparatus for use by an OLT communicatively connected to an ONU includes means for interleaving a first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, where N is an even number; mapping the interleaved bit stream to a 4-level pulse amplitude modulation (PAM4) label sequence according to a predetermined mapping scheme, where a respective PAM4 label includes a least significant bit (LSB) and a most significant bit (MSB) that respectively correspond to bits in the interleaved bit stream; transmitting, to the ONU, a PAM4 symbol sequence generated based on the PAM4 label sequence; wherein bits from a respective codeword of the N codewords are assigned to LSBs of a first subset of labels and MSBs of a second subset of labels, where the first subset of labels and the second subset of labels are determined based on the predetermined interleaving scheme and the predetermined mapping scheme and respectively include labels that are N labels apart in the PAM4 label sequence.

Description

TECHNICAL FIELD

[0001] Various example embodiments relate to downstream communication in optical networks, in particular in passive optical networks. BACKGROUND

[0002] A new 50G PON G.9804 standard has been accepted by the International Telecommunication Union (ITU). This new standard describes in the G.9804.2 standard a generic transport convergence (TC) layer for high speed PON systems, which is intended to be used for future PON technologies. In the G.9804.3 standard, a physical medium dependent (PMD) layer for 50G PON systems is described, where the downstream (DS) line rate is 50G and the upstream (US) line rate is 12.5G or 25G. It relies on the use of on-off keying non-return-to-zero (OOK-NRZ) as modulation format, which consists in transmitting one bit per symbol on the line at a baud rate of about 50G.

[0003] The data rate can be further increased to 100G by using the same 50G baud rate, but using 4-level pulse amplitude modulation (PAM-4) instead of OOK-NRZ symbols. PAM4 symbols encode 2 bits per symbol on the line. This can be achieved by scaling the TC layer of the G.9804.2 standard so that it generates bits at a 100G line rate.

[0004] Higher rate PON channels of 50G and above are expected to suffer from inter-symbol interference (ISI) due to, for example, chromatic dispersion and bandwidth limited reception. ISI can be mitigated using equalization, for example a feed-forward equalizer (FFE) or a decision feedback equalizer (DFE). The application of such equalizers, as well as ISI itself, can cause the noise of the 50G channel to be colored (i.e. frequency selective). This can cause a correlation of the noise experienced by subsequently or nearby received modulation symbols, and thus also a correlated noise / error on the bits transmitted using the subsequently or nearby symbols. These correlated errors cause error bursts, which cause the errors to be more concentrated in specific forward error correction (FEC) codewords compared to the case of an ideal uncorrelated channel. This error concentration causes a degradation of the forward error correction (FEC) code performance, and causes a loss of sensitivity. For 50G PON, the FEC code is a low density parity check (LDPC) code.

[0005] To mitigate the effect of error bursts in the 50G PON channel when using OOK-NRZ symbols, the G.hsp TC layer (G.9804.2) includes a bit-wise block interleaving of 4 FEC codewords.

[0006] In the case of the 100G mode based on PAM4 symbols at the 50G baud rate, the same bit-wise interleaving has an undesirable impact, such as an insufficient penalty compensation of the error bursts. SUMMARY

[0007] One of the aims of embodiments of the present disclosure is to provide a sufficient mitigation of the impact of error bursts when using multi-level PAM instead of OOK-NRZ modulation format, and to maintain good FEC code performance.

[0008] According to a first aspect of the present application, there is provided an apparatus for use by an optical line terminal, OLT, for communication connection to an optical network unit, ONU, the apparatus comprising means for: interleaving a first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, wherein N is an even number; mapping the interleaved bit stream to a sequence of 4-level pulse amplitude modulation, PAM4, labels according to a predetermined mapping scheme, wherein a respective PAM4 label comprises a least significant bit, LSB, and a most significant bit, MSB, respectively corresponding to bits in the interleaved bit stream; transmitting, to the ONU, a sequence of PAM4 symbols generated based on the sequence of PAM4 labels; wherein bits from a respective one of the N codewords are allocated to LSBs of a first subset of labels and to MSBs of a second subset of labels, wherein the first and second subsets of labels are determined based on the predetermined interleaving scheme and the predetermined mapping scheme and comprise labels in the sequence of PAM4 labels that are N labels apart, respectively.

[0009] In one embodiment, the second subset of labels comprises labels of the first subset.

[0010] In one embodiment, the predetermined interleaving scheme indicates an interleaving step size of two bits.

[0011] In another embodiment, the second subset of labels comprises labels that are N / 2 labels apart from labels of the first subset.

[0012] In another embodiment, the predetermined interleaving scheme indicates an interleaving step size of one bit; and indicates that, in the interleaved bit stream, bits from a respective one of the N codewords are interleaved with N and N-2 bits from other codewords.

[0013] In another embodiment, wherein the predetermined interleaving scheme indicates an interleaving step size of one bit; and wherein the predetermined mapping scheme comprises reversing the mapping of the interleaved bit stream to the sequence of PAM4 labels every N / 2 PAM4 labels.

[0014] In one embodiment, the means are further configured for: transmitting, to respective ones of the ONUs, a message indicating at least one of the predetermined mapping scheme used by the OLT or the predetermined interleaving scheme used by the OLT.

[0015] According to a second aspect of the present application, there is provided an apparatus for use by an optical network unit, ONU, connected to an optical line terminal, OLT, the apparatus comprising means for: receiving a sequence of 4-level pulse amplitude modulation, PAM4, symbols from the OLT; for a codeword to be processed, deriving a sequence of bit indicator pairs from the received sequence of PAM4 symbols, a respective pair of the pairs of bit indicators corresponding to a respective symbol of the symbols and comprising a least significant bit, LSB, indicator and a most significant bit, MSB, indicator, the sequence of pairs comprising a first subset of pairs and a second subset of pairs, the first subset and the second subset being determined based on a predetermined de-mapping scheme and a predetermined de-interleaving scheme and comprising pairs corresponding to PAM4 symbols separated by N symbols in the sequence of PAM4 symbols, respectively; determining the codeword based on the LSB indicators of the first subset of pairs and the MSB indicators of the second subset of pairs; wherein the predetermined de-mapping scheme indicates a relationship between bit indicators of a respective pair and a corresponding PAM4 symbol, and the predetermined de-interleaving scheme indicates a de-interleaving step size of k bit indicators interleaved at the OLT and a first number N of codewords, wherein N is an even number.

[0016] In an embodiment, the determining of the codeword is achieved by: de-mapping the sequence of pairs of bit indicators into a stream of bit indicators according to the predetermined de-mapping scheme; extracting a set of bit indicators related to the codeword from the stream of bit indicators according to the predetermined de-interleaving scheme; determining the codeword based on the set of bit indicators related to the codeword.

[0017] In an embodiment, the second subset of pairs comprises pairs of the first subset.

[0018] In another embodiment, the symbols corresponding to the pairs of the second subset are separated by N / 2 symbols from the symbols corresponding to the pairs of the first subset.

[0019] In an embodiment, the predetermined de-interleaving scheme and / or the predetermined de-mapping scheme are pre-configured in the ONU.

[0020] In an embodiment, the means are further configured for determining the predetermined de-interleaving scheme and / or the predetermined de-mapping scheme by: trying a plurality of de-interleaving schemes and / or a plurality of de-mapping schemes pre-configured in the ONU; and / or receiving a message from the OLT indicating at least one of a predetermined mapping scheme used by the OLT or a predetermined interleaving scheme used by the OLT.

[0021] According to a third aspect of the present application, there is provided a method for use by an optical line terminal, OLT, for communicating to an optical network unit, ONU, the method comprising: interleaving a first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, wherein N is an even number; mapping the interleaved bit stream to a sequence of 4-level pulse amplitude modulation, PAM4, labels according to a predetermined mapping scheme, wherein a respective PAM4 label comprises a least significant bit, LSB, and a most significant bit, MSB, corresponding to bits in the interleaved bit stream, respectively; transmitting, to the ONU, a sequence of PAM4 symbols generated based on the sequence of PAM4 labels; wherein bits from a respective one of the N codewords are assigned to LSBs of a first subset of labels and to MSBs of a second subset of labels, wherein the first and second subsets of labels are determined based on the predetermined interleaving scheme and the predetermined mapping scheme and comprise labels in the sequence of PAM4 labels that are N labels apart, respectively.

[0022] According to a fourth aspect of the present application, there is provided a method for use by an optical network unit, ONU, for communicating to an optical line terminal, OLT, the method comprising: receiving, from the OLT, a sequence of 4-level pulse amplitude modulation, PAM4, symbols; for a codeword to be processed, deriving, from the received sequence of PAM4 symbols, a sequence of bit indicator pairs, a respective one of the pairs corresponding to a respective one of the symbols and comprising a least significant bit, LSB, indicator and a most significant bit, MSB, indicator, the sequence of pairs comprising a first subset of pairs and a second subset of pairs, the first and second subsets being determined based on a predetermined de-mapping scheme and a predetermined de-interleaving scheme and comprising pairs corresponding to PAM4 symbols that are N symbols apart in the sequence of PAM4 symbols, respectively; determining the codeword based on the LSB indicators of the first subset of pairs and the MSB indicators of the second subset of pairs; wherein the predetermined de-mapping scheme indicates a relationship between bit indicators of a respective pair and a corresponding PAM4 symbol, and the predetermined de-interleaving scheme indicates a de-interleaving step size of k bit indicators and a first number N of codewords interleaved at the OLT, wherein N is an even number.

[0023] According to example embodiments, the distance between PAM4 labels whose LSB / MSB pairs correspond to bits from the same FEC codeword is the same as the number of codewords interleaved, which provides maximum mitigation of error bursts. At the same time, bits from the same codeword are assigned to both the MSB and LSB of the same or different labels, which ensures good FEC code performance. BRIEF DESCRIPTION OF DRAWINGS

[0024] For a more complete understanding of example embodiments of the present application, reference is now made to the following descriptions taken in connection with the accompanying drawings in which:

[0025] Figure 1 A portion of an exemplary communication network in which examples of the disclosed embodiments can be applied is shown;

[0026] Figure 2 An example structure of a frame according to the prior art is shown;

[0027] Figure 3 An example structure of a frame is shown in Figure 2 example employing PAM4;

[0028] Figure 4 An example structure of a frame according to an example embodiment is shown;

[0029] Figure 5 An example structure of a frame according to another example embodiment is shown;

[0030] Figure 6 An example structure of a frame according to another example embodiment is shown;

[0031] Figure 7 An example embodiment of a suitable computing system for performing one or several steps in various embodiments is shown;

[0032] Figure 8 An example method 800 incorporating aspects of example embodiments is shown; and

[0033] Figure 9 Another example method 900 incorporating aspects of example embodiments is shown.

[0034] The same or similar reference numerals can represent the same or similar components or elements. DETAILED DESCRIPTION

[0035] Example embodiments of the present application are described in detail herein and shown by way of example in the drawings. It should be understood that, while specific embodiments are discussed herein, the scope of the present application is not limited to such embodiments. Rather, it should be understood that the embodiments discussed herein are for illustrative purposes only and that modifications and alternative embodiments can be implemented without departing from the scope of the present application as defined in the claims. The order of method steps is not limited to the specific embodiments and method steps can be performed in other possible orders. Similarly, specific structural and functional details disclosed herein are for the purpose of describing the embodiments. However, the present application described herein can be implemented in many alternative forms and should not be construed as limited to the embodiments set forth herein.

[0036] Figure 1 A portion of an exemplary communications network in which examples of the disclosed embodiments can be applied is shown.

[0037] As Figure 1As shown, in a passive optical network PON 100, a network-side OLT 110 is used to connect to a plurality of ONUs 131, 132,..., 133 on the user side through an optical distribution network (ODN) or fiber plant 120, which includes optical fibers and splitters, but no active components. It will be appreciated by those skilled in the art that the number of ONUs is not limited to the given example. The OLT 110 can be connected to, for example, up to 64 ONUs.

[0038] Most PON technologies, such as G-PON, E-PON and XG(S)-PON, are time-division multiplexing (TDM) PON technologies, in which the fiber medium is shared among different ONUs in time. In addition, there are time- and wavelength-division multiplexing (TWDM) PON technologies, such as the next generation NG-PON2, in which multiple TDM systems of different wavelengths are stacked on the same PON system. The example embodiments are applicable to both TDM and TWDM PON systems.

[0039] Figure 2 An example structure of a frame according to the prior art is shown.

[0040] As Figure 2 shown, after FEC encoding, the FEC codewords include FEC data and parity check. The FEC encoding can be performed according to the manner described in the standard, which will not be explained in detail here. In some example scenarios, the FEC codewords can be further scrambled (e.g., exclusive-ORed with a known sequence) into scrambled codewords, and a scrambled PHY frame is thereby formed.

[0041] In Figure 2 the example shown, the 4 FEC codewords are interleaved bit by bit into an interleaved bit stream. Then, the bits in the interleaved bit stream are mapped into a sequence of NRZ symbols before being transmitted. This block interleaver ensures that bits encoded by the same codeword are transmitted 4 symbols apart. Thus, any burst of up to 4 errors will be distributed over 4 different FEC codewords, resulting in LDPC code performance close to the decoding performance in the uncorrelated error case. Here, interleaving over 4 codewords is needed to compensate for the all-error burst penalty, as interleaving over fewer codewords (e.g., 2 codewords) and thereby placing bits of the same FEC codeword 2 symbols apart is not sufficient for a typical 50G PON channel.

[0042] Figure 3 An example structure of a frame is shown when PAM4 is employed in Figure 2 .

[0043] As Figure 3 shown, the interleaved bit stream is mapped into a PAM4 label sequence before being transmitted, which is used to generate the symbols.

[0044] Since each PAM4 label includes two bits (one LSB and one MSB), the bits from the interleaved bit stream are preferably mapped as PAM4 labels in blocks of two bits. In other words, the first two bits of the interleaved bit stream are mapped as a first label, the second two bits are mapped as a second label, and so on. In one example, consider that the LSBs are mapped first and then the MSBs (although this can be reversed without loss of generality). The bit-wise block interleaving of the 4 codewords now results in a sequence of transmission symbols with the following two properties:

[0045] - The bits of one codeword are transmitted only 2 symbols apart instead of 4 symbols. In other words, the same interleaving as for NRZ results in a reduced impact of error bursts. Thus, the same interleaving will not be sufficient to compensate for the full penalty of error bursts.

[0046] - Each codeword includes either only MSBs or only LSBs. For example, the bits of the codeword marked with the dot pattern are assigned to the LSBs only, while the codeword marked with the diagonal stripes is assigned to the MSBs only. In general, the LSBs are less protected and experience a larger bit error rate (BER) than the MSBs. Thus, a codeword with only LSBs will have a higher codeword error rate than a codeword that includes a mix of MSBs and LSBs. Although the codeword error rate of a codeword with only MSBs will be better, on average, this will result in a degradation of the codeword error rate, and thus a degradation of the sensitivity, compared to when the MSBs and LSBs are mixed in the codeword.

[0047] Figure 4 An example structure of a frame is shown according to an example embodiment.

[0048] According to Figure 4 The example shown, 4 codewords are interleaved according to a predetermined interleaving scheme to obtain an interleaved bit stream. In the following, the first codeword marked with the dot pattern can be referred to as codeword 1, the second codeword marked with diagonal stripes can be referred to as codeword 2, the third codeword marked with horizontal stripes can be referred to as codeword 3, and the fourth codeword marked with alternating vertical lines can be referred to as codeword 4. It will be appreciated by the skilled person that the number of codewords given here is merely an example, and in other embodiments, a first number N of codewords are interleaved according to the predetermined interleaving scheme, where N is an even number. The interleaved codewords can be FEC codewords or scrambled codewords, as described in Figure 2 The detailed description is not repeated here.

[0049] The interleaved bit stream is mapped to a sequence of PAM4 labels according to a predetermined mapping scheme. Each PAM4 label includes an LSB and an MSB. The LSB and the MSB correspond to bits in the interleaved bit stream, respectively.

[0050] Bits from corresponding codewords in the N codewords are assigned to the least significant bit (LSB) of a first label subset and the most significant bit (MSB) of a second label subset. A first label subset and a second label subset are determined for corresponding codewords in the N codewords based on a predetermined interleaving scheme and a predetermined mapping scheme. The first label subset includes labels that are N labels apart in the PAM4 label sequence. The second label subset includes labels that are N labels apart in the PAM4 label sequence.

[0051] Specifically, in Figure 4 In the example shown, for codeword 1, the first subset includes the 1st, 5th, 9th, 13th, and 17th tags in the PAM4 tag sequence, and the second subset also includes the 1st, 5th, 9th, 13th, and 17th tags in the PAM4 tag sequence. Figure 4 In the example shown, the second subset of tags includes the tags of the first subset. There are different ways of configuring the predetermined interleaving scheme and the predetermined mapping scheme such that the second subset of tags can include the tags of the first subset.

[0052] More specifically, in Figure 4 In the illustrated embodiment, the predetermined interleaving scheme indicates an interleaving step size of two bits. For example, the block interleaver can be implemented to interleave four codewords with a step size of two bits. In other words, bits are obtained from codewords in the sequence 1-1-2-2-3-3-4-4-1-1... to form an interleaved bit stream.

[0053] Still refer to Figure 4 In the example shown, the predetermined mapping scheme may indicate a mapping scheme for blocks of two bits, similar to the one for Figure 3 Specifically, Figure 4 In the example shown, the interleaved bit stream is mapped into a PAM4 label sequence by sequentially mapping every two consecutive bits from the interleaved bit stream into a PAM4 label, where bits with earlier bit positions in the interleaved bit stream are assigned to the LSB of the PAM4 label, and bits with later bit positions in the interleaved bit stream are assigned to the MSB of the PAM4 label. For example, the first bit in the interleaved bit stream is mapped to the LSB of the first PAM4 label. The second bit in the interleaved bit stream is mapped to the MSB of the first PAM4 label.

[0054] In other implementations, the mapping can be reversed. For example, of two consecutive bits mapped to the same PAM4 label, the bit with the earlier bit position in the interleaved bit stream can be assigned to the MSB of the PAM4 label, and the bit with the later bit position in the interleaved bit stream can be assigned to the LSB of the PAM4 label.

[0055] Subsequently, before transmission to the ONU (e.g. Figure 1Before the ONUs 131, 132, and 133 in the example, a PAM4 symbol sequence is generated based on the PAM4 label sequence.

[0056] In one example, label Bb (where B is the MSB and b is the LSB) can be converted to a PAM4 signal in the following manner: label 00 is converted to signal level 0, label 01 is converted to signal level 1, label 11 is converted to signal level 2, and label 10 is converted to signal level 3.

[0057] With this approach, two consecutive bits of the same codeword are always mapped to the same PAM4 symbol (i.e., the MSB and LSB of the same PAM4 symbol come from the same FEC codeword), and PAM4 symbols containing bits from the same FEC codeword are spaced four symbols apart. This maintains the same interleaving performance as NRZ (i.e., interleaving N codewords eliminates the effects of error / noise correlations up to N symbols).

[0058] When a PAM4 symbol sequence is received from the OLT 110, the ONU (e.g., Figure 1 Any one of the ONUs 131, 132, and 133 in the ONU 131 derives a sequence of bit indicator pairs from a received PAM4 symbol sequence. Respective pairs in the pairs correspond to corresponding symbols in the symbols and include an LSB indicator and an MSB indicator. The bit indicator can be a value related to the likelihood of a transmitted bit, or a binary value related to the transmitted bit. The pair sequence includes a first subset of pairs and a second subset of pairs. The first subset and the second subset are determined based on a predetermined demapping scheme and a predetermined deinterleaving scheme. The first subset of pairs includes pairs corresponding to PAM4 symbols spaced N symbols apart in the PAM4 symbol sequence, and the second subset of pairs includes pairs corresponding to PAM4 symbols spaced N symbols apart in the PAM4 symbol sequence.

[0059] Specifically, in one example, the ONU can perform hard demapping, i.e., PAM4 symbols are demapped into bit values. In this example, the bit indicator pairs can be considered PAM4 labels, as described above with respect to the OLT. In another embodiment, the ONU can perform soft demapping, i.e., PAM4 symbols are demapped into log-likelihood ratios (LLRs) of the transmitted bits.

[0060] In one example, the ONU may perform complete processing of a PAM4 symbol sequence. The ONU may convert all PAM4 symbols into bit indicator pairs.

[0061] In another example, the ONU can process only part of the codewords. For a respective codeword of the codewords to be processed, the ONU can determine the first subset pair and the second subset pair of bit indicators based on the predetermined de-mapping scheme and the predetermined de-interleaving scheme. For each codeword to be processed, the ONU can convert a portion of the PAM4 symbols into pairs of bit indicators to obtain a sequence of pairs comprising the first subset pair and the second subset pair determined for the codeword.

[0062] After obtaining the sequence of pairs comprising the first subset pair and the second subset pair, the ONU determines the codeword to be processed based on the LSB indicators of the first subset pair and the MSB indicators of the second subset pair.

[0063] The predetermined de-mapping scheme indicates the relationship between the bit indicators of a respective pair and the corresponding PAM4 symbol, and the predetermined de-interleaving scheme indicates the de-interleaving step size of the k bit indicators interleaved at the OLT and the first number N of codewords, wherein N is even. In other words, the predetermined de-mapping scheme indicates how to recover the two bit indicators from a respective one of the received PAM4 symbols. In case of hard de-mapping, the bits can be determined directly based on the relationship of PAM4 levels and PAM4 labels, e.g. as described before. In case of soft de-mapping, the relationship of PAM4 levels and PAM4 labels can be used to compute the likelihood of the relevant bits.

[0064] The first subset pair and the second subset pair comprise pairs corresponding to PAM4 symbols spaced by N symbols in the sequence of PAM4 symbols, respectively. Thus, the distance between the symbols corresponding to the LSB indicators, likewise the distance between the symbols corresponding to the MSB indicators (for recovering the codeword to be processed) is the same as the number of interleaved codewords, which provides maximum mitigation of error bursts. At the same time, the codeword is recovered from both the MSB indicators and the LSB indicators, which ensures good forward error correction code performance.

[0065] In particular, in one embodiment, the determination of the codeword to be processed can be achieved by de-mapping the sequence of pairs of bit indicators into a stream of bit indicators according to the predetermined de-mapping scheme; extracting a set of bit indicators related to the codeword from the stream of bit indicators according to the predetermined de-interleaving scheme; determining the codeword based on the set of bit indicators related to the codeword. It will be appreciated by the skilled person that the extracted set of bit indicators related to the codeword can comprise the LSB indicators of the first subset pair and the MSB indicators of the second subset pair.

[0066] In one example, the ONU can obtain a bit indicator stream that includes bit indicators included in the pairs of the first subset or the second subset, and placeholder values for bit indicators not included in the pairs of the first subset or the second subset. Alternatively, the ONU can obtain a bit indicator stream that includes only bit indicators included in the pairs of the first subset or the second subset, and no values for other bit indicators. In yet another embodiment, the ONU can obtain a bit indicator stream that includes bit indicators for all pairs.

[0067] In one embodiment, the predetermined de-mapping scheme and the predetermined de-interleaving scheme can be pre-configured in the ONU. For example, the predetermined de-mapping scheme and the predetermined de-interleaving scheme can be defined in a standard and supported by both the OLT and the ONU. In another embodiment, the predetermined de-interleaving scheme or the predetermined de-mapping scheme can be determined by trying a plurality of de-interleaving schemes and / or a plurality of de-mapping schemes pre-configured in the ONU. For example, a plurality of different de-mapping schemes and / or de-interleaving schemes can be defined in a standard and pre-configured in the ONU by design through manufacturing. During operation, the ONU can try different de-mapping schemes and / or de-interleaving schemes to detect a known synchronization pattern in the frame, such as the PSync pattern at the beginning of the frame defined for 50G in G.9804.2, to determine the de-mapping and / or de-interleaving scheme that should be used for de-mapping and de-interleaving. In yet another embodiment, the OLT can send a message to the ONU indicating at least one of: the predetermined mapping scheme used by the OLT, or the predetermined interleaving scheme used by the OLT. Accordingly, the ONU can determine the predetermined de-interleaving scheme and / or the predetermined de-mapping scheme based on the message received from the OLT.

[0068] In the following, specific examples will be described with consideration of using hard de-mapping. A “PAM4 tag” can be used as an example of a “bit indicator pair”.

[0069] In particular, in the example shown, the predetermined de-interleaving scheme can indicate a de-interleaving step size of two bits. The predetermined de-mapping scheme can indicate de-mapping to two bits, for example using a LSB-first de-mapping. Based on the predetermined de-mapping scheme and the predetermined de-interleaving scheme, the ONU can determine the first subset and the second subset of codewords 1 to each include the 1st, 5th, 9th, 13th, and 17th tags in the PAM4 tag sequence. Those skilled in the art will appreciate that there are other possible configurations of the predetermined de-mapping scheme and the predetermined de-interleaving scheme that can result in the second subset of tags including the tags of the first subset. For example, in one example, the predetermined de-mapping scheme can indicate de-mapping to two bits using a MSB-first de-mapping. Figure 4 In the example shown, the predetermined de-interleaving scheme can indicate a de-interleaving step size of two bits. The predetermined de-mapping scheme can indicate de-mapping to two bits, for example using a LSB-first de-mapping. Based on the predetermined de-mapping scheme and the predetermined de-interleaving scheme, the ONU can determine the first subset and the second subset of codewords 1 to each include the 1st, 5th, 9th, 13th, and 17th tags in the PAM4 tag sequence. Those skilled in the art will appreciate that there are other possible configurations of the predetermined de-mapping scheme and the predetermined de-interleaving scheme that can result in the second subset of tags including the tags of the first subset. For example, in one example, the predetermined de-mapping scheme can indicate de-mapping to two bits using a MSB-first de-mapping.

[0070] In case the ONU needs to perform full de-interleaving, the interleaved bit stream can be de-interleaved into N codewords.

[0071] In case the ONU does not need to perform full de-interleaving, the ONU can retrieve the LSBs from the first subset of labels and the MSBs from the second subset of labels, and thereby form at least one codeword, e.g. a codeword for the ONU itself.

[0072] In the above embodiments, the first subset of labels and the second subset of labels are identical. However, in other examples, the first subset can be different from the second subset. The skilled person will appreciate that the shortest distance in positions between the labels of the first subset and the labels of the second subset corresponding to the same codeword can vary from 0 to N / 2 labels. In the following, an embodiment will be described in which the second subset of labels comprises labels that are spaced by N / 2 labels from the labels of the first subset.

[0073] Figure 5 An example structure of a frame according to another example embodiment is shown.

[0074] In Figure 5 , features similar to those described in the previous figures will not be repeated. In particular, in Figure 5 the example shown, the second subset of labels comprises labels that are spaced by 2 labels from the labels of the first subset. For example, for codeword 1, the first subset of labels to which the bits from codeword 1 are assigned to their LSBs comprises the 1st, 5th, 9th, 13th and 17th labels of the PAM4 label sequence, while the second subset of labels to which the bits from codeword 1 are assigned to their MSBs comprises the 3rd, 7th, 11th, 15th and 19th labels of the PAM4 label sequence.

[0075] In Figure 5 the embodiment shown, the predetermined interleaving scheme indicates that the first number N of codewords are interleaved in steps of one bit, and indicates that in the interleaved bit stream, the bits from a respective one of the N codewords are alternately spaced by N and N-2 bits from other codewords.

[0076] For example, in Figure 5 , the bits from codeword 1 are interleaved into bit positions 1, 6, 9, 14, 17,... of the interleaved bit stream. The first and second bits from codeword 1 are spaced by 4 bits from other codewords (i.e. bits from codewords 2, 3, 4 and 2) therebetween. The second and third bits from codeword 1 are spaced by 2 bits from other codewords (i.e. bits from codewords 3 and 4) therebetween. The third and fourth bits from codeword 1 are again spaced by 4 bits from other codewords therebetween, and so on.

[0077] The skilled person will understand that there are different ways of configuring the predetermined de-mapping scheme and the predetermined de-interleaving scheme, which can result in bits of a respective codeword among the N codewords being interleaved with bits from other codewords by an alternating interval of N and N-2.

[0078] In particular, for example, the first number N of codewords can be grouped into N / 2 groups of two adjacent codewords. Each group is interleaved into a sequence of blocks, each block comprising two consecutive bits in the interleaved bit stream. The sequence of bits of the first and second codeword from the respective group can be switched in every second block of its corresponding blocks of the interleaved bit stream.

[0079] For example, in Figure 5 the first group can comprise codeword 1 and codeword 2, and the second group can comprise codeword 3 and codeword 4. The blocks of bits corresponding to the first group can comprise the bits in bit positions 1, 2, 5, 6, 9, 10,... in the interleaved bit stream. The blocks of bits corresponding to the second group can comprise the bits in bit positions 3, 4, 7, 8, 11, 12,... in the interleaved bit stream.

[0080] In particular, the interleaver can be implemented as a block interleaver, which for the first four bits is equivalent to the bit-wise interleaver described with respect to Figure 2 and Figure 3 However, bits 5 and 6 are switched, where bit 5 is from codeword 2 and bit 6 is from codeword 1. Likewise, bits 7 and 8 are also switched, where bit 7 is from codeword 4 and bit 8 is from codeword 3. In other words, the bits are taken from the codewords in the following sequence: 1-2-3-4-2-1-4-3-1-2-...

[0081] In the example shown in Figure 5 the predetermined mapping scheme can indicate a mapping scheme similar to the one described with respect to Figure 3 and Figure 4 Thus, the blocks of bits corresponding to the respective groups are mapped to respective PAM4 labels. For example, the blocks of bits corresponding to the first group can be mapped to the 1st, 3rd, 5th,... label in the sequence of PAM4 labels, and the blocks of bits corresponding to the second group can be mapped to the 2nd, 4th, 6th,... label in the sequence of PAM4 labels.

[0082] With this modified interleaver, and the described mapping to PAM4 symbols, the bits of a single codeword are mapped to the LSBs in symbols that are 4 symbols apart, and likewise the MSBs in symbols that are also 4 symbols apart. The MSB and LSB from the same codeword are 2 symbols apart. In other words, this implementation has the same properties as Figure 4The previous implementation has similar features, but now the LSBs and MSBs are not in the same PAM4 symbol, but in PAM4 symbols as far apart as possible (i.e., each MSB of a code word is in a middle symbol between 2 PAM4 symbols that include the LSB of that code word). Thus, this interleaving is expected to further improve performance due to less correlation between the MSBs and LSBs in a code word.

[0083] Similar to the above with respect to Figure 4 The PAM4 tag sequence is converted to a PAM symbol sequence and transmitted to the ONU, similar to the above with respect to

[0084] Upon receiving the PAM4 symbol sequence from the OLT 110, the ONU performs similar operations as described above with respect to Figure 4 to recover at least one code word.

[0085] In particular, in the embodiment shown in Figure 5 the symbols corresponding to pairs of the second subset are spaced N / 2 symbols apart from the symbols corresponding to pairs of the first subset.

[0086] More specifically, the predetermined de-interleaving scheme can indicate an interleaving step of one bit, and indicate that in the interleaved bit stream, the bits that are alternately spaced N and N-2 bits apart are de-interleaved into respective code words in N code words. In the example shown in Figure 5 the predetermined de-mapping scheme can indicate LSB-first de-mapping to two bits. In another example, the predetermined de-mapping scheme can indicate MSB-first de-mapping to two bits.

[0087] In the example shown in Figure 5 based on the predetermined de-mapping scheme and the predetermined de-interleaving scheme, the ONU (e.g., any one of the ONUs 131, 132, 133 in Figure 1 ) determines the first subset to include the 1st, 5th, 9th, 13th, 17th,... tags in the PAM4 tag sequence, and determines the second subset to include the 3rd, 7th, 11th, 15th, 19th,... tags in the PAM4 tag sequence. In one example, the predetermined de-mapping can indicate LSB-first de-mapping to two bits. Then, the LSBs of the first subset of tags and the MSBs of the second subset of tags are de-mapped to the 1st, 6th, 9th, 14th, 17th,... bit positions in the interleaved bit stream.

[0088] Here, in Figure 5In the example shown, the bits in the 1st bit position, 6th bit position, 9th bit position, 14th bit position, 17th bit position,... in the interleaved bit stream are de-interleaved into codeword 1. Additionally or alternatively, the bits in the 2nd bit position, 5th bit position, 10th bit position, 13th bit position, 18th bit position,... in the interleaved bit stream are de-interleaved into codeword 2, and so on.

[0089] Figure 6 An example structure of a frame is shown in accordance with another example embodiment.

[0090] In Figure 6 , features similar to those described in previous figures will not be repeated. In this embodiment, the second subset of labels further comprises labels that are 2 labels apart from the labels of the first subset, similar to the embodiment shown in Figure 5 .

[0091] In particular, in the example shown in Figure 6 , the predetermined interleaving scheme indicates that the first number N of codewords are interleaved in steps of one bit, and indicates that the predetermined mapping scheme comprises reversing the mapping of the interleaved bit stream to PAM4 labels every N / 2 PAM4 labels.

[0092] More specifically, a bit-wise block interleaver as described with respect to Figure 2 and Figure 3 may be implemented. Although the mapping from the interleaved bit stream to the sequence of PAM4 labels is different from the mapping described in previous figures. As shown in Figure 6 , the LSBs are mapped first to the first two PAM4 labels, while the MSBs are mapped first to the third and fourth PAM4 labels that follow. For the fifth and sixth PAM4 labels, the LSBs are mapped first again. The thicker arrows are used to indicate that the mapping is reversed for the third and fourth PAM4 labels. The mapping is reversed every 2 PAM4 labels.

[0093] This interleaving and modified mapping results in the same PAM4 symbols as in Figure 5 , and thus has the same advantages.

[0094] Similar to the above with respect to Figure 4 , the sequence of PAM4 labels is converted to a sequence of PAM symbols and transmitted to the ONU.

[0095] Upon receiving the sequence of PAM4 symbols from the OLT 110, the ONU (e.g., any one of the ONUs 131, 132, 133 in Figure 1 performs similar operations as described with respect to Figure 4 and Figure 5 to recover the at least one codeword.

[0096] In particular, similar to the embodiments described above with respect to Figure 5 the first subset can be determined to include the 1st, 5th, 9th, 13th, 17th,... tags in the PAM4 tag sequence and the second subset can be determined to include the 3rd, 7th, 11th, 15th, 19th,... tags in the PAM4 tag sequence.

[0097] In particular, similar to the embodiments described above with respect to Figure 6 the predetermined de-mapping scheme can indicate that the de-mapping of PAM4 tags to the interleaved bit stream is inverted every 2 PAM4 tags.

[0098] For example, in the case of Figure 6 the first two PAM4 tags are de-mapped, where the LSB is de-mapped first. The third and fourth PAM4 tags are de-mapped, where the MSB is de-mapped first. The fifth and sixth PAM4 tags are de-mapped, where again, the LSB is de-mapped first, and so on.

[0099] With further reference to the embodiments described above with respect to Figure 6 the predetermined de-interleaving scheme indicates a de-interleaving step size of one bit. For example, a block de-interleaver can be implemented at the ONU. After de-mapping the PAM4 tag sequence into the interleaved bit stream according to the predetermined de-mapping scheme, the interleaved bit stream is de-interleaved bit-wise. Similar to the embodiments described above with respect to Figure 4 and Figure 5 in case the ONU needs to perform a full de-interleaving, the interleaved bit stream can be de-interleaved into N codewords. In case the ONU does not need to perform a full de-interleaving, the ONU can retrieve the LSBs from the first tag subset and the MSBs from the second tag subset and form at least one codeword therefrom, e.g. a codeword for the ONU itself.

[0100] Although not claimed in the claims, a person skilled in the art can also adjust the interleaving and mapping scheme for scenarios in which multi-level PAM symbols, e.g. PAM8 symbols, are used instead of PAM4 symbols, such that bits from the same codeword are assigned to log2M subsets of PAM-M tags, wherein for a respective subset, bits are assigned to bit positions having the same significance in the tags, and wherein the tags of a respective subset are spaced apart by N tags in the PAM-M sequence, wherein N is the same as the number of codewords being interleaved.

[0101] Various embodiments can be applied to time-division multiplexing, TDM, PON technologies such as Gigabit PON, G-PON, Ethernet PON, E-PON, 10-Gigabit Symmetric PON, XGS-PON, and faster PONs. In addition, the proposed technology can also be applied to time- and wavelength-division multiplexing, TWDM, PON technologies, in which TDM systems of different wavelengths are stacked on the same PON system. Then, one or more wavelengths in the TWDM PON system operate according to the present disclosure.

[0102] Figure 7A computing system 700 is shown, comprising at least one processor; and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to operate. The computing system 700 can generally be formed as a suitable general purpose computer and includes a bus 710, a processor 702, a local memory 704, one or more optional input interface(s) 714, one or more optional output interface(s) 716, a communication interface 712, a storage element interface 706, and one or more storage elements 708. The bus 710 can include one or more conductors that permit communication among the components of the computing system 700. The processor 702 can include any type of conventional processor or microprocessor, including a central processing unit (CPU) for interpreting and executing programming instructions. The local memory 704 can include a random access memory (RAM) or another type of dynamic storage device, for storing information and instructions to be executed by the processor 702, and / or a read only memory (ROM) or another type of static storage device for storing static information and instructions that are used by the processor 702. The input interface(s) 714 can include one or more conventional mechanisms that permit an operator or user to input information to the computing device 700, such as a keyboard 720, a mouse 730, a pen, voice recognition and / or biometric mechanisms, a camera, etc. The output interface(s) 716 can include one or more conventional mechanisms that output information to the operator or user, such as a display 740, etc. The communication interface 712 can include any transceiver-like mechanism, for example one or more Ethernet interfaces, that enable the computing system 700 to communicate with other devices and / or systems, for example with other computing devices 750, 760, 770. The communication interface 712 of the computing system 700 can connect to such another computing system through a local-area network (LAN) or a wide-area network (WAN), for example the Internet. The storage element interface 706 can include a storage interface, for example a serial advanced technology attachment (SATA) interface or a small computer system interface (SCSI), that is used to connect the bus 710 to one or more storage elements 708, such as one or more local disks, for example SATA disk drives, and to control the reading and writing of data to and / or from these storage elements 706. Although the storage element(s) 708 above are described as local disks, generally any other suitable computer readable media can be used, such as removable disks, optical storage media (such as CDs or DVDs), ROM disks, solid state drives, flash memory cards, etc. The computing system 700 can be embodied as or can include an application specific integrated circuit (ASIC), an application specific instruction set processor (ASIP), a field programmable gate array (FPGA), a digital signal processor (DSP) based system, or a combination thereof.

[0103] According to various embodiments of the present disclosure, such a computing system 700 is suitable for performing various steps performed by an OLT in an optical network. According to the present disclosure, the communication interface 712 allows an OLT according to various embodiments of the present disclosure to exchange control information and data with ONUs in a PON. According to example embodiments, the processor can run computer program code that allows the OLT to control the construction of frames. More specifically, the program code performs the following steps: interleaving a first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, where N is an even number; mapping the interleaved bit stream into a sequence of 4-level pulse amplitude modulation, PAM4, labels according to a predetermined mapping scheme, where a respective PAM4 label comprises a least significant bit, LSB, and a most significant bit, MSB, respectively corresponding to a bit in the interleaved bit stream; transmitting, to an ONU, a sequence of PAM4 symbols generated based on the sequence of PAM4 labels; where bits from a respective codeword of the N codewords are assigned to LSBs of a first subset of labels and MSBs of a second subset of labels, where the first and second subsets of labels are determined based on the predetermined interleaving scheme and the predetermined mapping scheme and comprise labels in the sequence of PAM4 labels that are N labels apart, respectively.

[0104] Further, according to various embodiments of the present disclosure, the computing system 700 is also suitable for performing various steps performed by an ONU in an optical network. According to the present disclosure, the communication interface 712 allows an ONU according to various embodiments of the present disclosure to receive control information and exchange data with an OLT in a PON. According to example embodiments, the processor can run computer program code that allows the ONU to control the decoding of received frames. More specifically, the program code performs the following steps: receiving, from an OLT, a sequence of 4-level pulse amplitude modulation, PAM4, symbols; for a codeword to be processed, deriving, from the received sequence of PAM4 symbols, a sequence of bit indicators pairs, a respective pair of the pairs corresponding to a respective symbol of the sequence of symbols and comprising a least significant bit, LSB, indicator and a most significant bit, MSB, indicator, the sequence of pairs comprising a first subset of pairs and a second subset of pairs, the first and second subsets being determined based on a predetermined de-mapping scheme and a predetermined de-interleaving scheme and comprising pairs corresponding to PAM4 symbols that are N symbols apart in the sequence of PAM4 symbols, respectively; determining the codeword based on the LSB indicators of the first subset of pairs and the MSB indicators of the second subset of pairs; where the predetermined de-mapping scheme indicates a relationship between bit indicators of a respective pair and a corresponding PAM4 symbol, and the predetermined de-interleaving scheme indicates a de-interleaving step size of k bit indicators and a first number N of codewords at the OLT, where N is an even number.

[0105] Figure 8 An example method 800 is shown in connection with aspects of example embodiments.

[0106] In step S810, the OLT implementing aspects of the example embodiments interleaves the first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, where N is an even number.

[0107] In step S820, the OLT maps the interleaved bit stream to a sequence of PAM4 labels according to a predetermined mapping scheme, where a respective PAM4 label comprises a LSB and a MSB. The LSB and the MSB correspond to bits in the interleaved bit stream, respectively.

[0108] In cooperation of the interleaving in step S810 and the mapping in step S820, bits from a respective codeword of the N codewords are allocated to the LSBs of a first subset of labels and the MSBs of a second subset of labels, where the first subset of labels and the second subset of labels are determined based on the predetermined interleaving scheme and the predetermined mapping scheme. The first subset of labels comprises labels in the sequence of PAM4 labels that are N labels apart, and the second subset of labels comprises labels in the sequence of PAM4 labels that are N labels apart.

[0109] In step S830, the OLT transmits, to the ONU, a sequence of PAM4 symbols generated based on the sequence of PAM4 labels.

[0110] Figure 9 Another example method 900 incorporating aspects of the example embodiments is shown.

[0111] In step S910, the ONU (e.g., any one of the ONUs 131, 132, or 133 in Figure 1 receives, from an OLT (e.g., the OLT 110 in Figure 1 ), a sequence of PAM4 symbols.

[0112] In step S920, for a codeword to be processed, the ONU derives, from the received sequence of PAM4 symbols, a sequence of bit indicator pairs. A respective pair in the sequence of pairs corresponds to a respective symbol in the sequence of symbols, and comprises a LSB indicator and a MSB indicator. The sequence of pairs comprises a first subset of pairs and a second subset of pairs. The first subset and the second subset are determined based on a predetermined de-mapping scheme and a predetermined de-interleaving scheme. The first subset of pairs comprises pairs corresponding to PAM4 symbols in the sequence of PAM4 symbols that are N symbols apart. The second subset of pairs comprises pairs corresponding to PAM4 symbols in the sequence of PAM4 symbols that are N symbols apart.

[0113] In step S930, the ONU determines the above-mentioned codeword based on the LSB indicators of the first subset of pairs and the MSB indicators of the second subset of pairs.

[0114] The predetermined de-mapping scheme indicates a relationship between the corresponding pair of bit indicators and the corresponding PAM4 symbol, and the predetermined de-interleaving scheme indicates a de-interleaving step size of the k bit indicators and the first number N of codewords that are interleaved at the OLT, where N is an even number.

[0115] This embodiment should be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than the foregoing description, so that all changes falling within the scope of the claims should be included therein.

[0116] If desired, the different functions discussed herein can be performed in different orders and / or concurrently with each other. Furthermore, if desired, one or more of the above-described functions can be optional or can be combined.

[0117] It will be clear to a person skilled in the art that, as technology advances, the inventive concept can be implemented in various ways. The application and its embodiments are not limited to the examples described above but can vary within the scope of the claims.

[0118] Furthermore, the reader is to understand that the word "comprising" or "comprise", or "comprises" does not exclude other elements or steps than the ones listed in the claims, the word "a" or "an" preceding a plural reference to an element does not exclude a plurality of those elements, and the singular reference to an element does not exclude a plurality of those elements unless the context clearly dictates otherwise. Any reference signs in the claims should not be construed as limiting the scope of the claims. The terms "first", "second" and the like as used in the description and the claims do not imply an order or sequence unless otherwise stated. Similarly, the terms "top", "bottom", "over", "under", and the like in the description and the claims are used for descriptive purposes and not necessarily a positional relationship between the described elements. It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting.

Claims

1. An apparatus for use with an optical line terminal (OLT) (110) communicatively connected to an optical network unit (ONU), comprising components for performing the following operations: - interleaving a first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, where N is an even number; - mapping the interleaved bit stream into a 4-level pulse amplitude modulation (PAM4) label sequence according to a predetermined mapping scheme, wherein each PAM4 label includes a least significant bit (LSB) and a most significant bit (MSB) corresponding to a bit in the interleaved bit stream, respectively; - transmitting a PAM4 symbol sequence generated based on the PAM4 label sequence to the ONU; in, Bits from corresponding codewords in the N codewords are assigned to LSBs of a first tag subset and MSBs of a second tag subset, wherein the first tag subset and the second tag subset are determined based on the predetermined interleaving scheme and the predetermined mapping scheme and respectively include tags that are N tags apart in the PAM4 tag sequence. 2 . The apparatus of claim 1 , wherein the second subset of tags includes tags in the first subset of tags. The apparatus according to claim 2 , wherein the predetermined interleaving scheme indicates an interleaving step size of two bits. 4 . The apparatus of claim 1 , wherein the second subset of tags includes tags that are separated from tags in the first subset of tags by N / 2 tags.

5. The apparatus according to claim 4, wherein the predetermined interleaving scheme indicates an interleaving step size of one bit; and indicating that, in the interleaved bit stream, adjacent bits from corresponding codewords among the N codewords are alternately separated from each other by N and N-2 bits from other codewords.

6. The apparatus according to claim 4, wherein the predetermined interleaving scheme indicates an interleaving step size of one bit; And among them, The predetermined mapping scheme includes inverting the mapping of the interleaved bit stream to PAM4 labels every N / 2 PAM4 labels.

7. The apparatus according to any one of claims 1 to 6, wherein the component is further configured to: - sending a message to a corresponding one of the ONUs indicating at least one of the following: the predetermined mapping scheme used by the OLT, or The predetermined interleaving scheme used by the OLT.

8. An apparatus for use with an optical network unit (ONU) communicatively connected to an optical line terminal (OLT) (110), comprising means for performing the following operations: - receiving a 4-level pulse amplitude modulation (PAM4) symbol sequence from the OLT (110); - for a codeword to be processed, deriving a sequence of bit indicator pairs from the received PAM4 symbol sequence, respective pairs of the bit indicator pairs corresponding to respective symbols in the symbols and comprising a least significant bit (LSB) indicator and a most significant bit (MSB) indicator, the sequence of bit indicator pairs comprising a first subset of pairs and a second subset of pairs, the first subset of pairs and the second subset of pairs being determined based on a predetermined demapping scheme and a predetermined deinterleaving scheme and respectively comprising pairs corresponding to PAM4 symbols spaced N apart in the PAM4 symbol sequence; - determining the codeword based on the LSB indicator of the first subset of pairs and the MSB indicator of the second subset of pairs; in, The predetermined demapping scheme indicates a relationship between bit indicators of respective pairs of the bit indicator pairs and corresponding PAM4 symbols, and the predetermined deinterleaving scheme indicates a deinterleaving step size of k bit indicators and a first number N codewords interleaved at the OLT, where N is an even number.

9. The apparatus of claim 8, wherein determining the codeword comprises: - demapping the bit indicator pair sequence into a bit indicator stream according to the predetermined demapping scheme; - extracting a set of bit indicators associated with the codeword from the bit indicator stream according to the predetermined deinterleaving scheme; - determining the codeword based on the set of bit indicators associated with the codeword.

10. The apparatus of claim 8 or 9, wherein the second subset of pairs comprises pairs from the first subset of pairs.

11. The apparatus of claim 8 or 9, wherein the symbols corresponding to the pairs in the second subset of pairs are separated from the symbols corresponding to the pairs in the first subset of pairs by N / 2 symbols.

12. The apparatus according to claim 8 or 9, wherein the predetermined deinterleaving scheme and / or the predetermined demapping scheme is preconfigured in the ONU.

13. The apparatus according to claim 8 or 9, wherein the component is further configured to: -Determining the predetermined deinterleaving scheme and / or the predetermined demapping scheme by: - trying multiple deinterleaving schemes and / or multiple demapping schemes pre-configured in the ONU; and / or - receiving a message from the OLT indicating at least one of: a predetermined mapping scheme used by the OLT, or a predetermined interleaving scheme used by the OLT.

14. A method for use by an optical line terminal (OLT) (110) communicatively connected to an optical network unit (ONU), comprising: - interleaving a first number N of codewords according to a predetermined interleaving scheme to obtain an interleaved bit stream, where N is an even number; - mapping the interleaved bit stream into a 4-level pulse amplitude modulation (PAM4) label sequence according to a predetermined mapping scheme, wherein each PAM4 label includes a least significant bit (LSB) and a most significant bit (MSB) corresponding to a bit in the interleaved bit stream, respectively; - transmitting a PAM4 symbol sequence generated based on the PAM4 label sequence to the ONU; The bits of corresponding codewords from the N codewords are assigned to the LSBs of a first label subset and the MSBs of a second label subset, wherein the first label subset and the second label subset are determined based on the predetermined interleaving scheme and the predetermined mapping scheme and respectively include labels that are N labels apart in the PAM4 label sequence.

15. A method for use in an optical network unit (ONU) communicatively connected to an optical line terminal (OLT) (110), comprising: - receiving a 4-level pulse amplitude modulation (PAM4) symbol sequence from the OLT (110); - for a codeword to be processed, deriving a sequence of bit indicator pairs from the received PAM4 symbol sequence, respective pairs of the bit indicator pairs corresponding to respective symbols in the symbols and comprising a least significant bit (LSB) indicator and a most significant bit (MSB) indicator, the sequence of bit indicator pairs comprising a first subset of pairs and a second subset of pairs, the first subset of pairs and the second subset of pairs being determined based on a predetermined demapping scheme and a predetermined deinterleaving scheme and respectively comprising pairs corresponding to PAM4 symbols spaced N apart in the PAM4 symbol sequence; - determining the codeword based on the LSB indicator of the first subset of pairs and the MSB indicator of the second subset of pairs; The predetermined demapping scheme indicates a relationship between the bit indicators of corresponding pairs of the bit indicator pairs and the corresponding PAM4 symbols, and the predetermined deinterleaving scheme indicates a deinterleaving step size of k bit indicators and a first number N codewords interleaved at the OLT, where N is an even number.

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