Code block segmentation dependent on LDPC base matrix selection

Abstract

An apparatus and method are described. The apparatus includes a transceiver and a processor that attaches transport block (TB) level (CRC) bits to a TB, selects an LDPC base graph (BG) based on a code rate (CR) and a TB size of the TB including the TB level CRC bits, determines a number of code blocks (CBs) for segmenting the TB including the TB level CRC bits according to the selected LDPC BG, determines a single CB size for each CB based on the number of CBs, segments the TB including the TB level CRC bits into the CBs based on the number of CBs and the CB size, pads a last CB of the CBs in the segmented TB with zero values, attaches CB level CRC bits to each of the CBs in the segmented TB, encodes each of the CBs in the segmented TB using the selected LDPC base graph, and transmits the encoded CBs.

Description

[0001] This application is a divisional application of Chinese Patent Application No. 201880009815.2, filed on January 31, 2018, entitled “Code block segmentation dependent on LDPC base matrix selection”, the contents of which are incorporated herein by reference.

[0002] Cross-reference to related applications

[0003] This application claims the rights of the following applications: U.S. Provisional Application No. 62 / 454,623, filed February 3, 2017; U.S. Provisional Application No. 62 / 475,126, filed March 22, 2017; U.S. Provisional Application No. 62 / 500,897, filed May 3, 2017; U.S. Provisional Application No. 62 / 519,671, filed June 14, 2017; U.S. Provisional Application No. 62 / 543,033, filed August 9, 2017; U.S. Provisional Application No. 62 / 556,079, filed September 8, 2017; and U.S. Provisional Application No. 62 / 565,716, filed September 29, 2017; the contents of which are incorporated herein by reference. Summary of the Invention

[0004] The invention describes an apparatus and a method. The apparatus includes a transceiver and a processor that attaches transport block (TB) level CRC bits to a TB, selects an LDPC base graph (BG) based on a code rate (CR) and the size of the TB containing TB level CRC bits, determines the number of code blocks (CBs) for segmenting the TB containing TB level CRC bits according to the selected LDPC BG, determines the size of each CB based on the number of CBs, segments the TB containing TB level CRC bits into CBs based on the number of CBs and the CB size, fills the last TB of multiple CBs in a segmented TB with zeros, attaches CB level CRC bits to each CB in the segmented TB, encodes each CB into the segmented TB using the selected LDPC base graph, and transmits the encoded CBs. Attached Figure Description

[0005] A more detailed description can be obtained from the following specific embodiments given by way of example in conjunction with the accompanying drawings, wherein the same reference numerals in the drawings indicate the same parts, and wherein:

[0006] Figure 1A This is a system diagram illustrating an exemplary communication system that can implement one or more embodiments disclosed;

[0007] Figure 1B This illustrates a method according to one embodiment. Figure 1AThe system diagram shown illustrates an example wireless transmit / receive unit (WTRU) used internally within a communication system.

[0008] Figure 1C This illustrates a method according to one embodiment. Figure 1A The diagram shows an example radio access network (RAN) and an example core network (CN) used within the communication system.

[0009] Figure 1D This illustrates a method according to one embodiment. Figure 1A The system diagram shown illustrates another example of a RAN and another example of a CN used internally in the communication system.

[0010] Figure 2 This is a flowchart illustrating an example method for data channel coding and signal transmission in Long Term Evolution (LTE);

[0011] Figure 3 This is a diagram of the illustrated protomatrix;

[0012] Figure 4A This is a flowchart illustrating a transport block (TB) processing method for a data channel using quasi-cyclic LDPC (QC-LDPC) codes;

[0013] Figure 4B This is a flowchart illustrating another TB processing method for a data channel using QC-LDPC codes;

[0014] Figure 5 This is an example of code block (CB) generation processing that is equivalent to dividing a TB containing a TB-level cyclic redundancy check (CRC);

[0015] Figure 6 This is an example of CB generation processing that is equivalent to dividing TB into TB-level CRCs;

[0016] Figure 7 This is an example of CB generation processing that adapts to the supported information block size by equally dividing TBs containing TB-level CRCs.

[0017] Figure 8 It is a diagram of four coverage areas defined according to the code rate (CR) and information bit size that can or cannot be supported by the basic graphic 1 and the basic graphic 2;

[0018] Figure 9 It provides a performance comparison graph between base pattern 1 and base pattern 2 with a CR of 1 / 3, where base pattern 1 has fewer padding bits than base pattern 2;

[0019] Figure 10It provides a graph comparing the performance of base pattern 1 and base pattern 2 with a CR of 2 / 3, where base pattern 1 has fewer padding bits than base pattern 2;

[0020] Figure 11 It provides a performance comparison chart between base pattern 1 and base pattern 2 with a CR of 1 / 3. Base pattern 1 is selected with 160 padding bits, and base pattern 2 is selected with two segments and zero padding bits.

[0021] Figure 12 This is a diagram of a double-loop buffer used for rate matching and Hybrid Automatic Repeat Request (HARQ).

[0022] Figure 13 This is a diagram illustrating an example bit selection method that uses multiple circular buffers;

[0023] Figure 14 It is a diagram of a structured LDPC base graph used to support LDCP codes in a range of rates (minimum rate, maximum rate) used with multiple cyclic buffers.

[0024] Figure 15 This is an illustration of the basic diagram used in conjunction with a single circular buffer;

[0025] Figure 16 It shows four redundancy versions (RV)(N) of the scheme with the corresponding RV start points evenly distributed in the buffer, the scheme with the RV start points evenly distributed on the odd and even bits, and the scheme with the RV start points evenly distributed on P2 odd and even bits. maxRV =4) is an example of a fixed starting point;

[0026] Figure 17 This is a flowchart illustrating the LDPC encoding process using interleaving;

[0027] Figure 18A This is a flowchart illustrating an example TB processing method for a data channel using CQ-LDPC codes with block group (CBG) level CRC;

[0028] Figure 18B This is a flowchart illustrating another TB processing method for a data channel using a QC-LDPC code with CBG-level CRC;

[0029] Figure 19 This is a diagram illustrating an example of a two-level CBG;

[0030] Figure 20This is a flowchart illustrating a method for selecting a prototype graph matrix for a specific WTRU on an eNB, wherein the eNB has WTRU category information;

[0031] Figure 21 This is a flowchart illustrating another method for selecting a prototype graph matrix for a specific WTRU on an eNB, wherein the eNB has WTRU capability information;

[0032] Figure 22 This is a signal diagram illustrating the signal transmission for bit-based CBG indication and associated ACK / NACK feedback;

[0033] Figure 23 This is a signal diagram illustrating the actual number of CBGs and the associated ACK / NACK feedback.

[0034] Figure 24A , 24B Figures 24C and 24D are illustrations of CBG-level ACK / NACK feedback and retransmissions assisted by TB-level ACK / NACK.

[0035] Figure 25A , 25B 25C and 25D are based on Figure 24A , 24B The illustration shows another example of TB-level ACK / NACK auxiliary CBG-level ACK / NACK feedback and retransmission, as shown in the examples of 24C and 24D.

[0036] Figure 26 It is a signal diagram for an example message exchange processing with WTRU capability and supported decoding algorithms;

[0037] Figure 27 This is an illustration of a symbol-level row-column interleaver; and

[0038] Figure 28 This is a diagram illustrating an instance of a symbol-level row-column interleaver that uses retransmission scrambling. Detailed Implementation

[0039] Figure 1AThis is an illustration of an exemplary communication system 100 that can implement one or more of the disclosed embodiments. The communication system 100 can be a multiple access system providing voice, data, video, messaging, broadcasting, and other content to multiple wireless users. The communication system 100 enables multiple wireless users to access such content by sharing system resources, including wireless bandwidth. For example, the communication system 100 can use one or more channel access methods, such as Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), Orthogonal FDMA (OFDMA), Single Carrier FDMA (SC-FDMA), Zero-Tail Unique Word DFT Extended OFDM (ZT UW DTS-sOFDM), Unique Word OFDM (UW-OFDM), Resource Block Filtering OFDM, and Filter Bank Multicarrier (FBMC), etc.

[0040] like Figure 1A As shown, the communication system 100 may include wireless transmit / receive units (WTRUs) 102a, 102b, 102c, 102d, RAN 104 / 113, CN 106 / 115, public switched telephone network (PSTN) 108, Internet 110, and other networks 112. However, it should be understood that the disclosed embodiments contemplate any number of WTRUs, base stations, networks, and / or network components. Each WTRU 102a, 102b, 102c, 102d may be any type of device configured to operate and / or communicate in a wireless environment. For example, any WTRU 102a, 102b, 102c, or 102d may be referred to as a “station” and / or “STA”, and may be configured to transmit and / or receive wireless signals. It may include user equipment (UE), mobile stations, fixed or mobile subscriber units, subscription-based units, pagers, cellular phones, personal digital assistants (PDAs), smartphones, laptops, netbooks, personal computers, wireless sensors, hotspots or Mi-Fi devices, Internet of Things (IoT) devices, watches or other wearable devices, head-mounted displays (HMDs), vehicles, drones, medical devices and applications (e.g., remote surgery), industrial devices and applications (e.g., robots and / or other wireless devices operating in industrial and / or automated processing chain environments), consumer electronics devices, and devices operating on commercial and / or industrial wireless networks, etc. WTRU 102a, 102b, 102c, or 102d may be interchangeably referred to as UE.

[0041] The communication system 100 may also include base stations 114a and / or 114b. Each base station 114a, 114b may be any type of device configured to enable its access to one or more communication networks (e.g., CN106 / 115, Internet 110, and / or other networks 112) by wirelessly interfacing with at least one of WTRUs 102a, 102b, 102c, 102d. For example, base stations 114a, 114b may be base transceiver stations (BTS), node B, e-node B, home node B, home e-node B, gNB, NR node B, site controller, access point (AP), and wireless routers, etc. Although each base station 114a, 114b is described as a single component, it should be understood that base stations 114a, 114b may include any number of interconnected base stations and / or network components.

[0042] Base station 114a may be part of RAN / 104 / 113, and the RAN may also include other base stations and / or network components (not shown), such as base station controllers (BSCs), radio network controllers (RNCs), relay nodes, etc. Base station 114a and / or base station 114b may be configured to transmit and / or receive radio signals on one or more carrier frequencies called cells (not shown). These frequencies may be in licensed spectrum, unlicensed spectrum, or a combination of licensed and unlicensed spectrum. A cell may provide radio service coverage for a specific geographic area that is relatively fixed or may change over time. A cell may be further divided into cell sectors. For example, a cell associated with base station 114a may be divided into three sectors. Thus, in one embodiment, base station 114a may include three transceivers, that is, each transceiver corresponds to one sector of the cell. In one embodiment, base station 114a may use multiple-input multiple-output (MIMO) technology and may use multiple transceivers for each sector of the cell. For example, by using beamforming, signals can be transmitted and / or received in a desired spatial direction.

[0043] Base stations 114a and 114b can communicate with one or more of WTRUs 102a, 102b, 102c, and 102d via air interface 116, wherein the air interface can be any suitable wireless communication link (e.g., radio frequency (RF), microwave, centimeter wave, millimeter wave, infrared (IR), ultraviolet (UV), visible light, etc.). Air interface 116 can be established using any suitable radio access technology (RAT).

[0044] More specifically, as described above, the communication system 100 can be a multiple access system and can use one or more channel access schemes, such as CDMA, TDMA, FDMA, OFDMA, and SC-FDMA, etc. For example, base station 114a in RAN 104 / 113 and WTRUs 102a, 102b, and 102c can implement a certain radio technology, such as Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access (UTRA), wherein the technology can use Wideband CDMA (WCDMA) to establish air interfaces 115 / 116 / 117. WCDMA may include communication protocols such as High-Speed ​​Packet Access (HSPA) and / or Evolved HSPA (HSPA+). HSPA may include High-Speed ​​Downlink (DL) Packet Access (HSDPA) and / or High-Speed ​​UL Packet Access (HSUPA).

[0045] In one embodiment, base station 114a and WTRUs 102a, 102b, 102c may use some kind of radio technology, such as evolved UMTS terrestrial radio access (E-UTRA), wherein the technology may use Long Term Evolution (LTE) and / or Advanced LTE (LTE-A) and / or Advanced LTA Pro (LTE-A Pro) to establish air interface 116.

[0046] In one embodiment, base station 114a and WTRUs 102a, 102b, 102c may implement a certain radio technology, such as NR radio access, wherein the radio technology may use a novel radio (NR) to establish air interface 116.

[0047] In one embodiment, base station 114a and WTRUs 102a, 102b, and 102c can implement multiple radio access technologies. For example, base station 114a and WTRUs 102a, 102b, and 102c can jointly implement LTE radio access and NR radio access (e.g., using the dual connectivity (DC) principle). Therefore, the air interface used by WTRUs 102a, 102b, and 102c can be characterized by multiple types of radio access technologies and / or transmissions sent to / from multiple types of base stations (e.g., eNBs and gNBs).

[0048] In other embodiments, base station 114a and WTRUs 102a, 102b, 102c may implement the following radio technologies, such as IEEE 802.11 (i.e., WiFi), IEEE 802.16 (Global Microwave Access Interoperability (WiMAX)), CDMA2000, CDMA2000 1X, CDMA2000 EV-DO, Provisional Standard 2000 (IS-2000), Provisional Standard 95 (IS-95), Provisional Standard 856 (IS-856), Global System for Mobile Communications (GSM), Enhanced Data Rate for GSM Evolution (EDGE), and GSM EDGE (GERAN), etc.

[0049] Figure 1A Base station 114b can be a wireless router, home node B, home e node B, or access point, and can use any suitable RAT to facilitate wireless connectivity in a local area, such as a business premises, residence, vehicle, campus, industrial facility, air corridor (e.g., for use by drones), and road, etc. In one embodiment, base station 114b and WTRUs 102c, 102d can establish a WLAN by implementing a radio technology such as IEEE 802.11. In one embodiment, base station 114b and WTRUs 102c, 102d can establish a Wireless Personal Area Network (WPAN) by implementing a radio technology such as IEEE 802.15. In yet another embodiment, base station 114b and WTRUs 102c, 102d can establish a picocell or femtocell by using a cellular-based RAT (e.g., WCDMA, CDMA2000, GSM, LTE, LTE-A, LTE-A Pro, NR, etc.). Figure 1A As shown, base station 114b can be directly connected to the Internet 110. Therefore, base station 114b does not need to access the Internet 110 via CN 106 / 115.

[0050] RAN 104 / 113 can communicate with CN 106 / 15, where CN can be any type of network configured to provide voice, data, application, and / or Voice over Internet Protocol (VoIP) services to one or more WTRUs 102a, 102b, 102c, 102d. This data can have different Quality of Service (QoS) requirements, such as different throughput requirements, latency requirements, fault tolerance requirements, reliability requirements, data throughput requirements, and mobility requirements, etc. CN 106 / 115 can provide call control, billing services, location-based services, prepaid calling, Internet connectivity, video distribution, etc., and / or can perform advanced security functions such as user authentication. Although in Figure 1AWhile not shown, it should be understood that RAN104 / 113 and / or CN 106 / 115 can communicate directly or indirectly with other RANs that use the same RAT or a different RAT as RAN 104 / 113. For example, in addition to connecting to RAN 104 / 113 which uses NR radio technology, CN 106 / 115 can also communicate with other RANs (not shown) that use GSM, UMTS, CDMA 2000, WiMAX, E-UTRA, or WiFi radio technologies.

[0051] CN 106 / 115 may also act as a gateway for WTRU 102a, 102b, 102c, 102d to access PSTN 108, the Internet 110, and / or other networks 112. PSTN 108 may include a circuit-switched telephone network providing Simple Old-Style Telephone Service (POTS). The Internet 110 may include a global network of interconnected computer equipment systems using common communication protocols, such as Transmission Control Protocol (TCP), User Datagram Protocol (UDP), and / or Internet Protocol (IP) from the TCP / IP Internet Protocol suite. Network 112 may include wired and / or wireless communication networks owned and / or operated by other service providers. For example, network 112 may include another CN connected to one or more RANs, wherein the one or more RANs may use the same RAT or a different RAT as RAN 104 / 113.

[0052] Some or all of the WTRUs 102a, 102b, 102c, and 102d in the communication system 100 may include multi-mode capability (e.g., WTRUs 102a, 102b, 102c, and 102d may include multiple transceivers communicating with different wireless networks on different wireless links). For example... Figure 1A The WTRU 102c shown can be configured to communicate with base station 114a using cellular-based radio technology, and with base station 114b using IEEE 802 radio technology.

[0053] Figure 1B This is a system diagram illustrating an example of WTRU 102. (See diagram below.) Figure 1B As shown, WTRU 102 may include a processor 118, a transceiver 120, a transmit / receive unit 122, a speaker / microphone 124, a numeric keypad 126, a display / touchpad 128, non-removable memory 130, removable memory 132, a power supply 134, a Global Positioning System (GPS) chipset 136, and / or other peripheral devices 138. It should be understood that, while remaining consistent with the embodiments, WTRU 102 may also include any sub-combination of the foregoing components.

[0054] Processor 118 can be a general-purpose processor, a special-purpose processor, a conventional processor, a digital signal processor (DSP), multiple microprocessors, one or more microprocessors associated with a DSP core, a controller, a microcontroller, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) circuit, any other type of integrated circuit (IC), and a state machine, etc. Processor 118 can perform signal encoding, data processing, power control, input / output processing, and / or any other function that enables WTRU 102 to operate in a wireless environment. Processor 118 can be coupled to transceiver 120, and transceiver 120 can be coupled to transmitting / receiving unit 122. Although Figure 1B While the processor 118 and transceiver 120 are described as separate components, it should be understood that the processor 118 and transceiver 120 can also be integrated into a single electronic component or chip.

[0055] Transmit / receive component 122 may be configured to transmit or receive signals to or from a base station (e.g., base station 114a) via air interface 116. For example, in one embodiment, transmit / receive component 122 may be an antenna configured to transmit and / or receive RF signals. As an example, in another embodiment, transmit / receive component 122 may be an emitter / detector configured to transmit and / or receive IR, UV, or visible light signals. In yet another embodiment, transmit / receive component 122 may be configured to transmit and / or receive RF and optical signals. It should be understood that transmit / receive component 122 may be configured to transmit and / or receive any combination of wireless signals.

[0056] Although Figure 1B While the transmit / receive component 122 is described as a single component, the WTRU 102 may include any number of transmit / receive components 122. More specifically, the WTRU 102 may use MIMO technology. Thus, in one embodiment, the WTRU 102 may include two or more transmit / receive components 122 (e.g., multiple antennas) that transmit and receive radio signals via the air interface 116.

[0057] Transceiver 120 can be configured to modulate signals to be transmitted by transmitter / receiver 122 and demodulate signals received by transmitter / receiver 122. As described above, WTRU 102 can have multimode capability. Therefore, transceiver 120 can include multiple transceivers that allow WTRU 102 to communicate using various RATs such as NR and IEEE 802.11.

[0058] The processor 118 of WTRU 102 can be coupled to a speaker / microphone 124, a numeric keypad 126, and / or a display / touchpad 128 (e.g., a liquid crystal display (LCD) unit or an organic light-emitting diode (OLED) display unit), and can receive user input data from these components. The processor 118 can also output user data to the speaker / microphone 124, the numeric keypad 126, and / or the display / touchpad 128. Furthermore, the processor 118 can access and store information from any suitable memory, such as non-removable memory 130 and / or removable memory 132. Non-removable memory 130 can include random access memory (RAM), read-only memory (ROM), a hard disk, or any other type of memory storage device. Removable memory 132 can include a subscriber identity module (SIM) card, a memory stick, a secure digital card (SD card), etc. In other embodiments, processor 118 may access information from and store data in memories that are not actually located in WTRU 102, such as those memories located in a server or home computer (not shown).

[0059] The processor 118 can receive power from the power supply 134 and can be configured to distribute and / or control power for other components in the WTRU 102. The power supply 134 can be any suitable device for powering the WTRU 102. For example, the power supply 134 may include one or more dry cell battery packs (such as nickel-cadmium (Ni-Cd), nickel-zinc (Ni-Zn), nickel-metal hydride (NiMH), lithium-ion (Li-ion), etc.), solar cells, fuel cells, etc.

[0060] The processor 118 may also be coupled to a GPS chipset 136, which may be configured to provide location information (e.g., longitude and latitude) related to the current location of the WTRU 102. As a supplement or replacement to the information from the GPS chipset 136, the WTRU 102 may receive location information from base stations (e.g., base stations 114a, 114b) via the air interface 116, and / or determine its location based on signal timing received from two or more nearby base stations. It should be understood that, while remaining consistent with the embodiments, the WTRU 102 may acquire location information using any suitable positioning method.

[0061] The processor 118 can also be coupled to other peripheral devices 138, which may include one or more software and / or hardware modules providing additional features, functions, and / or wired or wireless connectivity. For example, peripheral devices 138 may include accelerometers, electronic compasses, satellite transceivers, digital cameras (for photos and / or video), Universal Serial Bus (USB) ports, vibration devices, television transceivers, hands-free headsets, etc. Modules, FM radio units, digital music players, media players, video game console modules, internet browsers, virtual reality and / or augmented reality (VR / AR) devices, and activity trackers, etc. Peripheral devices 138 may include one or more sensors, which may be one or more of the following: gyroscopes, accelerometers, Hall effect sensors, magnetometers, orientation sensors, proximity sensors, temperature sensors, time sensors, geolocation sensors, altimeters, light sensors, touch sensors, magnetometers, barometers, gesture sensors, biometric sensors, and / or humidity sensors.

[0062] WTRU 102 may include a full-duplex wireless device, wherein the reception or transmission of some or all signals (e.g., associated with specific subframes for UL (e.g., for transmission) and downlink (e.g., for reception)) may be concurrent and / or simultaneous for the wireless device. The full-duplex wireless device may include an interface management unit 139 that reduces and / or substantially eliminates self-interference by means of hardware (e.g., choke coils) or by means of a processor (e.g., a separate processor (not shown) or by means of processor 118). In one embodiment, WTRU 102 may include a half-duplex wireless device, wherein the transmission and reception of some or all signals (e.g., associated with specific subframes for UL (e.g., for transmission) and downlink (e.g., for reception) may be concurrent and / or simultaneous for the wireless device.

[0063] Figure 1C This is a system diagram illustrating RAN 104 and CN 106 according to one embodiment. As described above, RAN 104 can communicate with WTRUs 102a, 102b, and 102c using E-UTRA radio technology on air interface 116. Furthermore, RAN 104 can also communicate with CN 106.

[0064] RAN 104 may include eNodeBs 160a, 160b, and 160c; however, it should be understood that RAN 104 may include any number of eNodeBs while remaining consistent with the embodiments. Each eNodeB 160a, 160b, and 160c may include one or more transceivers communicating with WTRUs 102a, 102b, and 102c on air interface 116. In one embodiment, eNodeBs 160a, 160b, and 160c may implement MIMO technology. Thus, for example, eNodeB 160a may use multiple antennas to transmit radio signals to and / or receive radio signals from WTRU 102a.

[0065] Each eNodeB 160a, 160b, and 160c can be associated with a specific cell (not shown) and can be configured to handle radio resource management decisions, handover decisions, user scheduling in UL and / or DL, etc. For example... Figure 1C As shown, nodes B160a, 160b, and 160c can communicate with each other via the X2 interface.

[0066] Figure 1C The CN 106 shown may include a Mobility Management Gateway (MME) 162, a Serving Gateway (SGW) 164, and a Packet Data Network (PDN) Gateway (or PGW) 166. While each of the foregoing components is described as part of the CN 106, it should be understood that any of these components may be owned and / or operated by an entity other than the CN operator.

[0067] MME 162 can connect to each eNode-B 160a, 160b, and 160c in RAN 104 via the S1 interface and can act as a control node. For example, MME 162 can be responsible for authenticating users of WTRUs 102a, 102b, and 102c, performing bearer activation / deactivation processes, and selecting a specific serving gateway during the initial attach process of WTRUs 102a, 102b, and 102c, etc. MME 162 can also provide control plane functionality for handover between RAN 104 and other RANs (not shown) using other radio technologies (such as GSM or / or WCDMA).

[0068] The SGW 164 can connect to each eNode-B 160a, 160b, and 160c in RAN 104 via the S1 interface. The SGW 164 typically routes and forwards user data packets to / from WTRUs 102a, 102b, and 102c. Furthermore, the SGW 164 can perform other functions, such as anchoring the user plane during handover between eNBs, triggering paging processes when DL data is available to WTRUs 102a, 102b, and 102c, and managing and storing the context of WTRUs 102a, 102b, and 102c, etc.

[0069] SGW 164 can be connected to PGW 146, which can provide packet-switched network (e.g., Internet 110) access for WTRUs 102a, 102b, and 102c to facilitate communication between WTRUs 102a, 102b, and 102c and IP-enabled devices.

[0070] CN 106 can facilitate communication with other networks. For example, CN 106 can provide circuit-switched network (e.g., PSTN 108) access for WTRUs 102a, 102b, and 102c to facilitate communication between WTRUs 102a, 102b, and 102c and conventional landline communication equipment. For example, CN 106 may include or communicate with an IP gateway (e.g., an IP Multimedia Subsystem (IMS) server), and the IP gateway may act as an interface between CN 106 and PSTN 108. Furthermore, CN 106 can provide WTRUs 102a, 102b, and 102c with access to other networks 112, which may include other wired and / or wireless networks owned and / or operated by other service providers.

[0071] Although Figure 1A-1D The WTRU is described as a wireless terminal; however, it should be understood that in some typical embodiments, such a terminal may use a wired communication interface (e.g., temporary or permanent) with the communication network.

[0072] In a typical embodiment, the other network 112 may be a WLAN.

[0073] A WLAN employing an Infrastructure Basic Services Set (BSS) model may have an Access Point (AP) for the BSS and one or more Stations (STAs) associated with the AP. The AP may access or interface with a Distributed System (DS) or other types of wired / wireless networks that send traffic into and / or out of the BSS. Traffic originating outside the BSS and destined for a STA can be delivered to the STA via the AP. Traffic originating from a STA and destined for a destination outside the BSS can be sent to the AP for delivery to the appropriate destination. Traffic between STAs within the BSS can be sent via the AP, for example, where the source STA can send traffic to the AP and the AP can deliver traffic to the destination STA. Traffic between STAs within the BSS may be considered and / or referred to as point-to-point traffic. Point-to-point traffic can be sent between the source and destination STAs (e.g., directly therebetween) using Direct Link Establishment (DLS). In some typical embodiments, the DLS may use 802.11e DLS or 802.11z Tunneled DLS (TDLS). For example, a WLAN using the Standalone BSS (IBSS) mode does not have an access point (AP) and is located within the IBSS or the STAs using the IBSS (e.g., all STAs) can communicate directly with each other. Here, the IBSS communication mode is sometimes referred to as a "self-organizing" communication mode.

[0074] When operating in 802.11ac infrastructure mode or a similar mode, the AP can transmit beacons on a fixed channel (e.g., the primary channel). The primary channel can have a fixed width (e.g., a 20 MHz bandwidth) or a width dynamically set via signaling. The primary channel can be the operating channel of the BSS and can be used by STAs to establish connections with the AP. In some typical embodiments, carrier-sense multiple access with collision avoidance (CSMA / CA) can be implemented (e.g., in an 802.11 system). For CSMA / CA, STAs, including the AP (e.g., each STA), can sense the primary channel. If a particular STA senses / detects and / or determines that the primary channel is busy, that particular STA can fall back. In a given BSS, at any given time, there will be one STA (e.g., only one station) transmitting.

[0075] High-throughput (HT) STAs can communicate using a 40MHz wide channel (e.g., by combining a 20MHz wide main channel with adjacent or non-adjacent 20MHz wide channels to form a 40MHz wide channel).

[0076] Very High Throughput (VHT) STAs can support channels with widths of 20MHz, 40MHz, 80MHz, and / or 160MHz. 40MHz and / or 80MHz channels can be formed by combining consecutive 20MHz channels. A 160MHz channel can be formed by combining eight consecutive 20MHz channels or by combining two non-consecutive 80MHz channels (this combination is referred to as an 80+80 configuration). For the 80+80 configuration, after channel coding, data is transmitted and passed through a segmented parser that splits the data into two streams. Inverse Fast Fourier Transform (IFFT) processing and time-domain processing can be performed individually on each stream. The streams can be mapped onto two 80MHz channels, and the data can be transmitted by the STA performing the transmission. On the receiver of the STA performing the reception, the above operations for the 80+80 configuration can be reversed, and the combined data can be sent to the Media Access Control (MAC).

[0077] 802.11af and 802.11ah support sub-1 GHz operating modes. Compared to 802.11n and 802.11ac, the channel operating bandwidth and carrier used in 802.11af and 802.11ah are reduced. 802.11af supports 5 MHz, 10 MHz, and 20 MHz bandwidths in the TV white space (TVWS) spectrum, while 802.11ah supports 1 MHz, 2 MHz, 4 MHz, 8 MHz, and 16 MHz bandwidths using non-TVWS spectrum. According to a typical embodiment, 802.11ah can support instrument-type control / machine-type communication (e.g., MTC devices in macro coverage areas). The MTC may have certain capabilities, such as limited capabilities including support (e.g., only support) certain and / or limited bandwidths. The MTC device may include a battery with a battery life exceeding a threshold (for example, thus maintaining a long battery life).

[0078] For WLAN systems that can support multiple channels and channel bandwidths (e.g., 802.11n, 802.11ac, 802.11af, and 802.11ah), the WLAN system includes a channel that can be designated as the primary channel. The bandwidth of the primary channel can be equal to the maximum common operating bandwidth supported by all STAs in the BSS. The bandwidth of the primary channel can be set and / or limited by a particular STA, which is derived from all STAs operating in the BSS that support the minimum bandwidth operating mode. In the example of 802.11ah, even if the AP and other STAs in the BSS support 2MHz, 4MHz, 8MHz, 16MHz, and / or other channel bandwidth operating modes, the width of the primary channel can be 1MHz for STAs that support (e.g., only support) the 1MHz mode (e.g., MTC type devices). Carrier sensing and / or Network Allocation Vector (NAV) settings can depend on the status of the primary channel. If the primary channel is busy (e.g., because an STA (which only supports the 1MHz operating mode) is transmitting to the AP), then the entire available band can be considered busy even if most of the band remains open and available.

[0079] In the United States, the available frequency band for 802.11ah is 902MHz to 928MHz. In South Korea, the available frequency band is 917.5MHz to 923.5MHz. In Japan, the available frequency band is 916.5MHz to 927.5MHz. Depending on the country code, the total bandwidth available for 802.11ah is 6MHz to 26MHz.

[0080] Figure 1D This is a system diagram illustrating RAN 113 and CN 115 according to one embodiment. As described above, RAN 113 can communicate with WTRUs 102a, 102b, and 102c using NR radio technology on air interface 116. RAN 113 can also communicate with CN 115.

[0081] RAN 113 may include gNBs 180a, 180b, and 180c; however, it should be understood that RAN 113 may include any number of gNBs while remaining consistent with the embodiments. Each gNB 180a, 180b, and 180c may include one or more transceivers for communicating with WTRUs 102a, 102b, and 102c via air interface 116. In one embodiment, gNBs 180a, 180b, and 180c may implement MIMO technology. For example, gNBs 180a, 180b, and 180c may use beamforming to transmit and / or receive signals to and / or from gNBs 180a, 180b, and 180c. Thus, for example, gNB 180a may use multiple antennas to transmit radio signals to and receive radio signals from WTRU 102a. In one embodiment, gNBs 180a, 180b, and 180c may implement carrier aggregation technology. For example, gNB 180a can transmit multiple component carriers to WTRU 102a (not shown). A subset of these component carriers may be in unlicensed spectrum, while the remaining component carriers may be in licensed spectrum. In one embodiment, gNBs 180a, 180b, and 180c may implement Cooperative Multipoint (CoMP) technology. For example, WTRU 102a can receive cooperative transmissions from gNB 180a and gNB 180b (and / or gNB 180c).

[0082] WTRUs 102a, 102b, and 102c can communicate with gNBs 180a, 180b, and 180c using transmissions associated with scalable parameter configurations. For example, the OFDM symbol spacing and / or OFDM subcarrier spacing can be different for different transmissions, different cells, and / or different portions of the radio transmission spectrum. WTRUs 102a, 102b, and 102c can communicate with gNBs 180a, 180b, and 180c using subframes or transmission time intervals (TTIs) of different or scalable lengths (e.g., containing different numbers of OFDM symbols and / or varying absolute durations).

[0083] gNBs 180a, 180b, and 180c can be configured to communicate with WTRUs 102a, 102b, and 102c in standalone and / or non-standalone configurations. In standalone configuration, WTRUs 102a, 102b, and 102c can communicate with gNBs 180a, 180b, and 180c without accessing other RANs (e.g., eNodeBs 160a, 160b, and 160c). In standalone configuration, WTRUs 102a, 102b, and 102c can use one or more of gNBs 180a, 180b, and 180c as mobile anchors. In standalone configuration, WTRUs 102a, 102b, and 102c can use signals in unlicensed frequency bands to communicate with gNBs 180a, 180b, and 180c. In a non-standalone configuration, WTRUs 102a, 102b, and 102c communicate / connect with gNBs 180a, 180b, and 180c simultaneously with other RANs (e.g., eNodeBs 160a, 160b, and 160c). For example, WTRUs 102a, 102b, and 102c can communicate substantially simultaneously with one or more gNBs 180a, 180b, and 180c, as well as one or more eNodeBs 160a, 160b, and 160c, by implementing DC principles. In a non-standalone configuration, eNodeBs 160a, 160b, and 160c can act as mobile anchors for WTRUs 102a, 102b, and 102c, and gNBs 180a, 180b, and 180c can provide additional coverage and / or throughput to service WTRUs 102a, 102b, and 102c.

[0084] Each gNB 180a, 180b, and 180c can be associated with a specific cell (not shown) and can be configured to handle radio resource management decisions, handover decisions, user scheduling in UL and / or DL, support network slicing, implement dual connectivity, implement interoperability processing between NR and E-UTRA, route user plane data to User Plane Functions (UPF) 184a and 184b, and route control plane information to Access and Mobility Management Functions (AMF) 182a and 182b, etc. Figure 1D As shown, gNB 180a, 180b, and 180c can communicate with each other via the Xn interface.

[0085] Figure 1DThe CN 115 shown may include at least one AMF 182a, 182b, at least one UPF 184a, 184b, at least one Session Management Function (SMF) 183a, 183b, and may include Data Network (DN) 185a, 185b. While each of the foregoing components is described as part of CN 115, it should be understood that any of these components may be owned and / or operated by entities other than CN operators.

[0086] AMF 182a and 182b can connect to one or more gNBs 180a, 180b, and 180c in RAN 113 via the N2 interface and can act as control nodes. For example, AMF 182a and 182b can be responsible for authenticating users of WTRU 102a, 102b, and 102c, supporting network slicing (e.g., handling different PDU sessions with different needs), selecting specific SMF 183a and 183b, managing registration areas, terminating NAS signaling, and mobility management, etc. AMF 182a and 182b can use network slicing to customize the CN support provided to WTRU 102a, 102b, and 102c based on the service types used by WTRU 102a, 102b, and 102c. As an example, different network slices can be established for different use cases, such as services relying on Ultra Reliable Low Latency (URLLC) access, services relying on Enhanced Massive Mobile Broadband (eMBB) access, and / or services for Machine Type Communication (MTC) access, etc. AMF 162 can provide control plane functions for switching between RAN 113 and other RANs (not shown) using other radio technologies such as LTE, LTE-A, LTE-A Pro, and / or non-3GPP access technologies such as WiFi.

[0087] SMFs 183a and 183b can connect to AMFs 182a and 182b in CN 115 via the N11 interface. SMFs 183a and 183b can also connect to UPFs 184a and 184b in CN 115 via the N4 interface. SMFs 183a and 183b can select and control UPFs 184a and 184b, and can configure traffic routing through UPFs 184a and 184b. SMFs 183a and 183b can perform other functions, such as managing and allocating UE IP addresses, managing PDU sessions, controlling policy enforcement and QoS, and providing downlink data notifications, etc. PDU session types can be IP-based, non-IP-based, and Ethernet-based, etc.

[0088] UPF 184a and 184b can be connected to one or more gNB 180a, 180b, and 180c in CN 113 via the N3 interface, thus providing packet-switched network (e.g., Internet 110) access for WTRU 102a, 102b, and 102c to facilitate communication between WTRU 102a, 102b, and 102c and IP-enabled devices. UPF 184 and 184b can perform other functions, such as routing and forwarding packets, enforcing user plane policies, supporting multihomed PDU sessions, handling user plane QoS, buffering downlink packets, and providing mobility anchoring processing, etc.

[0089] CN 115 can facilitate communication with other networks. For example, CN 115 may include or can communicate with an IP gateway (e.g., an IP Multimedia Subsystem (IMS) server) that acts as an interface between CN 115 and PSTN 108. Furthermore, CN 115 can provide WTRUs 102a, 102b, and 102c with access to other networks 112, which may include other wired and / or wireless networks owned and / or operated by other service providers. In one embodiment, WTRUs 102a, 102b, and 102c can be connected to local data networks (DNs) 185a and 185b via the N3 interface connected to UPFs 184a and 184b and the N6 interface between UPFs 184a and 184b and DNs 185a and 185b.

[0090] In view of Figure 1A-1D And about Figure 1A-1D The corresponding descriptions herein refer to one or more of the functions described below, which can be performed by one or more emulation devices (not shown): WTRU 102a-d, Base Station 114a-b, eNodeB 160a-c, MME 162, SGW 164, PGW 166, gNB 180a-c, AMF 182a-ab, UPF 184a-b, SMF 183a-b, DN185 ab, and / or any other one or more devices described herein. These emulation devices can be one or more devices configured to simulate one or more of the functions described herein. For example, these emulation devices can be used to test other devices and / or simulate network and / or WTRU functions.

[0091] Simulation devices can be designed to perform one or more tests on other devices in laboratory and / or carrier network environments. For example, the one or more simulation devices can perform one or more functions while being implemented and / or deployed, wholly or partially, as part of a wired and / or wireless communication network, to test other devices within the communication network. The one or more simulation devices can also perform one or more functions while being temporarily implemented / deployed as part of a wired and / or wireless communication network. The simulation devices can be directly coupled to other devices to perform tests, and / or can use over-the-air wireless communication to perform tests.

[0092] The one or more simulation devices can perform one or more functions, including all functionalities, without being implemented / deployed as part of a wired and / or wireless communication network. For example, the simulation devices can be used in test environments such as test labs and / or undeployed (e.g., under test) wired and / or wireless communication networks to perform tests on one or more components. The one or more simulation devices can be test equipment. The simulation devices can transmit and / or receive data using direct RF coupling and / or wireless communication via RF circuitry (which, for example, may include one or more antennas).

[0093] The latest 3GPP standards discussions have defined several deployment scenarios and use cases, including indoor hotspots, densely populated urban areas, rural areas, urban macrocells, as well as high-speed deployment scenarios and use cases for enhanced mobile broadband (eMBB), massive machine-type communications (mMTC), and ultra-reliable low-latency communications (URLLC). Different use cases can focus on different requirements, such as higher data rates, higher spectral efficiency, lower power consumption and higher energy efficiency, lower latency, and higher reliability.

[0094] Figure 2 This is a flowchart 200 illustrating the coding and signal transmission methods for LTE data channels. In LTE downlink data transmission, the eNB has a transport block (TB) destined for the WTRU. At the TB level, a 24-bit Cyclic Redundancy Check (CRC) can be attached to the TB (210). If the TB with the attached 24-bit CRC is larger than the maximum block size (e.g., 6144 bits), then it will be segmented (220). The number of segments is equal to... Where TBS is the number of bits in the initial TB without an attached CRC. A TB with an attached CRC is divided into C segments in a nearly equal manner. If the number of segments is greater than 1, then at the code block (CB) level, an additional 24-bit CRC can be attached to each CB. The actual number of bits in each segment may depend on the block size supported by the interleaver parameters within the Turbo code.

[0095] Each code block can be encoded using a turbo code with a fixed mother code rate of 1 / 3 in size (240). The system bits and two sets of parity bits are then passed to the sub-block interleaver and stored in a circular buffer in a specific order (250). A desired number of bits can be sent from the circular buffer using rate matching and / or incremental redundancy hybrid automatic repeat request (IR-HARQ) (260). Each redundancy version (RV) can correspond to a different starting point in the circular buffer.

[0096] The number of bits transmitted in each transmission can depend on the number of resource blocks (RBs) allocated to the transmission, as well as the modulation order and coding rate (CR). The modulation order and coding rate can be determined by the DL channel conditions, and the number of RBs allocated to the transmission can be obtained from a lookup table.

[0097] To facilitate successful decoding on the WTRU, the eNB can transmit some encoding and modulation related information to the WTRU. This information can be provided in the downlink control information (DCI) sent along with the CB.

[0098] If the WTRU receives a DCI, it will check the RB assignment, 5-bit modulation and coding scheme (MCS) information, 3-bit HARQ process number, 1-bit new data indicator, and 2-bit RV in the DCI (e.g., format 1 / 1A / 1B). The RB assignment informs the WTRU how many RBs (N) have been allocated to it. RB ) and its location. The 5-bit MCS information indicates the modulation order M and the TBS index I. TBS Based on N RB and I TBS The WTRU can determine the TB size (TBS) using a lookup table. Following the same process as the eNB, the WTRU will know the number of segmented code blocks C and the size of each CB K. i The size of the CB (CBS) for 1 ≤ i ≤ C.

[0099] The channel coding rate can be determined using the following approximate formula:

[0100]

[0101] In this formula, #RE is the total number of allocated resource elements, and it can be equal to 168·N. RB (For example, 168 REs / RBs (= 12 subcarriers / PRB multiplied by 14 symbols / TTI). The modulation order M can mean the number of bits per RE, and 90% of the consideration is to allocate 10% of the resource elements to the control or reference signal.)

[0102] LDPC codes are forward error-correcting codes supported by 3GPP and IEEE 802 applications. For example, for 3GPP applications, consider an (N,K) quasi-cyclic LDPC (QC-LDPC) code, where K is the information block length and N is the code block length. The parity check matrix H can be a sparse matrix of size (NK) × N. A QC-LDPC code can be uniquely defined by its fundamental matrix of size J × L.

[0103]

[0104] Each component in this fundamental matrix can be either a Z×Z cyclic permutation matrix or an all-zero matrix. Positive integer value B i,j This can represent a rightward circular shift of B from a Z×Z identity matrix. i,j The cyclic permutation matrix. The identity matrix can be obtained from B. i,j =0 indicates a negative value B. i,j Then it can indicate a matrix of all zeros, and N = L·Z.

[0105] The specified QC-LDPC can be used at a fixed code rate. To achieve rate-matched / IR-HARQ support, code extension of the parity check matrix can be used. In this embodiment, a protomatrix matrix (or protomatrix) can be used. A protomatrix matrix of size J×L can correspond to a code rate... If L′-J′=LJ, then the submatrix of the original pattern matrix from the top left corner, which is of size J′×L′, can also be a value parity check matrix. This submatrix can correspond to the code rate. The bit rate is greater than To support IR-HARQ, if the bit rate decreases with retransmissions, matrix expansion from a smaller J value to a larger J value can be performed. Typically, the minimum bit rate from the original modulus matrix can be obtained by... Given, the maximum bitrate from the original model graph matrix can be obtained by r. max =r1 is given.

[0106] Figure 3 This is a diagram of the example original model matrix 300. For example... Figure 3 As shown, the original model graph matrix 300 includes four sub-matrices 310, 320, 330, and 340, which correspond to code rates r1, r2, r3, and r4, respectively. q .

[0107] Regardless of which submatrix is ​​used, the supported information block length is (LJ)·Z. By choosing the boost size Z, it is possible to make (LJ)·Z greater than the actual information block length K, and the difference (LJ)·Z = K can be handled by zero padding.

[0108] For example, for IEEE 802, IEEE 802.11ac supports three different LDPC codeword lengths: 658 bits, 1296 bits, and 1944 bits. If the block size is less than 322 bytes, it is necessary to determine which codeword length to use. If the block size is greater than 322 bits, it is possible to always use a codeword size of 1944 bits.

[0109] The initial encoding step can be based on the block size and the MCS used to select the codeword length and determine the number of codewords. After this process, the number of shortened bits can be calculated, and then parity bits can be generated. If necessary, puncturing or repetition can then be performed.

[0110] The next-generation (NG) standard negotiations of 3GPP have already covered the introduction of Block Group (CBG) level CRC. This work envisions supporting RGB-based transmissions with single-bit / multi-bit HARQ acknowledgment (HARQ-ACK) feedback in 3GPP System Release 15, featuring: allowing CBG-based transmission or retransmission only for the same TB within the HARQ process; CBGs can contain all CBs of a TB regardless of TB size; CBGs can contain a single TB; and CBG granularity can be configurable.

[0111] As mentioned above, in LTE systems, the data channel coding scheme is based on turbo coding with a fixed mother code rate of 1 / 3. However, in 5G systems, the eMBB data channel employs a flexible LDPC coding scheme. Such systems use QC-LDPC codes and support variable block sizes through boosting or shortening operations, as well as variable code rates through code expansion of the parity check matrix. This parity check matrix is ​​based on an original pattern matrix that can be expanded from a high code rate of 8 / 9 to a lower code rate (e.g., as low as 1 / 5). Therefore, 5G systems do not have the fixed mother code rate used for LDPC coding as in LTE systems.

[0112] For example, in a 5G system, to facilitate encoding and decoding operations on the transmitter and receiver, the transmitter may need to determine the master code rate, and the master code rate may need to be synchronized between the transmitter and receiver. The embodiments described herein provide a general process for LDPC encoding in systems such as the 5G system described above, along with associated signaling support.

[0113] Furthermore, due to the narrowband nature of LTE, each OFDM symbol is guaranteed to carry only one CB. However, the large bandwidth allocation in New Radio (NR) results in numerous CBs per OFDM symbol. For example, in an embodiment using four MIMO layers, 256QAM modulation, and 3300 resource elements (REs) or RBs, considering a code rate of size 8 / 9 and 8848 bits of CB information bits, there can be at most 12 CBs per OFDM symbol. Typically, the number of CBs per codeword OFDM symbol can be approximated as:

[0114]

[0115] Where M is the modulation order of all layers, and C is the code rate. This makes the CB susceptible to burst errors or deep fading. If the CBs are spread out at significantly different frequency positions, the CB performance will be greatly improved due to frequency diversity gain. Furthermore, to facilitate scheduling and reduce HARQ feedback overhead, it is preferable that each CB within a HARQ feedback unit has approximately the same performance. Therefore, using a symbol-level interleaver can force all CBs to have approximately the same performance. The embodiments described herein provide suitable symbol-level interleavers.

[0116] Figure 4A This is flowchart 400A, illustrating a TB processing method for a data channel using QC-LDPC codes. (Due to...) Figure 4A The example shown aims to assume that channel coding is performed using QC-LDPC codes based on the original model graph matrix, and the maximum boost size of the supported QC-LDPC codes is Z. max Furthermore, the size of the entire original model matrix is ​​J x L. Given these assumptions, the maximum codeword size can be calculated using L·Z. max Given, the set of supported lifting sizes can be represented as Z = {Z1, ..., Zn}. |z| =Z max}, and the supported information block size can be represented accordingly as K={Z1·(LJ),…,Z |z| ·(LJ)}.

[0117] exist Figure 4A In the example shown, the TB can have a transport block size (TBS) of A bits. A CRC (410A) with C1 bits can be attached to this TB. C1 can be the TB-level CRC length, and for example, it can be 24, 16, or other values ​​less than 24.

[0118] The segmentation parameters used for TB processing can be determined (420A). These parameters may include the number of CB segments, the length of each CB segment, the boost size of one or more LDPC codes, and the mother code rate of the LDPC code.

[0119] Regarding the number of CB segments, if the TBS of a TB is A bits, with C1 CRC bits attached, and the total size is (A+C1), then the TB can be divided into multiple segments. The number of segments can be determined by the following equation:

[0120]

[0121] C2 is the CB-level CRC length, which can be 24, 16, or other values.

[0122] Regarding the segment length of each code block and the number of padding bits, the padding bits can be zero values ​​repeating from the information bits, a known sequence, or a subset of a known sequence. There are several different ways to partition a TB. These will be referenced below. Figure 5 , 6 And 7 to describe its example.

[0123] Regarding the lift size of the one or more LDPC codes, since each supported block size can correspond to a unique lift size, the lift size of each segment can be determined by the supported block size. (See the following reference...) Figure 5 and 6 In the described embodiments, the TB with CRC is divided in an equivalent manner. For these embodiments, a segment of size K+ corresponds to a lift size Z+, and a segment of size K- corresponds to a lift size Z-. In an embodiment, one possible case is that Z+ = Z-. See the following references... Figure 7 In the described embodiment, the TB with CRC is divided in an equivalent manner to accommodate the supported block size. In this embodiment, the last segment may correspond to a boost size Z-, while the other segments may correspond to the maximum boost size Z. max In one embodiment, one possible case is Z- = Z. max .

[0124] As for the mother CR of the LDPC code, the above... Figure 2 This shows that the original pattern matrix can contain LDPC codes with multiple CRs depending on the size of the corresponding submatrix. Unlike LTE Turbo codes, where the mother code rate is fixed at 1 / 3, the mode code used for LDPC codes can have a value between r and r from the original pattern matrix. max and r min There are multiple selectable code rates. Accordingly, it is necessary to determine the mother code rate of the LDPC code.

[0125] The decision of the mother code rate to be used depends on the Quality of Service (QoS), which includes both latency and reliability requirements. In principle, a low mother code rate can be used for high reliability requirements, while a high mother code rate can be used for low reliability requirements. For low latency requirements, a higher mother code rate can be used; while for high latency requirements, a lower mother code rate can be used.

[0126] To facilitate signal transmission and complexity, the number of possible mother code rates can be limited to a number less than the number of rows in the original model matrix. Some typical code rates can be supported. For example, possible mother code rates could be {1 / 3, 2 / 5, 1 / 2, 2 / 3}. The mother code rate can then specify which submatrix of the original model matrix will be used for encoding. This process can also specify the memory used to store coded blocks that will be retransmitted.

[0127] Once the segmentation parameters are determined, code block segmentation (430A) can be performed, for example, by adding zero values ​​to the TB and then segmenting it accordingly. An example will be provided below. Figure 5 , 6 Sections 7 and 8 describe in more detail the different ways of filling zero values ​​and segmenting zero-filled TBs.

[0128] For example, by attaching C2 CRC bits to each segmented code block, CB-level CRC attachment processing (440A) can be performed. Unlike LTE Turbo codes, LDPC codes have self-parity checking at the end of each iteration. Therefore, the number of CB-level CRC bits used for LDPC codes is much lower than that for turbo codes (e.g., 24 bits). In embodiments, the value of C2 can be 16 bits, 8 bits, 4 bits, or even 0 bits.

[0129] As an example, optional CB group (CBG) level CRC attachment processing (not shown) can also be performed by attaching C3 CRC bits to each CBG. The following will compare... Figure 18A and 18B Let's describe this in more detail. The number of CBG CRC bits used for LDPC codes can be less than 24 bits. In other words, the value of C3 can be 16 bits, 8 bits, 4 bits, or even 0 bits. The number of CBs within the CBG can depend on the total number of CBs being segmented, the WTRU capability, and latency requirements.

[0130] Then, as an example, LDPC encoding processing (450A) can be performed by encoding each segmented CB (e.g., using a determined parent LDPC code parity-check matrix). In an embodiment, the boost size of each segmented TB can be predetermined. The encoded block can be provided as the result of LDPC encoding processing 450A.

[0131] Typically, due to its sparse nature, LDPC coding may not require interleaving. However, as can be done using multiplexing techniques employed in URLLC and eMBB, interleaving (460A) can be used to improve performance in the event of burst puncturing / interference. This is attributed to the localized parity node / variable node connections in QC-LDPC codes. Since interleaving (460A) is not necessarily beneficial in all cases, it can be considered optional and, in some embodiments, can be activated / deactivated depending on the scenario. Coded blocks can be interleaved or not, and can be stored in memory (e.g., in a circular buffer) for use during transmission and retransmission.

[0132] Rate matching processing (470A) can be performed based on a cyclic buffer (e.g., for puncturing or repetition) to suit the desired bit rate. Details on how to accomplish this processing using a single cyclic buffer or a multi-cyclic buffer HARQ design are provided below. In embodiments, without departing from the scope of the embodiments described herein, rate matching processing (470A) may be performed prior to interleaving processing (460A).

[0133] Figure 4B This is flowchart 400B, another example of a TB processing method using a data channel with QC-LDPC codes. Figure 4B In the example shown, the TB-level CRC attachment process 410B, parameter determination process 420B, code block segmentation process 430B, CB-level CRC attachment process 440B, LDPC encoding process 450B, interleaving process 460B, and rate matching process 470B can be compared with the above. Figure 4A The corresponding processes described in 410A, 420A, 430A, 440A, 450A, 460A, and 470A are executed in the same or similar manner. However, in Figure 4B In the example shown, these parameters can be determined at any time (420B) and can be provided for use in each relevant process. For example, the number of CBs, the length of each CB, and the number of padding bits can be provided for use during code block segmentation processing 430B, and the LDPC boost size and LDPC mother code rate can also be provided for use during LDPC encoding processing 450B and rate matching processing 470B.

[0134] Figure 5 Illustration 500 illustrates an example of CB generation processing for equivalent partitioning of a TB containing a TB-level CRC. Figure 5 In the example shown, the TB(510) with a TB-level CRC is divided into segments or CB 520A, 520B, and 520C. The size of each segment 520 can be... in It is an integer. Otherwise, the size of each of the first B-1 segments of 520 is And the last segment (e.g.) Figure 5 The size of the segment 520C is In one embodiment, the last segment 520C has a different size than the other segments 520A and 520B, and the last segment 520C may be filled. There is a zero value of 530, therefore, all CBs (corresponding to segment 520 plus CB CRC 540 plus any padding bits 550) have the same size. In an embodiment (not shown), as an alternative, padding bits 530 can be added to different segments (e.g., the first segment 520A), in which such segments can have a different size than the remaining segments 520B and 520C. Then, CB CRC540A, 540B, and 540C can be added to each CB.

[0135] Then, fill bits 550A, 550B, and 550C can be added. In an embodiment, K + It can be set to be the smallest K in the set K, which can be greater than or equal to K. The set K can be a set of supported block lengths from a single fundamental matrix or from the union of two fundamental matrices. Therefore, the number of padding bits for each segment can be... The rounding up operation is used here. However, it can be replaced by rounding. Rounding returns the nearest integer or a floor operation, where floor operation returns the largest integer less than the number x.

[0136] exist Figure 5 In the example shown, CB-level CRC 540 is added before padding bit 550. The difference between padding bits and fill bits in this example is that padding bits are sent in the air along with the source bits, while fill bits are removed after LDPC encoding.

[0137] Figure 6 This is an illustration of another CB generation process example that is equivalent to partitioning a TB containing a TB-level CRC. Figure 6 In the example shown, the TB (610) with an attached TB-level CRC is divided into segments or CB 620A, 620B, and 620C. The size of each segment 620 can be... in It is an integer. Otherwise, the size of each of the first B-1 segments is And the last segment (e.g.) Figure 6 The size of the segment 620C is exist Figure 6 In the example shown, fill bit 630 can be added to the last segment 620C.

[0138] exist Figure 6 In the example shown, padding characters 640A, 640B, and 640C are added to each CB before adding CB-level CRCs 650A, 650B, and 650C. In such an embodiment, K + K can be set to the smallest K in the set K, which can be greater than or equal to K. K - It can be set to be the smallest K in set K, and it can be greater than or equal to K. Set K is the set of supported block lengths from a single fundamental matrix or the union of two fundamental matrix sets. Therefore, the number of zero-padding bits used for the first B-1 segments can be... And the number of zero-padding bits used for the last segment can be The rounding up operation is used here. However, this operation can be replaced by rounding. Rounding can return the nearest integer or a floor operation, where it returns the largest integer less than the number x. Alternatively, if a single promotion size is preferred, the information block size can be used as max(K). + ,K - The number of zero-padded bits can be adjusted accordingly.

[0139] Figure 7 Illustration 700 illustrates an example of CB generation processing that equivalently partitions a TB containing a TB-level CRC to suit the supported block size. Figure 7 In the example shown, TB 710 with TB CRC is segmented into CBs 720A, 720B, and 720C. As shown, a filler character 740 can be added to the last segment 720C. CRCs 730A, 730B, 730C, and 730D can be added to each CB. + It can be set to be the smallest K in set K, such that:

[0140] B·C + Equation (2) is ≥A+C1+B·C2

[0141] and K - It can be set to be the largest K in set K, such that K <K + Then, having a length K - The number of segments can be equal to

[0142]

[0143] And the number of segments with length K+ can be equal to

[0144] The set K can be a set of supported information block lengths from a single fundamental matrix or from the union of two fundamental matrices. It has a length K. + The number of segments can be equal to C. + =BC - In this embodiment, the number of zero-padding bits can be equal to...

[0145]

[0146] In another embodiment, the TB can be divided using the maximum supported information block size. The size of each of the first B-1 segments can be Z. max (LJ)-C2, while the size of the last segment can be (A+C1)-(B-1)·[Z max · (LJ)-C2]. K - It can be set to be the smallest K in set K, and it can be greater than or equal to (A+C1)-(B-1)·[Z]. max ·(LJ)-C2]. Then, the number of zero-padding bits used for the last segment can be K. - -(A+C1)+(B-1)·[Z max ·(LJ)-C2].

[0147] For all the segmentation embodiments described above, the order of the segments can be changed. If CBG-level CRC is applied, the formula used to calculate the number of CBs per TB can be adjusted. For example, considering CBG-level CRC, the size of C2 in equation (1) can be modified. Imagine an example where CBG consists of X CBs. C2 in equation (1) can be adjusted to CRC CBG This refers to the size of the CBG-level CRC. A similar operation can be applied in determining the CB segment size. For example, in the above comparison... Figure 7In the described embodiments, equation (2) can be modified to B·K + ≥A+C1+B·G2+X·CRC CBG And equation (3) can be modified to

[0148] In the embodiments, in Figure 4A and 4B The parameters determined in 420A and 420B can be determined, at least in part, based on the selected base graphic (BG). Below is a specific example of performing segmentation and determining parameters based on the selected BG. This will be discussed in more detail below. Figure 8-11 Let's describe the BG selection process in detail.

[0149] For the purposes of subsequent concrete examples, assume that two BGs are defined as follows. BG#1 may have a basic matrix dimension of 46x68, where two columns have undergone system punching: K b1 =22, R max,1 =22 / 25, R min,1 =1 / 3 and K cb,max1 =8448. BG#2 can have a basic matrix dimension of 42×52, with two columns having undergone system punching: K b2 ≤10, R max,2 =2 / 3, R min,2 =1 / 5 and K cb,max2 =2560. In the embodiment, the value K cb,max2 =2560 can be adjusted to 3840. Therefore, in the specific example below, the value 2560 can be replaced by 3840.

[0150] In Figure 5 The example shown is a specific example based on which the input bit sequence for code block segmentation can be b0, b1, b2, b3, ..., b B-1 This indicates that B > 0. If B is greater than the maximum block size K... cb Then, segmentation of the input bit sequence can be performed, and L=L can be attached to each CB. CB An additional CRC sequence of bits. The maximum CB size can be: K cb =8448. Alternatively, for a specified bitrate range, K... cb Can be selected as K cb,max2 The selected K cb This can depend on the BG / matrix selection method. At the encoder input, the fill bits can be set to... <null>And the total number C of CB can be determined as follows:

[0151] if B≤K cb

[0152] L=0

[0153] Number of code blocks: C = 1

[0154] B′=B

[0155] else

[0156] L = L CB

[0157] Number of code blocks:

[0158] B′=B+C·L

[0159] end if

[0160] If C ≠ 0, then the bits output from the CB segmentation process can be represented by c. r0 ,c r1 ,c r2 ,c r3 ,..., Let K represent the block number, where 0 ≤ r < C is the code block number. r This is the number of bits in CB numbered r. The number of bits in each CB (only applicable when C ≠ 0) can be determined as follows:

[0161]

[0162] For LDPC basic graphics 1,

[0163] K b =22.

[0164] For LDPC basic graphics 2,

[0165] If B > 640

[0166] K b =10;

[0167] elseif B>560

[0168] K b =9;

[0169] elseif B>192

[0170] K b =8;

[0171] else

[0172] K b =6;

[0173] end

[0174] Find the minimum value Z among all lifting sizes and represent it as Z min So that K b ·Z min ≥K + and indicating K' = K b ·Z min ;

[0175] For i = B to B + (C·K) + -B′)

[0176] b i =0;

[0177] end

[0178] s = 0;

[0179] for r=0 to C-1

[0180] K”=K + ;

[0181] k = 0;

[0182] while k<K”-L

[0183] c rk =b s ;

[0184] k = k + 1;

[0185] s = s + 1;

[0186] end while

[0187] if C > 1

[0188] Sequence c r0 ,c r1 ,c r2 ,c r3 ,...,c r(K”-L-1) Used to calculate CRC parity bit p r0 ,p r1 ,p r2 ,...,p r(L-1 ).

[0189] while k < K”

[0190] c rk =p r(k+L-K”) ;

[0191] k = k + 1;

[0192] end while

[0193] end if

[0194] while k<K'

[0195] c rk =<NULL>;

[0196] k = k + 1;

[0197] end while

[0198] end for

[0199] In Figure 6 The example shown is a specific example based on which the input bit sequence for code block segmentation can be b0, b1, b2, b3, ..., b B-1 This indicates that B > 0. If B is greater than the maximum block size K... cb Then the input bit sequence can be segmented, and a bit with L=L can be attached to each CB. CB An additional CRC sequence of bits. The maximum CB size can be: K cb =8448. Alternatively, for a specified bitrate range, K can be selected. cb As K cb,max2 The selected K cb This can depend on the BG / matrix selection method. At the encoder input, the fill bits can be set to... <null>And the total number C of CB can be determined as follows:

[0200] if B≤K cb

[0201] L=0

[0202] Number of code blocks: C = 1

[0203] B′=B

[0204] else

[0205] L = L CB

[0206] Number of code blocks:

[0207] B′=B+C·L

[0208] end if

[0209] If C ≠ 0, then the bits output from segmented processing of CB can be represented by c. r0 ,c r1 ,c r2 ,c r3 ,..., Let K represent the block number, where 0 ≤ r < C is the code block number, and K r This is the number of bits in the code block numbered r. The number of bits in each code block (only applicable to C≠0) can be determined as follows:

[0210]

[0211] For LDPC basic graphics 1,

[0212] K b =22.

[0213] For LDPC basic graphics 2,

[0214] If B > 640

[0215] K b =10;

[0216] elseif

[0217] B > 560

[0218] K b =9;

[0219] elseif B>192

[0220] K b =8;

[0221] Else

[0222] K b =6;

[0223] End

[0224] Find the minimum value of Z among all lifting sizes and represent it as Z. min So that K b ·Z min ≥K + And it means K' = K b ·Z min ;

[0225] s = 0;

[0226] for r=0 to C-1

[0227] if r < C-1

[0228] K”=K + ;

[0229] else

[0230] K″=B′-(C-1)K + ;

[0231] end

[0232] k = 0;

[0233] while k<K”-L

[0234] c rk =b s ;

[0235] k = k + 1;

[0236] s = s + 1;

[0237] end while

[0238] if C > 1

[0239] Use sequence c r0 ,c r1 ,c r2 ,c r3 ,...,c r(K”-L-1) To calculate the CRC parity check bit p r0 ,p r1 ,p r2 ,...,p r(L-1 ).

[0240] while k < K”

[0241] c rk =p r(k+L-K”) ;

[0242] k = k + 1;

[0243] end while

[0244] end if

[0245] while k<K'

[0246] c rk =<NULL>;

[0247] k = k + 1;

[0248] end while

[0249] end for

[0250] As mentioned above, the parameter determination of 420A / 420B can depend on the BG selection. For BG selection, multiple basic prototype matrices can be defined to cover different ranges of block size and / or code rate. The ranges of block size and / or code rate can partially overlap. For a specified CB segment length (N... seg It is possible that there are two or more boost sizes corresponding to two or more available prototype matrices. In an embodiment, the selection of the prototype matrix may be based on one or more parameters, which, for example, include codeword length, additional punch bit size, padding bit size, and / or shortening bit size.

[0251] Code length This can correspond to a lift size l m (l m ∈{1,…,L m The original model graph matrix m (m∈{1,…,M}) is the number of supported original model graph matrices, and L m This is the number of lift sizes corresponding to the m-th original model matrix. Additional punched bits can refer to bits that need to be punched due to rate matching. Additional punched bit size. This can correspond to a lift size l m (l m ∈{1,…,L m The original model graph matrix m (m∈{1,…,M}) is the number of supported original model graph matrices, and L m This is the number of lift sizes corresponding to the m-th original model matrix. (Padded bit size) This can correspond to a lift size l m (l m ∈{1,…,L m The original model graph matrix m (m∈{1,…,M}) is the number of supported original model graph matrices, and L m This is the number of lifts corresponding to the m-th original model matrix. (Shortening bit size) This can correspond to a lift size l m (l m ∈{1,…,L m The original model graph matrix m (m∈{1,…,M}) is the number of supported original model graph matrices, and L m It represents the number of lift sizes corresponding to the m-th original model matrix.

[0252] Certain rules for selecting the original model matrix can be defined. These rules can be used in combination or independently to select the original model matrix.

[0253] One of the protograph matrix selection rules may include comparing the codeword lengths from M protograph matrices to find the one that satisfies the condition. The prototype matrix m. Thus, the chosen prototype matrix can provide an effective codeword length that is closest to the supported segment length. Alternatively, this selection criterion can be modified to use a value greater than N. seg The smallest This would limit the shortening process used for rate matching. Alternatively, the selection criterion could be modified to use less than N. seg The largest This will limit the additional perforation treatments used for rate matching.

[0254] Another primitive pattern matrix selection rule may include comparing the additional punch bit sizes from M primitive pattern matrices to find the one that satisfies the condition. The original pattern matrix m. In this way, the original pattern matrix that can be selected can be the one that requires the least amount of additional perforation processing.

[0255] Another prototype matrix selection rule may include comparing the padding bit sizes from M prototype matrices to find the one that satisfies the condition. The original pattern matrix m. In this way, the chosen original pattern matrix can be the one that requires the fewest padding bits.

[0256] Another prototype matrix selection rule may include comparing the shortened bit sizes of M prototype matrices to find the one that satisfies the condition. The original pattern matrix m. In this way, the chosen original pattern matrix can be the one that requires the fewest bits of shortening.

[0257] In one embodiment, a single basic prototype graph matrix can be used for all block lengths. Such embodiments are simpler to implement. However, they may suffer some performance loss in a certain range. Correspondingly, in other embodiments, multiple basic matrices can be applied (e.g., based on WTRU capabilities or WTRU categories). In particular, all WTRUs can use a single overall basic prototype graph matrix, which simplifies WTRU design because a single prototype graph matrix can be stored on each WTRU. For more advanced WTRUs (e.g., WTRUs with high capabilities or WTRU categories corresponding to higher data rates), second and even third prototype graph matrices can be used. This can further improve channel coding performance in a given area. In such embodiments, the WTRU can send WTRU capability information to the base station (e.g., eNB) via RRC messages during the initial RRC connection establishment process.

[0258] In an embodiment, the WTRU category may imply the WTRU's ability to support multiple prototype matrices. For example, WTRU categories 1, 2, 3, and 4 may use only a single prototype matrix; WTRU categories 5, 6, 7, and 8 may use two prototype matrices; and other WTRU categories may use three prototype matrices. The WTRU's ability to support multiple prototype matrices may also be explicitly included in the WTRU capability information.

[0259] If the TB is divided into segments of unequal size, then an additional criterion for selecting the fundamental prototypal matrix can be applied. As an example, selecting a single fundamental prototypal matrix for all CBs in the TB may be preferred. As an example, a detailed prototypal matrix selection process is described below. Two fundamental prototypal matrices are defined in this example. Prototypal matrix 1 can have a fundamental matrix size J. 1 ×L 1 Increase size and minimum supported coding rate R 1 The original model matrix 2 can have a fundamental matrix size J. 2 ×L 2 Increase size and minimum supported coding rate R 2 Although two basic prototype matrices are defined for this example, it can be easily extended to situations where more than two prototype matrices are available.

[0260] In this example, it is assumed that matrix 1 has a large fundamental matrix and supports longer codewords with a high coding rate. In other words, in this example, and R 1 >R 2 ,in and These represent the maximum information block size of each original model matrix. For a specified TB with size A, target coding rate R, and TB-level CRC size C1, the subsequent basic original model matrix selection and TB segmentation process can be used.

[0261] The first process is based on the bitrate. In this process, if the target coding rate R ≥ R 1 Then you can choose to have The original model matrix 1. The segmentation process can be the same as described above, but equation (1) can be modified to If the target coding rate R <R 1 Then you can choose to have The original model matrix 2. This segmentation process can be the same as described above, but equation (1) will be modified to

[0262] The second process is the rate-first process. If the target coding rate R ≥ R... 1 Then you can use To perform segmentation processing. This segmentation process can be the same as described above, but equation (1) can be modified to...

[0263] After segmentation, the resulting segments can have at most two distinct segment sizes S1 and S2, where S = max(S1, S2). K can be set to be the smallest K in the set K that is greater than or equal to S. In this example, K can be defined as the union of the block sizes supported by all two prototype graph matrices. In this case, the choice of the prototype graph matrix can depend on K. In particular, if the chosen K corresponds to the prototype graph matrix, then this prototype graph matrix can be chosen.

[0264] If two shift sizes are allowed, then K can be... + Set it to be the above K, and set K - It can be set to be the smallest K in set K that is greater than or equal to min(S1, S2). If the target coding rate R <R 1 Then you can choose to have The original model matrix 2. This segmentation process can be the same as described above, but equation (1) will be modified to

[0265] The third process is based on code length. In this process, the following can be used: To perform segmentation. This segmentation process can be the same as described above, but equation (1) will be modified to...

[0266] Using this process, after segmentation, at most two distinct segment sizes S1 and S2 can be provided, where S = max(S1, S2). K can be set to be the smallest K in the set K that is greater than or equal to S. In this process, K can be defined as the union of all information block sizes supported by the two prototype matrices. In this case, the choice of prototype matrices can depend on K. If the chosen prototype matrices do not support the target rate, then additional repetition or perforation schemes can be applied. If two shift sizes are allowed, then K can be... + Set K as shown above, and you can set K to... - Set it to be the smallest K in set K that is greater than or equal to min(S1, S2).

[0267] Figure 8 The diagram 800 shows four coverage areas defined above, based on the bit rates (CR) and information bit sizes that Basic Graphic 1 (BG#1) and Basic Graphic 2 (BG#2) can or cannot support. Figure 8 The example shown defines four regions: region A (802) with a code rate R > 2 / 3, region B (804) with a code rate R < 1 / 3, region C (806) with a code rate 1 / 3 ≤ R ≤ 2 / 3 and TBS ≤ 2560, and region D (808) with a code rate 1 / 3 ≤ R ≤ 2 / 3 and TBS > 2560. Although in Figure 8 Specific bitrate values ​​and TBS thresholds are defined herein, but these CR thresholds and / or TBS thresholds can be replaced with other values ​​conforming to the embodiments described herein. For example, the value 2560 can be determined according to K. cb,max2 Instead, the value 3840 is replaced, 1 / 3 is replaced with 1 / 4, and so on. Furthermore, in embodiments, the TBS values ​​described herein may include TB-level CRC.

[0268] Since the decision on which BG to use affects the CB segmentation process, therefore, considering that... Figure 8 The coverage area shown and described herein, BG selection can depend on bitrate and TBS. Alternatively, BG selection can depend on bitrate and CBS.

[0269] As mentioned above, BG#1 is designed to support region A (802), while BG#2 does not support region A (802). If BG#2 is used in region A (802), an additional puncturing scheme will be required. In terms of performance, a well-defined base matrix supporting the specified coding rate is generally superior to puncturing from a base matrix with a lower rate. Accordingly, BG#1 is best suited for region A (802). If the TB with attached TB-level CRC bits is greater than K... cb =8448, then it is necessary to perform segmentation. Accordingly, if the coding rate is greater than 2 / 3, then BG#1 can be selected.

[0270] As mentioned above, BG#2 is designed to support the coding rate range in region B (804), while BG#1 does not. If BG#1 is used in region B (804), additional matrix extension or repetition schemes will be required. In terms of performance, a well-defined base matrix supporting the stated coding rate is generally superior to repetition of a base matrix at a higher rate. Accordingly, BG#2 is most suitable for region B (804). If the TB with attached TB-level CRC bits is greater than K... cb =2560, then segmentation is necessary. Accordingly, if the encoding rate is less than 1 / 3, then BG#2 can be selected.

[0271] In this embodiment, the upper limit of region B (804) can be limited by a smaller rate threshold (e.g., 1 / 4). This can be attributed to the performance comparison between BG#1 and BG#2 after taking into account segment loss and block error rate (BLER) performance.

[0272] Both BG#1 and BG#2 have coverage in region C(806) and do not require segmentation. For region C(806), there are two BG selection procedures to consider. In the first procedure, since BG#2 is designed for very short block sizes and low coding rates, it can always be selected for region C(806). In the second procedure, a BG with smaller padding bits can be selected, and thus BG#1 can be selected in some cases. For the second procedure, region C(806) supports all information bit lengths from BG#1 and BG#2, and the selected BG can be the closest information bit length that is exactly greater than the specified TBS.

[0273] The following describes a simulation focusing on a scenario where the first and second processes have different BG selection preferences. Specifically, the simulation evaluates the performance of BG#1 and BG#2 when BG#1 has fewer padding bits compared to BG#2. Therefore, for the first process, BG#1 can be selected, and for the second process, BG#2 can be selected.

[0274] In this simulation, an additive white Gaussian noise (AWGN) channel and quadrature phase shift keying (QPSK) modulation are assumed, and the TBS is assumed to contain TB-level CRC bits. Two coding rates, 1 / 3 and 2 / 3, corresponding to the minimum and maximum coding rates directly supported by BG#2, are evaluated. Three different TBSs, [86, 390, 1936], are selected for each coding rate. The required number of padding bits is shown in Table 1 below. Of all the simulated TBSs, BG#1 has fewer padding bits than BG#2.

[0275] Table 1

[0276] TB size 86 390 1936 BG#1 2 6 0 BG#2 4 26 144

[0277] When using padding bits, the number of coded bits produced depends on the padding bit size and is greater than TBS / rate. For fair comparison, it is necessary to adjust the AWGN noise level according to the coded bit size so that the signal-to-noise ratio per information bit is the same for BG#1 and BG#2.

[0278] Figure 9 It is a graph 900 that provides a performance comparison between BG#1 and BG#2 at a rate of 1 / 3 and with fewer fill bits in BG#1. Figure 10 This is a graph 1000 showing the performance comparison between BG#1 and BG#2 at a rate of 2 / 3 and with fewer fill bits compared to BG#2. (Example:) Figure 9 and 10 As shown, even though BG#1 has fewer fill bits, the BLER performance of BG#2 is always better than that of BG#1. Accordingly, if 1 / 3 ≤ R ≤ 2 / 3 and TBS ≤ 2560, then even if more fill bits are requested for BG#2, BG#2 still has better performance than BG#1. Accordingly, in the embodiment, if 1 / 3 ≤ R ≤ 2 / 3 and TBS ≤ 2560, then BG#2 is selected. Furthermore, in the embodiment, the rate threshold used in the BG selection process can be a different value, for example, replacing 1 / 3 ≤ R ≤ 2 / 3 with 1 / 4 ≤ R ≤ 2 / 3. In the embodiment, a larger TBS threshold (e.g., 3840) can also be used.

[0279] Both BG#1 and BG#2 support the coding rate for region D (808). If the TB block length is within the range (2560, 8448), then BG#1 can directly support these coding rates with the boost value Z selected and some padding bits used. BG#2 cannot directly support these coding rates. However, if K is used... cb If the segmentation is performed at 2560, then it can support these coding rates.

[0280] Generally, LDPC codes perform better when using longer codewords. This is especially true for fading channels, where longer codewords can provide better diversity gain to compensate for burst errors.

[0281] The following describes a simulation of region D(808). In this simulation, it is assumed that an AWGN channel and QPSK modulation exist, where TBS = 5120 is selected, and it is assumed that TBS includes TB-level CRC bits.

[0282] Figure 11 A graph 1100 provides a performance comparison between BG#1 and BG#2 at a code rate of 1 / 3. When using BG#1, 160 padding bits are used. When using BG#2, the TB is divided into two CBs, each with K = 2560 and zero padding bits. At BLER = 1%, BG#1 outperforms BG#2 by approximately 0.2 dB. In this simulation, the additional CRC bits used for the second CB are not considered when selecting BG#2 and performing segmentation. If the additional CRC bits are considered, BG#2's performance will be worse. Accordingly, if 1 / 3 ≤ R ≤ 2 / 3 and TB > 2560, then BG#1 outperforms BG#2. Therefore, in some embodiments, BG#1 can be selected if 1 / 3 ≤ R ≤ 2 / 3 and TB > 2560. In embodiments, the rate threshold used can be replaced with other values. For example, instead of 1 / 3 ≤ R ≤ 2 / 3, 1 / 4 ≤ R ≤ 2 / 3 can be used. In the embodiments, larger TBS thresholds (e.g., 3840) can also be used.

[0283] The above comparison Figure 8 In the described embodiments, the threshold rates used are 1 / 3 and 2 / 3. However, these threshold rates can also be modified to other rates according to the definitions used for BG#1 and BG#2. Furthermore, in the above comparison... Figure 8 The described embodiments use TBS thresholds of 2560 and 8448. However, they can also be modified to other lengths according to the definitions of BG#1 and BG#2.

[0284] In the example regarding the BG selection process, BG#1 can be defined as having a basic matrix dimension of 46x68, two columns of system perforations, and K... b1 =22, and R max,1 =22 / 25, R min,1 =1 / 3 and K cb,MAX1 =8448. BG#2 can be defined as having a basic matrix dimension of 42×52, two columns of system perforation, K b2 ≤10, R max,2 =2 / 3, R min,2 =1 / 5 and K cb,max2 =2560.

[0285] The input bit sequence for code block segmentation is b0, b1, b2, b3, ..., b B-1 This indicates that B > 0. If B is greater than the maximum code block size K, then... cb Therefore, the input bit sequence can be segmented, and L=L can be attached to each code block. CB An additional CRC bit sequence of 1 bit. The maximum block size and BG selection process can depend on the desired coding rate R and TB size B:

[0286]

[0287]

[0288] In the specific example above, 1 / 3 and 2 / 3 were used as two rate thresholds. However, according to the definitions of BG#1 and BG#2, they can also be modified to other rates. Similarly, in the specific example above, 2560 and 8448 were used as two length thresholds. However, according to the definitions of BG#1 and BG#2, they can also be modified to other lengths.

[0289] For CRC attachment, a TB-level CRC can have C1 bits, and a TB-level CRC can have C2 bits. A CB-group (CBG)-level CRC can have C3 bits inserted. C1, C2, and C3 can be predefined or predetermined. Alternatively, C1, C2, and C3 can be selected from a predefined or predetermined set S, which can include several integers. For example, S = {0, 4, 8, 16, 24}. The CRC size selection can depend on one or a combination of the data QoS type (e.g., eMBB, URLLC, etc.), WTRU capability, and / or CRC level (e.g., C1, C2, or C3). Regarding data QoS, as an example, a longer CRC code can be chosen for URLLC. As for WTRU capability, some WTRUs can support one CRC value or a subset of S values. The CRC value used can be selected from the set of CRC values ​​supported by the WTRU.

[0290] Rate matching processing (470A / 470B) for LDPC-coded transport channels can be defined according to the coding blocks and may include puncturing or repetition processing, interleaving of the coded bit stream, and bit collection and storage in circular buffers. Examples of using two, multiple, and odd numbers of circular buffers to perform rate matching processing are described below.

[0291] In one embodiment, a dual-circular buffer can be used in conjunction with LDPC codes to obtain more reliable HARQ retransmissions. When using a dual-circular buffer, each transmission, including retransmissions, can carry some information bits.

[0292] Figure 12 This is illustration 1200 of an example dual-loop buffer used for rate matching and HARQ. Figure 12 In the example shown, after LDPC encoding of the information bits using the parent LDPC code or an LDPC code with the lowest data rate, a set of information bits {s1, s2, ..., s} can be obtained. K }1210 and a set of parity bits {p1,p2,...,p M 1220. Here, K is the length of information bit 1210, and M is the length of parity bit 1220. The LDPC encoding process allows for puncturing of information bits. In such a scenario, the punctured information bits can be included in the set of information bits.

[0293] In an embodiment, the encoded information bit set 1210 and the parity bit set 1220 may optionally be passed to a sub-block interleaver (not shown). In one embodiment, the sub-block interleaver may depend on the RV value. The interleaver may be different for different RV values ​​or different retransmissions. A set of interleavers may be defined for a set of RV values. The interleaver used may be predetermined or predefined.

[0294] Information bit 1210 can be inserted into circular buffer 1230 (e.g., information circular buffer), and parity bit 1220 can be inserted into a different circular buffer 1240 (e.g., parity circular buffer). Bit selections 1250 and 1260 can be used to extract consecutive bits from each of the respective buffers 1230 and 1240 to match the number of available resource elements (e.g., a total of A bits). The A bits can be extracted using a variety of different methods. An illustrative method is described below.

[0295] For RV = 0 (first transmission), K-nZ consecutive information bits can be extracted from the information circular buffer 1230. For example, the extracted bits could be {s} NZ+1 ,...,S K In this example, Z is the boost size and nZ is the number of punctured bits from the information bit set 1210. A-(K-nZ) consecutive parity bits can be extracted from the parity circular buffer 1240. For example, the extracted bits could be {p1,...,P}. Z-K+nZ For RV>0 (retransmission), the selected subset can be a set of information bits from the information circular buffer 1230. The size of the subset can be predefined or predetermined. For example, a fixed ratio R... ip It can be predefined, predetermined, or announced by signal. This ratio R ip It can be the ratio of information bits to parity bits transmitted during retransmission, and round(R) ip *A) can be the size of the selected information bits. Here, `round` is a function to get the nearest integer. Alternatively, `ceil()` or `floor()` can be used instead of `round()`. Here, `ceil(x)` is a function to get the smallest integer greater than x, and `floor(x)` is a function to get the largest integer less than x. The subset can be selected from RV number, subset size, R... ip The position is determined based on and / or A. Transmissions for different RVs may or may not have overlapping bits.

[0296] A subset of parity bits from the parity circular buffer 1240 can be selected. The size of this subset can be predetermined or predefined. For example, if R is used... ip Then you can choose A-round(R) ip *A) bits. This subset can be derived from RV number, subset size, R ip The subset begins at a position determined based on and / or A. As an example, the subset could begin immediately after a selected subset from the last transmission.

[0297] Optional additional interleavers (not shown) may be included after bit selection 1250 / 1260. In this embodiment, the interleaver may depend on the RV value. The interleaver may be different for different RV values ​​or different retransmissions. A set of interleavers can be defined for a set of RVs. The interleaver used may be predetermined or predefined.

[0298] If an additional interleaver is included, it can provide additional diversity for HARQ retransmissions. For example, the interleaver can be designed to reorder the mapping of bits to constellation symbols. As an example, when using 64QAM, [b0,b1,b2,b3,b4,b5] can be mapped to a 64QAM constellation point in RV0. Then, the interleaved version (e.g., [b1,b0,b3,b2,b5,b4] or [b5,b4,b3,b2,b1,b0]) can be mapped to symbols in RV1, and so on.

[0299] The selected information bits and parity bits can be passed for use in bit collection 1270, in which a bit stream can be formed. For example, the bit stream may include information bits followed by parity bits. An interleaver 1280 can be applied to the bit stream provided as a result of bit collection 1270. In embodiments, the use of a double cyclic buffer can be announced using a signal (e.g., by a device such as a WTRU).

[0300] In embodiments, a HARQ scheme based on multiple circular buffers can be used. Each of the multiple buffers can correspond to a subset of encoded bits. Buffers may or may not have overlapping bits. The allocation of encoded bits into buffers for processing can depend on the importance of that bit relative to the decoder. For example, in a system with three buffers, buffer 1 can carry the most important bits, while buffer 2 can carry a subset of bits that are relatively less important than the bits in buffer 1 but relatively more important than the bits carried in the remaining buffers. Buffer 3 can carry the least important bits.

[0301] A set of ratios can be defined for each RV value. This set of ratios determines the number of bits selected from the corresponding buffer in the corresponding RV version. For example, if the RV value is equal to k, then the set of ratios could be [R k,1 s,R k,2 ,…,R k,B ], where B is the number of buffers used. The following limitations apply:

[0302] R k,1 +R k,2 +…+R k,B =1

[0303] as well as

[0304] 0≤R k,b ≤1, b=1,…,B.

[0305] In order to select and form a codeword of length A for RVk, A·R can be selected from buffer 1. k,1 1 bit; A·R can be selected from buffer 2. k,2 bits, and so on. If A·R k,b If it's not an integer, then choose the closest integer. Alternatively, choose an integer less than A·R. k,b The largest integer can also be used, or it can be greater than A·R. k,b The smallest integer can also be used. For the last buffer, you can choose... 1 bit.

[0306] The ratio set can be predefined in the standard. For example, with a specified number of buffers, a ratio set can be specified for each RV value. Alternatively, the ratio set can be predefined by the eNB or the transmitter. In this way, the ratio set can be explicitly announced by signaling.

[0307] A set of starting positions can be defined for each RV value. This set of starting positions determines the selection of A·R in the corresponding RV. k,b The positions in the corresponding buffers for each bit. For example, if the RV value is equal to k, then the set of starting positions could be [SP]. k,1 SP k,2 ,…,SP k,B Where B is the number of buffers used. The following constraints may be applied:

[0308] 1≤SP k,b ≤Buffer_Size b b = 1, ..., B, Buffer_Size b It is the size of the b-th buffer.

[0309] Figure 13 Figure 1300 illustrates an example bit selection method using multiple circular buffers. Figure 13 In the example shown, in order to select bits for RVk and form a codeword with length A, bits can be selected from position SP in buffer b. k,b To position mod(SP) k,b +A·R k,b -1,Buffer_Sizeb) Cyclic selection of A·R k,b 1 bit.

[0310] The set of starting positions can be predefined in the specification. For example, with a specified number of buffers, the set of starting positions for each RV value can be specified. Alternatively, this set of starting positions can be predetermined by the base station (e.g., eNB) or transmitter. In this way, the set of starting positions can be explicitly announced by signaling. Since the starting position can be a value limited by the buffer size, a normalized starting position can be used. For example, the normalized starting position can be defined as follows:

[0311] The number of buffers (e.g., B in the example provided above) can be predefined and / or predetermined, and can be explicitly announced using signals. The buffer size (e.g., Buffer_Size) b It can be predefined and / or predetermined, and can be explicitly announced by signals.

[0312] Figure 14 This is a diagram 1400 illustrating a structured LDPC base graph for supporting LDCP codes within a rate range (minimum rate, maximum rate) used with multiple cyclic buffers. In an embodiment, LDPC codewords can be used with... Figure 14 The structured LDPC base graphics in the format shown are used to generate the output. Figure 14 In the example shown, the highest-rate LDPC code can correspond to [M] A M B A subset of the graph, while information bits can correspond to submatrix M. A Furthermore, P1 parity bits can correspond to submatrix M. B To obtain codes with lower data rates, matrix expansion processing can be used, which can generate an additional P2 parity bits. With these structured LDPC codes, the codeword corresponding to the lowest data rate can have three parts: information bits, P1 parity bits, and P2 parity bits, which can have different priorities for the decoder. Three buffers can thus be defined to transport these parts.

[0313] In this embodiment, the following information and / or parameters can be signaled: the rate matching capability of multiple circular buffers, the number of buffers B and their corresponding size Buffer_Size. b RV number k, corresponding ratio group [R k,1 ,R k,2 ,...,R k,B ], corresponding location set [SP k,1 SP k,2 ,...,SP k,B [], codeword size A, and whether to use an additional interleaver.

[0314] In this embodiment, a single-cycle buffer can also be used. In such an embodiment, the bit sequence provided as a channel coding result can be sent to the single-cycle buffer. The buffer size can depend on the base graph size and the boost size.

[0315] Figure 15 This is illustration 1500, a basic graphic representation of an example used with a single circular buffer. Figure 15 In the example shown, the base graphic size is M. b x N b And the boost size is Z. If all punched bits are contained in the buffer, then the buffer size is N. buffer It can be N b ·Z. In other embodiments, if there is N p If Z punched bits are not included in the buffer, then the buffer size can be N. b ·ZN p ·Z, where N p N is the number of perforated columns in the base pattern. As an example, if the first two columns of the base pattern are perforated, then N = 1. p =2. In one example, the size of the base graphic could be 46×68, and the first two columns could be punched. If it is assumed that there are no punched bits in the buffer, then the buffer size could be 66·Z.

[0316] If the specified boost value does not directly support the information bit size, zero-padding or fill bits can be inserted to make the number of information bits an integer multiple of the selected boost size Z. The fill bits can then be placed into a circular buffer.

[0317] In this embodiment, padding bits can be removed before transmission. In such an embodiment, the following assumptions can be made: K can be the number of information bits. K' can be the minimum supported information bit size supported by the selected base pattern, where K' is greater than K. Here, K' is an integer multiple of the boost size Z. F = K' - K can be the total number of padding bits. F' can be the number of padding bits actually used. Due to the RV version and coding rate, F' will not always be the same as F. For example, the minimum supported data rate determined by the base pattern size can be 1 / 3. However, this base pattern can be used to support lower data rate transmissions, such as rate 1 / 5. In one embodiment, codewords generated at rate 1 / 3 can be inserted into a circular buffer, and bits of number K / (coding rate) can be retrieved and transmitted from the circular buffer. This results in a portion of the bits in the circular buffer being repeated, potentially including padding bits. R can be the desired coding rate. The circular buffer size can be N buffers. The encoded bits in the circular buffer can be...

[0318] The detailed rate matching process using a single circular buffer may include calculating the codeword size with padding bits: N' = K' / R. If the RV start point S is given, then the end point index E can be calculated as mod(S + N' - 1, N). buffer The selected bits can be acquired during the journey from the starting point S to the ending point E. The actual number of fill bits F' can be counted. Typically, F' can be zero or an integer value. Fill bits of number F' can be removed.

[0319] In one embodiment, the padding bits are not removed before transmission. In this case, the padding bits can be used to signal control information. For example, all '0' padding bits can be used to signal control signal A, while all '1' padding bits can be used to signal control information B. In one embodiment, a fixed starting position for each RV can be pre-selected, wherein the total number of supported RVs is N. maxRV And the buffer size is N buffer .

[0320] Figure 16 It shows four redundant versions (RV)(N) of the scheme with the corresponding RV start positions evenly distributed in the buffer (a), the scheme with the RV start positions evenly distributed on the odd and even bits (b), and the scheme with the RV start positions evenly distributed on P2 odd and even bits (c). maxRV =4) is an example of a fixed starting position, as shown in Figure 1600.

[0321] For scheme (a) where RV is evenly distributed on the buffer, by selecting a fixed starting position for RV, the position can be made... Evenly distributed on the buffer, thus Where k = 0, 1, ..., N maxRV -1 is the RV index. If the first N can be obtained... p If Z punched bits are contained in the buffer, then the equation can be modified to: or Alternatively, these positions can be calculated based on the underlying graph and then converted into indices in the buffer. For example: or or

[0322] As an example, for the first two columns of the base graphic dimension that can be punched and is 46x48, the buffer size is 66Z. If the punched system bits do not enter the circular buffer, then the starting position [S0,S1,S2,S3] = [0,16Z,32Z,48Z].

[0323] The `floor()` operation can be used in the examples above and subsequent examples. However, in this embodiment, this operation can be replaced by the operations `ceil()` or `round()`. Here, `floor(x)` gives the largest integer less than or equal to x, `ceil(x)` gives the smallest integer greater than or equal to x, and `round(x)` gives the integer closest to x. By applying the `ceiling` or `round` operation instead of the `floor` operation, the starting position [S0,S1,S2,S3] = [0,17Z,33Z,50Z]. Another possible choice could be [S0,S1,S2,S3] = [0,16Z,33Z,49Z], where this choice is based on the formula... Based on.

[0324] For the first two columns, which are perforated and have a base graphic dimension of 42x52, the buffer size is 50Z. If the perforated bits do not enter the circular buffer, then by using a floor operation, the starting position [S0,S1,S2,S3] = [0,12Z,24Z,36Z], or by using a floor operation, the starting position [S0,S1,S2,S3] = [0,13Z,25Z,38Z]. Another possible choice could be [S0,S1,S2,S3] = [0,12Z,25Z,37Z].

[0325] In an embodiment, the uniformly distributed RV start points described above can be combined with the design of a self-decoding RV other than RV0. For example, the start point of RV3 can be moved forward toward the end of the buffer to make it self-decoding. For BG2, this would result in [S0,S1,S2,S3] = [0,17Z,33Z,56Z] and [S0,S1,S2,S3] = [0,13Z,25Z,43Z].

[0326] For scheme (b) where RV is evenly distributed across the parity bits, by choosing a fixed starting position for RV, the first position can be selected from the beginning of the codeword excluding the punched position, and the remaining positions can be evenly distributed across the parity bits. If the punched bit is not stored in the circular buffer, then... Where k = 0, 1, ..., N maxRV -1 is the RV index and K b =N b -M b K b Z is the length of the information bits. If the first N bits can be... p If Z punched bits are contained in the buffer, then the equation can be modified to:

[0327] or

[0328]

[0329] Alternatively, these positions can be calculated based on the underlying graph and then converted into indices in the buffer. For example:

[0330] or

[0331] or

[0332]

[0333] In a variant of the scheme where RV is evenly distributed across the parity bits, by choosing a fixed starting position for RV, the interval K can be made... b The starting position of the fixed RV can be selected to make the position... Evenly distributed on the buffer and spaced K b Therefore S k =mod(K) b Z*k,N buffer ), where k = 0, 1, ..., N maxRV -1 is the RV index and K b =N b -M b and K b Z is the length of the information bits. If the first N bits can be... p If each punched bit is contained in the buffer, then the equation can be modified to S k =mod(K) b Z*k,N buffer )+N p Z or S k =mod(K) b Z*k,N buffer -N p Z)+N p Z.

[0334] In another variation of the scheme that evenly distributes RV across the parity bits, by choosing a fixed starting position for RV, the position can be made... Evenly distributed on the buffer and spaced K b -N p Therefore S k =mod((K) b -N p Z*k,N buffer ), where k = 0, 1, ..., N maxRV -1 is the RV index, K b =N b -M b K b Z is the information bit length, and N is... p Corresponding to the perforated block. If the first N can be... p If each punched bit is contained in the buffer, then the equation can be modified to S k =mod((K) b -N p Z*k,N buffer )+N p Z or S k =mod((K) b -N p Z*k,N buffer -N p Z)+N p Z.

[0335] For scheme (c) that evenly distributes RV across P2 parity bits, by choosing a fixed starting position for RV, the first position can be selected from the beginning of the codeword excluding the punched position, and the remaining positions can be evenly distributed across the second part of the parity bits (i.e., Figure 16 (The P2 parity bits shown in the image). Figure 16 The example shows the starting position of RV, RV0, and... Where k = 0, 1, ..., N maxRV -1 is the RV index and K b =N b -M b and K b Z is the length of the information bits. If the first N bits can be... p If each punched bit is contained in the buffer, then the equation can be modified to:

[0336] or

[0337] Alternatively, these positions can be calculated based on the underlying graph and then converted into indices in the buffer. For example:

[0338] or

[0339] or

[0340]

[0341] In a variant of the scheme where RV is evenly distributed across P2 parity bits, by choosing a fixed starting position for RV, the interval K can be made... b +P1. These fixed RV starting positions can be selected to make the position... They can be evenly distributed in the buffer and spaced K b Therefore S k =mod((K) b +P1)Z*k,N buffer ), where k = 0, 1, ..., N maxRV -1 is the RV index and K b =N b -M b and K b Z is the length of the information bits. If the first N bits can be... p If each punched bit is contained in the buffer, then the equation can be modified to S k =mod((K) b +P1)Z*k,N buffer )+N p Z or S k =mod((K) b +P1)Z*k,N buffer -N p Z)+N p Z.

[0342] In another variant of the scheme where RV is evenly distributed across P2 parity bits, by choosing a fixed starting position for RV, the interval K can be made... b +P1-N p A fixed RV starting position can be selected to make the position... They can be evenly distributed on the buffer and spaced K b Therefore S k =mod((K) b +P1-N p Z*k,N buffer ), where k = 0, 1, ..., N maxRV -1 is the RV index. K b =N b -M b And K b Z is the length of the information bits. If the first N bits can be... p If each punched bit is contained in the buffer, then the equation can be modified to S k =mod((K) b +P1-N p Z*k,N buffer )+N p Z or S k =mod((K) b +P1-N p Z*k,N buffer -N p Z)+N p Z.

[0343] Once a cyclic buffer is formed, the bits in the buffer can be For each transmission, the transmitter can select one of the RV indices for transmission. For example, for the m-th transmission, the transmitter can select RV k . If the expected codeword length is N, the transmitted bits can be

[0344] Different retransmission versions may have different performances. This performance may also depend on the code rate or the codeword length. If the number of overlapping bits in each transmission is small, better performance will be achieved. If N maxRV = 4, the natural order of the RVs is [RV0, RV1, RV2, RV3]. However, an unnatural RV order can be used to achieve better HARQ performance. For example, the following RV order can be used in an embodiment: [RV0, RV2, RV3, RV1]. If the self-decodable RV starting positions are considered, the following RV order can also be applied: [RV0, RV2, RV1, RV3].

[0345] Although the LDPC codes defined for a system may have multiple protograph matrices corresponding to multiple parity-check matrices, these protograph matrices can be defined based on the information block length. For example, if the information block length is greater than a threshold (i.e., X), LDPC protograph matrix 1 can be used; otherwise, protograph matrix 2 can be used. In some embodiments, the segmentation process introduces an uneven bit distribution. When performing the segmentation process, one or more segments may fall within the range of protograph matrix 1, while one or more other segments may fall within the range of protograph matrix 2.

[0346] As an example, a transport block may have Y information bits and it is greater than the maximum supported information bits. Thus, the segmentation process can be performed. Due to some uneven segmentation process, one segment has Y1 bits and another segment has Y2 bits. A possible situation is Y1 > X and Y2 < X, and this will trigger 2 LDPC codes.

[0347] As an example, the described embodiments may pre-fill one or more smaller segments so that the size of the filled segments is greater than the threshold X, and thus the same LDPC protograph matrix can be used to solve this problem. In another embodiment, the number of segments can be incremented by 1 so that the length of each segment can belong to a region smaller than the threshold X.

[0348] As described above, in embodiments, bit interleaving can be performed after rate matching and just before modulation. In one embodiment, a block interleaver can be used. To determine the size of the block interleaver, one or more of the following parameters can be considered: boost size Z, modulation order or number of bits in the modulated symbol, number of supported data streams, and allocated RB size or minimum supported RB size.

[0349] Figure 17 This is flowchart 1700 illustrating an LDPC encoding process using interleaving. As described above, given the TBS and code rate, LDPC basic graph selection and segmentation processing can be performed. Then, the LDPC encoding operation can be performed. Figure 17 In the example shown, the transmitter can then insert padding bits (1710), perform LDPC encoding (1720), puncture the first 2Z information bits (1730), pass the output to the circular buffer (1740), perform rate matching (1740), remove padding bits (1750), perform interleaving (1760), and perform modulation (1770).

[0350] To perform rate matching (1740), the number of bits to be transmitted, N, can be adjusted. cb Perform the calculation. N cb This can depend on the modulation order, the number of padding bits, and the allocation of resource blocks. As an example, N rb One RB can be allocated to the transmission, where each RB can carry N. symPerRB There are 3 modulation symbols, and the modulation order can be M. The number of padding bits can be assumed to be N. filler In this scenario, N cb =N rb ·N symPerRB ·log2M+N filler And Ncb bits can be read from the circular buffer.

[0351] To perform interleaving (1760), a block interleaver can be used, where the number of rows can be determined by the modulation order. For example, for 64QAM, the modulation order M = 64, and the number of rows in the block interleaver can be set to m = log2(M) = 6. The block interleaver can be written row by row and read column by column.

[0352] Several modulation mapping orders can be defined, including natural order, reverse order, and cyclic shift order. For natural order, each column of bits read from the block interleaver can be directly sent to the modulation mapper. For reverse order, each column of bits read from the block interleaver can be flipped before being sent to the modulation mapper. For example, for 64QAM modulation, the natural order of a column of bits from the block interleaver could be [m0, m1, m2, m3, m4, m5]. The reverse order could be [m5, m4, m3, m2, m1, m0], and the modulator input can follow this reverse order. For cyclic shift order, each column of bits read from the block interleaver can be cyclically shifted by S... shift Bits. For example, for 64QAM modulation, the natural order of a sequence of bits from the block interleaver could be [m0, m1, m2, m3, m4, m5]. Having S shift The cyclic shift sequence of 2 can be [m2, m3, m4, m5, m0, m1], and the input of the modulator can follow this cyclic shift sequence. It has S shift The cyclic shift sequence of 4 can be [m4,m5,m0,m1,m2,m3], and the input of the modulator can follow this cyclic shift sequence.

[0353] In the embodiments, each unique modulation mapping order as described above can be assigned a modulation mapping order index (MMOI). For example, as shown in Table 2 below, MMOI = 0 can indicate a natural order. MMOI = 1 can indicate a reverse order. MMOI = 2 can indicate an order with S shift =mod(2,log2(M)) is a circular shift order. MMOI=3 can indicate the cyclic shift order with S. shift =mod(4,log2(M)) is a circular shift order. MMOI=4 can indicate the cyclic shift order with S. shift =mod(6,log2(M)) is a circular shift order. MMOI=5 can indicate the cyclic shift order with S. shift =mod(8,log2(M)) cyclic shift order. The modulation order mentioned above is provided as an example. However, the system may use the same set of modulation orders, a larger set of modulation orders, or a subset of modulation orders. The MMOI can be determined, announced, and / or implied according to the transmission scenario.

[0354] In embodiments where MMOI is determined or pre-configured, the same MMOI can be applied to the entire CB. MMOI 0 and 1 (corresponding to natural order and reverse order) can be used. In embodiments, MMOI can be determined by RV and / or New Data Indicator (NDI). In other embodiments, MMOI can be pre-configured. For example, for RV0 with new data transmission (i.e., NDI is switched), MMOI = 0. For RV0 with retransmission (i.e., NDI is not switched), MMOI = 1. For RV1, MMOI = 1. For RV2, MMOI = 0. For RV3, MMOI = 1.

[0355] In another embodiment, the same MMOI can be applied to the entire CB. MMOIs 0, 1, and 2 / 3 / 4 / 5 (corresponding to natural order, reverse order, and cyclic shift order) are all usable. In this embodiment, the MMOI can be determined by RV and / or NDI. In other embodiments, the MMOI can be pre-configured. For example, for RV0 with new data transmission (i.e., NDI is switched), MMOI = 0. For RV0 with retransmission (i.e., NDI is not switched), MMOI = 1. For RV1, MMOI = 2 (i.e., Sshift = mod(2, log2(M)), for RV2, MMOI = 4 (i.e., Sshift = mod(6, log2(M)), and for RV3, MMOI = 3 (i.e., Sshift = mod(4, log2(M)).

[0356] Table 2

[0357]

[0358] In another embodiment, different MMOIs may be applied to a CB. For example, a CB may be divided into P parts, and each part may have one MMOI. In this embodiment, the MMOI can be determined by RV and / or NDI. In other embodiments, the MMOI may be pre-configured. For example, each CB may have P = 4 parts. As an example, as shown in Table 3 below, the parts may be implemented in a uniform manner. In this embodiment, the MMOI assignments provided in these examples may be modified to conform to the implementation described herein.

[0359] Table 3

[0360] Part 1 Part 2 Part 3 Part 4 RV0 MMOI=0 MMOI=2 MMOI=3 MMOI=4 RV1 MMOI=2 MMOI=3 MMOI=4 MMOI=0 RV2 MMOI=3 MMOI=4 MMOI=0 MMOI=2 RV3 MMOI=1 MMOI=2 MMOI=0 MMOI=3

[0361] The internal parity checking capability of the LDPC decoder can improve its false alarm performance. Therefore, in this embodiment, a CB-level CRC is not necessary to achieve the desired false alarm criterion. Instead, a group of blocks can share a common CRC to reduce overhead and thereby increase data transmission throughput.

[0362] Figure 18A This is flowchart 1800A, an example of a TB processing method using a CQ-LDPC code with CBG-level CRC for a data channel. Flowchart 1800A and... Figure 4B The flowchart is the same as 400B, except that CB-level CRC attachment (440B) is replaced by CBG generation and CBG-level CRC attachment (1810A). In the embodiment, CB-level CRC (440B) can be regarded as a special case of CBG-level CRC 1810A with a group size of 1.

[0363] For CBG generation and CBG-level CRC attachment (1810A), a CBG can be formed by cascading several CBs and attaching CRC bits to each CBG. Several parameters for CBG generation and CBG-level CRC attachment (1810A) may need to be determined, including the number of CGs in the TB, the number of CBs in each CBG, and the CRC length for each CBG.

[0364] Figure 18B This is flowchart 1800B, another example of a TB processing method using a data channel with a QC-LDPC code having CBG-level CRC. Figure 18B In the example shown, compared to the above text Figure 18A The described CBG operations will be compared with those in the above text. Figure 4B The described CB operations are combined. In Figure 4B , 18A Keep the same boxes with the same labels between 18B and 18B. Figure 18B In the example shown, the method includes performing processing 1820 after rate matching processing (470B) to replace interleaving processing 460B prior to rate matching processing.

[0365] CBGs can be generated using various methods. In one embodiment of CBG generation, the number of CBs in each CBG can be configured. B can be a value representing the total number of segmented CBs in a single TB. This value can be determined during parameter determination (420B) and can be used during code block segmentation (430B). Let S1,…,S B L is the size of the segmented CB. L can be the total number of CBGs in TB, and can be X1,…,X L Let L be the number of CBs in L CBGs. And L and X1,…,X L It can be determined in one of several different ways. In subsequent embodiments, these methods may be announced by the first embodiment regarding CBG-related signaling as described below.

[0366] In one embodiment, the number of CBs in the CBG (e.g., X) max ) can be predefined or preconfigured. L can be set to cause The number of CBs in the first L-1 CBGs can be equal to X. max The number of CBs in the last CBG can be equal to B-(L-1)*X max .in other words:

[0367] X i =X max i = 1, ..., L-1

[0368] X L =B-(L-1)*X max

[0369] The number of CBs in the first mod(B,L) CBGs can be The number of CBs in the remaining L-mod(B,L) CBGs can be... in other words:

[0370]

[0371]

[0372] In another embodiment, the number of bits supported in the CBG (e.g., P) max () can be predefined or preconfigured. Y1,…,Y B This can be the number of bits in each code block of a TB. The number of CBs in the first CBG can be set to a maximum value of X1, so that... The number of CBs in the second CBG can be set to the maximum value x2, so that And so on.

[0373] In another embodiment regarding CBG generation, the number of CBGs in each TB can be configured. Communication systems may have limitations regarding the maximum number of ACK / NACK feedback bits (e.g., B') on a per-TB basis. Clearly, L ≤ min{B, B'}. In this case, the maximum number of CBGs in a TB (i.e., B') can be predefined or preconfigured. If a TB has a total of B segmented CBs within a single TB, then each CBG can have... CBs. Here, the last CBG can contain fewer than CBs. The CB. In an alternative scheme for grouping CBs, if the maximum number of CBGs on a per TB is given (e.g., B'), then some CBGs can be set to contain One CB, and other CBGs can be set to include B′1 can contain CB. The number of CBGs of CB, and B′2 can be a collection of CBs. The number of CBGs in each CB. The values ​​of B′1 and B′2 can be determined by the following equation: B′1 + B′2 = B′; b) (In particular, as well as The first B′1 CBG may contain One CB, and the last B′2 CBG may contain CB. In addition, the first B′2 CBG may also contain CB. One CB, and the last B′1 CBG may contain CB.

[0374] If B ≤ B′, then each CBG may contain only a single CB. Since the total number of CBGs is less than B′, some additional signaling may be required to notify the receiver. This embodiment may include signaling processing using a second embodiment of CBG-related signaling as described below.

[0375] In another embodiment, the two CBG generation processing embodiments described above can be combined according to the TB size. For larger TB sizes (e.g., eMBB traffic), it is ideal to limit the ACK / NACK feedback signaling overhead. For small to medium TB sizes, it is ideal to specify the number of CBs for each CBG, thereby allowing the appropriate set of CBs to be formed and transmitted in a timely manner. This embodiment can be implemented by applying the following process: if the TB size > TB_thres, then the second CBG generation embodiment described above can be applied; otherwise, the first CBG generation embodiment described above can be applied. TB_thres can be predefined or configured via RRC messaging. Based on this embodiment, the first or second CBG generation embodiment described above can be selected to determine the number of CBGs or the number of CBs in each CBG, respectively, wherein the number can be announced to the receiver using the corresponding CBG signaling method described below for decoding.

[0376] In this embodiment, by using multi-level CBGs, retransmitting the entire CB within a large CBG can be avoided. For the initial transmission, the receiver can generate a single-bit ACK or NACK for each CBG based on the success or failure of decoding the CBs within that CBG. If the CBG corresponds to a NACK, then the transmitter can retransmit all CBs within the CBG. For retransmissions, the CBG size can be reduced (e.g., reduced to the size of a sub-CBG). In other words, the receiver can generate a single-bit ACK or NACK for each sub-CBG for the retransmitted CBs based on the success or failure of decoding the CBs within that sub-CBG. In the second retransmission, if the sub-CBG corresponds to a NACK, then the transmitter can transmit all CBs within the sub-CBG. This avoids retransmitting all CBs within the CBG. The sub-CBG size can continue to decrease with each subsequent retransmission.

[0377] As an example, consider a two-level CBG, where each CBG corresponds to the initial transmission, and each sub-CBG corresponds to retransmissions in all rounds. For the initial transmission, each CBG can use 1 bit of ACK / NACK. If the feedback is ACK, then the 1 bit of ACK / NACK from each CBG can continue to be used for new transmissions. If the 1 bit of feedback NACK is used for the initial transmission, then the sub-CBG level ACK / NACK can be used for retransmissions, and each sub-CBG can use 1 bit of ACK / NACK.

[0378] Figure 19 This is a diagram from 1900 illustrating an example of a two-level CBG. In Figure 19 In the example shown, one CBG contains 6 CBs, and one sub-CBG contains 3 CBs. Transmitter 1960 can send an initial transmission 1910 about the CBG. After the initial transmission 1910, if a CB in the CBG (e.g., the first CB1) is not correctly decoded, receiver 1970 can send back a single-bit NACK 1920. Then, transmitter 1960 can retransmit all 6 CBs in that CBG in a first retransmission 1930. Since these six CBs belong to two sub-CBGs, the feedback about the first retransmission 1930 can include two bits, with one bit for each sub-CBG.

[0379] In the illustrated example, the first sub-CBG is still not correctly decoded after the first retransmission 1930. Here, feedback 1940 is (NACK, ACK), where NACK means the decoding of the first sub-CBG failed, and ACK means the decoding of the second sub-CBG was successful. Once feedback 1940 is received, transmitter 1960 will only transmit the three sub-CBGs of the first sub-CBG in the second retransmission 1950. This reduces the amount of transmission required.

[0380] Alternatively, CBG-level acknowledgments can be asymmetric. If a CBG is successfully detected, a bit can be set in the CBG ACK. If a CBG is not successfully detected, a bit mapping can be used in the CBG NACK. Each bit in this bit mapping can correspond to a CB in the CBG. If a CB is considered successfully detected, the corresponding bit in the bit mapping can be set to 0. Otherwise, it can be set to 1. In this example, 0 and 1 are interchangeable. The number of bits in the bit mapping can be explicitly announced in the NACK by signaling. Alternatively, the number of bits in the bit mapping can be implicit and can be determined by the number of CBs in each CBG, which is known at both the transmitter and receiver.

[0381] To determine the CRC length for each CBG, one of several different methods can be used. In one embodiment, the CBG-level CRC length C3 can depend on the number of CBs (e.g., X) in the CBG. For example, a long CRC length can be used for groups with more CBs to achieve a false alarm rate (FAR) performance similar to that achieved by using a short CRC length for groups with fewer CBs. For example, suppose the supported CBG-level CRC length is CRC1 ≤ CRC2 ≤ CRC3 bits. The CBG-level CRC length can be determined as follows:

[0382] C3 = CRC1, if X <Thres1;

[0383] C3 = CRC2, if Thres1 ≤ X <Thres2;

[0384] C3 = CRC3, if Thres2 ≤ X

[0385] Thres1 <Thres2。

[0386] In another embodiment, the CBG-level CRC length C3 can depend on the size of the CBs in the CBG (e.g., Y bits per CB). For example, a long CRC length can be used for CBGs with larger CB sizes, while a short CRC length can be used for CBGs with smaller CB sizes. The CBG-level CRC length can be defined as follows:

[0387] C3 = CRC1, if Y <Thres3;

[0388] C3 = CRC2, if Thres3 ≤ Y <Thres4;

[0389] C3 = CRC3, if Thres4 ≤ Y

[0390] where Thres3 < Thres4. As described above, this embodiment and the previous embodiments can be used under the assumption of a uniform CBG generation process.

[0391] In another embodiment, based on the total CB size within the CBG, the CBG-level CRC length can be CBG-specific. Specifically, the CBG-level CRC length C3 can depend on the sum of the CB sizes within the CBG. For example, assume Y i is the CB size of the i-th CB within the CBG. The CBG-level CRC length can be determined as follows:

[0392] C3 = CRC1, if

[0393] C3 = CRC2, if

[0394] C3 = CRC3, if

[0395] where Thres5 < Thres6.

[0396] As mentioned above, in the LDPC encoding process, the mother code rate of the LDPC code can be determined based on the data QoS. For downlink transmission in a cellular system, the eNB can determine the mother code rate of the LDPC code. This mother code rate information may need to be sent to the WTRU so that the WTRU can use the same parity check matrix for decoding.

[0397] In an embodiment, the mother code rate is different (or lower) from the code rate of each transmission. For example, in an LTE system, 5-bit MCS index and RB assignment information are included in the DCI information block. The MCS index and RB assignment both imply the length of the coding block. Also, the TBS size can be determined based on a look-up table. Then, the receiver can derive the length of each segment. After that, the code rate for transmission can be determined. The WTRU may still need to know the mother code rate so that it can allocate sufficient memory for retransmission and perform decoding using an appropriate parity check matrix.

[0398] For example, assume there are R supported mother code rates. The total number of bits used to indicate this mother code rate is As an example, R = 4, and 2-bit information about the mother code rate can be generated. These bits can be placed in the DCI together with other parameters and can be delivered to the WTRU.

[0399] Since the master code rate may only be one-time information transmitted through several retransmissions, this information can be combined with the new data indicator bit. For example, if the new data indicator is 1, then it can be included in the DCI. The mother code rate is 1 bit. If the new data indicator is 0, then no mother code rate is needed in DCI because these transmissions are just retransmissions and the same mother code rate can be used.

[0400] In the example above, since the absolute master code rate is typically smaller than the code rate for each transmission, the absolute master code rate can be encoded and transmitted in DCI. Therefore, given the code rate of the current transmission, the complete master code rate is used. Using a single bit to indicate the mother code rate would be wasteful. It could simply indicate the possible mother code rates that are less than the currently transmitted code rate. Here, the mother code rate used could be relative to the currently transmitted code rate. For example, suppose the complete set of mother code rates is {1 / 3, 2 / 5, ...} 1 Given the given information as {1 / 3, 2 / 3}, and the current transmission rate is already 0.45, the possible mother code rates can only be {1 / 3, 2 / 5}. Therefore, 1 bit of information can be used.

[0401] For uplink transmissions in a cellular system, as an example, the eNB can also determine the modulation and coding scheme, redundancy version, RB assignment, and NDI for the WTRU. This information can be included in DCI format 0 and sent to the WTRU. The WTRU can then follow this instruction to perform the uplink transmission. Similarly, for uplink transmissions, the mother code rate of the LDPC code can also be included in DCI format 0. Since this information remains unchanged for retransmissions, it is only necessary for the transmission itself.

[0402] As mentioned above, the selection of the original model matrix can be implied by the WTRU category included in the WTRU capability information. Once the base station (eNB) receives the WTRU category information, it can make the corresponding selection of the original model matrix.

[0403] Figure 20 This is a flowchart 2000 illustrating a method for selecting a prototype graph matrix for a specific WTRU at a base station (e.g., an eNB), wherein the base station has WTRU category information. Figure 20 In the example shown, the base station receives a Radio Resource Control (RRC) message (2010) that includes WTRU category information. The base station can determine whether the WTRU category is associated with a single prototype matrix (2020). If the WTRU category is associated with a single prototype matrix, then a single prototype matrix can be applied (2030). If the WTRU category is not associated with a single prototype matrix (or is associated with more than one prototype matrix), then multiple prototype matrices can be applied (2040).

[0404] As mentioned above, the WTRU's ability to support multiple prototype matrices can be explicitly provided in the WTRU Capability Information Element (IE). For example, an additional item can be added to the UE-EUTRA-Capability IE to specify whether the WTRU supports multiple prototype matrices and / or indicate how many prototype matrices the WTRU supports. This can be indicated in the following way:

[0405] If only two LDPC codes are applicable within the system

[0406]

[0407]

[0408] Figure 21 Flowchart 2100 is another example of a method for selecting a prototype graph matrix for a specific WTRU at a base station (e.g., an eNB), wherein the base station has WTRU capability information. Figure 21 In the example shown, the base station receives an RRC message (2110) containing WTRU capability information. The base station can determine whether the WTRU capability information, i.e., the UE ldp capability information, includes ldpc_matrix_number > 1. If the WTRU capability information does not indicate the ability to apply more than one prototype matrix (e.g., the UE ldpc capability information does not have ldpc_matrix_number > 1), then a single prototype matrix can be applied (2130). If the WTRU capability information indicates the ability to apply more than one prototype matrix (e.g., the UE ldpc capability information has ldpc_matrix_number > 1), then multiple prototype matrices can be applied (2140).

[0409] As described in detail above, the CBG generation process may include determining the number of CBs in each CBG and the total number of CBGs in each TB. CBG-related parameters can be signaled to the WTRU in a variety of different ways.

[0410] In one embodiment, the number of CBs in each CBG and the total number of CBGs in each TB can depend on the maximum number of CBs supported in the CBG (i.e., x). max In another embodiment, these quantities may depend on the maximum number of bits supported by the CBG (i.e., P). max In these embodiments, X max or P max This may need to be signaled from the transmitter to the receiver. In an embodiment, this information may be included in the DCI. Here, X max or P max The value can be selected from a set of candidates, where only the index of the candidate may need to be included in the DCI for downlink transmission or the UCI for uplink transmission. For example, the maximum number of CBs in the CBG can be selected from a set... The bit '00' can indicate 5, bit '01' can indicate 10, bit '10' can indicate 15, and bit '11' can indicate 20. The DCI or UCI may also include an additional 2 bits related to the CBG generation process.

[0411] One method for configuring CBG replacements could be using offset settings. The offset could be selected from the set {-1, 0, 1}, where '-1' could mean the new maximum number of CBs is less than the previous value, '0' could mean the new maximum number of CBs is equal to the previous value, and '1' could mean the new maximum number of CBs is greater than the previous value. As an example, suppose the maximum number of CBs in past CBG generation processes used for previous TBs comes from the set... The offset value '-1' can mean the new value is 5, the offset value '0' can mean the new value is 10, and the offset value '1' can mean the new value is 15.

[0412] In the above embodiments, it is assumed that the CBG size can be dynamically adjusted using DCI indications. In some embodiments, this configuration can be semi-static. In such embodiments, signaling can be RRC-based. As an example, the CBG enabler and CBG size can be configured in the RRC connection establishment or RRC connection reconfiguration message. As an example, the following items can be added to the RRCConnectionReconfiguration message:

[0413]

[0414] The configuration of CBG size can also be based on two levels: a semi-static level using RRC signaling and a dynamic level using DCI / UCI signaling. As an example, RRC signaling can provide a default CBG size (e.g., based on WTRU capacity and channel bandwidth), while DCI signaling can provide an adjusted CBG size (e.g., based on channel conditions, the total number of CBs in the TB, and data QoS).

[0415] In another embodiment, the number of CBs in each CBG and the total number of CBGs in each TB can depend on the maximum number of CBGs supported in the TB (i.e., B′). In this embodiment, the value of B′ can be configured in a semi-static manner, for example, by means of RRC signaling, where only candidate indices need to be included in the RRC message. As an example, the maximum number of CBGs in the TB can be selected from the set B = {10, 20, 30, 40}. Index 0 can indicate B′ = 10, index 1 can indicate B′ = 20, index 2 can indicate B′ = 30, and index 3 can indicate B′ = 40.

[0416] The number of CBGs can be configured in the RRC connection establishment or RRC connection reconfiguration messages. For example, the following items can be added to the RRC Connection Reconfiguration message.

[0417]

[0418] The DL / UL CBG enable symbol in the above message can be combined with the DL / UL CBG quantity index. If the DL / UL CBG function is disabled, then the corresponding DL / UL CBG quantity can be equal to the number of CBs per TB. In other words, each CBG can consist of a single CB. If a value is reserved in the DL / UL CBG quantity index to indicate this information, then this information can be conveyed on the DL / UL CBG quantity index.

[0419] In this embodiment, the list of possible values ​​for B' can be configured using RRC signaling, and the selection from the configured number of CBGs can be made using MAC signaling. For example, a set of possible B' values ​​could be {10, 20, 30, 40}. This set of values ​​can be delivered via an RRC connection establishment message or an RRC connection reconfiguration message. As an example, based on data QoS, data size, channel conditions, and channel bandwidth, the actual number of CBGs can be selected from the configured number of CBGs, and this number can be delivered using MAC signaling. In the above example, for a CBG number equal to 10, the MAC signaling can use index "00", for a CBG number equal to 20, it can use "01", for a CBG number equal to 30, it can use "10", and for a CBG number equal to 30, it can use "11".

[0420] In this embodiment, the list of possible values ​​for B' can be configured using RRC signaling, and the selection from the configured number of CBGs can be made using L1 signaling (e.g., DCI). For example, a set of possible B' values ​​could be {10, 20, 30, 40}. This set of values ​​can be delivered via an RRC connection establishment message or an RRC connection reconfiguration message. As an example, the actual number of CBGs can be selected from the configured number of CBGs based on data QoS, data size, channel conditions, and channel bandwidth, and the actual number of CBGs can be signaled using L1 signaling (e.g., DCI). In the above example, L1 signaling can use index "00" for a CBG number equal to 10, "01" for a CBG number equal to 20, "10" for a CBG number equal to 30, and "11" for a CBG number equal to 30.

[0421] If the TB contains fewer CBs than the configured value (i.e., B CBs, where B ≤ B'), then dynamic signaling can be applied in the DCI or UCI. Here, a 1-bit indicator can be added to the DCI or UCI. Setting this bit to 1 means B ≤ B', each CBG subsequently contains 1 CB, and the TB contains fewer than B' CBGs. For retransmissions, the number of retransmitted CBGs can be less than the number of CBGs included in the initial transmission. In this case, the 1-bit indicator can be added to the DCI or UCI to indicate that the number of CBGs in the retransmission is less than the configured number of CBGs.

[0422] In an embodiment, the DCI or UCI may include information about the actual CBGs used in the current transmission. A simple way to handle this is to include a CBG bitmap in the DCI or UCI, where the size of the bitmap is the configured number of CBGs. For example, if the configured number of CBGs is 5, then the DCI may contain 5 bits, where each bit corresponds to one CBG. If the bit is set to 0, then the corresponding CBG is not included in the current transmission. If the bit is set to 1, then the CBG is included in the current transmission.

[0423] The number of ACK / NACK feedback bits from the receiver is either equal to the configured (or indicated) number of CBGs or equal to the actual (or scheduled) number of CBGs transmitted. The choice between these two options can also be predetermined or configured (e.g., using RRC signaling). For example, the following can be added to the RRC Conversion Reconfiguration message:

[0424]

[0425] If Configured_CBG_ACK_NACK is set to true, then the ACK / NACK feedback can be based on the configured number of CBGs. Otherwise, the ACK / NACK feedback can be based on the actual number of CBGs transmitted.

[0426] Figure 22 This is a sample signal diagram 2200 illustrating the signal transmission for bit-based CBG indication and associated ACK / NACK feedback. Figure 22 In the example shown, RRC and / or MAC signaling are used to provide a configuration that each TB can contain up to 5 CBGs. Transmitter 2210 can send an initial transmission 2230 containing all 5 CBGs to receiver 2200. Here, the DCI includes a 5-bit CBG bitmap, where all bits are set to 1. In the illustrated example, receiver 2220 decodes the first, second, and fourth CBGs, but fails to decode the third and fifth CBGs. The receiver can provide ACK / NACK feedback 2340 given by [Ack,Ack,Nack,Ack,Nack]. In the first retransmission 2250, only the third and fifth CBGs are retransmitted, and the CBG bitmap of the DCI is set to [0,0,1,0,1].

[0427] Receiver 2220 can now decode both CBGs in the retransmission. Receiver 2220 can have two options regarding the Ack / Nack feedback 2260. One option is to make the number of ACK / NACK bits equal to the configured number of CBGs (i.e., 5). Here, feedback 2260 is [A,A,A,A,A], indicating that all 5 CBGs have been successfully decoded. The other option is to make the number of ACK / NACK bits in feedback 2260 equal to the number of CBGs included in the retransmission (i.e., 2 in the first retransmission). Here, feedback 2260 is [A,A], indicating that the two CBGs in the first retransmission have been successfully decoded.

[0428] In bit-mapped CBG indications, the NDI used for TB can be reused. Here, the NDI can act as CBG flushing information.

[0429] As an alternative to bit-mapped CBG indication, the actual number of CBGs can be indicated in each transmission. This number can be included in the DCI or UCI. For example, suppose the configured number of CBGs is B'. For each transmission, the DCI or UCI can use... Each bit indicates how many CBGs are included in the transmission. The actual number of CBGs in the initial transmission can be equal to the configured number of CBGs. If the number of CBs (i.e., B) per TB is less than the configured number of CBGs, then the actual number of CBGs in the initial transmission can be equal to the number of CBs per TB. The actual number of CBGs in a retransmission can depend on the ACK / NACK feedback from the previous transmission. In particular, the actual number of CBGs in a retransmission can be equal to the number of NACK bits in the feedback.

[0430] Figure 23 This is a signal diagram 2300 illustrating the signal transmission for the actual number of CBGs and the associated ACK / NACK feedback. Figure 23 In the example shown, RRC and / or MAC signaling are used to provide a configuration that each TB can contain up to 5 CBGs. Transmitter 2310 can transmit an initial transmission 2330 containing all 5 CBGs to receiver 2320. Here, DCI can include a field about the actual number of CBGs (i.e., 5), and since [log25] = 3, only 3 bits are used. If the receiver decodes the first, second, and fourth CBGs, but fails to decode the third and fifth CBGs, then receiver 2320 can provide feedback 2340 given by [Ack,Ack,Nack,Ack,Nack]. The first retransmission 2350 can contain only the third and fifth CBGs, and the actual number of CBGs in DCI can be set to 2. If receiver 2320 decodes both of these CBGs this time, then ACK / NACK feedback 2360 can be sent from receiver 2320 with several options. In one option, the number of ACK / NACK bits in feedback 2360 can be equal to the configured number of CBGs (i.e., 5). Here, feedback 2360 would be [A,A,A,A,A], indicating that all 5 CBGs have been successfully decoded. The second option is that the number of ACK / NACK bits in feedback 2360 equals the actual number of CBGs included in retransmission 2350 (i.e., the two used in the first retransmission 2350). Here, feedback 2360 would be [A,A], indicating that both CBGs in the first retransmission 2350 have been successfully decoded.

[0431] About X max (or P) max The determination of ) or B′ can depend on various factors, including, for example, channel conditions (e.g., Received Signal Strength Indicator (RSSI), Reference Received Power (RSRP), and / or Reference Received Quality (RSRQ)), WTRU capability, channel bandwidth, the total number of CBs in the TB, and / or data QoS. Better channel conditions can mean that more HARQ-ACK / NACK information bits can be encoded and fed back. This implicitly relaxes the limit on the total number of CBGs in the TB. Therefore, the corresponding X max It can be smaller.

[0432] For WTRUs with fewer features, the number of HARQ processes they support is limited. Therefore, X max The value can be chosen to be larger so that there are fewer CBGs per TB (and therefore fewer HARQ processes).

[0433] For WTRUs operating over larger bandwidths, more HARQ-ACK / NACK information bits can be encoded and fed back. This relaxes the limit on the total number of CBGs in a TB. Consequently, the corresponding X max It can be smaller.

[0434] If more data is transferred per TB, then more CBs will be generated. Therefore, X max The value can be larger to match the total number of CBs that will be sent within the TB.

[0435] For some data with high reliability requirements, the ratio of CRC bits to the total number of bits in the CBG may be relatively large, therefore, X max The value of X_max can be relatively small to improve FAR performance. For some datasets with low latency requirements, the value of X_max can be relatively small to increase the probability of successful detection.

[0436] The number of CRC bits in each CBG can also be signaled, as the receiver may need this information to perform error detection. The possible number of CRC bits can be selected from a set of candidates, where only the index of said candidate needs to be included in the DCI for downlink transmission or the UCI for uplink transmission.

[0437] The number of CRC bits per CBG can also be configured using a higher-level signaling. In this case, the CBG-level CRC length can be semi-static.

[0438] If two or more codewords are used in a MIMO application, signaling associated with CBGs can be defined. For example, the maximum number of CBGs for each codeword can be configured using RRC signaling. A simple way to perform this is to assume that all codewords contain the same number of CBGs. In this case, configuring the number of CBGs for a single codeword is sufficient. Another way to perform this is to assume that each codeword contains a different number of CBGs. Here, configuring the number of CBGs for each codeword will be necessary. Yet another way to perform this is to configure the maximum number of CBGs shared by all codewords.

[0439] DCI information can indicate which CBGs are included in the current transmission. In the case of multiple codewords, this indication can be based on a codeword-by-codeword basis. Alternatively, the indication can be included in the DCI corresponding to a single codeword.

[0440] If CBG is applied, the ACK / NACK feedback can be multiple bits. Furthermore, CBG-level ACK / NACK and TB-level ACK / NACK can occur simultaneously. Thus, two levels of ACK / NACK feedback can be included in the same UCI or DCI.

[0441] CBG-level ACK / NACK can be based on CBG-level CRC checks, or it can be based on a logical AND operation of ACK / NACK for all CBs within the CBG. TB-level ACK / NACK can primarily be based on TB-level CRC checks. Even if all CBG levels receive a positive response, the TB-level CRC check might fail. Therefore, in addition to CBG-level ACK / NACK feedback, TB-level ACK / NACK feedback is also necessary.

[0442] At the TB level, a single-bit ACK / NACK can be multiplexed with a multi-bit ACK / NACK at the CBG level. For example, a TB-level ACK / NACK can be at the beginning, while a CBG-level ACK / NACK can be after it. The number of CBG-level ACK / NACK bits changes with retransmissions and with each TB, depending on the number of CBGs used in the current transmission.

[0443] Figure 24A , Figure 24B , Figure 24C and Figure 24C Illustrations 2400A, 2400B, 2400C, and 2400D illustrate examples of CBG-level ACK / NACK feedback and retransmissions with TB-level ACK / NACK assistance. In the illustrated examples, it is assumed that the number of ACK / NACK feedback bits equals the number of CBGs actually (or scheduled) transmitted. The same approach for TB-level ACK / NACK can be applied to cases where the number of ACK / NACK feedback bits equals the configured (or indicated) number of CBGs.

[0444] The example shown assumes a TB has 10 CBGs. After the first transmission, the third, fifth, and ninth CBs are not decoded correctly. Figure 24A As shown, the hybrid TB and CBG ACK / NACK 2400A has 11 bits, which includes 10 bits of CBG-level ACK / NACK 2410 and 1 bit of TB-level ACK / NACK 2420.

[0445] After the first retransmission of the failed CBG, only the decoding of the ninth CBG was still incorrect. Figure 24B As shown, the hybrid TB and CBG ACK / NACK 2400B can have 4 bits, which includes 3 bits for CBG-level ACK / NACK 2430 and 1 bit for TB-level ACK / NACK 2440.

[0446] like Figure 24C As shown, after the second retransmission of the ninth CBG, if all CBGs are correctly decoded and the total TB passes the CRC check, then the mixed TB and CBG ACK / NACK 2400C can have two bits, including 1 bit for CBG-level ACK / NACK 2450 and 1 bit for TB-level ACK / NACK 2460. Figure 24D As shown, after the second retransmission of the ninth CBG, if all CBGs are correctly decoded, but the total TB fails the CRC check, then the mixed TB and CBG ACK / NACK 2400D can have 2 bits, including 1 bit of CBG-level ACK / NACK 2470 and 1 bit of TB-level ACK / NACK 2480.

[0447] If the number of ACK / NACK feedback bits equals the number of configured (or indicated) CBGs, then CBG-level ACK / NACK can implicitly indicate TB-level ACK / NACK. Specifically, if all configured CBGs are successfully decoded and pass the TB-level CRC check, the receiver can send ACKs for all CBGs. If all configured CBGs are successfully decoded, but the TB-level CRC check fails, the receiver can send NACKs for all CBGs.

[0448] Consider the same example as above, and assume there are 10 CBGs in a TB. After the first transmission, the third, fifth, and ninth CBGs are not decoded correctly. CBG ACK / NACK has 10 bits.

[0449] Figure 25A , 25B Illustrations 2500A, 2500B, 2500C, and 2500D are for another example of CBG-level ACK / NACK feedback and retransmission supplemented by TB-level ACK / NACK, based on the above examples. Figure 25A This displays a 10-bit CBG ACK / NACK 2500A as described in the previous paragraphs. After the first retransmission of the failed CBG, only the ninth CBG is still incorrectly decoded. Figure 25B As shown, CBG ACK / NACK 2500B has 10 bits. After a second retransmission of the ninth CBG, if all CBGs are correctly decoded and the total TB passes the CRC check, then... Figure 25C As shown, the CBG ACK / NACK 2500C has 10 bits. After a second retransmission of the ninth CBG, if all CBGs are correctly decoded, but the total TB fails the CRC check, then... Figure 25D As shown, the CBG ACK / NACK 2500D has 10 bits.

[0450] In LTE, the maximum number of redundancy versions is 4. Therefore, 2 bits are reserved for the RV field in DCI / UCI. In New Radio (NR), the maximum number of redundancy versions can be greater than 4. Therefore, more bits may be needed for the RV field in DCI / UCI. To avoid increasing the DCI / UCI payload size, the MCS field in DCI / UCI can be used to transport RV information.

[0451] In the initial transmission of LTE, the MCS index can be selected from 0 to 28, and RV is set to 0. In retransmissions in LTE, the MCS index can be selected from 29 to 31. Therefore, the MCS index in DCI / UCI can have 5 bits for 32 possible values. For retransmitted PDSCH, the MCS index is determined by the modulation order, not RV. For retransmitted PUSCH, the MCS index is determined by RV, not the modulation order.

[0452] For retransmitted NR-PDSCH, it is envisioned that only 2 bits are used for the MCS index in the DCI, depending on the modulation order. This saves 3 bits from the MCS index in the DCI. These 3 saved bits can be used for an increased number of RVs. This usage is based on the assumption that the RV field used for the initial transmission should be limited to 2 bits. In other words, the possible RVs used for the initial transmission can be selected from 0, 1, 2, and 3. Consider an example where, in the first transmission, the MCS index = '10010' and the RV = '00'. This means the MCS index is 18 and the modulation order is 6. In the retransmission, the MCS index = '10' and the RV = '00001'. This means the modulation order is 6 and the redundancy version is 1. By dynamically switching the MCS index field and the RV field in the DCI between the initial transmission and the retransmission, the DCI payload size can remain constant, while the number of supported RVs can increase from 4 (i.e., 2 bits) to 32 (i.e., 5 bits). In other words, by dynamically switching the MCS index field in the DCI between initial transmission and retransmission, up to 32 RVs can be supported.

[0453] In NR, if the number of supported RVs is less than 32, then CBG information can be indicated using bits saved from the MCS field in retransmissions (e.g., an indication that the actual number of CBGs is less than the configured number of CBGs, or an indication of the actual number of CBGs). A similar scheme can be applied to UCI.

[0454] The above describes several embodiments of bit interleavers. Several modulation mapping orders can be defined (e.g., natural order, reverse order, and cyclic shift order). In the embodiments, the modulation mapping order can be synchronized between the transmitter and receiver. Several methods are available for handling this synchronization between the transmitter and receiver: static signaling, semi-static signaling, dynamic signaling with additional DCI / UCI bits, and dynamic signaling with an MCS table.

[0455] For static signaling, there is no explicit signaling for the modulation mapping order. The modulation mapping order can be associated with RVs. In one embodiment, each RV corresponds either to the natural modulation mapping order or to the reverse modulation mapping order. For example, RV0 and RV2 can always follow the natural modulation mapping order, and RV1 and RV3 can always follow the reverse modulation mapping order. This may be because RV0 and (RV1, RV3) have some overlap in coded bits. The reverse modulation mapping order of (RV1, RV3) provides the difference between these overlapping coded bits. Similarly, RV2 and (RV1, RV3) may have some overlap in coded bits. The reverse modulation mapping order of (RV1, RV3) provides the difference between these overlapping coded bits. One possibility is that the reverse modulation mapping order of RV1, RV3 is only applicable to higher-order modulations, such as 16QAM, 64QAM, and 256QAM. In another embodiment, each RV corresponds to a cyclic shift order with a certain shift value. For example, RV0 can always follow a cyclic shift sequence with a shift value of 0, RV1 can always follow a cyclic shift sequence with a shift value of 2, RV2 can always follow a cyclic shift sequence with a shift value of 4, and RV3 can always follow a cyclic shift sequence with a shift value of 6. In another embodiment, each RV can correspond to a certain MMOI value. For example, RV0 can always correspond to MMOI=0, RV1 can always correspond to MMOI=1, RV2 can always correspond to MMOI=2, and RV3 can always correspond to MMOI=3.

[0456] For semi-static signaling, the modulation mapping order can be configured using a specific RRC signaling message, and this order can be associated with an RV. Here, RRC connection establishment or RRC connection reconfiguration messages can be used for this configuration. For example, the following items can be added to the RRCConversionReconfiguration message:

[0457]

[0458] The value "0" indicates a cyclic shift sequence with a shift value of 0, the value "1" indicates a cyclic shift sequence with a shift value of 2, the value "2" indicates a cyclic shift sequence with a shift value of 4, and the value "3" indicates a cyclic shift sequence with a shift value of 6.

[0459] In another embodiment, the value may indicate the MMOI index, and the following items may be added to the RRCConnectionReconfiguration message:

[0460]

[0461] The value "true" indicates the natural modulation mapping order, and the value "false" indicates the reverse modulation mapping order.

[0462] Because RV0 is associated with a constant modulation mapping order, static or semi-static signaling regarding the modulation mapping order may be detrimental to HARQ with append-combining types. To enhance diversity, RV0 can be switched between the natural and reverse modulation mapping orders based on the NDI value. If the NDI value is switched (i.e., a new transmission), then RV0 can be used for the natural modulation mapping order. Otherwise, RV0 can be used for the reverse modulation mapping order.

[0463] For dynamic signaling with additional DCI / UCI bits, the modulation mapping order can be dynamically announced using signals in the additional DCI / UCI fields. For example, the additional bit in the DCI or UCI can indicate whether a natural modulation mapping order or a reverse modulation mapping order is used. In another example, the additional two bits in the DCI or UCI can indicate the shift value of the cyclic shift modulation mapping (i.e., 0, 2, 4, 6). In yet another example, the additional bits in the DCI or UCI can indicate the MMOI index.

[0464] For dynamic signaling with an MCS table, it is assumed that the natural modulation mapping order is always applied for the initial transmission. Modulation mapping reordering only occurs during retransmissions. Therefore, the MCS table can be used to indicate modulation mapping reordering.

[0465] For downlink transmissions, the MCS table for PDSCH can use only 3 or 4 indices (i.e., 29, 30, 31, and / or 28) to indicate the modulation order in retransmissions. For uplink transmissions, the MCS table for PUSCH can use only 3 or 4 indices (i.e., 29, 30, 31, and / or 28) to indicate the RV version in retransmissions. Here, 2 bits can actually be used. Considering that the MCS index has a total of 5 bits, an additional 3 bits can be provided to indicate the modulation mapping order used for downlink or uplink retransmissions. The additional bits used can be one, two, or three. In the case of 1 bit, it can be used to indicate whether the natural modulation mapping order or the reverse modulation mapping order is used in the current retransmission. In the case of 2 or 3 bits, these bits can be used to indicate the shift value in the cyclic shift modulation mapping or to indicate the MMOI index.

[0466] The performance of some LDPC decoding algorithms may depend on the accuracy of SNR estimation. For example, offset minimum sum decoders or adjusted minimum sum decoders are not sensitive to SNR estimation errors, as are normalized minimum sum decoders.

[0467] The base station (eNB, gNB, or TPR) may need to know the decoding capabilities of the WTRU, including the decoding algorithms that the WTRU can support. This can be done in the RRC message during the initial pre-occupancy phase.

[0468] Based on channel conditions and some SNR calibration tests, the base station can estimate whether the WTRU has an appropriate SNR estimate. If so, a more advanced decoding algorithm that is sensitive to SNR estimation errors can be used. This decision can be communicated from the base station to the WTRU via RRC messaging. This message can be updated according to the channel conditions.

[0469] Figure 26 This is a signal diagram 2600 illustrating message exchange with WTRU capability and supported decoding algorithms. Figure 26 In the example shown, eNB 2610 sends a UE capability request message 2630 to WTRU 2620. In response to the request 2630, WTRU 2620 sends a UE capability response 2640, which may include a WTRU decoding algorithm. Upon receiving the UE capability response 2640, eNB 2610 may send a suggested decoding algorithm (2650) to WTRU 2620, wherein the algorithm may be determined at least in part based on the WTRU decoding algorithms supported by WTRU 2620 as indicated in the UE capability response 2640.

[0470] Since LDPC can also be used in eMBB UL, a similar SNR estimation adaptive decoding algorithm can be used for UL. Alternatively, more advanced decoding algorithms that are sensitive to SNR estimation errors can also be used. As an example, such algorithms can be predefined or specified for use on the base station.

[0471] For symbol-level interleaving for HARQ retransmission, a simple symbol interleaver can be used. For example, a row-column interleaver could be used, where the codeword bitstream can be written row-first, then column-later. The interleaver can read columns first, then rows.

[0472] Figure 27 This is illustration 2700 concerning the illustrative symbol-level row-column interleaver 2710. In Figure 27 In the example described, from each CB1...C Bm modulation symbol S 1,1 ...S m,nm It is distributed in the frequency domain. For example... Figure 27 The row-column interleaver shown can be used for the first transmission. If retransmission is required, a similar interleaver can be used. However, a subcarrier that included modulation symbols from a CB in the first transmission will also include modulation symbols from the same CB in the retransmission. If the subcarrier experiences deep fading, this will degrade the performance of decoding the CB. To avoid this problem, scrambling can be applied to the constituent CBs in the retransmission codeword before applying the row-column interleaver.

[0473] Figure 28 This is a diagram 2800 of a symbol-level row-column interleaver 2810, exemplified by retransmission scrambling 2820. In Figure 28 In the example shown, retransmission scrambling 2820 occurs before interleaving is performed using row-column interleaver 2810. In the illustrated example, CBm 2830a is moved to the beginning of codeword 2840 (denoted as 2830b). Other scrambling schemes can also be applied in embodiments. For example, if CB is at the i-th position of the codeword in the initial transmission, it can be set to the (i+offset)-th position in the codeword used for retransmission. In embodiments, the scrambling algorithm can depend on the number of transmissions. For example, the first retransmission and the second retransmission can use different scrambling parameters.

[0474] While features and elements in specific combinations have been described above, those skilled in the art will recognize that each feature or element can be used alone or in any combination with other features and elements. Furthermore, the methods described herein can be implemented in computer programs, software, or firmware incorporated into a computer-readable medium for execution by a computer or processor. Examples of computer-readable media include electrical signals (transmitted via wired or wireless connections) and computer-readable storage media. Examples of computer-readable storage media include, but are not limited to, read-only memory (ROM), random access memory (RAM), registers, buffer memory, semiconductor storage devices, magnetic media (e.g., internal hard disks and removable disks), magneto-optical media, and optical media (e.g., CD-ROM discs and digital multipurpose discs (DVDs)). The processor associated with the software can be used to implement a radio frequency transceiver used in a WTRU, UE, terminal, base station, RNC, or any computer host.< / null> < / null>

Claims

1. A wireless transmit / receive unit (WTRU), the WTRU comprising: Transceiver; as well as The processor is communicatively coupled to the transceiver. The processor is configured to receive code block group (CBG) configuration information from the base station. The processor is also configured to generate transfer blocks (TBs) comprising multiple bits. The processor is also configured to generate the relevant Cyclic Redundancy Check (CRC) bits for the TB. Based on the size of the TB including the relevant CRC bits, the TB including the relevant CRC bits is segmented into B code blocks (CBs), where B is a positive integer with a value greater than 1. The processor is further configured to determine L CBGs based on CBG configuration information, such that each of the first mod(B,L) CBGs includes a first number of CBs, and each of the remaining (L-mod(B,L)) CBGs includes a second number of CBs, where L is a positive integer with a value greater than 1, and the second number is different from the first number. The processor is further configured to send the encoded CB of the TB corresponding to L CBGs. The processor is further configured to receive scheduling downlink control information (DCI) for retransmitting the TB, the scheduling DCI including a CBG bit mapping indicating that at least one of the L CBGs should be retransmitted, and The processor is further configured to transmit Physical Uplink Control Channel (PUSCH) transmissions including at least one of the L CBGs, and Each of the B CBs is encoded using the same LDPC BG in either the first Low-Density Parity-Check (LDPC) Base Graphic (BG) or the second LDPC BG.

2. The WTRU of claim 1, wherein the processor is further configured to store the encoded bits corresponding to each CB in a circular buffer, wherein the starting position of each redundant version RV0, RV1, RV2 and RV3 in the circular buffer is an integer multiple of the boost size of the first LDPC BG or the second LDPC BG.

3. The WTRU according to claim 2, wherein: The first three starting positions of the first LDPC BG are RV0 = 0, RV1 = 17Z, and RV3 = 33Z, and the first three starting positions of the second LDPC BG are RV0 = 0, RV1 = 13Z, and RV2 = 25Z, where Z is the lift size of the first LDPC BG or the second LDPC BG.

4. The WTRU according to claim 2, wherein, For the transmission set, the redundant version transmission modes are RV0, RV2, RV3, and RV1.

5. The WTRU of claim 1, wherein the first quantity of CB is equal to the round up of (B / L), and the second quantity of CB is equal to the round down of (B / L).

6. A method implemented in a wireless transmit / receive unit (WTRU), the method comprising: Receive code block group (CBG) configuration information from the base station; Generate a transfer block (TB) consisting of multiple bits; Generate the relevant Cyclic Redundancy Check (CRC) bits for the TB; Based on the size of the TB including the relevant CRC bits, the TB including the relevant CRC bits is segmented into B code blocks (CB), where B is a positive integer with a value greater than 1; Based on the CBG configuration information, determine L CBGs such that each of the first mod(B,L) CBGs includes a first number of CBs, and each of the remaining (L-mod(B,L)) CBGs includes a second number of CBs, where L is a positive integer with a value greater than 1, and the second number is different from the first number; Send the encoded CB of the TB corresponding to L CBGs; Receive scheduling downlink control information (DCI) for retransmitting the TB, the scheduling DCI including a CBG bit mapping, the CBG bit mapping indicating that at least one of the L CBGs needs to be retransmitted; and Transmitting Physical Uplink Control Channel (PUSCH) transmissions including at least one of the L CBGs. Each of the B CBs is encoded using the same LDPC BG in either the first Low-Density Parity-Check (LDPC) Base Graphic (BG) or the second LDPC BG.

7. The method of claim 6, further comprising: The encoded bits corresponding to each CB are stored in a circular buffer, wherein the starting position of each redundant version RV0, RV1, RV2 and RV3 in the circular buffer is an integer multiple of the boost size of the first LDPC BG or the second LDPC BG.

8. The method according to claim 7, wherein: The first three starting positions of the first LDPC BG are RV0 = 0, RV1 = 17Z, and RV3 = 33Z, and the first three starting positions of the second LDPC BG are RV0 = 0, RV1 = 13Z, and RV2 = 25Z, where Z is the lift size of the first LDPC BG or the second LDPC BG.

9. The method according to claim 7, wherein, For the transmission set, the redundant version transmission modes are RV0, RV2, RV3, and RV1.

10. The method of claim 6, wherein the first quantity of CB is equal to the rounded-up value of (B / L), and the second quantity of CB is equal to the rounded-down value of (B / L).

Images