A single-key data parallel processing method, system, medium and device for GPU

Abstract

The application discloses a single-key data parallel method, system, medium and equipment for GPU, and the single-key data parallel signature of the XMSS algorithm is realized through the reuse of the XMSS tree construction process when the XMSS signature is performed, the thread number load balancing of the Winternitz one-time signature and the construction of the XMSS tree, the efficient selection of the authentication path and the root node in the parallel construction of the XMSS tree, and the provision of the parallel execution method of the highly configurable WOTS+ signature.

Description

Technical Field

[0001] This invention belongs to the field of network security technology, specifically relating to a method, system, medium, and device for GPU-based single-keypair data parallelism processing. Background Technology

[0002] Cybersecurity is a comprehensive discipline encompassing network device security, network information security, and network software security. Within network information security, secure information transmission is a crucial and essential aspect, closely intertwined with daily life. Signature algorithms are indispensable for secure information transmission, typically used to verify the authenticity of messages sent, and are a ubiquitous technology for secure network transmission. Recently, the XMSS signature algorithm was standardized by NIST in 2020; it is a hash-based signature algorithm resistant to quantum threats.

[0003] The quantum threat refers to the possibility that Shor's algorithm and Grover's algorithm could be used by quantum computers to break existing cryptographic systems such as RSA, DSA, and ECDSA. With the rapid development of quantum computers, existing cryptographic systems are becoming increasingly vulnerable, making the development and improvement of quantum-resistant algorithms increasingly important. In 2020, NIST standardized two quantum-resistant algorithms: XMSS and LMS. These two algorithms offer advantages in both security and efficiency compared to other quantum-resistant algorithms and are currently the only standardized quantum-resistant algorithms. Both algorithms are stateful, meaning that a private key can only be used for signing once. There are some limitations to their use, but they are recommended in the following scenarios:

[0004] 1. A digital signature solution needs to be deployed soon;

[0005] 2. The deployment will take a long time;

[0006] 3. Once this algorithm is deployed, it will not transition to other algorithms.

[0007] As a stateful hash-based signature algorithm, XMSS requires updating the private key after each signature, indicating a dependency—the private key needs to be updated based on the number of signatures. This hinders parallel signing of different messages using a single key pair in XMSS, making parallel signing of different messages difficult due to this dependency, thus severely impacting the throughput of XMSS signatures. Although signature time can be reduced through algorithmic parallelism, the throughput of algorithmic parallelism is lower than that of data parallelism due to its low degree of parallelism. Therefore, a single-key-pair data parallel signature scheme for XMSS urgently needs improvement. Summary of the Invention

[0008] The technical problem to be solved by the present invention is to provide a method, system, medium and device for parallel data processing using a single key pair in GPU, which addresses the shortcomings of the prior art and solves the technical problem that a single key cannot run the XMSS algorithm in parallel.

[0009] The present invention adopts the following technical solution:

[0010] A GPU-based method for parallel data processing using a single key pair includes the following steps:

[0011] S1. Adapt the XMSS algorithm code to single-key-pair data parallelism on the GPU and configure an improved correctness verification method to obtain the code for configuring the verification method.

[0012] S2. Based on the configuration verification method code obtained in step S1, the data transmission interface between CPU and GPU is customized, and the process of building the XMSS tree and WOTS+ signature in the XMSS algorithm is parallelized and reused. The parallelization and reuse process is executed in parallel. Through the authentication path and root node replication strategy, the single key pair data parallelism of XMSS signature is realized.

[0013] S3. Based on the configuration verification method code obtained in step S1, XMSS signature verification of different ciphertexts is performed using different threads. At the same time, a multi-stream transmission mechanism is deployed to achieve overlap of computation and communication, thereby realizing single-key pair data parallelism for XMSS signature verification.

[0014] Specifically, step S1 is as follows:

[0015] S101. Adjust the function interfaces for XMSS signing and XMSS signature verification;

[0016] S102. Port the correctness verification function and add a correctness verification interface for single-key pair data parallelism to verify the correctness of XMSS signatures and XMSS signature verification. In the correctness verification function, after the XMSS key pair is generated, a pair of key pairs for verification is copied. The copied private key is used to sign the serial version. The generated ciphertext is compared with the ciphertext generated by the signature method proposed in this invention. If they are the same, the ciphertext verification is correct; otherwise, the ciphertext verification fails. At the same time, the private key used to complete the serial signature is compared with the private key generated by the signature method. If they are the same, the private key verification is correct; otherwise, the private key verification fails.

[0017] Furthermore, in step S101, the message to be signed is plaintext, the authenticated signature is ciphertext, the number of plaintext / ciphertext is added to the XMSS signature / XMSS signature verification function interface, and multiple plaintext / ciphertexts are stored contiguously.

[0018] Specifically, step S2 is as follows:

[0019] S201. Deploy the GPU data transmission interface for the XMSS signature part. In the transmission interface between the CPU and the GPU, the GPU input part is a private key and multiple plaintexts to be processed, and the GPU output part is multiple expected ciphertexts.

[0020] S202. Based on the computational load, the execution threads for WOTS+ signing and XMSS tree construction are divided into tasks, and WOTS+ signing and XMSS tree construction are generated simultaneously to obtain a load balancing scheme.

[0021] S203. Based on the interface provided in step S201, deploy the single key pair data parallel construction scheme of the XMSS tree.

[0022] S204. Based on the load balancing scheme obtained in step S202, the number of threads for multiple WOTS+ signatures is adjusted according to the amount of computation, and the parallel execution of WOTS+ signatures is deployed.

[0023] Furthermore, in step S203, the starting signature index and the current tree height are used to locate the position of the current signature in the XMSS tree. Multiple signatures that build the same XMSS tree are constructed in parallel using single key pairs of XMSS tree data. The node value calculated by the current thread is queried to see if it is an authentication path. If it is an authentication path, it is copied to the position corresponding to the signature and continues until the top-level node is constructed. Each signature contains the value of the root node.

[0024] Specifically, step S3 is as follows:

[0025] S301. Deploy the GPU data transmission interface for the XMSS signature verification part. In the transmission interface between the CPU and the GPU, the GPU input part is a public key and multiple ciphertexts to be processed, and the GPU output part is multiple expected plaintexts. XMSS signature verification of different ciphertexts is processed by different threads.

[0026] S302. Based on the function interface provided in step S201, optimize the GPU data transmission interface of the XMSS signature verification part using multi-stream technology.

[0027] Furthermore, in step S302, data that does not change with the amount of ciphertext is transmitted synchronously, while data that changes with the amount of ciphertext is transmitted asynchronously in multiple streams. The number of streams is configured as a parameter and customized based on the ciphertext size and quantity.

[0028] In a second aspect, embodiments of the present invention provide a GPU-based single-key pair data parallel system, comprising:

[0029] The adaptation module performs GPU-based single-key-pair data parallel adaptation on the XMSS algorithm code and configures an improved correctness verification method, resulting in the code for configuring the verification method.

[0030] The first parallel module, based on the configuration verification method code obtained from the adaptation module, customizes the data transmission interface between CPU and GPU, and parallelizes and reuses the process of building the XMSS tree and WOTS+ signature in the XMSS algorithm. The parallelization and reuse process is executed in parallel, and the single key pair data parallelism of XMSS signature is achieved through the authentication path and root node replication strategy.

[0031] The second parallel module, based on the configuration verification method code obtained from the adaptation module, uses different threads to process XMSS signature verification of different ciphertexts, and deploys a multi-stream transmission mechanism to achieve overlap between computation and communication, thus realizing single-key pair data parallelism for XMSS signature verification.

[0032] Thirdly, a computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the steps of the GPU-based single-key pair data parallel processing method described above.

[0033] Fourthly, embodiments of the present invention provide a computer-readable storage medium including a computer program, which, when executed by a processor, implements the steps of the above-described GPU-based single-key pair data parallel processing method.

[0034] Compared with the prior art, the present invention has at least the following beneficial effects:

[0035] This invention discloses a single-key pair data parallel processing method for GPUs. By reusing the XMSS tree construction process during signing and rationally allocating the WOTS+ computational tasks, a single-key pair data parallel processing method for a quantum-resistant XMSS signature algorithm on GPUs is obtained. This method achieves efficient single-key pair data parallel signing of the XMSS algorithm through the reuse of the XMSS tree construction process during XMSS signing, load balancing of the number of threads in Winderitz one-time signing and XMSS tree construction, efficient selection of authentication paths and root nodes in parallel XMSS tree construction, and a highly configurable parallel execution method for WOTS+ signing. Furthermore, by deploying task allocation and a multi-stream scheme, efficient single-key pair data parallel signature verification of the XMSS algorithm is achieved.

[0036] Furthermore, methods for verifying correctness are provided, which can ensure accurate result verification when XMSS is run in parallel on GPU with a single key pair of data.

[0037] Furthermore, storing plaintext / ciphertext sequentially can fully utilize the GPU's data transfer capabilities and avoid performance degradation caused by multiple transfers.

[0038] Furthermore, by reusing the XMSS tree, performance acceleration is achieved for the XMSS signature process, overcoming the problem that single-key pair data cannot be parallelized during XMSS signature generation due to statefulness; at the same time, by configuring a parallelization scheme for WOTS+ signature and XMSS tree construction, GPU utilization is improved.

[0039] Furthermore, in order to effectively store the authentication path, each thread queries its own data to see if it is an authentication path node. This parallel query method can improve query efficiency compared to the serial query method, thereby providing overall parallel execution efficiency.

[0040] Furthermore, by leveraging the principle that different signature verification processes do not interfere with each other, the computation of XMSS signature verification is distributed to each thread for processing, thereby achieving data parallelism in the signature verification process and obtaining high throughput.

[0041] Furthermore, using asynchronous multi-stream transmission of data that varies with the amount of ciphertext can more effectively utilize the GPU's transmission capabilities, enabling overlap between computation and communication and achieving higher throughput compared to synchronous transmission. Simultaneously, configuring the number of streams as a parameter allows for customization based on the actual level of data parallelism, achieving high throughput under different data transmission volumes.

[0042] It is understood that the beneficial effects of the second to fourth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0043] In summary, this invention overcomes the problem that the XMSS algorithm cannot achieve data parallelism in the case of a single key pair due to its statefulness. Furthermore, it reuses the XMSS tree construction process by utilizing the statefulness characteristics, and achieves a high-performance data parallelism scheme by employing load balancing and multi-stream techniques.

[0044] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of a parallel signature scheme using a two-level XMSS tree. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] In the description of this invention, it should be understood that the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0048] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0049] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this document generally indicates that the preceding and following objects have an "or" relationship.

[0050] It should be understood that although terms such as first, second, third, etc., may be used in the embodiments of the present invention to describe the preset range, these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from one another. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0051] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0052] The accompanying drawings illustrate various structural schematic diagrams according to embodiments disclosed in this invention. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0053] This invention provides a GPU-based method for parallel processing of single-key pair data. By performing Winternitz One-Time Signature (WOTS+) signing and thread load balancing during XMSS tree construction, efficiently selecting authentication paths and root nodes during parallel XMSS tree construction, and providing a highly configurable parallel execution method for WOTS+ signing, efficient single-key pair data parallel signing of the XMSS algorithm is achieved. Furthermore, efficient single-key pair data parallel signature verification of the XMSS algorithm is realized through task allocation and multi-stream schemes.

[0054] Please see Figure 1 The present invention discloses a method for parallel data processing using a single key pair on a GPU, comprising the following steps:

[0055] S1. Adapt the official XMSS algorithm code to single-key pair data parallelism on GPU and verify it using an improved correctness verification method.

[0056] S101. Adjust the function interfaces for XMSS signing and XMSS signature verification;

[0057] This invention refers to the message to be signed as plaintext and the authenticated signature as ciphertext. The function interface for XMSS signing / XMSS signature verification adds the number of plaintext / ciphertexts and specifies that multiple plaintext / ciphertexts are stored contiguously.

[0058] S102. Verify using an improved correctness verification method.

[0059] The official correctness verification function is ported, and a correctness verification interface for single-key pair data parallelism is added, including verification of ciphertext and private key. In the correctness verification function, after the XMSS key pair is generated, a copy of the key pair used for verification is made. The copied private key is used to sign the serial version. The generated ciphertext is compared with the ciphertext generated by the signature method proposed in this invention. If they are the same, the ciphertext verification is correct; otherwise, the ciphertext verification fails. Simultaneously, the private key used for serial signing is compared with the private key generated by the signature method proposed in this invention. If they are the same, the private key verification is correct; otherwise, the private key verification fails.

[0060] S2. Based on the code obtained in step S1, deploy a single-key pair data parallel scheme for XMSS signing, customize the data transmission interface between CPU and GPU to ensure high efficiency in data transmission; parallelize and reuse the process of building the XMSS tree and WOTS+ signing in the algorithm, with the two processes executed in parallel. The parallel execution scheme needs to perform load balancing of the number of threads based on specific parameters. Finally, through an efficient authentication path and root node replication strategy, single-key pair data parallelism for XMSS signing is achieved.

[0061] S201, Deploy the GPU data transfer interface for the XMSS signature part;

[0062] The CPU requests the corresponding video memory, which includes a private key, multiple plaintexts to be processed, and multiple expected ciphertexts. In the CPU-GPU transmission interface, the GPU input is a private key and multiple plaintexts to be processed, and the GPU output is multiple expected ciphertexts.

[0063] S202, Deploy a parallel task partitioning strategy;

[0064] The execution threads for WOTS+ signing and XMSS tree construction are divided according to the specific computational workload to ensure load balancing and to ensure that WOTS+ signature generation and XMSS tree construction are completed simultaneously as much as possible.

[0065] S203, Single-key-pair data parallel construction scheme for deploying XMSS trees;

[0066] Compared to the conventional XMSS tree construction method, two additional parameters are added: the starting signature index and the current tree height. These two parameters are used to locate the current signature's position within the XMSS tree. Multiple signatures building the same XMSS tree are constructed in parallel using a single key pair. The node value computed by the current thread is checked to see if it is an authentication path; if so, it is copied to the corresponding location in the signature. This process continues until the top-level node is constructed. The root node is the same for all signatures, so its value is copied to each signature.

[0067] S204, Deploy the parallel execution method with WOTS+ signature.

[0068] The WOTS+ signatures corresponding to different signatures are independent, and WOTS+ signatures can also be computed using multiple threads. Therefore, the number of threads for multiple WOTS+ signatures can be adjusted according to the specific computational workload, and the thread allocation strategy is determined based on the load balancing scheme obtained in step S202.

[0069] S3. Based on the code obtained in step S1, deploy a single-key pair data parallel scheme for XMSS signature verification.

[0070] Since the XMSS signature verification processes for different ciphertexts are independent and there are no reusable parts, different threads can process the XMSS signature verification of different ciphertexts, thus achieving data parallelism. Simultaneously, a multi-stream transmission mechanism is deployed to allow computation and communication to overlap.

[0071] S301, Deploy the GPU data transmission interface for the XMSS signature verification part;

[0072] The CPU requests the corresponding GPU memory. The data includes a public key, multiple ciphertexts to be processed, and multiple expected plaintexts. In the CPU-GPU transmission interface, the GPU input consists of a public key and multiple ciphertexts to be processed, while the GPU output consists of multiple expected plaintexts.

[0073] S302. Optimize the GPU data transmission interface of the XMSS signature verification part using multi-stream technology.

[0074] Data that does not change with the amount of ciphertext is transmitted synchronously, while data that changes with the amount of ciphertext is transmitted asynchronously in multiple streams. The number of streams is configured as a parameter, customized based on the ciphertext size and the amount of ciphertext.

[0075] In another embodiment of the present invention, a GPU single-key pair data parallel system is provided. This system can be used to implement the above-mentioned GPU single-key pair data parallel processing method. Specifically, the GPU single-key pair data parallel system includes an adaptation module, a first parallel module, and a second parallel module.

[0076] Among them, the adaptation module performs GPU-based single-key-pair data parallel adaptation on the XMSS algorithm code and configures an improved correctness verification method to obtain the code for configuring the verification method.

[0077] The first parallel module, based on the configuration verification method code obtained from the adaptation module, customizes the data transmission interface between CPU and GPU, and parallelizes and reuses the process of building the XMSS tree and WOTS+ signature in the XMSS algorithm. The parallelization and reuse process is executed in parallel, and the single key pair data parallelism of XMSS signature is achieved through the authentication path and root node replication strategy.

[0078] The second parallel module, based on the configuration verification method code obtained from the adaptation module, uses different threads to process XMSS signature verification of different ciphertexts, and deploys a multi-stream transmission mechanism to achieve overlap between computation and communication, thus realizing single-key pair data parallelism for XMSS signature verification.

[0079] In another embodiment of the present invention, a terminal device is provided, comprising a processor and a memory. The memory stores a computer program, the computer program including program instructions, and the processor executes the program instructions stored in the computer storage medium. The processor may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions to implement a corresponding method flow or corresponding function. The processor described in this embodiment of the present invention can be used for the operation of a GPU-based single-key data parallel processing method, including:

[0080] The XMSS algorithm code is adapted for GPU-based single-key-pair data parallelism, and an improved correctness verification method is configured to obtain the code for the configuration verification method. Based on the configuration verification method code, the data transmission interface between CPU and GPU is customized, and the processes of building the XMSS tree and WOTS+ signature in the XMSS algorithm are parallelized and reused. The parallelization and reuse processes are executed in parallel, and single-key-pair data parallelism for XMSS signature is achieved through authentication path and root node replication strategies. Based on the configuration verification method code, XMSS signature verification of different ciphertexts is processed by different threads, and a multi-stream transmission mechanism is deployed to achieve overlap of computation and communication, thus realizing single-key-pair data parallelism for XMSS signature verification.

[0081] In another embodiment of the present invention, a storage medium is provided, specifically a computer-readable storage medium (Memory). This computer-readable storage medium is a memory device in a terminal device used to store programs and data. It is understood that the computer-readable storage medium here can include both the built-in storage medium in the terminal device and extended storage media supported by the terminal device. The computer-readable storage medium provides storage space that stores the terminal's operating system. Furthermore, this storage space also stores one or more instructions suitable for loading and execution by a processor. These instructions can be one or more computer programs (including program code). It should be noted that the computer-readable storage medium here can be high-speed RAM or non-volatile memory, such as at least one disk storage device.

[0082] One or more instructions stored in a computer-readable storage medium can be loaded and executed by a processor to implement the corresponding steps of the GPU-based single-key pair data parallel processing method in the above embodiments; one or more instructions in the computer-readable storage medium are loaded and executed by the processor to perform the following steps:

[0083] The XMSS algorithm code is adapted for GPU-based single-key-pair data parallelism, and an improved correctness verification method is configured to obtain the code for the configuration verification method. Based on the configuration verification method code, the data transmission interface between CPU and GPU is customized, and the processes of building the XMSS tree and WOTS+ signature in the XMSS algorithm are parallelized and reused. The parallelization and reuse processes are executed in parallel, and single-key-pair data parallelism for XMSS signature is achieved through authentication path and root node replication strategies. Based on the configuration verification method code, XMSS signature verification of different ciphertexts is processed by different threads, and a multi-stream transmission mechanism is deployed to achieve overlap of computation and communication, thus realizing single-key-pair data parallelism for XMSS signature verification.

[0084] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0085] Taking the XMSS-16 parameter using the SHA256 hash function as an example, the details are as follows:

[0086] When running the official code, the CPU (Xeon Gold 5218R) signature and authentication throughput were 0.012 times and 1519.66 times per second, respectively, while the GPU (GTX 3090) signature and authentication throughput were 0.00046 times and 28.32 times per second, respectively.

[0087] After deploying the method of this invention, when using 32768 threads to perform single key pair data parallelism for 32768 tasks, the signature and authentication throughput of a single GPU (GTX 3090) are 41721.04 times and 521437.94 times per second, respectively.

[0088] The performance improvements for signing and authentication processes are 90,697,912 times and 18,411 times, respectively. Compared to running the official code on a high-performance CPU, the performance improvements for signing and authentication processes are 3,476,752 times and 342 times, respectively. This invention significantly improves the efficiency of XMSS signing and authentication in single-key pair data parallel scenarios, thus meeting the practical needs of high-throughput environments such as network servers.

[0089] In summary, this invention provides a GPU-based single-key pair data parallel processing method, system, medium, and device. By reusing the XMSS tree construction process during XMSS signing and load balancing of the number of threads in Winderitz one-time signing and XMSS tree construction, it achieves efficient selection of authentication paths and root nodes during parallel XMSS tree construction and provides a highly configurable parallel execution method for WOTS+ signing, thus realizing efficient single-key pair data parallel signing of the XMSS algorithm. Furthermore, by deploying task allocation and a multi-stream scheme, it achieves efficient single-key pair data parallel signature verification of the XMSS algorithm.

[0090] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0091] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0092] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0093] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0094] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A method for parallel data processing using a single key pair on a GPU, characterized in that, It includes the following steps: S1. Adapt the XMSS algorithm code so that it can use a single key to perform parallel processing of data on the GPU, and configure an improved correctness verification method to obtain the code of the configured verification method. The single key pair is a public-private key pair supporting a set of XMSS algorithms, including a private key and a public key. Specifically: S101. Adjust the function interfaces of XMSS signature and XMSS signature verification; S102. Transplant the correctness verification function and add a correctness verification interface for parallel processing of single key pair data to perform correctness verification on XMSS signature and XMSS signature verification. In the correctness verification function, after the XMSS key pair is generated, a pair of key pairs for verification is copied. The copied private key is used for serial version signature. If the generated ciphertext is the same as the ciphertext generated by the parallel processing method, the ciphertext verification is correct; otherwise, the ciphertext verification fails. At the same time, the private key that has completed serial signature is compared with the private key generated by the parallel processing method. If they are the same, the private key verification is correct; otherwise, the private key verification fails; S2. According to the configured verification method code obtained in step S1, customize the data transfer interface between the CPU and the GPU, parallelize and reuse the processes of constructing the XMSS tree and WOTS+ signature in the XMSS algorithm. The parallelization and reuse processes are executed in parallel. Through the authentication path and root node replication strategy, single key pair data parallelism of XMSS signature is achieved. Specifically: S201. Deploy the GPU data transfer interface for the XMSS signature part. In the transfer interface between the CPU and the GPU, the GPU input part is a private key and multiple plaintexts to be processed, and the GPU output part is multiple expected ciphertexts; S202. Divide the execution threads of WOTS+ signature and constructing the XMSS tree according to the amount of computation, and generate WOTS+ signature and construct the XMSS tree simultaneously to obtain a load balancing scheme; S203. Deploy the single key pair data parallel construction scheme of the XMSS tree according to the interface provided in step S201; S204. According to the load balancing scheme obtained in step S202, adjust the number of threads of multiple WOTS+ signatures according to the amount of computation, and deploy the parallel execution of WOTS+ signature; S3. According to the configured verification method code obtained in step S1, use different threads to process the XMSS signature verification of different ciphertexts, and at the same time deploy a multi-stream transmission mechanism to achieve the overlap of calculation and communication, and realize the single key pair data parallelism of XMSS signature verification.

2. The GPU-based single-key pair data parallel processing method according to claim 1, characterized in that, In step S101, the message to be signed is the plaintext, the authenticated signature is the ciphertext. The number of plaintexts / ciphertexts is added to the function interfaces of XMSS signature and XMSS signature verification, and multiple plaintexts and ciphertexts are stored continuously.

3. The GPU-based single-key pair data parallel processing method according to claim 1, characterized in that, In step S203, the position of the current signature in the XMSS tree is located using the starting signature index and the current tree height. Multiple signatures that construct the same XMSS tree are used for parallel construction of the single key pair data of the XMSS tree. It is queried whether the node value calculated by the current thread is an authentication path. If it is an authentication path, it is copied to the corresponding position of the signature, and the process continues until the top-level node is constructed. Each signature contains the value of the root node.

4. The GPU-based single-key pair data parallel processing method according to claim 1, characterized in that, Step S3 specifically includes: S301. Deploy the GPU data transfer interface for the XMSS signature verification part. In the transfer interface between the CPU and the GPU, the GPU input part is the public key paired with one of the single key pairs and multiple ciphertexts to be processed, and the GPU output part is multiple expected plaintexts. Different threads are used to process the XMSS signature verification of different ciphertexts. S302. Optimize the GPU data transfer interface for the XMSS signature verification part according to the function interface provided in step S201 using the multi-stream transfer mechanism.

5. The GPU-based single-key pair data parallel processing method according to claim 4, characterized in that, In step S302, the data that does not change with the number of ciphertexts is transmitted using synchronous transfer, and the data that changes with the number of ciphertexts is transmitted using asynchronous transfer for multi-stream transfer. The number of streams is configured as a parameter, and this parameter is set according to the ciphertext size and the number of ciphertexts.

6. A GPU-based single-key pair data parallel processing system, characterized in that, It includes: An adaptation module that adapts the XMSS algorithm code so that it can perform parallel processing using single key pair data on the GPU and configures an improved correctness verification method to obtain the code of the configured verification method. The single key pair is a public-private key pair supporting a set of XMSS algorithms, including a private key and a public key. Specifically: Adjust the function interfaces of XMSS signature and XMSS signature verification; transplant the correctness verification function and add a correctness verification interface related to single key pair data parallelism for performing correctness verification on XMSS signature and XMSS signature verification. In the correctness verification function, after the XMSS key pair is generated, a pair of key pairs for verification is copied. The copied private key is used for serial version signature. If the generated ciphertext is the same as the ciphertext generated by the parallel processing method, the ciphertext verification is correct; otherwise, the ciphertext verification fails. At the same time, the private key that completes the serial signature is compared with the private key generated by the parallel processing method. If they are the same, the private key verification is correct; otherwise, the private key verification fails. A first parallel module that customizes the data transfer interface between the CPU and the GPU according to the code of the configured verification method obtained by the adaptation module, parallelizes and multiplexes the processes of constructing the XMSS tree and WOTS+ signature in the XMSS algorithm. The parallelization and multiplexing processes are executed in parallel, and the single key pair data parallelism of the XMSS signature is achieved through the authentication path and root node replication strategy. Specifically: The GPU data transfer interface for the XMSS signing portion is deployed. In the CPU-GPU transfer interface, the GPU input is a private key and multiple plaintexts to be processed, and the GPU output is multiple expected ciphertexts. Tasks are divided among the execution threads for WOTS+ signing and XMSS tree construction based on computational load, simultaneously generating WOTS+ signatures and constructing XMSS trees to obtain a load balancing scheme. Based on the provided interface, a single-key pair data parallel construction scheme for the XMSS tree is deployed. Based on the obtained load balancing scheme, the number of threads for multiple WOTS+ signings is adjusted according to computational load, deploying parallel execution of WOTS+ signing. The second parallel module, based on the configuration verification method code obtained from the adaptation module, uses different threads to process XMSS signature verification of different ciphertexts, and deploys a multi-stream transmission mechanism to achieve overlap between computation and communication, thus realizing single-key pair data parallelism for XMSS signature verification.

7. A computer-readable storage medium for storing one or more programs, characterized in that, The one or more programs include instructions that, when executed by a computing device, cause the computing device to perform any of the methods according to claims 1 to 5.

8. A computing device, characterized in that, include: One or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs including instructions for performing any of the methods according to claims 1 to 5.

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