A method for preparing a novel nanostructure of superconducting thin film

Abstract

The application discloses a preparation method of a novel nanostructure of a superconducting thin film. The method comprises the following steps: firstly, laying an AAO template on the surface of the thin film; then, determining a punching area; and finally, forming a porous structure with a specified aperture and period in the selected punching area through etching. The thin film is yttrium barium copper oxide YBCO or niobium nitride NbN. The nano-machining technology of the local punching fully protects the non-punching part, and the process is simple and effective. The specified punching area can be in any shape, and large-area selected punching can be realized, which cannot be realized by most micro-nano machining technologies.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of superconducting thin film material preparation, and relates to a preparation method of a novel nanostructure of a superconducting thin film, and the core is a nano-processing technology of local punching in a specified region of a thin film. BACKGROUND

[0002] The micro-nano hole processing method usually includes electron beam exposure, focused ion beam etching, nano-imprinting technology, laser direct writing processing technology, etc. Electron beam exposure (EBL) is a basic nano-processing technology, and the disadvantage is that it takes more time to prepare a large-area complex pattern, and is limited by the proximity effect. In order to overcome the shortcomings, researchers also try to use projection EBL technology and large-scale parallel electron beam technology. Focused ion beam (FIB) etching is one of the most accurate maskless micro / nano processing methods. The disadvantages are high cost, very low processing efficiency, and limited substrate size, which limits its application to sample preparation, repair and small-batch prototype verification, etc. In addition, since the general Ga + beam current diameter is larger than that of the electron beam, the resolution is lower than that of EBL. Nanoimprint lithography (NIL) is a technology for copying nanostructures by mechanical deformation, but it requires high-resolution equipment to manufacture templates, and etching is needed to remove the residual glue after imprinting, which damages the glue to a certain extent. Direct laser writing (DLW) directly scans and processes materials using a laser beam. However, the processing resolution of DLW is limited by the optical diffraction limit, and the application of optical super-structured surface is limited to the infrared to terahertz wave band.

[0003] At present, the template synthesis method is one of the most commonly used methods for preparing nanoscale materials, wherein the templates include AAO templates, block copolymer templates, silicon-based porous templates and trace etching polymer templates. Among the numerous templates, the AAO template has become the preferred template for preparing nanomaterials due to its adjustable parameters, simple process, low cost and the like. By utilizing the excellent pore size characteristics of the AAO template, combined with physical and chemical methods such as electrochemical deposition and sol-gel method, deposition of different materials in the AAO template can obtain various nanomaterials with different excellent performances. The advantages of using the AAO template to prepare nanomaterials are as follows: (1) the shape, size and structure of the nanomaterials can be controlled by controlling the structural parameters of the AAO template; (2) the operation is simple and the cost is low in the entire process; (3) the deposition raw materials can be various, including metals, semiconductors, polymers and oxides; (4) the AAO template is insulating and resistant to high temperature, and transparent in the visible light range. In addition, the AAO template also has a unique highly ordered nano-pore structure, and is widely used in the preparation of nanomaterials, sensors, photonic crystals, catalysis and many other fields. The advantage of the AAO template method for nanofabrication is low cost and high efficiency, and a piece of AAO template can realize large-area micro-nano pore processing. On the other hand, the limitation of the AAO template method for nanofabrication is also very prominent, that is, when the template is transferred, it can only be done in whole, and local micro-nano pore processing cannot be realized. SUMMARY

[0004] (I) Invention purposes

[0005] The purpose of the present application is to provide a preparation method of a new nanostructure of a superconducting thin film, to overcome the current AAO template method cannot be locally punched, to realize the AAO template method based on punching on the specified area of the thin film surface, and to obtain a thin film with local porous nanostructure.

[0006] (II) Technical solutions

[0007] In order to solve the above technical problems, the present application provides a preparation method of a new nanostructure of a superconducting thin film, which first lays an AAO template on the surface of the thin film, then determines the punching area, and finally forms a porous structure with a specified pore size and period in the selected punching area by etching.

[0008] The thin film is yttrium barium copper oxide YBCO or niobium nitride NbN.

[0009] Preparation materials: YBCO thin film on STO substrate, YBCO thin film thickness is 20 nm, and 200 nm-300 nm thick AAO template; the following steps are implemented to punch:

[0010] S1, mark area photoetching gold plating;

[0011] S2, photoresist lithography and nanopore array preparation;

[0012] S3, photoetching and ICP etching isolation groove;

[0013] S4, photoetching and gold plating of electrode area.

[0014] In step S1, the process of photoetching and gold plating of the mark area is as follows:

[0015] S11) cleaning: ultrasonic cleaning of the sample with acetone, ethanol and deionized water for 5 min respectively, and then nitrogen blowing to dry and remove surface dust and impurities;

[0016] S12) pre-baking: baking at 100°C for 5 min to remove moisture on the sample surface, facilitating adhesion of the photoresist to the sample surface.

[0017] S13) photoresist spin coating: centrifugal spin coating, first vacuum suction of the sample on the shaft, then 2-3 drops of photoresist are dropped on the surface, and the spin coater is rotated at 1000 r / min for 10 s to make the photoresist evenly and completely cover the sample surface, and then rotated at 3000 r / min for 30 s to control the thickness of the photoresist to be 1.4 μm;

[0018] S14) soft baking: baking at 100°C for 60 s to remove organic solvents in the photoresist and make it dry and solidify;

[0019] S15) exposure: adjusting the sample stage position to align with the pattern on the mask, vacuum suction, and then 6.5 s of exposure to form the mark area, which includes two cross marks on both sides of the photosensitive area, two digital products under the common electrode on the right side of the chip, and digital marks beside the photosensitive surface and the electrode; the cross marks echo the subsequent etched isolation groove and play an alignment role; the product of the two numbers is the area of a single photosensitive surface in the chip; the digital marks are to make the photosensitive surface correspond to the electrode one by one;

[0020] S16) development: immersing the sample in the developing solution, slightly shaking to accelerate development, until the photoresist is completely dissolved, then immediately immersing the sample in deionized water for rinsing, and then blowing dry;

[0021] S17) hardening: baking at 120°C for 5 min to remove residual solvents in the photoresist;

[0022] S18) gold plating of the mark area;

[0023] S19) stripping: immersing the device in acetone solution for ultrasonic, and the pattern appears, and then nitrogen blowing to dry.

[0024] In step S2, the process of photoresist lithography and nanopore array preparation is as follows: firstly, the AAO template is pasted on the surface of the film, and the size of the AAO template is consistent with the STO substrate, and then the following process steps are continued.

[0025] S21) cleaning;

[0026] S22) pre-baking;

[0027] S23) photoresist spin coating;

[0028] S24) soft baking;

[0029] S25) exposure: adjust the sample stage position to align the pattern on the mask, vacuum suction, and then perform 6.5s exposure, magnify the chip center part of the layout, and the photoresist area is separated by the isolation groove, divided into a 32x2 array of photoresist areas, the numbers beside the photoresist areas correspond one-to-one with the numbers under the electrodes, representing that the photoresist areas correspond one-to-one with the electrodes;

[0030] S26) development;

[0031] S27) hardening;

[0032] S28) ICP etching: set the parameters on the etching machine: gas pressure 20m Torr, ICP power 1800W, RIE power 200W, Ar flow rate 40sccm, CHF3flow rate 30sccm, etching time is set to 3min, and the etching is paused for 3min to cool down after 1min of etching; the photoresist covers other parts of the chip except the photoresist area, and the AAO template is in the position of the photoresist area to ensure that the photoresist area is not completely etched, achieving the final purpose of local punching in the specified area on the film;

[0033] S29) peeling;

[0034] S210) peeling the AAO template: directly use the tape to tear off the remaining AAO template on the surface of the YBCO film.

[0035] In step S2, the processes S21), S22), S23), S24), S26), S27), and S29) are consistent with the corresponding processes S11), S12), S13), S14), S16), S17), and S19) in step S1.

[0036] In step S3, the process of photoresist lithography and ICP etching of the isolation groove is as follows:

[0037] S31) cleaning;

[0038] S32) pre-baking;

[0039] S33) photoresist spin coating;

[0040] S34)Soft bake;

[0041] S35)Exposure: adjust the sample stage position to align the pattern on the mask, vacuum suction, and then exposure for 6.5s, the isolation groove separates different photosensitive surfaces and connects them to the respective electrodes;

[0042] S36)Development;

[0043] S37)Hardening;

[0044] S38)ICP etching: set the parameters on the etching machine: gas pressure 20m Torr, ICP power 1800W, RIE power 200W, Ar flow rate 40sccm, CHF3flow rate 30sccm, etching time is set to 4min, etching for 1min and cooling for 3min in a pause mode, and etching the isolation groove;

[0045] S39)Peeling.

[0046] In step S3, the processes S31), S32), S33), S34), S36), S37), and S39) are the same as the corresponding processes S11), S12), S13), S14), S16), S17), and S19) in step S1.

[0047] In step S4, the process of gold plating in the electrode area is as follows:

[0048] S41)Cleaning;

[0049] S42)Pre-baking;

[0050] S43)Photoresist spin coating;

[0051] S44)Soft bake;

[0052] S45)Exposure: adjust the sample stage position to align the pattern on the mask, vacuum suction, and then exposure for 6.5s, the electrode area includes 64 electrodes and two common electrodes in a 32x2 array, the minimum center distance of two adjacent electrodes is 100 microns when the electrode area is interconnected with the readout circuit, and the 64 electrodes are arranged alternately in two rows;

[0053] S46)Development;

[0054] S47)Hardening;

[0055] S48)Gold plating in the electrode area;

[0056] S49)Peeling;

[0057] S410)Preparation of passivation film to protect the thin film material.

[0058] In step S4, the processes S41), S42), S43), S44), S46), S47), S49) are the same as the corresponding processes S11), S12), S13), S14), S16), S17), S19) in step S1.

[0059] (III) Beneficial Effects

[0060] The preparation method of the novel nanostructure of the superconducting thin film has the following beneficial effects:

[0061] 1. The processing method used in the local punching nano-machining technology is a very mature process, and the actual application difficulty is small, and the production can be quickly and mass-produced.

[0062] 2. The local punching nano-machining technology fully protects the part without punching, and the process is simple and effective.

[0063] 3. The local punching nano-machining technology can specify the punching area to be any shape, and can also be large-area selected punching, which most micro-nano machining technologies cannot achieve.

[0064] 4. The local punching porous nanostructure is determined by the AAO template, and is irrelevant to the punching method.

[0065] 5. The local punching nano-machining technology is also applicable to other thin film materials. BRIEF DESCRIPTION OF DRAWINGS

[0066] Figure 1 It is a schematic diagram of the local punching technology using AAO template.

[0067] Figure 2 It is a schematic diagram of the 32x2 array chip photoetching plate.

[0068] Figure 3 It is a SEM diagram of the thin film with AAO template and without AAO template.

[0069] Figure 4 It is a SEM diagram of the local punching area of the AAO template method.

[0070] Figure 5 It is a 32x2 array chip real object diagram. DETAILED DESCRIPTION

[0071] In order to make the purpose, content and advantages of the present application clearer, the specific embodiments of the present application will be further described in detail below in combination with the drawings and examples.

[0072] The embodiment mainly relates to a nano-processing technology for realizing local punching in a specified area of a film in a quick, efficient and large-area manner without affecting other parts of the film, and specifically, the nano-processing technology comprises the following steps: first, spreading AAO on the surface of the film; then, determining a punching area through exposure and development; and finally, forming a porous structure with a specified aperture and period in the selected area through etching.

[0073] The template used for the local punching on the film is an AAO template.

[0074] The punching etching method used in the local punching technology on the film is a reaction coupled plasma etching method (ICP), FIB or a reaction ion etching (RIE) method.

[0075] The film includes but is not limited to yttrium barium copper oxide (YBCO) and niobium nitride (NbN).

[0076] Embodiment

[0077] The embodiment adopts an AAO template method, and the prepared material is a YBCO film on an STO substrate, and the thickness of the YBCO film is about 20 nm, and the thickness of the AAO template is 200 nm-300 nm.

[0078] As shown in Figure 1 , the preparation method of the superconducting film new nano structure in the embodiment comprises the following steps:

[0079] S1, mark area photoetching gold plating

[0080] 1) cleaning: ultrasonic cleaning the sample with acetone, ethanol and deionized water for 5 min respectively, and then nitrogen blowing to dry, and removing the dust and impurities on the surface.

[0081] 2) pre-baking: baking on a hot table at 100 DEG C for 5 min to remove the moisture on the surface of the sample, so that the photoresist adheres to the sample surface.

[0082] 3) photoresist spin coating: centrifugal spin coating, first vacuum suction the sample on the rotating shaft, then drop 2-3 drops of photoresist on the surface, let the spin coating machine rotate at 1000 r / min for 10 s, so that the photoresist uniformly and completely covers the sample surface, and then rotate at 3000 r / min for 30 s, control the thickness of the photoresist to be about 1.4 μm.

[0083] 4) soft baking: baking on a hot table at 100 DEG C for 60 s to remove most of the organic solvents in the photoresist and make it dry and solidified.

[0084] 5) exposure: adjust the sample stage position to align the pattern on the mask, vacuum suction, and then expose for 6.5 s. Figure 2As shown, the mark area includes two cross marks on both sides of the photosensitive area, two digital products under the common electrode on the right side of the chip, and digital marks next to the photosensitive surface and the electrode. The cross marks echo the subsequent etched isolation groove, serving as an alignment; the two digital products are the area of a single photosensitive surface in the chip; and the digital marks are to make the photosensitive surface and the electrode one-to-one correspondence.

[0085] 6) Development: immerse the sample in the developing solution, slightly shake to accelerate development, until the photoresist is completely dissolved, for about 30-35 s, and then immediately immerse the sample in deionized water for rinsing, and then dry.

[0086] 7) Hardening: bake on a hot plate at 120°C for 5 min to remove residual solvents in the photoresist.

[0087] 8) Mark area gold plating

[0088] 9) Peeling: immerse the device in acetone solution under ultrasonic, and the pattern appears, and then dry with nitrogen.

[0089] S2, photoresist lithography and nano-pore array preparation

[0090] First, paste the AAO template on the surface of the film, the size of the AAO template is consistent with the STO substrate, and then continue the following process steps. Figure 3 Paste AAO template on the film and comparison chart without pasting, Figure 4 SEM of local punching area by AAO template method)

[0091] 1), 2), 3), 4), 6), 7), 9) are consistent with the a step mark area lithography and gold plating.

[0092] 1) Cleaning

[0093] 2) Pre-baking

[0094] 3) Photoresist spin coating

[0095] 4) Soft baking

[0096] 5) Exposure: adjust the sample stage position to align the pattern on the mask, vacuum suction, and then perform 6.5 s of exposure. As Figure 2 As shown in the right side of the figure, the chip center part of the layout is enlarged, the photosensitive area is separated by the isolation groove (the part where the photosensitive area and the isolation groove coincide), and is divided into a 32x2 array of photosensitive surfaces, the numbers next to the photosensitive surfaces correspond to the numbers under the electrodes one-to-one, representing the one-to-one correspondence between the photosensitive surfaces and the electrodes.

[0097] 6) Development

[0098] 7) Hardening

[0099] 8) ICP etching: Set the parameters on the etching machine: gas pressure 20mTorr, ICP power 1800W, RIE power 200W, Ar flow rate 40sccm, CHF3flow rate 30sccm, etching time set to 3min, using the method of etching for 1min and pausing for 3min to cool down to prevent high temperature paste. This is a step for local hole operation. The photoresist covers other parts on the chip except the photosensitive surface (the part where the photosensitive area and the isolation groove coincide will be completely removed when etching the isolation groove), and the AAO template at the position of the photosensitive surface ensures that the photosensitive surface is not completely etched, achieving the final purpose of local hole in the specified area of the film.

[0100] 9) Peeling

[0101] 10) Peeling AAO template: directly tear off the remaining AAO template on the surface of the YBCO film with tape.

[0102] S3, photoetching and ICP etching isolation groove

[0103] 1), 2), 3), 4), 6), 7), 9) are consistent with the a step mark area photoetching gold plating.

[0104] 1) Cleaning

[0105] 2) Pre-baking

[0106] 3) Photoresist spin glue

[0107] 4) Soft baking

[0108] 5) Exposure: adjust the sample stage position to align with the pattern on the mask, vacuum suction, and then perform 6.5s exposure. As shown in Figure 2 The isolation groove separates different photosensitive surfaces and connects them to their respective electrodes.

[0109] 6) Development

[0110] 7) Hardening

[0111] 8) ICP etching: Set the parameters on the etching machine: gas pressure 20mTorr, ICP power 1800W, RIE power 200W, Ar flow rate 40sccm, CHF3flow rate 30sccm, etching time set to 4min, using the method of etching for 1min and pausing for 3min to cool down to prevent high temperature paste. This step is different from the hole etching step, this step is to etch the isolation groove. Because the area of the isolation groove is larger, the etching time is longer under the same power.

[0112] 9) Peeling

[0113] S4, electrode area photoetching gold plating

[0114] 1), 2), 3), 4), 6), 7), 9) are consistent with the step of marking area photoetching gold plating.

[0115] 1) cleaning

[0116] 2) pre-baking

[0117] 3) photoresist spin coating

[0118] 4) soft baking

[0119] 5) exposure: adjust the sample stage position to align the pattern on the mask, vacuum suction, and then exposure for 6.5s. As shown, the electrode area includes a 32x2 array of 64 electrodes and two common electrodes. In order to ensure the minimum center distance of 100 microns between two adjacent electrodes when interconnected with the readout circuit, the 64 electrodes are arranged alternately in two rows, effectively minimizing the size of the chip. Figure 2

[0120] 6) development

[0121] 7) hardening

[0122] 8) electrode area gold plating

[0123] 9) stripping

[0124] 10) preparation of passivation film to protect the thin film material. Figure 5 To make the chip physical map.

[0125] The above only describes the preferred embodiments of the present application, and it should be noted that for those skilled in the art, without departing from the technical principles of the present application, a number of improvements and modifications can be made, and these improvements and modifications should also be considered as the protection scope of the present application.​

Claims

1. A method for preparing a superconducting thin film nanostructure, characterized in that, Firstly, the AAO template is laid on the surface of the thin film, then the punching area is determined, and finally the porous structure with specified aperture and period is formed in the selected punching area by etching; Preparation materials: YBCO thin film on STO substrate, YBCO thin film thickness is 20nm, and 200nm-300nm thick AAO template; The following steps are implemented to punch: S1, mark area photoetching and gold plating; S2, photosensitive area photoetching and nano-pore array preparation; S3, photoetching and ICP etching isolation groove; S4, electrode area photoetching and gold plating; In step S1, the process of mark area photoetching and gold plating is as follows: S11) cleaning: the sample is cleaned by ultrasonic cleaning with acetone, ethanol and deionized water respectively for 5min, and then dried by nitrogen blowing to remove dust and impurities on the surface; S12) pre-baking: baking at 100℃ for 5min to remove water on the surface of the sample, which is beneficial to the adhesion of photoresist on the sample surface; S13) photoresist spin coating: centrifugal spin coating is adopted, the sample is first vacuumed on the rotating shaft, then 2-3 drops of photoresist are dropped on the surface, the spin coater is rotated at 1000r / min for 10s to make the photoresist evenly and completely cover the sample surface, and then rotated at 3000r / min for 30s to control the thickness of the photoresist to be 1.4μm; S14) soft baking: baking at 100℃ for 60s to remove organic solvents in the photoresist and make it dry and solidify; S15) exposure: adjusting the sample stage position to align the pattern on the mask, vacuum suction, and then exposure for 6.5s to form the mark area, which includes two cross marks on both sides of the photosensitive area, two digital products under the common electrode on the right side of the chip, and digital marks beside the photosensitive surface and the electrode; the cross marks and the subsequent etched isolation groove are in correspondence with each other, which plays an alignment role; the two digital products are the area of a single photosensitive surface in the chip; the digital marks are to make the photosensitive surface and the electrode one-to-one corresponding; S16) development: the sample is immersed in the developing solution, slightly shaken to accelerate development, until the photoresist is completely dissolved, then the sample is immediately immersed in deionized water for rinsing, and then dried; S17) hardening: baking at 120℃ for 5min to remove residual solvents in the photoresist; S18) mark area gold plating; S19) stripping: acetone solution is used, the device is immersed in the acetone solution for ultrasonic, and the pattern is shown, and then dried by nitrogen blowing.

2. The method of claim 1, wherein the superconducting thin film nanostructure is formed by a process comprising: The thin film is yttrium barium copper oxide YBCO or niobium nitride NbN.

3. The method of claim 2, wherein the step of depositing a superconducting thin film is performed by a method selected from the group consisting of sputtering, electron beam evaporation, pulsed laser deposition, and molecular beam epitaxy. In step S2, the process of photosensitive area photoetching and nano-pore array preparation is as follows: firstly, the AAO template is pasted on the surface of the thin film, the size of the AAO template is consistent with the STO substrate, and then the following process steps are continued; S21) cleaning; S22) pre-baking; S23) photoresist spin coating; S24) soft baking; S25) exposure: adjusting the sample stage position to align the pattern on the mask, vacuum suction, and then exposure for 6.5s to enlarge the chip center part of the layout, the photosensitive area is separated by the isolation groove and divided into 32×2 array photosensitive surface, the digital beside the photosensitive surface corresponds to the photosensitive surface one by one, and at the same time corresponds to the digital under the electrode one by one, which represents that the photosensitive surface and the electrode correspond one by one; S26) development; S27) hardening; S28) ICP etching: set parameters on the etching machine: gas pressure 20 mTorr, ICP power 1800 W, RIE power 200 W, Ar flow rate 40 sccm, CHF3flow rate 30 sccm, etching time is set to 3 min, using the method of etching for 1 min and pausing for 3 min to cool down; the photoresist covers other parts on the chip except the light-sensitive surface, and the AAO template is placed at the position of the light-sensitive surface to ensure that the light-sensitive surface is not completely etched, achieving the final purpose of local punching in the specified area of the thin film; S29) stripping; S210) stripping the AAO template: directly tear off the remaining AAO template on the YBCO thin film surface with adhesive tape.

4. The method of claim 3, wherein the step of depositing a superconducting thin film is performed by a method selected from the group consisting of sputtering, electron beam evaporation, pulsed laser deposition, and molecular beam epitaxy. In step S2, the processes S21), S22), S23), S24), S26), S27), S29) are the same as the corresponding processes S11), S12), S13), S14), S16), S17), S19) in step S1.

5. The method of claim 4, wherein the step of depositing a superconducting thin film is performed by a method selected from the group consisting of sputtering, electron beam evaporation, pulsed laser deposition, and molecular beam epitaxy. In step S3, the process of photoetching and ICP etching isolation groove is as follows: S31) cleaning; S32) pre-baking; S33) photoresist spin coating; S34) soft baking; S35) exposure: adjust the sample stage position to align the pattern on the mask, then vacuum suction and expose for 6.5 s, the isolation groove separates different light-sensitive surfaces and connects them with respective electrodes; S36) development; S37) hardening; S38) ICP etching: set parameters on the etching machine: gas pressure 20 mTorr, ICP power 1800 W, RIE power 200 W, Ar flow rate 40 sccm, CHF3flow rate 30 sccm, etching time is set to 4 min, using the method of etching for 1 min and pausing for 3 min to cool down, etching out the isolation groove; S39) stripping.

6. The method of claim 5, wherein the step of depositing a superconducting thin film is performed by a method selected from the group consisting of sputtering, electron beam evaporation, pulsed laser deposition, and molecular beam epitaxy. In step S3, the processes S31), S32), S33), S34), S36), S37), S39) are the same as the corresponding processes S11), S12), S13), S14), S16), S17), S19) in step S1.

7. The method of claim 6, wherein the step of depositing a superconducting thin film is performed by a method selected from the group consisting of sputtering, electron beam evaporation, pulsed laser deposition, and molecular beam epitaxy. In step S4, the process of photoetching and gold plating in the electrode area is as follows: S41) cleaning; S42) pre-baking; S43) photoresist spin coating; S44) soft baking; S45) exposure: adjust the sample stage position to align the pattern on the mask, then vacuum suction and expose for 6.5 s, the electrode area includes 64 electrodes and two common electrodes in a 32x2 array, the minimum center distance between two adjacent electrodes is 100 microns when the electrode area is interconnected with the readout circuit, and the 64 electrodes are arranged alternately in two rows; S46) development; S47) hardening; S48) gold plating in the electrode area; S49) stripping; S410) preparing a passivation film to protect the thin film material.

8. The method of claim 7, wherein the step of depositing a superconducting thin film is performed by a method selected from the group consisting of sputtering, electron beam evaporation, pulsed laser deposition, and molecular beam epitaxy. In step S4, the processes S41), S42), S43), S44), S46), S47), S49) are the same as the corresponding processes S11), S12), S13), S14), S16), S17), S19) in step S1.

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