Chip on film package structure
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHIPMOS TECH INC
- Filing Date
- 2022-03-02
- Publication Date
- 2026-08-07
AI Technical Summary
双面铜箔可挠性衬底的上表面与下表面皆有线路覆盖,其中当位于下表面的支撑引脚的宽度与位于上表面的内引脚的宽度差异较大时,可能造成可挠性衬底的上表面与下表面所受应力不平均而产生翘曲(warpage)现象,也可能会因下表面的支撑引脚对于上表面的各个内引脚的支撑不均匀,而导致内引脚接合(Inner Lead Bonding,ILB)时产生断脚或与芯片的凸块接合不良的问题
[0014]基于上述,在本发明的薄膜覆晶封装结构中,位于可挠性衬底的第二表面的支撑图案的支撑线段于可挠性衬底的第一表面上的正投影与部分第一内引脚部局部重叠,且支撑线段的第二宽度大于等于第一内引脚部的第一宽度且小于等于1.5倍的第一内引脚部的第一宽度。借此,位于可挠性衬底的第二表面上的支撑图案可与位于可挠性衬底的第一表面上的第一内引脚部产生较为一致的重叠面积而提供较均匀的支撑力,可避免内引脚接合时第一内引脚部发生断脚或与凸块产生接合不良的问题,进而可提高本发明的薄膜覆晶封装结构的结构及电性可靠度。
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Figure CN116264203B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a packaging structure, and more particularly to a thin-film flip-chip packaging structure. Background Technology
[0002] Chip-on-film (COF) packaging is a common packaging type for driver chips in liquid crystal displays (LCDs). Currently, double-sided copper foil flexible substrates are gaining popularity to increase pin layout space. Both the upper and lower surfaces of these substrates are covered with circuitry. When the width of the support pins on the lower surface differs significantly from the width of the inner pins on the upper surface, uneven stress on the upper and lower surfaces can cause warpage. Uneven support from the lower surface support pins for the upper inner pins can also lead to broken pins or poor bonding with chip bumps during inner lead bonding (ILB). Furthermore, when the lower surface support pins are designed to extend in the same direction as the upper surface inner pins, differences in copper processing between the upper and lower surfaces can cause varying degrees of displacement between the support pins and inner pins, reducing their overlap and potentially leading to uneven support or even partial lack of support. Summary of the Invention
[0003] The present invention provides a thin-film flip-chip packaging structure, wherein the support pattern can provide more uniform support force and can avoid the problem of broken or poorly connected internal leads due to uneven support during internal lead bonding, thereby improving the overall structural and electrical reliability.
[0004] According to an embodiment of the present invention, a thin-film flip-chip packaging structure includes a flexible circuit carrier and a chip. The flexible circuit carrier includes a flexible substrate and a circuit structure. The flexible substrate has a first surface and a second surface opposite to each other, and a chip bonding region. The circuit structure is disposed on the flexible substrate and includes a plurality of first pins, a plurality of second pins, and a plurality of support patterns. The first pins are disposed on the first surface, and each first pin has a first inner pin portion. The second pins and the support patterns are disposed on the second surface. Each second pin has a second inner pin portion. Each support pattern has a plurality of support segments. The first inner pin portions and the second inner pin portions are located within the chip bonding region. The support segments are partially located within the chip bonding region. The chip is disposed on the first surface and located within the chip bonding region, and is electrically connected to the first inner pin portions via a plurality of bumps. The orthographic projection of the support segments on the first surface partially overlaps with a portion of the bumps and a portion of the first inner pin portions. Each first inner pin portion has a first width, and each support segment has a second width, wherein the second width is greater than or equal to the first width and less than or equal to 1.5 times the first width.
[0005] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the extension direction of the aforementioned support line segment is inclined to the extension direction of the partially overlapping bumps and the first inner pin portion.
[0006] In the thin-film flip-chip package structure according to an embodiment of the present invention, the orthographic projection of the second inner lead portion on the first surface partially overlaps with the bump and the first inner lead portion. Each second inner lead portion has a third width, and the third width is greater than or equal to the first width and less than or equal to 1.5 times the first width.
[0007] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the extension direction of the aforementioned portion of the second inner pin is inclined to the extension direction of the partially overlapping bump and the first inner pin.
[0008] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the chip bonding region described above has two opposing long sides and two opposing short sides. The first pin and the second pin extend from the chip bonding region through the two long sides or the two short sides to opposite ends of the flexible substrate.
[0009] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the orthographic projection of the aforementioned partial support pattern on the first surface is located on the two short sides.
[0010] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, each of the above-described support patterns has a connecting segment. Each support segment of each support pattern is connected to the connecting segment at at least one end.
[0011] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the chip bonding area has two opposing long sides and two opposing short sides, and the orthographic projection of a portion of the support pattern on the first surface is located on the two short sides and the connecting line segment is at least partially parallel to the two short sides.
[0012] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the support line segments of the support pattern whose orthogonal projection on the first surface is located on the two short sides are inclined to the two short sides.
[0013] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the above-mentioned support patterns are dummy patterns.
[0014] Based on the above, in the thin-film flip-chip packaging structure of the present invention, the orthographic projection of the support line segment of the support pattern on the second surface of the flexible substrate onto the first surface of the flexible substrate partially overlaps with a portion of the first inner pin portion, and the second width of the support line segment is greater than or equal to the first width of the first inner pin portion and less than or equal to 1.5 times the first width of the first inner pin portion. Therefore, the support pattern on the second surface of the flexible substrate can generate a more consistent overlap area with the first inner pin portion on the first surface of the flexible substrate, providing a more uniform support force. This avoids problems such as broken pins or poor contact with bumps during inner pin bonding, thereby improving the structural and electrical reliability of the thin-film flip-chip packaging structure of the present invention. Attached Figure Description
[0015] Figure 1 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to an embodiment of the present invention;
[0016] Figure 2 yes Figure 1 A bottom view of the thin-film flip-chip packaging structure;
[0017] Figure 3 for Figure 2 An enlarged schematic diagram of region A of the thin-film flip-chip packaging structure;
[0018] Figure 4 This is an enlarged schematic diagram of a partial area of a thin-film flip-chip packaging structure according to another embodiment of the present invention.
[0019] Explanation of reference numerals in the attached figures
[0020] 10: Thin-film flip-chip packaging structure;
[0021] 100: Flexible circuit board;
[0022] 110: Flexible substrate;
[0023] 112: First surface;
[0024] 114: Second surface;
[0025] 116: Chip bonding area;
[0026] 116a, 116b: Long side;
[0027] 116c, 116d: Short side;
[0028] 120: Line structure;
[0029] 122: First pin;
[0030] 122a: First internal pin portion;
[0031] 124: Second pin;
[0032] 124a: Second inner pin portion;
[0033] 126, 126': Supporting pattern;
[0034] 126a: Support line segment;
[0035] 126b: Connecting line segment;
[0036] 200: Chip;
[0037] 210: Bump;
[0038] A: Region;
[0039] D1, D2, D3: Direction of extension;
[0040] E1, E2: Ends;
[0041] S1, S2: Terminals;
[0042] W1, W2, W3: Width. Detailed Implementation
[0043] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.
[0044] The invention is illustrated more fully with reference to the accompanying drawings of this embodiment. However, the invention may be embodied in many different forms and should not be limited to the embodiments described herein. The thickness, dimensions, or size of layers or regions in the drawings are enlarged for clarity.
[0045] Figure 1 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to an embodiment of the present invention.
[0046] Figure 2 yes Figure 1 A bottom view of the thin-film flip-chip packaging structure. Figure 3 for Figure 2 A magnified schematic diagram of region A of the thin-film flip-chip packaging structure. For ease of explanation, Figure 1 Shown by dashed lines Figure 2 The orthographic projection position of the corresponding component.
[0047] Please also refer to Figure 1 , Figure 2 and Figure 3In this embodiment, the thin-film flip-chip package structure 10 includes a flexible circuit carrier 100 and a chip 200. The flexible circuit carrier 100 includes a flexible substrate 110 and a circuit structure 120. The flexible substrate 110 has a first surface 112 and a second surface 114 opposite to each other, and a chip bonding region 116. The circuit structure 120 is disposed on the flexible substrate 110 and includes a plurality of first pins 122, a plurality of second pins 124, and a plurality of support patterns 126. The first pins 122 are disposed on the first surface 112, and each first pin 122 has a first inner pin portion 122a. The second pins 124 and the support patterns 126 are disposed on the second surface 114. Each second pin 124 has a second inner pin portion 124a. Each support pattern 126 has a plurality of support segments 126a. The first inner pin portions 122a and the second inner pin portions 124a are located within the chip bonding region 116. The support segment 126a is partially located within the chip bonding area 116. The chip 200 is disposed on the first surface 112 and located within the chip bonding area 116, and the chip 200 is electrically connected to the first inner pin portion 122a through a plurality of bumps 210.
[0048] In particular, please refer to Figure 3 In this embodiment, the orthographic projection of the support line segment 126a on the first surface 112 partially overlaps with a portion of the bump 210 and a portion of the first inner pin portion 122a. Each first inner pin portion 122a has a first width W1, and each support line segment 126a has a second width W2, wherein the second width W2 is greater than or equal to the first width W1 and less than or equal to 1.5 times the first width W1. Therefore, the support pattern 126 located on the second surface 114 of the flexible substrate 110 can provide a more uniform support force and can avoid the problem of broken pins or poor bonding of the first inner pin portion 122a when the inner pin is bonded (i.e., eutectic bonding of the bump 210 on the chip 200 to the first inner pin portion 122a by, for example, thermoforming), thereby improving the structural reliability of the thin-film flip-chip package structure 10 of this embodiment.
[0049] For more details, please also refer to... Figure 1 and Figure 2 In this embodiment, the flexible circuit carrier 100 is specifically embodied as a double-sided circuit substrate. For example... Figure 1As shown, for clarity, in this embodiment, the orthographic projection of the first pin 122 on the flexible substrate 110 does not overlap with, or only partially overlaps with, the orthographic projection of the second pin 124 on the flexible substrate 110, but the present invention is not limited thereto. In other embodiments, the orthographic projection of the first pin 122 on the flexible substrate 110 may also overlap with the orthographic projection of the second pin 124 on the flexible substrate 110 as much as possible, thereby making the stress distribution on the first surface 112 and the second surface 114 of the flexible substrate 110 more even, which is still within the scope of protection of the present invention.
[0050] Furthermore, the flexible substrate 110 in this embodiment is made of materials such as polyethylene terephthalate (PET), polyimide (PI), polyethersulfone (PES), polycarbonate (PC), or other suitable flexible materials. The circuit structure 120 may be made of copper, nickel, gold, or silver, or other conductive metal materials. The chip 200 may be a driver chip or any suitable chip, wherein the chip 200 is electrically connected to the first inner pin portion 122a via bumps 210. In other words, the chip 200 is flip-chip bonded to the first pin 122.
[0051] Please refer to the following at the same time: Figures 1 to 3 In this embodiment, the extension direction D2 of the support line segment 126a of the support pattern 126 is inclined to the extension direction D1 of the partially overlapping bump 210 and the first inner pin portion 122a. By designing the support line segment 126a to extend obliquely, the area of the support line segment 126a overlapping the bump 210 and the first inner pin portion 122a can be increased, providing effective support when the bump 210 and the first inner pin portion 122a are engaged. This avoids the problem of uneven support or local lack of support caused by differences in copper processing when the support pins on the second surface and the inner pins on the first surface are designed with the same extension direction. Here, the extension direction D1 is, for example, parallel to the long side of the chip bonding area 116, and the extension direction D2 has an angle greater than 0 degrees and less than 90 degrees with the extension direction D1. In other words, the support line segment 126a in this embodiment is inclined at an acute angle relative to the first inner pin portion 122a. In other words, the support line segment 126a in this embodiment is not parallel to the first inner pin portion 122a.
[0052] Furthermore, in this embodiment, the orthographic projection of the second inner pin portion 124a onto the first surface 112 partially overlaps with the protrusion 210 and the first inner pin portion 122a. Each second inner pin portion 124a has a third width W3, and the third width W3 is greater than or equal to the first width W1 and less than or equal to 1.5 times the first width W1. In other words, the width range of the second inner pin portion 124a in this embodiment is the same as the width range of the support line segment 126a. The extension direction D3 of a portion of the second inner pin portion 124a is inclined to the extension direction D1 of the protrusion 210 and the first inner pin portion 122a that partially overlap with it. Here, there is an angle greater than 0 degrees and less than 90 degrees between the extension direction D3 and the extension direction D1. That is, a portion of the second inner pin portion 124a in this embodiment is inclined at an acute angle relative to the first inner pin portion 122a.
[0053] Please refer to the following at the same time: Figure 1 and Figure 2 In this embodiment, the chip bonding region 116 has two opposing long sides 116a, 116b and two opposing short sides 116c, 116d. The first pin 122 and the second pin 124 extend from within the chip bonding region 116 through the two long sides 116a, 116b or the two short sides 116c, 116d towards opposite ends S1, S2 of the flexible substrate 110. Here, end S1 is an output terminal, and end S2 is an input terminal. Furthermore, as... Figures 1 to 3 As shown, the orthographic projection of part of the support pattern 126 onto the first surface 112 is located on the two short sides 116c and 116d, but the present invention does not limit the position of the support pattern 126. In other embodiments not shown, the orthographic projection of the support pattern 126 onto the first surface 112 may also be located on the two long sides 116a and 116b of the chip bonding region 116. In short, the position of the support pattern 126 can be adjusted according to the wiring space and is not limited to a specific position.
[0054] In addition, please refer to Figure 3 In this embodiment, each support pattern 126 has a connecting segment 126b, and each support segment 126a of each support pattern 126 is connected to the connecting segment 126b at least at one end E1. Further, as... Figure 3The support pattern 126 shown is a closed pattern, meaning that the connecting line segment 126b completely surrounds the support pattern 126. Therefore, the two opposite ends E1 and E2 of the support line segment 126a are both connected to the connecting line segment 126b, but this invention is not limited thereto. In other embodiments, the support pattern 126 may also be a non-closed pattern, meaning that the connecting line segment 126b only partially surrounds the support pattern 126, and the support line segment 126a is connected to the connecting line segment 126b only at one end E1, while the other end E2 is an open end. This is still within the scope of protection of this invention. In other words, the shape and style of the support pattern 126 can be adjusted according to the wiring space and are not limited to a specific pattern. More specifically, the orthographic projection of a portion of the support pattern 126 on the first surface 112 is located on the two short sides 116c and 116d of the chip bonding region 116, and the connecting line segment 126b is at least partially parallel to the two short sides 116c and 116d. The support segments 126a of the support patterns 126, whose orthogonal projections on the first surface 112 are located on the two short sides 116c and 116d of the chip bonding region 116, are inclined to the two short sides 116c and 116d. Here, the support patterns 126 are, for example, dummy patterns, but the invention is not limited thereto. The support segments 126a and the connecting segments 126b are, for example, integrally formed structures, but this is not a limitation.
[0055] Figure 4 This is an enlarged schematic diagram of a partial region of a thin-film flip-chip packaging structure according to another embodiment of the present invention. Figure 4 As shown, in this embodiment, the support pattern 126' is a rectangular and non-closed support pattern, meaning that the connecting line segment 126b only partially surrounds the support pattern 126'. Specifically, the connecting line segment 126b only surrounds three sides of the support pattern 126'. In this case, part of the support line segment 126a is connected to the connecting line segment 126b at end E1, while the other end E2 is an open end and not connected to the connecting line segment 126b, thus making the support pattern 126' partially non-closed. However, this invention is not limited to this. In short, the shape and style of the support patterns 126 and 126' can be adjusted according to the wiring space and are not limited to a specific shape.
[0056] In summary, in the thin-film flip-chip packaging structure of the present invention, the orthographic projection of the support line segment of the support pattern on the second surface of the flexible substrate onto the first surface of the flexible substrate partially overlaps with a portion of the first inner lead portion, and the second width of the support line segment is greater than or equal to the first width of the first inner lead portion and less than or equal to 1.5 times the first width of the first inner lead portion. Therefore, the support pattern on the second surface of the flexible substrate can generate a more consistent overlap area with the first inner lead portion on the first surface of the flexible substrate, providing a more uniform support force. This avoids problems such as broken leads or poor contact with bumps during inner lead bonding, thereby improving the structural and electrical reliability of the thin-film flip-chip packaging structure of the present invention.
[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A thin-film flip-chip packaging structure, characterized in that, include: Flexible circuit board, including: A flexible substrate having a first surface and a second surface opposite to each other, and a chip bonding region; as well as A circuit structure, disposed on the flexible substrate, includes a plurality of first pins, a plurality of second pins, and a plurality of support patterns. The plurality of first pins are disposed on a first surface, and each of the plurality of first pins has a first inner pin portion. The plurality of second pins and the plurality of support patterns are disposed on a second surface, each of the plurality of second pins having a second inner pin portion. Each of the plurality of support patterns has a plurality of support line segments. The plurality of first inner pin portions and the plurality of second inner pin portions are located within the chip bonding region, and the plurality of support line segments are partially located within the chip bonding region. A chip is disposed on the first surface and located within the chip bonding area, and is electrically connected to the plurality of first inner pin portions via a plurality of bumps; The orthographic projection of the plurality of support segments onto the first surface partially overlaps with a portion of the plurality of protrusions and a portion of the plurality of first inner pin portions. The extension direction of the plurality of support segments is inclined to the extension direction of the partially overlapping plurality of protrusions and the plurality of first inner pin portions. Each of the plurality of first inner pin portions has a first width, and each of the plurality of support segments has a second width, wherein the second width is greater than or equal to the first width and less than or equal to 1.5 times the first width.
2. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The orthographic projection of the plurality of second inner pin portions onto the first surface partially overlaps with the plurality of bumps and the plurality of first inner pin portions. Each of the plurality of second inner pin portions has a third width, which is greater than or equal to the first width and less than or equal to 1.5 times the first width.
3. The thin-film flip-chip packaging structure according to claim 2, characterized in that, The extension direction of some of the plurality of second inner pins is inclined to the extension direction of the partially overlapping plurality of bumps and the plurality of first inner pins.
4. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The chip bonding area has two opposing long sides and two opposing short sides, and the plurality of first pins and the plurality of second pins extend from the chip bonding area through the two long sides or the two short sides to opposite ends of the flexible substrate.
5. The thin-film flip-chip packaging structure according to claim 4, characterized in that, The orthographic projection of some of the plurality of support patterns onto the first surface is located on the two short sides.
6. The thin-film flip-chip packaging structure according to claim 1, characterized in that, Each of the plurality of support patterns has a connecting segment, and the support segment of each of the plurality of support patterns is connected to the connecting segment at at least one end.
7. The thin-film flip-chip packaging structure according to claim 6, characterized in that, The chip bonding area has two opposing long sides and two opposing short sides, and the orthographic projection of a portion of the plurality of support patterns on the first surface is located on the two short sides, and the plurality of connecting line segments are at least partially parallel to the two short sides.
8. The thin-film flip-chip packaging structure according to claim 7, characterized in that, The plurality of support line segments of the plurality of support patterns whose orthographic projection on the first surface is located on the two short sides are inclined to the two short sides.
9. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The multiple support patterns are virtual patterns.
Citation Information
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