A radar perception confrontation verification system for complex electromagnetic environment

Abstract

The application discloses a radar sensing confrontation verification system for a complex electromagnetic environment, which comprises a host computer, a radar signal processor and an environment simulator.The host computer is used for sending initialization binding parameters to the radar signal processor in real time and sending interference types to the environment simulator.The radar signal processor is used for generating radar transmitting signals according to preset waveform parameters.The environment simulator is used for generating target signals according to the received radar transmitting signals, generating interference signals according to the interference types and sending echo signals to the radar signal processor.The radar signal processor is further used for processing the echo signals and adjusting an anti-interference strategy based on a processing result to generate an optimal transmitting waveform.Meanwhile, the radar signal processor returns target detection results and anti-interference effects to the host computer in real time, so that real-time detection of the target is realized.The system can sense various types of interference signals and adaptively adjust the transmitting waveform, so that the radar can adaptively detect the target in a complex and changeable electromagnetic environment and achieve the optimal performance.

Description

Technical Field

[0001] This invention belongs to the field of radar signal processing technology, specifically relating to a radar perception and countermeasure verification system for complex electromagnetic environments. Background Technology

[0002] With the continuous development of modern electronic and intelligent technologies and the application of various electronic warfare tactics, various unintentional and intentional electromagnetic interferences pose a significant threat to radar detection. Faced with an increasingly complex electromagnetic environment, acquiring target information by radar is becoming increasingly difficult. Therefore, the development of intelligent radar has become the main trend in radar development.

[0003] Intelligent radar is a closed-loop system that understands and adapts to its environment through continuous interaction, and "cognitive radar" is a crucial manifestation of this intelligentization process. Anti-jamming capabilities of cognitive radar are currently a key direction in the development of radar anti-jamming technology. To address the demands of radar target detection in complex electromagnetic interference environments and overcome the bottlenecks of insufficient understanding of interference environments, weak anti-jamming capabilities, and unstable anti-jamming effects in traditional radar systems, researchers have conducted research on small-scale intelligent radar perception and countermeasure technology. By designing an environmental simulator and a miniaturized, low-power radar signal processor, a small-scale intelligent radar perception and countermeasure verification system has been constructed. This system enables the simulation of complex electromagnetic environments, adaptive adjustment of optimal anti-jamming strategies, and online optimization of transmitted waveforms, forming a closed-loop feedback loop from the receiver to the transmitter. This enhances the radar's adaptability to complex interference environments, improves its intelligence level, and accelerates the engineering application of cognitive radar anti-jamming technology.

[0004] Traditional radar sensing and countermeasure verification systems often employ a dual-core architecture using a Field Programmable Gate Array (FPGA) and a Digital Signal Processor (DSP). The signal processor consists of a signal processing module and a data processing module. The FPGA primarily implements the signal processing module, while the DSP handles the data processing module. Specifically, the signal processing module performs digital signal processing on the echo signal acquired by the transmitter, while the data processing module performs target detection on the processed data. If no target is detected, a different waveform is generated and transmitted back to the transmitter, which then transmits the desired waveform into the electromagnetic environment. The radar system utilizes the dynamic switching between waveforms to improve its anti-jamming performance against interference signals.

[0005] However, existing systems still have the following drawbacks: First, the transmitter and receiver typically use an open-loop system, resulting in a relatively simple echo signal type that cannot simulate complex electromagnetic environments. Second, the radar cannot utilize prior knowledge and effect feedback to continuously adjust the optimal anti-jamming strategy and transmit the optimal waveform to adaptively detect targets in response to different interferences. Third, the DSP and FPGA themselves are multiple chips, leading to a large system hardware platform size, resulting in low integration, high power consumption, and large size of the entire radar signal processing system. Fourth, because it involves cascading multiple chips and information interaction between them, reliability may be significantly affected. Summary of the Invention

[0006] To address the aforementioned problems in the existing technology, this invention provides a radar perception and countermeasure verification system for complex electromagnetic environments. The technical problem to be solved by this invention is achieved through the following technical solution:

[0007] A radar sensing and countermeasure verification system for complex electromagnetic environments includes a host computer, a radar signal processor, and an environment simulator; wherein,

[0008] The host computer is used to send initialization loading parameters to the radar signal processor in real time, and to send the interference type to the environment simulator.

[0009] The radar signal processor is used to generate a radar transmission signal according to preset waveform parameters and send it to the environment simulator;

[0010] The environment simulator is used to generate a target signal based on the received radar transmission signal, and at the same time generate an interference signal based on the interference type, and send the target signal and the interference signal together as an echo signal to the radar signal processor;

[0011] The radar signal processor is also used to process the received echo signals and adjust the anti-jamming strategy based on the processing results to generate the optimal transmission waveform; at the same time, it returns the target detection results and anti-jamming effect to the host computer in real time to realize real-time detection of the target.

[0012] The beneficial effects of this invention are:

[0013] 1. The radar sensing countermeasure verification system provided by this invention, on the one hand, designs an environment simulator that can simulate the generation of various types of active electronic jamming signals and target signals by jammers, so that the radar signal processor can sense multiple types of jamming signals to verify its intelligent function; on the other hand, it senses the external environment by transmitting and receiving electromagnetic waves, and uses prior knowledge and effect feedback to take different anti-jamming measures for different jamming, selects the best anti-jamming strategy, continuously adjusts the radar's radio frequency transceiver front-end parameters, and can actively and adaptively transmit the optimal waveform, so that the radar can adaptively detect targets in a complex and ever-changing electromagnetic environment and achieve its optimal performance.

[0014] 2. This invention adopts a single-core architecture to realize an intelligent radar SoC system, which solves the problems of large size, low integration and high power consumption of radar signal processors;

[0015] 3. The PL module and PS module in the radar signal processor of the present invention are both implemented based on a single-core architecture and an on-chip multi-core system. This single-core architecture tightly integrates a complete ARM processor with a low-power programmable logic device and realizes high-speed data communication through the AXI bus. It has the characteristics of rich hardware resources, strong scalability, and a variety of high-speed interfaces. At the same time, it can be equipped with a large amount of external memory to meet the system's requirements for processing large amounts of data and running complex algorithms. This makes the system of the present invention have the advantages of miniaturization, low power consumption and fast data transmission speed.

[0016] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0017] Figure 1 This is a structural block diagram of a radar perception and countermeasure verification system for complex electromagnetic environments provided in an embodiment of the present invention;

[0018] Figure 2 This is a schematic diagram of the structure of a radar perception and countermeasure verification system for complex electromagnetic environments provided in an embodiment of the present invention;

[0019] Figure 3 This is a schematic diagram of the workflow of a radar perception and countermeasure verification system for complex electromagnetic environments provided in an embodiment of the present invention. Detailed Implementation

[0020] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0021] Example 1

[0022] Please see Figure 1 , Figure 1This is a structural block diagram of a radar perception and countermeasure verification system for complex electromagnetic environments provided in an embodiment of the present invention. It includes a host computer, a radar signal processor, and an environment simulator; wherein,

[0023] The host computer is used to send initialization and loading parameters to the radar signal processor in real time, and to send the interference type to the environment simulator;

[0024] The radar signal processor is used to generate radar transmission signals based on preset waveform parameters and send them to the environment simulator;

[0025] The environment simulator is used to generate target signals based on the received radar transmission signals, and at the same time generate interference signals according to the interference type. The target signals and interference signals are then sent together as echo signals to the radar signal processor.

[0026] The radar signal processor is also used to process the received echo signals and adjust the anti-jamming strategy based on the processing results to generate the optimal transmission waveform; at the same time, it returns the target detection results and anti-jamming effect to the host computer in real time, realizing real-time detection of the target.

[0027] The small intelligent radar perception and countermeasure verification system provided in this embodiment establishes a jammer (environmental simulator), a radar (radar signal processor), and a white party (host computer). The host computer controls the working mode of the radar signal processor and the type of jamming signal generated by the environment simulator through a serial port. It also displays the target detection results and anti-jamming effect of the radar signal processor. It can monitor the perception and countermeasure process in real time and has the characteristics of being realistic, reusable, expandable, open, and easy to interact with.

[0028] Furthermore, the environmental simulator in the radar system can simulate complex electromagnetic environments, including various types of active electronic jamming signals, radar target signals, and clutter signals generated by jammers. The radar can then adopt different anti-jamming strategies based on different jamming signals. Therefore, it can monitor whether the radar has closed-loop feedback capability from receiver to transmitter, adaptively adjust the optimal anti-jamming strategy, and transmit the optimal waveform, thereby verifying whether the radar has fully adaptive intelligent cognitive functions. Simultaneously, it can also disrupt or interfere with the normal operation of enemy radar by radiating or scattering electromagnetic waves, preventing it from correctly acquiring target signals.

[0029] In this embodiment, the XC7Z100-2FFG900I chip is used as the main controller for both the radar signal processor and the environmental simulator.

[0030] Specifically, the XC7Z100-2FFG900I chip is one of Xilinx's Zynq-7000 series. This chip integrates two ARM Cortex-A9 MPCore processors, tightly integrating a complete ARM processor system-on-a-chip with low-power programmable logic, enabling the implementation of traditional dual-core hardware platform architecture functions on a single chip.

[0031] For further details, please see Figure 2 , Figure 2 This is a schematic diagram of the structure of a radar sensing and countermeasure verification system for complex electromagnetic environments provided in an embodiment of the present invention. The radar signal processor includes a radio frequency transceiver module, a programmable logic (PL) module, and a processing system (PS) module; wherein,

[0032] The radio frequency transceiver module is used to acquire and transmit signals;

[0033] The programmable logic module is used to receive the initialization binding parameters sent by the host computer, and split the received echo signal into two paths for signal processing and environmental perception, respectively, and send the signal processing results and environmental perception results to the processor system module.

[0034] The processor system module is used to perform power-on initialization configuration of the entire system, and to perform target detection based on the signal processing results transmitted from the programmable logic module. It also adjusts the anti-interference strategy according to the target detection results and environmental perception results to generate the optimal transmission waveform. At the same time, the generated waveform is transmitted to the environmental simulator through the radio frequency transceiver module, and the target detection results and anti-interference effect are uploaded to the host computer through the programmable logic module.

[0035] Optionally, as an implementation method, the RF transceiver module in this embodiment is implemented using the ADRV9009 chip. This chip is a highly integrated RF agile transceiver with two independent receive channels (RX) and transmit channels (TX), as well as two observation channels (ORX). It employs 16-bit and 14-bit effective bit width, 2GSPS ADC and DAC, and operates in the frequency range of 75MHz-6000MHz, with a maximum transmit bandwidth of 200MHz and a maximum receive bandwidth of 450MHz. Its RF architecture adopts a zero-IF architecture, directly converting the IF signal to a baseband signal and sending it to the programmable logic (PL) module for digital signal processing. Simultaneously, the programmable logic (PL) module can send the baseband signal to be transmitted to the ADRV9009 for up-mixing to an IF signal for transmission.

[0036] This embodiment uses the aforementioned chip as the signal transceiver module of the radar signal processor. It can simultaneously receive two echo signals for digital signal processing and environmental perception, respectively. This parallel processing method can obtain the time-frequency characteristics of the interference signal in real time and take the best anti-interference measures according to the type of interference signal. At the same time, the system can reasonably select the radio frequency or intermediate frequency digitization method according to the working frequency band required by the task, and realize the transmission and reception of the detection signal required by the task with an open system architecture.

[0037] For further details, please continue to see Figure 2 The programmable logic module includes a pulse compression submodule, a moving target detection (MTD) submodule, a unit average constant false alarm rate (CFAR) detection submodule, and an environmental perception submodule.

[0038] The pulse compression submodule is used to perform Fast Fourier Transform (FFT), matched filtering, and Inverse Fast Fourier Transform (IFFT) operations on the echo signal in sequence according to different radar operating modes.

[0039] The moving target detection submodule is used to read the data processed by the pulse compression submodule using the same distance unit and perform FFT processing on the column.

[0040] The unit average constant false alarm rate (CFAR) detection submodule is used to perform sliding window processing on the Doppler channels of the output data of the moving target detection submodule, compare the detection unit with the preset threshold value, record the detection units that exceed the threshold and their corresponding Doppler channel number and distance sampling unit number, and obtain the final signal processing result.

[0041] The environmental perception submodule is used to identify echo signals and analyze their time and frequency domain characteristics to obtain environmental perception results.

[0042] Specifically, in this embodiment, the pulse compression submodule performs FFT, matched filtering, and IFFT operations on the digital baseband signal transmitted by the RF transceiver module in sequence according to different modes.

[0043] It should be noted that since the signal processor processes the echo data frame by frame, with each frame containing 64 pulses, and since the MTD needs to perform FFT for each distance unit, each frame of data after pulse compression needs to be stored in memory first. After storing one frame of data, it needs to be transposed, read out according to the same distance unit, and sent to the MTD submodule for FFT processing.

[0044] Therefore, in this embodiment, both the programmable logic module and the processor system module are externally equipped with several (preferably two) Double-Data-Rate Three Synchronous Dynamic Random Access Memory (DDR3).

[0045] The unit-average constant false alarm rate (CFAR) detection submodule stores each frame of data after the MTD (Mean Time To Value) back into the DDR3 memory. After storing a frame, it reads the data column by column and performs sliding window processing. Based on the constant false alarm probability and the mean of the reference units, a threshold value is determined. The detected units are compared with the threshold value, and the detected units that exceed the threshold, along with their corresponding Doppler channel number and distance sampling unit number, are recorded for subsequent signal processing. The environmental perception submodule performs signal identification on the echo signal received by the RF transceiver module, analyzes the time and frequency domain characteristics of the signal, and transmits the analysis results to the processor system (PS) module through the internal Advanced Extensible Interface (AXI).

[0046] For further details, please continue to see Figure 2 The processor system module includes a target parameter estimation submodule and a perception adversarial submodule; among which,

[0047] The target parameter estimation submodule is used to aggregate target points based on the data processing results output by the unit average constant false alarm rate detection submodule, and to calculate information such as the target's distance and velocity; thus obtaining the target detection result.

[0048] The perception countermeasure strategy submodule is used to comprehensively evaluate the output results of the target parameter estimation submodule and the environmental perception results output by the environmental perception submodule. It designs corresponding anti-interference techniques for different types of interference and adjusts the anti-interference strategy in real time according to the anti-interference effect to generate the optimal transmission waveform.

[0049] Specifically, in the two ARM cores of the Processor System (PS) module, Core 0 primarily controls the information interaction with the host computer and PL module. Based on the commands received from the host computer, the radar switches between different operating states and sends target detection results and anti-jamming effects to the host computer in real time. Core 1 mainly aggregates target points from the data that have passed the threshold after detection by the PL module, calculating information such as the target's distance and velocity. If no target is detected, Core 1 enters the perception countermeasure strategy stage, analyzing and evaluating the environmental perception results from the PL module, designing corresponding anti-jamming techniques for different types of interference, and selecting the optimal anti-jamming strategy based on the anti-jamming effect.

[0050] In this embodiment, the PL and PS modules of the radar signal processor are both implemented based on a single-core architecture with an on-chip multi-core system. This single-core architecture tightly integrates a complete ARM processor with a low-power programmable logic device, achieving high-speed data communication via the AXI bus. It features abundant hardware resources, strong scalability, and a variety of high-speed interfaces. Simultaneously, it can accommodate a large amount of external memory to meet the system's requirements for processing large amounts of data and running complex algorithms. This gives the radar system of this invention the advantages of miniaturization, low power consumption, and high data transmission speed. Furthermore, this embodiment uses a single-core architecture to implement an intelligent radar SoC system, solving the problems of large size, low integration, and high power consumption in radar signal processors.

[0051] This invention first uses a host computer to send initialization parameters to the radar signal processor. After receiving these initialization parameters, the ADRV9009 radio frequency agile transceiver in the signal processor transmits a waveform generated according to predetermined waveform parameters to the environmental simulator via the transmission channel. The environmental simulator processes the intercepted radar transmission signal, generating a signal similar to the target echo by modulating its time delay, frequency, amplitude, or phase. Then, the interference signal and the target signal are sent together to the radar signal processor. The signal received by the signal processor is divided into two paths. The echo signal received by receiving channel 2 directly enters the environmental perception submodule of the PL module to analyze the time and frequency domain characteristics of the signal. The perception result is transmitted to the PS module via the AXI bus protocol. The echo signal received by receiving channel 1 enters the PL module and undergoes digital signal processing such as pulse compression, MTD, and cell average constant false alarm detection. The data that exceeds the threshold after detection is transmitted to the PS module via the AXI bus protocol. If a target is detected and the tracking phase begins, the target is tracked according to the predetermined transmission waveform. If no target is detected or the target is lost during the tracking phase, the perception countermeasure strategy phase begins. The data processing of the two channels and the environmental perception results are comprehensively evaluated, and corresponding anti-interference technology is designed for the type of interference signal. The anti-interference strategy is adjusted according to the anti-interference effect, and the optimal transmission waveform is adaptively transmitted. The waveform is then transmitted through the RF agile transceiver ADRV9009 transmission channel, enabling the radar to have fully adaptive intelligent cognitive processing.

[0052] The following reference Figure 3 This paper provides a detailed description of the workflow of the radar perception and countermeasure verification system for complex electromagnetic environments provided by the present invention.

[0053] First, after the hardware board is powered on, the various components inside the radar signal processor begin a series of initialization operations, including parameter configuration and self-test. These operations include controlling the power-on sequence of the power modules, initializing the Direct Memory Access (DMA) chip, initializing the clock chip, and initializing the ADRV9009 RF chip. After initialization, it enters standby mode, waiting to receive initialization parameters from the host computer. These parameters include the radar's operating mode, predetermined transmission waveform parameters, and radar search and tracking range.

[0054] After receiving these initialization parameters, the ADRV9009 RF agile transceiver first transmits the waveform generated according to the predetermined waveform parameters through the transmission channel. The received signal is divided into two paths. The echo signal received by receiving channel 2 directly enters the environmental perception stage, where the time-domain and frequency-domain characteristics of the signal are analyzed. Receiving channel 1 performs digital signal processing on the received echo signal. If a target is detected and the tracking phase begins, the search for the target continues according to the predetermined transmission waveform. If no target is detected or the target is lost during the tracking phase, the sensory countermeasures module comprehensively evaluates the results from both channels. For each type of interference signal, the radar will take all anti-interference measures to suppress the interference. Based on the interference suppression effect (such as the number of detected targets, signal-to-interference ratio, and probability of deception interference), the corresponding anti-interference measures are evaluated and stored in the sensory countermeasures knowledge base. In actual countermeasures, the radar adaptively selects the best anti-interference measure based on the type of interference and the anti-interference effect in the sensory countermeasures knowledge base.

[0055] The radar sensing countermeasure verification system provided by this invention, on the one hand, designs an environment simulator that can simulate the generation of various types of active electronic jamming signals and target signals by jammers, enabling the radar signal processor to sense multiple types of jamming signals to verify its intelligent functions; on the other hand, it senses the external environment by transmitting and receiving electromagnetic waves, and uses prior knowledge and effect feedback to take different anti-jamming measures against different jamming, selects the best anti-jamming strategy, continuously adjusts the radar's radio frequency transceiver front-end parameters, and can actively and adaptively transmit the optimal waveform, so that the radar can adaptively detect targets in a complex and ever-changing electromagnetic environment and achieve its optimal performance.

[0056] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A radar sensing and countermeasure verification system for complex electromagnetic environments, characterized in that, It includes a host computer, a radar signal processor, and an environmental simulator; among which, The host computer is used to send initialization loading parameters to the radar signal processor in real time, and to send the interference type to the environment simulator. The radar signal processor is used to generate radar transmission signals according to preset waveform parameters and send them to the environment simulator; the radar signal processor includes a radio frequency transceiver module, a programmable logic module, and a processor system module; wherein... The radio frequency transceiver module is used to acquire and transmit signals; The programmable logic module is used to receive the initialization binding parameters sent by the host computer, and split the received echo signal into two paths for signal processing and environmental perception, respectively, and send the signal processing results and environmental perception results to the processor system module. The programmable logic module includes a pulse compression submodule, a moving target detection submodule, a unit average constant false alarm rate (CFAR) detection submodule, and an environment perception submodule. The pulse compression submodule performs FFT, matched filtering, and IFFT operations sequentially on the echo signal according to different radar operating modes. The moving target detection submodule reads the data processed by the pulse compression submodule for the same range units and performs FFT processing column-wise. The unit average CFAR detection submodule performs sliding window processing on the Doppler channels of the output data from the moving target detection submodule, compares the detected units with a preset threshold, records the detected units that exceed the threshold and their corresponding Doppler channel number and range sampling unit number, obtains the final signal processing result, and sends it to the processor system module. The environment perception submodule identifies the echo signal, analyzes the time and frequency domain characteristics of the signal, obtains the environment perception result, and sends it to the processor system module. The processor system module is used to perform power-on initialization configuration of the entire system, and to perform target detection based on the signal processing results transmitted from the programmable logic module. It also adjusts the anti-interference strategy according to the target detection results and environmental perception results to generate the optimal transmission waveform. At the same time, the generated waveform is transmitted to the environmental simulator through the radio frequency transceiver module, and the target detection results and anti-interference effect are uploaded to the host computer through the programmable logic module. The processor system module includes a target parameter estimation submodule and a perception countermeasure submodule. The target parameter estimation submodule is used to aggregate target points from the data processing results output by the unit average constant false alarm rate detection submodule, and calculate the target's distance and velocity information to obtain the target detection result. The perception countermeasure submodule is used to comprehensively evaluate the target detection result and the environmental perception result output by the environmental perception submodule, design corresponding anti-interference techniques for different interferences, and adjust the anti-interference strategy in real time according to the anti-interference effect to generate the optimal transmission waveform. The environment simulator is used to generate a target signal based on the received radar transmission signal, and at the same time generate an interference signal based on the interference type, and send the target signal and the interference signal together as an echo signal to the radar signal processor. The radar signal processor is also used to process the received echo signals and adjust the anti-jamming strategy based on the processing results to generate the optimal transmission waveform; at the same time, it returns the target detection results and anti-jamming effect to the host computer in real time to realize real-time detection of the target.

2. The radar perception and countermeasure verification system for complex electromagnetic environments according to claim 1, characterized in that, The host computer controls the working mode of the radar signal processor and the type of interference signal generated by the environment simulator via a serial port.

3. The radar perception and countermeasure verification system for complex electromagnetic environments according to claim 1, characterized in that, The hardware platform for both the radar signal processor and the environment simulator uses the XC7Z100-2FFG900I chip as the main controller.

4. The radar perception and countermeasure verification system for complex electromagnetic environments according to claim 1, characterized in that, The radio frequency transceiver module is implemented using the ADRV9009 chip.

5. The radar perception and countermeasure verification system for complex electromagnetic environments according to claim 1, characterized in that, The programmable logic module sends the processing results and sensing results to the processor system module via the AXI bus interface using direct memory access (DMA).

6. The radar perception and countermeasure verification system for complex electromagnetic environments according to claim 1, characterized in that, Both the programmable logic module and the processor system module are externally equipped with several double data rate synchronous dynamic random access memories.

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