A mirror array spatial light modulator chip structure and a processing method thereof

Abstract

The application provides a mirror array spatial light modulator chip structure and a processing method thereof, and relates to the technical field of micro-opto-electro-mechanical systems.The application is composed of multiple groups of micro-mirror units arranged at equal intervals;the micro-mirror unit comprises a first substrate and a second substrate;the first substrate is provided with a torsional beam and an electrical insulation layer, a back cavity is formed below the torsional beam, a first addressing electrode and a second addressing electrode are symmetrically arranged on the electrical insulation layer along the central axis of the torsional beam, and contact bumps are arranged on the first addressing electrode and the second addressing electrode;the second substrate is used for processing a mirror surface by an operator, and a mirror surface anchor point for connecting the torsional beam is arranged on the mirror surface.The method can overcome the problems of poor light field matching of the micro-mirror array in a spectral imaging system, loss of target optical information acquisition caused by the inherent torsional mode and array form.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of micro-opto-electro-mechanical system, in particular to a mirror array spatial light modulator chip structure and a processing method thereof. BACKGROUND

[0002] In recent years, spatial light modulation chips processed by micro-electro-mechanical system (MEMS) technology have the advantages of small size, low power consumption and cost, strong integration and customization ability, and have been widely used in projection display, medical imaging and biotechnology, etc. national defense and civilian fields. Among them, the high frame frequency, high resolution, programmable digital micromirror device (DMD) designed and produced by the United States TI (Texas Instruments) company is the most representative spatial light modulator in optical MEMS. The DMD structure (US patent 4615595 (1986.10.7)) is composed of many small aluminum mirrors, complementary metal oxide semiconductor (CMOS) static memory, addressing electrodes, bias electrodes, yokes, hinges, etc. The rotation of the micro-mirror is completed by the electrostatic attraction between the micro-mirror itself and the storage unit below. When the memory unit is in the "on" state, i.e. "1", the micro-mirror turns to +10°; when the memory unit is in the "off" state, i.e. "0", the micro-mirror turns to -10°.

[0003] The currently commercialized DMD is mainly divided into "rhombus" and "orthogonal" two array modes. In the new type of spectral imaging system (Optics Express, 2019, 27(12): 16995), due to the inherent structure and movement mode of DMD, the DMDs of the two array modes have the problems of poor light path matching and distorted target optical information acquisition. When the "rhombus" arranged DMD is twisted by column, the gap before the micro-mirror units in the same column is large, which cannot realize the complete filling of the same column, causing part of the incident light cannot be reflected into the rear-end dispersion system, resulting in distorted target optical information acquisition, which limits the improvement of the fine identification ability of the spectral imaging system to the target spectrum. When the "orthogonal" arranged DMD is twisted by column, due to the twisting mode of the micro-mirror unit around its diagonal line, the incident and outgoing light cannot be in the same horizontal plane, so at least one light path in the spectral imaging system needs to be fixed by a special fixture, which causes the whole spectral imaging system to increase in size, which seriously hinders the miniaturization of the spectral imaging system. In addition, there is also light interference and shielding between adjacent micro-mirror units in the same twisted column, which further causes the loss of target optical information. SUMMARY

[0004] The problem solved by the present application is how to overcome the problem of poor light field matching of a micromirror array in a spectral imaging system, inherent torsion mode and array form leading to loss of target optical information acquisition.

[0005] To solve the above problems, the present application provides a mirror array spatial light modulator chip structure composed of multiple groups of micro-mirror units arranged at equal intervals.

[0006] The micro-mirror unit comprises a first substrate and a second substrate.

[0007] The first substrate is sequentially provided with a torsion beam and an electrical insulation layer, a back cavity is formed below the torsion beam, a first addressing electrode and a second addressing electrode are symmetrically arranged on the electrical insulation layer along the central axis of the torsion beam, and contact bumps are arranged on the first addressing electrode and the second addressing electrode.

[0008] The second substrate is used for processing a mirror surface, and a mirror surface anchor point for connecting the torsion beam is arranged on the mirror surface.

[0009] In the above structure, the spacing between each group of micro-mirror units is less than or equal to 2 μm. Each group of micro-mirror units mainly comprises a first substrate, a second substrate, a torsion beam, an electrical insulation layer, a first addressing electrode, a second addressing electrode, a contact bump, a mirror surface anchor point and a mirror surface. By adopting a double-layer axisymmetric micro-mirror structure design, the micro-mirror unit is twisted around the long axis of the mirror surface and translated along the normal direction of the mirror surface, thereby improving the light field matching of the micro-mirror array in the spectral imaging system, simplifying the system optical path, and promoting the miniaturization of the spectral imaging system.

[0010] Further, the first substrate provides a grounding signal for the mirror surface, and the grounding signal is transmitted to the mirror surface through the first substrate, the torsion beam and the mirror surface anchor point in sequence.

[0011] In the above structure, the first substrate not only serves as a support platform for various structures in the mirror array spatial light modulator chip, but also provides a grounding signal for the mirror surface. The grounding signal is transmitted to the mirror surface through the first substrate, the torsion beam and the mirror surface anchor point. The first substrate can be selected from ordinary silicon wafers or SOI silicon wafers. The second substrate is used for processing the mirror surface anchor point and the mirror surface, and needs to use materials suitable for wafer-level MEMS bulk processing technology, which can be selected from ordinary silicon wafers or SOI silicon wafers.

[0012] Further, the shape of the torsion beam is any one of a straight beam, a folded beam and a trapezoidal beam.

[0013] Further, the mirror surface is a grounding electrode of the micro-mirror unit.

[0014] A processing method of a mirror array spatial light modulator chip, comprising the steps of:

[0015] S1: select a first substrate and remove dust and organic matter on the surface by a cleaning process;

[0016] S2: etch a torsion beam on the first substrate by a MEMS etching process;

[0017] S3: deposit an insulating material on the surface of the first substrate by a thin film deposition process, and form an electrically insulating layer after patterning;

[0018] S4: deposit a metal thin film on the surface of the first substrate by a metal thin film deposition process and patterning to obtain a first addressing electrode, a second addressing electrode and a first bonding layer;

[0019] S5: deposit an insulating material on the surface of the first addressing electrode and the second addressing electrode respectively by a thin film deposition process, and form a contact bump after patterning;

[0020] S6: select a second substrate and remove dust and organic matter on the surface by a cleaning process;

[0021] S7: complete the preparation of a mirror anchor on the second substrate by a MEMS etching process, and deposit a metal thin film on the surface of the mirror anchor, and form a second bonding layer after patterning;

[0022] S8: bond the first substrate and the second substrate by a MEMS bonding process, wherein the bonding area is the first bonding layer on the torsion beam and the second bonding layer on the mirror anchor;

[0023] S9: according to the preset requirements of the micro-mirror driving, thin the second substrate to a thickness corresponding to the preset requirements, and form a discrete mirror after patterning;

[0024] S10: complete the structure release of the torsion beam by a MEMS release process, and obtain a reflective mirror array spatial light modulator chip.

[0025] Further, the metal thin film is any one of a Ge thin film and a Sn thin film.

[0026] Further, after the second bonding layer is formed after patterning, the bonding area is the first bonding layer on the torsion beam and the second bonding layer on the mirror anchor.

[0027] Further, the MEMS etching process is any one of a wet etching process, a dry plasma etching process and a surface laser micro-machining process;

[0028] The thin film deposition process is any one of a low-pressure chemical vapor deposition process, a plasma-enhanced chemical vapor deposition process, an atomic layer deposition process and an electron beam evaporation process;

[0029] The insulating material is any one of silicon oxide, silicon nitride and a polymer.

[0030] Further, the metal thin film can be selected from any one of Au thin film, Al thin film and Cu thin film;

[0031] The metal thin film deposition process is any one of electron beam evaporation process and magnetron sputtering process;

[0032] The patterning technology is any one of wet etching process and dry plasma etching process.

[0033] Further, the MEMS bonding process can be any one of eutectic bonding process, fusion bonding process and direct bonding process;

[0034] The thinning process is any one of wet etching process, chemical mechanical polishing process and ion beam etching process;

[0035] The MEMS releasing process is any one of wet etching process and hydrofluoric acid chemical vapor etching process.

[0036] The technical scheme of the present application has the following beneficial effects:

[0037] The present application can realize the torsion of the micromirror unit around the long axis of the mirror surface and the translation along the normal direction of the mirror surface by adopting the axisymmetric micromirror structure design, improve the light field matching of the micromirror array in the spectral imaging system, simplify the system light path and promote the miniaturization of the spectral imaging system. Due to the change of the mirror torsion mode, the optical interference and shielding between adjacent micromirror units in the same torsion column are eliminated, more effective target optical information can enter the rear-end dispersion system, and the spectral fine recognition ability of the spectral imaging system is greatly improved. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figure 1 The present application provides a reflective mirror array spatial light modulator chip structure schematic diagram;

[0039] Figure 2 The present application provides a reflective mirror array spatial light modulator chip structure schematic diagram; Figure 1 The present application provides a reflective mirror array spatial light modulator chip structure schematic diagram;

[0040] Figure 3 The present application provides a reflective mirror array spatial light modulator chip structure schematic diagram;

[0041] Figure 4 The present application provides a reflective mirror array spatial light modulator chip structure schematic diagram;

[0042] Figure 5 The present application provides a reflective mirror array spatial light modulator chip structure schematic diagram;

[0043] Figure 6 The preparation process schematic diagram of the mirror array spatial light modulator chip provided for the third embodiment of the present application is shown in the figure;

[0044] Figure 7 The exploded schematic diagram of the mirror array spatial light modulator chip structure provided for the third embodiment of the present application is shown in the figure;

[0045] Figure 8 The partial enlarged view of the B part in the figure; Figure 7 The partial enlarged view of the B part in the figure;

[0046] Figure 9 The processing method flow chart of the mirror array spatial light modulator chip provided for the third embodiment of the present application is shown in the figure;

[0047] Explanation of the reference signs:

[0048] 1-first substrate, 2-torsion beam, 3-electrical insulation layer, 4-first addressing electrode, 5-second addressing electrode, 6-contact bump, 7-mirror anchor point, 8-mirror surface, 9-back cavity, 10-second substrate, 11-first bonding layer, 12-second bonding layer. DETAILED DESCRIPTION

[0049] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0050] The following is a specific embodiment of the present application and further describes the technical solution of the present application in combination with the drawings, but the present application is not limited to these embodiments.

[0051] Embodiment one

[0052] The present embodiment provides a mirror array spatial light modulator chip structure and a processing method of the mirror array spatial light modulator chip, as shown in the figures, Figure 1 、 Figure 2 、 Figure 7 and Figure 8 The present application is composed of multiple groups of micro-mirror units arranged at equal intervals;

[0053] The micro-mirror unit includes a first substrate 1 and a second substrate 10;

[0054] The torsion beam 2 and the electrical insulation layer 3 are arranged on the first substrate 1, the back cavity 9 is opened below the torsion beam 2, the first addressing electrode 4 and the second addressing electrode 5 are symmetrically arranged on the electrical insulation layer 3 along the central axis of the torsion beam 2, and the contact bumps 6 are arranged on the first addressing electrode 4 and the second addressing electrode 5;

[0055] The second substrate 10 is used for the operator to process the mirror surface 8, and the mirror anchor point 7 for connecting the torsion beam 2 is arranged on the mirror surface 8.

[0056] The first substrate 1 provides a ground signal for the mirror surface 8, and the ground signal is transmitted to the mirror surface 8 through the first substrate 1, the torsion beam 2 and the mirror surface anchor 7 in sequence.

[0057] The torsion beam 2 has any one of a straight beam, a folded beam and a ladder beam.

[0058] The mirror surface 8 is a ground electrode of the micro-mirror unit.

[0059] Referring to Figure 9 The method comprises the following steps:

[0060] S1: selecting a first substrate and removing dust and organic matter on the surface through a cleaning process;

[0061] S2: etching a torsion beam on the first substrate by using a MEMS etching process;

[0062] S3: depositing an insulating material on the surface of the first substrate by using a thin film deposition process, and forming an electrically insulating layer after patterning;

[0063] S4: depositing a metal thin film on the surface of the first substrate by using a metal thin film deposition process, and obtaining a first addressing electrode, a second addressing electrode and a first bonding layer after patterning;

[0064] S5: depositing an insulating material on the surface of the first addressing electrode and the second addressing electrode respectively by using a thin film deposition process, and forming a contact bump after patterning;

[0065] S6: selecting a second substrate and removing dust and organic matter on the surface through a cleaning process;

[0066] S7: preparing a mirror surface anchor on the second substrate by using a MEMS etching process, and depositing a metal thin film on the surface of the mirror surface anchor, and forming a second bonding layer after patterning;

[0067] S8: bonding the first substrate and the second substrate by using a MEMS bonding process, wherein the bonding area is the first bonding layer on the torsion beam and the mirror surface anchor;

[0068] S9: according to a preset requirement of micro-mirror driving, thinning the second substrate to a thickness corresponding to the preset requirement, and forming a discrete mirror surface after patterning;

[0069] S10: completing structure release of the torsion beam by using a MEMS release process, and obtaining a reflective mirror array spatial light modulator chip.

[0070] The metal thin film is any one of a Ge thin film and a Sn thin film.

[0071] Wherein, when the second bonding layer is formed after the patterning, the bonding region is the first bonding layer on the torsion beam and the second bonding layer on the mirror anchor point.

[0072] Wherein, the MEMS etching process is any one of a wet etching process, a dry plasma etching process, and a surface laser micromachining process; the thin film deposition process is any one of a low pressure chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, an atomic layer deposition process, and an electron beam evaporation process; and the insulating material is any one of silicon oxide, silicon nitride, and a polymer.

[0073] Wherein, the metal thin film can be any one of an Au thin film, an Al thin film, and a Cu thin film; the metal thin film deposition process is any one of an electron beam evaporation process and a magnetron sputtering process; and the patterning technology is any one of a wet etching process and a dry plasma etching process.

[0074] Wherein, the MEMS bonding process can be any one of a eutectic bonding process, a fusion bonding process, and a direct bonding process; the thinning process is any one of a wet etching process, a chemical mechanical polishing process, and an ion beam etching process; and the MEMS releasing process is any one of a wet etching process and a hydrofluoric acid chemical vapor etching process.

[0075] Referring to Figure 3 , specifically, the basic working principle of the mirror array spatial light modulator chip is as follows: the voltage between the first addressing electrode 4 and the mirror 8 is represented by V1, and the voltage between the second addressing electrode 5 and the mirror 8 is represented by V2. Referring to Figure 3 (a), when V1=0 and V2=0, the mirror 8 remains stationary. Referring to Figure 3 (b), when V1≠0 and V2=0, the mirror 8 will be twisted counterclockwise under the action of electrostatic force. Referring to Figure 3 (c), when V1=0 and V2≠0, the mirror 8 will be twisted clockwise under the action of electrostatic force. Referring to Figure 3 (d), when V1=V2≠0, the mirror 8 will be translated along the normal direction of the mirror under the action of electrostatic force. When V1≠V2≠0, the mirror 8 will be twisted and translated up and down under the action of electrostatic force.

[0076] Referring to Figure 4, specifically, the one-dimensional mirror array spatial light modulator chip proposed in the embodiment is composed of 1x50 groups of micro-mirror units, and the spacing between the micro-mirror units is 2 μm. Each group of micro-mirror units mainly consists of a first substrate 1, a torsional beam 2, an electrical insulation layer 3, a first addressing electrode 4, a second addressing electrode 5, a contact bump 6, a mirror anchor point 7, a mirror 8 and the like. The torsional beam 2, the electrical insulation layer 3, the first addressing electrode 4 and the second addressing electrode 5 are all located on the first substrate 1, the first addressing electrode 4 and the second addressing electrode 5 are symmetrically distributed along the central axis of the torsional beam 2, and the mirror 8 is suspended on the torsional beam 2 through the mirror anchor point 7. A double-layer micro-mirror unit structure is formed based on the first substrate and the second substrate, and the torsional beam structure is placed below the mirror through the double-layer micro-mirror unit structure, thereby greatly improving the mirror filling rate of the micro-mirror array.

[0077] The first substrate 1 not only serves as a support platform for various structures in the one-dimensional mirror array spatial light modulator chip, but also provides a grounding signal for the mirror 8. The grounding signal is transmitted to the mirror 8 through the first substrate 1, the torsional beam 2 and the mirror anchor point 7. The material of the first substrate 1 is selected as an SOI silicon wafer, which mainly consists of a device layer 1.1, an oxide layer 1.2 and a substrate layer 1.3. The second substrate 10 is mainly used for processing the mirror anchor point 7 and the mirror 8, and needs to select a material suitable for wafer-level MEMS bulk processing technology, which is selected as an SOI silicon wafer, which mainly consists of a device layer 10.1, an oxide layer 10.2 and a substrate layer 10.3. The shape of the torsional beam 2 can be selected as a straight beam according to the micro-mirror driving voltage requirement.

[0078] Referring to Figure 4 The processing method of the mirror array spatial light modulator chip proposed in the embodiment includes the following steps:

[0079] Step S1, referring to Figure 4 (a), an SOI silicon wafer is selected according to the processing requirement, the device layer 1.1 is 5 μm, the oxide layer 1.2 is 1 μm, and the substrate layer 1.3 is 300 μm, which is used as the first substrate 1, and the surface dust and organic matter and the like are removed through a cleaning process.

[0080] Step S2, referring to Figure 4 (b), a wet etching process is used to etch a 5 μm torsional beam 2 on the device layer 1.1 of the first substrate 1.

[0081] Step S3, referring to Figure 4 (c), a low-pressure chemical vapor deposition process is used to deposit 300 nm of silicon oxide on the surface of the device layer 1.1 of the first substrate 1, and an electrical insulation layer 3 is formed after the wet etching process is used for patterning.

[0082] Step S4, referring to Figure 4(d), 100 nm Au film is deposited on the surface of the device layer 1.1 of the first substrate 1 by an electron beam evaporation process, and is patterned by a wet etching process to complete the preparation of the first addressing electrode 4, the second addressing electrode 5 and the first bonding layer 11.

[0083] Step S5 refers to Figure 4 (e), 500 nm silicon oxide is deposited on the surfaces of the first addressing electrode 4 and the second addressing electrode 5 by a low-pressure chemical vapor deposition process, and is patterned by a wet etching process to form the contact bump 6.

[0084] Step S6 refers to Figure 4 (f), an SOI silicon wafer is selected as the second substrate 10 according to the processing requirements, the device layer 10.1 is 10 μm, the oxide layer 10.2 is 1 μm, and the substrate layer 10.3 is 300 μm, and the surface of the SOI silicon wafer is cleaned to remove dust, organic matter and other residues.

[0085] Step S7 refers to Figure 4 (g), the mirror anchor point 7 is prepared on the device layer 10.1 of the SOI silicon wafer by a wet etching process, and the etching height of the mirror anchor point 7 is 5 μm.

[0086] Step S8 refers to Figure 4 (h), the SOI silicon wafers are bonded by gold-silicon eutectic bonding, and the main bonding area is the torsion beam 2 and the mirror anchor point 7, so as to realize wafer-level integration of the SOI silicon wafers.

[0087] Step S9 refers to Figure 4 (i), according to the requirements of the micro-mirror driving, the oxide layer 10.2 and the substrate layer 10.3 of the SOI silicon wafer of the second substrate 10 are removed by a wet etching process, and the preparation of the discrete mirror 8 is completed by a wet etching process.

[0088] Step S10 refers to Figure 5 (j), the oxide layer 1.2 of the SOI silicon wafer of the first substrate 1 is removed by a wet etching process to complete the structure release of the torsion beam 2.

[0089] Example Two

[0090] Refers to Figure 5In particular, the one-dimensional mirror array spatial light modulator chip proposed in the embodiment is composed of 1x60 micro-mirror units, and the spacing between the micro-mirror units is 1 μm. Each micro-mirror unit is mainly composed of a first substrate 1, a torsional beam 2, an electrical insulation layer 3, a first addressing electrode 4, a second addressing electrode 5, a contact bump 6, a mirror anchor point 7, a mirror 8 and the like. The torsional beam 2, the electrical insulation layer 3, the first addressing electrode 4 and the second addressing electrode 5 are all located on the first substrate 1, and the first addressing electrode 4 and the second addressing electrode 5 are symmetrically distributed along the central axis of the torsional beam 2. The mirror 8 is suspended on the torsional beam 2 through the mirror anchor point 7.

[0091] In the embodiment, the first substrate 1 not only serves as a support platform for the structures in the one-dimensional mirror array spatial light modulator chip, but also provides a grounding signal for the mirror 8. The grounding signal is transmitted to the mirror 8 through the substrate 1, the torsional beam 2 and the mirror anchor point 7. The material of the first substrate 1 is selected as an SOI silicon wafer, which is mainly composed of a device layer 1.1, an oxide layer 1.2 and a substrate layer 1.3. The second substrate 10 is mainly used for processing the mirror anchor point 7 and the mirror 8, and needs to select a material suitable for wafer-level MEMS bulk processing technology, which is selected as a common silicon wafer. The shape of the torsional beam 2 can be selected as a folded beam according to the micro-mirror driving voltage requirement.

[0092] Referring to Figure 5 The processing method of the one-dimensional mirror array spatial light modulator chip proposed in the embodiment includes the following steps:

[0093] Referring to Figure 5 (a), an SOI silicon wafer is selected according to the processing requirement, the device layer 1.1 is 10 μm, the oxide layer 1.2 is 1.5 μm, and the substrate layer 1.3 is 400 μm, which is used as the first substrate 1. The surface of the first substrate 1 is cleaned to remove dust and organic matter and the like.

[0094] Referring to Figure 5 (b), a wet etching process is used to etch a 10 μm torsional beam 2 on the device layer 1.1 of the first substrate 1.

[0095] Referring to Figure 5 (c), a low-pressure chemical vapor deposition process is used to deposit 200 nm of silicon oxide and 100 nm of silicon nitride on the surface of the device layer 1.1 of the first substrate 1, and an electrical insulation layer 3 is formed after the wet etching process is used for patterning.

[0096] Referring to Figure 4 (d), an electron beam evaporation process is used to deposit 100 nm of Au thin film on the surface of the device layer 1.1 of the first substrate 1, and a wet etching process is used for patterning to complete the preparation of the first addressing electrode 4, the second addressing electrode 5 and the first bonding layer 11.

[0097] Step S5 refers to Figure 4 (e), 400 nm polymer is deposited on the surface of the first addressing electrode 4 and the second addressing electrode 5 by an electron beam evaporation process, and after being patterned by a dry plasma etching process, the contact bump 6 is formed.

[0098] Step S6 refers to Figure 4 (f), a common silicon wafer with a thickness of 300 μm is selected as the second substrate 10 according to the processing requirement, and the surface is cleaned to remove dust and organic residues.

[0099] Step S7 refers to Figure 4 (g) and 4(h), the mirror anchor 7 is prepared on the second substrate 10 by a wet etching process, the etching height of the mirror anchor 7 is 10 μm, and a 100 nm Sn film is deposited on the surface of the mirror anchor 7, and the second bonding layer 12 is formed after being patterned.

[0100] Step S8 refers to Figure 4 (i), the torsion beam 2 is gold-tin fusion bonded with the mirror anchor 7, and the wafer-level integration of the first substrate 1 and the second substrate 10 is realized.

[0101] Step S9 refers to Figure 4 (j), according to the micro-mirror driving requirement, the silicon wafer 10 is thinned to 15 μm by a chemical mechanical polishing process, and the preparation of the discrete mirror 8 is completed by a dry plasma etching process.

[0102] Step S10 refers to Figure 6 (k), the oxide layer 1.2 of the first substrate 1 is etched by a hydrofluoric acid wet etching process, and the structure release of the torsion beam 2 is completed.

[0103] Example Three

[0104] Referring to Figure 6 Specifically, the one-dimensional mirror array spatial light modulator chip proposed in the embodiment is composed of 1x30 groups of micro-mirror units, and the spacing between the micro-mirror units is 1.5 μm. Each group of micro-mirror units mainly consists of a first substrate 1, a torsion beam 2, an electrical insulation layer 3, a first addressing electrode 4, a second addressing electrode 5, a contact bump 6, a mirror anchor 7, and a mirror 8. The torsion beam 2, the electrical insulation layer 3, the first addressing electrode 4, and the second addressing electrode 5 are all located on the first substrate 1, the first addressing electrode 4 and the second addressing electrode 5 are symmetrically distributed along the central axis of the torsion beam 2, and the mirror 8 is suspended on the torsion beam 2 through the mirror anchor 7.

[0105] In the embodiment, the first substrate 1 not only serves as a support platform for each structure in the one-dimensional mirror array spatial light modulator chip, but also provides a grounding signal for the mirror 8, which is transmitted to the mirror 8 through the first substrate 1, the torsion beam 2 and the mirror anchor 7. The material of the first substrate 1 is selected as a common silicon wafer. The second substrate 10 is mainly used for processing the mirror anchor 7 and the mirror 8, and needs to select a material suitable for wafer-level MEMS bulk processing technology, and is selected as an SOI silicon wafer, which mainly consists of a device layer 10.1, an oxide layer 10.2 and a substrate layer 10.3. The shape of the torsion beam 2 can be selected as a folded beam according to the driving voltage requirement of the micro-mirror.

[0106] Referring to Figure 6 The processing method of the one-dimensional mirror array spatial light modulator chip proposed in the embodiment includes the following steps:

[0107] Step S1, referring to Figure 6 (a), a common silicon wafer with a thickness of 350 μm is selected as the first substrate 1 according to the processing requirement, and a cleaning process is used to remove dust and organic matter and other residues existing on the surface.

[0108] Step S2, referring to Figure 6 (b), a dry plasma etching process is used to etch a torsion beam 2 with a depth of 10 μm on the 350 μm first substrate 1.

[0109] Step S3, referring to Figure 6 (c), a plasma enhanced chemical vapor deposition process is used to deposit 200 nm of silicon nitride on the surface of the first substrate 1, and a reactive ion etching process is used to complete the preparation of the electrical insulation layer 3.

[0110] Step S4, referring to Figure 6 (d), a magnetron sputtering process is used to deposit 150 nm of Al on the surface of the first substrate 1, and a wet etching process is used to complete the preparation of the first addressing electrode 4, the second addressing electrode 5 and the first bonding layer 11.

[0111] Step S5, referring to Figure 6 (e), a plasma enhanced chemical vapor deposition process is used to deposit 500 nm of silicon nitride on the surface of the first addressing electrode 4 and the second addressing electrode 5, and a dry plasma etching process is used to complete the preparation of the contact bump 6.

[0112] Step S6, referring to Figure 6 (f), an SOI silicon wafer is selected as the second substrate 10 according to the processing requirement, the device layer 10.1 is 15 μm, the oxide layer 10.2 is 1.5 μm, and the substrate layer 10.3 is 400 μm, and a cleaning process is used to remove dust and organic matter and other residues existing on the surface.

[0113] Step S7, referring toFigure 6 (g) and 6(h), the mirror anchor 7 is prepared on the device layer 10.1 of the second substrate 10 by a surface laser micro-processing process, the mirror anchor 7 has an etching height of 10 μm, and a 100 nm Ge film is deposited on the surface of the mirror anchor 7, and after patterning, the second bonding layer 12 is formed.

[0114] Step S8 refers to Figure 6 (i), the torsion beam 2 is fused bonded with the mirror support 7, and wafer-level integration of the first substrate 1 and the second substrate 10 is realized.

[0115] Step S9 refers to Figure 6 (j), a deep reactive ion etching process is used to etch a back cavity 9 of 340 microns deep on the back surface of the first substrate 1, and the torsion beam 2 structure is released.

[0116] Step S10 refers to ​ (k), the oxide layer 10.2 and the substrate layer 10.3 of the second substrate 10 are removed by an ion beam etching process, and the preparation of the discrete mirror 8 is completed by a dry plasma etching process.

[0117] The present application can realize the torsion of the micromirror unit around the long axis of the mirror and the translation along the normal direction of the mirror by adopting the axisymmetric micromirror structure design, improve the light field matching of the micromirror array in the spectral imaging system, simplify the system optical path, and promote the miniaturization of the spectral imaging system. Due to the change of the mirror torsion mode, the optical interference and shielding between adjacent micromirror units in the same torsion column are eliminated, more effective target optical information can enter the rear-end dispersion system, and the spectral fine recognition ability of the spectral imaging system is greatly improved.

[0118] Although the present disclosure is disclosed as above, the protection scope of the present disclosure is not limited to this. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure, and these changes and modifications will fall within the protection scope of the present application.

Claims

1. A reflective array spatial light modulator chip structure, characterized by, The micro mirror unit is composed of a plurality of groups of micro mirrors arranged at equal intervals. The micro mirror unit comprises a first substrate (1) and a second substrate (10). The first substrate (1) is provided with a torsion beam (2) and an electrical insulation layer (3), a back cavity (9) is formed below the torsion beam (2), a first addressing electrode (4) and a second addressing electrode (5) are symmetrically arranged on the electrical insulation layer (3) along the central axis of the torsion beam (2), and contact bumps (6) are arranged on the first addressing electrode (4) and the second addressing electrode (5). The second substrate (10) is used for processing a mirror surface (8) by an operator, and the mirror surface (8) is provided with a mirror surface anchor point (7) for connecting the torsion beam (2). The first substrate (1) provides a grounding signal for the mirror surface (8), and the grounding signal is transmitted to the mirror surface (8) through the first substrate (1), the torsion beam (2) and the mirror surface anchor point (7) in sequence.

2. The mirror array spatial light modulator chip structure of claim 1, wherein, The shape of the torsion beam (2) is any one of a straight beam, a folded beam and a trapezoidal beam.

3. The mirror array spatial light modulator chip structure of claim 1, wherein, The mirror surface (8) is a grounding electrode of the micro mirror unit.

4. A method for processing a MEMS spatial light modulator chip, for processing a MEMS spatial light modulator chip structure according to any one of claims 1 to 3, characterized in that The method comprises the following steps: S1: selecting a first substrate and removing dust and organic matter on the surface through a cleaning process; S2: etching a torsion beam on the first substrate by using a MEMS etching process; S3: depositing an insulation material on the surface of the first substrate by using a thin film deposition process, and forming an electrical insulation layer after patterning; S4: depositing a metal thin film on the surface of the first substrate by using a metal thin film deposition process, and obtaining a first addressing electrode, a second addressing electrode and a first bonding layer after patterning; S5: depositing an insulation material on the surface of the first addressing electrode and the second addressing electrode respectively by using a thin film deposition process, and forming a contact bump after patterning; S6: selecting a second substrate and removing dust and organic matter on the surface through a cleaning process; S7: completing the preparation of a mirror surface anchor point on the second substrate by using a MEMS etching process, and depositing a metal thin film on the surface of the mirror surface anchor point, and forming a second bonding layer after patterning; S8: bonding the first substrate and the second substrate by using a MEMS bonding process, wherein the bonding area is the first bonding layer on the torsion beam and the mirror surface anchor point; S9: according to the preset requirements of the micro mirror driving, thinning the second substrate to a thickness corresponding to the preset requirements, and forming a discrete mirror surface after patterning; S10: completing the structure release of the torsion beam by using a MEMS release process, and obtaining a reflective mirror array spatial light modulator chip.

5. The method of claim 4, wherein the mirror array spatial light modulator chip is a digital micromirror device (DMD) chip. The metal thin film is any one of a Ge thin film and a Sn thin film.

6. The method of claim 5, wherein the mirror array spatial light modulator chip is a digital micromirror device (DMD) chip. After the second bonding layer is formed after patterning, the bonding area is the first bonding layer on the torsion beam and the second bonding layer on the mirror surface anchor point.

7. The processing method of the reflective mirror array spatial light modulator chip according to claim 4, characterized in that: the MEMS etching process is any one of a wet etching process, a dry plasma etching process and a surface laser micro machining process; the thin film deposition process is any one of a low pressure chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, an atomic layer deposition process and an electron beam evaporation process; the insulation material is any one of silicon oxide, silicon nitride and a polymer.

8. The method of claim 4, wherein: the metal thin film is selected from any one of Au thin film, Al thin film, and Cu thin film; the metal thin film deposition process is selected from any one of electron beam evaporation process and magnetron sputtering process; and the patterning technique is selected from any one of wet etching process and dry plasma etching process.

9. The method of claim 4, wherein: the MEMS bonding process is selected from any one of eutectic bonding process and fusion bonding process; the thinning process is selected from any one of wet etching process, chemical mechanical polishing process, and ion beam etching process; and the MEMS releasing process is selected from any one of wet etching process and hydrofluoric acid chemical vapor etching process. ​ ​ ​ ​ ​ ​

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