Method for establishing siC mosfet model based on mathematical fitting

Abstract

The application discloses a method for establishing a SiC MOSFET model based on mathematical fitting, and the SiC MOSFET is equivalent to a voltage-controlled current source and a voltage-controlled voltage source and a capacitor-resistor combination mode according to the output characteristics, the body diode forward conduction characteristics and the capacitor characteristics of the SiC MOSFET, the characteristics of the SiC MOSFET are modeled, and the calculation expression basis of different equivalent elements is determined according to the curve form of the test data. By adding mathematical parameters without actual physical meaning, the change range of the simulation curve form is further corrected, so that the fitting accuracy is improved. In the data range, the simulation curve is fitted with the test curve, and the accurate and rapid characterization of the SiC MOSFET characteristics is completed.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of SiC MOSFET model construction, in particular to a method for establishing a SiC MOSFET model based on mathematical fitting. BACKGROUND

[0002] The existing SiC MOSFET simulation model mainly includes a physical model and a behavior model, wherein the physical model adopts a cell as a structural basis, and the model is established based on the expression of physical effects, and the model needs to be deeply understood in terms of physical characteristics of the device and fully mastered in terms of design parameters of the device, and meanwhile, the calculation amount is huge, and usually, it takes ten or more hours to simulate the characteristics, and the model is difficult to establish, and is generally only suitable for the research and development process, and is difficult to use in the application end.

[0003] The behavior model adopts a fixed Spice level 3 model kernel applied to Si-based MOSFET, and the model is established by inputting several fixed parameters with clear physical meanings. However, some physical parameters are difficult to obtain, and even some parameters are confidential parameters. At present, SiC MOSFET has been widely used, and the model expression is not further modified with the development of materials and structures, so that the basic model applied to Si-based MOSFET is difficult to accurately describe the characteristics of the device when being applied to Si-based Trench MOSFET or super-junction MOSFET and SiC MOSFET, and the simulation fitting precision of the model is poor. SUMMARY

[0004] The application provides a method for establishing a SiC MOSFET model based on mathematical fitting, and the SiC MOSFET is modeled according to the output characteristics, the body diode forward conduction characteristics and the capacitance characteristics of the SiC MOSFET, the device is equivalent to a voltage-controlled current source and a voltage-controlled voltage source and a capacitor-resistor combination, and the calculation expression of different equivalent elements is determined according to the curve form of the test data. The simulation curve form change range is further corrected by adding mathematical parameters without actual physical meaning, so that the fitting accuracy is improved. In the data range, the simulation curve is matched with the test curve, and the characteristics of the SiC MOSFET are accurately and quickly characterized.

[0005] To achieve the purpose, the application adopts the following technical scheme:

[0006] A method for establishing a SiC MOSFET model based on mathematical fitting is provided, and the steps include:

[0007] S1, according to the output characteristic curve test data of the SiC MOSFET, an equivalent voltage-controlled current source model I is established mosAnd according to the capacitance characteristic curve test data, an equivalent capacitance model is established, and according to the body diode characteristic curve test data, an equivalent body diode model is established;

[0008] S2, respectively, the model parameters of the equivalent voltage-controlled current source model I mos , the equivalent capacitance model, the equivalent body diode model are corrected, and the corrected model parameters are returned to the commonly used behavior model based on Spice modeling language. Spice is a model modeling language, and the compatibility of the simulation software for the spice model is better, the application range is wider, and therefore the final model format is adapted to the spice model, which is more convenient for subsequent application.

[0009] S3, the simulation results of the Spice model are compared with the actual test results to correct the leg parasitic inductance L mos and the gate internal resistance RG.int of the equivalent circuit of the SiC MOSFET structure.

[0010] As preferred, the equivalent voltage-controlled current source model I mos is expressed by the following formula (1):

[0011]

[0012] In formula (1), a1, a2, a3, a4, a5, b1, b2, c1, c2, d1, d2 are fitting coefficients, V mos is an auxiliary voltage source applied to the SiC MOSFET, V GS is the applied gate-source voltage of the SiC MOSFET, V DS is the applied drain-source voltage.

[0013] As preferred, the equivalent capacitance model includes a drain-source capacitance C ds , the drain-source capacitance C ds is expressed by the following formula (2):

[0014]

[0015] In formula (2), k1, k2, k3, m represent capacitance fitting coefficients;

[0016] V DS is the applied drain-source voltage of the SiC MOSFET.

[0017] As preferred, the equivalent capacitance model includes a gate-drain capacitance C gd , the gate-drain capacitance C gd is expressed by the following formula (3):

[0018]

[0019] In formula (3), q1, q2, r1, r2, and n all represent capacitance fitting coefficients;

[0020] V DS This is the applied drain-source voltage of the SiC MOSFET.

[0021] Preferably, the equivalent capacitance model includes the gate-source capacitance C. gs C gs It is a constant value.

[0022] Preferably, the equivalent bulk diode model includes a parasitic bulk diode current source model I. diode I diode This can be expressed by the following formula (4):

[0023]

[0024] In formula (4), p1, p2, p3, i s The fitting coefficients of the current source are equalized.

[0025] V diode The bias voltage applied to the diode is the external bias voltage. In the structure of a SiC MOSFET, the parasitic body diode is a reverse-biased diode, and the bias voltage it receives is equal to the source-drain voltage V of the SiC MOSFET. SD .

[0026] Preferably, in step S3, the parasitic inductance L of the pin in the equivalent circuit is corrected. mos The method includes the following steps:

[0027] S31, according to The total stray inductance L of the test circuit was initially calculated. stray Where ΔV represents the difference between the peak voltage of the drain voltage and the voltage of the test bus; the total stray inductance of the test circuit includes the stray inductance of the line and the parasitic inductance of the device.

[0028] This represents the rate of change of drain current corresponding to the drain voltage spike. S32, adjust L mos The waveform curves that closely approximate the actual test results are then used to correct the parasitic inductance L of the pin. mos .

[0029] Preferably, in step S3, the method for correcting the gate internal resistance RG.int in the equivalent circuit is as follows:

[0030] Comparing the rising slope of the drain current in the conduction process or the falling slope in the turn-off process of the SiC MOSFET in the actual test results and the simulation results, and by adjusting the resistance value of the gate internal resistance RG.int, the final resistance value of the gate internal resistance RG.int is determined when the slope comparison result meets the expectation.

[0031] The present application has the following beneficial effects:

[0032] 1) Using an expression different from the existing Spice Si MOSFET level3 model, an equivalent circuit of a self-constructed SiC MOSFET structure is used to construct a model that can better describe the characteristics of the SiC MOSFET device, and the model simulation fitting effect is improved.

[0033] 2) Taking the characteristic test curve in the data range as the target curve, directly performing mathematical curve fitting, without considering the range limitation of the physical effect on the parameters, the demand of the device model establishment of different structure types can be met.

[0034] 3) Different device structure equivalent circuits are used, auxiliary voltage sources and auxiliary voltage-controlled current sources are added for fitting the key output characteristics, and the model simulation fitting effect is improved.

[0035] 4) A single capacitance form of drain-source capacitance expression is used, the equivalent elements are reduced, the complexity of the equivalent circuit structure is reduced, and resistors, inductors and other parasitic elements are added, and the accuracy of the SiC MOSFET dynamic characteristic simulation is improved. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0037] Figure 1 is an implementation step diagram of the method for establishing a SiC MOSFET model based on mathematical fitting provided by an embodiment of the present application;

[0038] Figure 2 is a schematic diagram of an equivalent circuit of a SiC MOSFET structure;

[0039] Figure 3 is an example diagram of the output characteristic curve of a SiC MOSFET;

[0040] Figure 4 is a difference comparison diagram of the SiC MOSFET output characteristic target curve and the simulation curve;

[0041] Figure 5 is an example graph of the parasitic diode forward characteristic curve;

[0042] Figure 6 is an example graph of the drain-source capacitance characteristic curve;

[0043] Figure 7 is a comparison graph of the simulation results of the model and the actual test results;

[0044] Figure 8 is a SiC MOSFET circuit symbol;

[0045] Figure 9 is a double pulse test circuit;

[0046] Figure 10 is a flow chart of establishing a SiC MOSFET model. DETAILED DESCRIPTION

[0047] The technical solutions of the present application will be further illustrated below in combination with the drawings and through specific embodiments.

[0048] Wherein, the drawings are only used for example illustration, the representation is only a schematic diagram, not a physical diagram, and cannot be understood as a limitation of the present patent; in order to better illustrate the embodiments of the present application, some components of the drawings will be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art, it is understandable that some known structures and their descriptions in the drawings can be omitted.

[0049] The same or similar reference numerals in the drawings of the embodiments of the present application correspond to the same or similar components; in the description of the present application, it is understood that if the terms "upper", "lower", "left", "right", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, therefore the terms describing the positional relationship in the drawings are only used for example illustration, and cannot be understood as a limitation of the present patent, for those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0050] In the description of this invention, unless otherwise explicitly specified and limited, the term "connection" or similar designation indicating a connection between components should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral part; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0051] An embodiment of the present invention provides a method for establishing a SiC MOSFET model based on mathematical fitting, such as... Figure 1 and Figure 10 As shown, it includes the following steps:

[0052] S1, based on SiC MOSFET (please refer to the circuit symbol for SiC MOSFET). Figure 8 Output characteristic curve test data (please refer to the output characteristic curve) Figure 3 Establish an equivalent voltage-controlled current source model I. mos And test the data based on the capacitance characteristic curve (please refer to the capacitance characteristic curve). Figure 6 An equivalent capacitance model was established, and test data were obtained based on the body diode characteristic curve (please refer to the body diode characteristic curve for details). Figure 5 Establish an equivalent bulk diode model;

[0053] Among them, the equivalent voltage-controlled current source model I mos This can be expressed by the following formula (1):

[0054]

[0055] In formula (1), a1, a2, a3, a4, a5, b1, b2, c1, c2, d1, and d2 are all fitting coefficients, and V mos for Figure 2 An auxiliary voltage source, V, is applied to the SiC MOSFET. GS V is the applied gate-source voltage of the SiC MOSFET. DS This is the applied drain-source voltage.

[0056] The equivalent capacitance model includes Figure 2 The drain-source capacitor C shown ds Gate-drain capacitance C gd and gate-source capacitance C gs ,in:

[0057] Drain-source capacitance C ds This can be expressed by the following formula (2):

[0058]

[0059] Gate-drain capacitance C gd This can be expressed by the following formula (3):

[0060]

[0061] Gate-source capacitance C gs The value is a constant.

[0062] The equivalent bulk diode model includes Figure 2 Parasitic diode current source model I shown diode I diode This can be expressed by the following formula (4):

[0063]

[0064] In formula (4), p1, p2, p3, i s The fitting coefficients of the current source are equalized.

[0065] V diode The bias voltage applied to the diode is the external bias voltage. In the structure of a SiC MOSFET, the parasitic body diode is a reverse-biased diode, and the bias voltage it receives is equal to the source-drain voltage V of the SiC MOSFET. SD .

[0066] in, Figure 2 The capacitance of the parasitic diode in the circuit is the same as the drain-source capacitance of the MOSFET, so the capacitance value does not need to be calculated again.

[0067] Please continue to refer to Figure 1 After completing the model construction, proceed to the following steps:

[0068] S2, respectively correct the equivalent voltage-controlled current source model I mos The model parameters of the equivalent capacitance model and the equivalent bulk diode model are returned to the SPICE model after correction.

[0069] Due to such Figure 2 The current source I in the equivalent circuit structure of the SiC MOSFET shown diode Capacitor C ds C gdIt can be solved independently. Based on the model expressions established by formulas (1)-(4), the SiC MOSFET structure is described separately using Verilog-A simulation language. Then, the established independent models are imported into the simulation software. The test result curves of each characteristic related to each model are used as the target curves. The optimization calculation function in the simulation software is used to calculate and adjust each parameter. After obtaining the simulation curve that meets the difference requirements, the reasonable values ​​of each fitting parameter in the expressions expressed by formulas (1)-(4) can be deduced from the simulation curve. Then, the values ​​are returned to the Spice model. Spice is a modeling language. Usually, simulation software has better compatibility with Spice models and a wider range of applications. Therefore, adapting the final model format to Spice model is more convenient for subsequent applications.

[0070] The specific process of adjusting the fitting parameters includes the following steps:

[0071] L1 imports the output characteristic curve, capacitance characteristic curve, and body diode conduction characteristic curve data of the target device into the software as the fitting target data.

[0072] L2, based on the equivalent circuit structure of SiC MOSFET, establish (1) a simplified output characteristic model containing only current source Imos and voltage source Vmos, (2) a simplified capacitance model containing only gate-drain capacitance Cgd and drain-source capacitance Cds, and (3) a simplified body diode conduction characteristic model composed of a diode resistor Rdiode and a current source Idiode.

[0073] For L3, add external bias voltages to each circuit. Using the parameter adjustment function of the software tool, compare the individual curve data with the simulation curve data, and control the difference to be within the required range. The parameters obtained at this point are the optimal solutions for their respective characteristics.

[0074] After completing the parameter tuning of the Spice model, as follows: Figure 1 As shown, proceed to the following steps:

[0075] S3 will compare the simulation results of the SPICE model with the actual test results (please refer to the comparison curve between simulation results and actual test results). Figure 7 For a comparison of the differences between the target curve and the simulated curve of the SiC MOSFET output characteristics, please refer to [link / reference]. Figure 4 ), to modify the SiC MOSFET structure as Figure 2 The parasitic inductance L of the tube leg in the equivalent circuit shown mos and gate internal resistance RG.int.

[0076] Specifically, the parasitic inductance L of the pin in the corrected equivalent circuit mosThe method is as follows:

[0077] During switching, the overshoot of the drain voltage of a SiC MOSFET during turn-off is usually caused by parasitic inductance. The preliminary calculations for the test circuit are as follows (please refer to the circuit structure of the test circuit). Figure 9 The total stray inductance L stray Stray inductance includes, for example Figure 2 The parasitic inductance L of the device package pin shown mos and stray inductance of the line ( Figure 2 (Not shown in the image), the inductance of the test circuit is usually an approximation provided by the equipment manufacturer. This is achieved by adjusting L. mos To obtain waveform curves that more closely resemble actual test results (such as...) Figure 7 (The solid line waveform in the image) is used to correct the parasitic inductance L. mos .

[0078] During the switching process, the gate internal resistance modulates the switching speed. Given that the value of the external gate internal resistance added by the external circuit is known, the slope of the rising drain current during conduction or the falling slope during turn-off can be used to determine the switching speed by comparing the actual test curves with the simulation curves. Figure 2 The gate internal resistance RG.int shown is adjusted.

[0079] In summary, the present invention has the following beneficial effects:

[0080] 1) By adopting an expression different from the existing Spice Si MOSFET level3 model, and using the equivalent circuit of the self-constructed SiC MOSFET structure, a model that can better describe the characteristics of SiC MOSFET devices is built, thus improving the simulation fitting effect of the model.

[0081] 2) Using the characteristic test curve within the data range as the target curve, mathematical curve fitting is performed directly without considering the limitation of the parameter range by physical effects, which can meet the needs of establishing device models of different structural types.

[0082] 3) Different device structures and equivalent circuits were adopted, and auxiliary voltage sources and auxiliary voltage-controlled current sources were added to fit key output characteristics, which improved the model simulation fitting effect.

[0083] 4) The drain-source capacitance expression in the form of a single capacitor is used, which reduces the number of equivalent components and the complexity of the equivalent circuit structure. Parasitic components such as resistors and inductors are added, which improves the accuracy of the simulation of the dynamic characteristics of SiC MOSFETs.

[0084] It should be noted that the above detailed description is only the preferred embodiment of the present application and the applied technical principles. Those skilled in the art should understand that various modifications, equivalent replacements, changes and the like can also be made to the present application. However, as long as these changes do not deviate from the spirit of the present application, they should be within the protection scope of the present application. In addition, some terms used in the present application specification and claims are not limited, but only for the convenience of description.

Claims

1. A method for establishing a SiC MOSFET model based on mathematical fitting, characterized by the steps of Comprising: S1, according to the output characteristic curve test data of SiC MOSFET, an equivalent voltage-controlled current source model is established And according to the capacitance characteristic curve test data, an equivalent capacitance model is established, and according to the body diode characteristic curve test data, an equivalent body diode model is established; S2, respectively correct the equivalent voltage-controlled current source model The model parameters of the equivalent capacitance model and the equivalent bulk diode model are determined, and the corrected model parameters are returned to the Spice model. S3, comparing the simulation results of the Spice model with actual test results to correct the leg parasitic inductance in the equivalent circuit of the SiC MOSFET structure and gate internal resistance ; The equivalent voltage-controlled current source model Is expressed by the following equation (1): In formula (1), are fitting coefficients, is an auxiliary voltage source applied to the SiC MOSFET, is an externally applied gate-source voltage of the SiC MOSFET, is an externally applied drain-source voltage of the SiC MOSFET; The equivalent body diode model includes a parasitic body diode current source model , is expressed by the following equation (4) In equation (4), Uniform current source fitting coefficients; For the applied bias received by the diode, in the structure of SiC MOSFET, the parasitic diode is a reverse biased diode, which receives a bias equal to the source-drain voltage of SiC MOSFET .

2. The method of establishing a SiC MOSFET model based on mathematical fitting according to claim 1, characterized in that, The equivalent capacitance model includes a drain-source capacitance The drain-source capacitance is expressed by the following equation (2). In equation (2), each represents a capacitance fitting coefficient.

3. The method of establishing a SiC MOSFET model based on mathematical fitting according to claim 1 or 2, characterized in that, The equivalent capacitance model includes a gate-drain capacitance The gate-drain capacitance is expressed by the following equation (3). In equation (3), each represents a capacitance fitting coefficient; The applied drain-source voltage for the SiC MOSFET.

4. The method of establishing a SiC MOSFET model based on mathematical fitting according to claim 3, characterized in that, The equivalent capacitance model includes a gate-source capacitance , is a constant value.

5. The method of establishing a SiC MOSFET model based on mathematical fitting according to claim 1, characterized in that, In step S3, the leg parasitic inductance in the equivalent circuit is corrected The method comprises the steps of: S31, according to , the total stray inductance of the test loop is calculated preliminarily , wherein, the difference between the peak voltage of the drain voltage and the test bus voltage; the total stray inductance of the test loop includes the line stray inductance and the device parasitic inductance; a rate of change of drain current corresponding to a drain voltage spike; S32, adjusting The waveform curve close to the actual test result is used to further correct the pipe leg parasitic inductance .

6. The method of establishing a SiC MOSFET model based on mathematical fitting according to claim 1, characterized in that, In step S3, the gate internal resistance in the equivalent circuit is corrected by a method comprising the steps of: correcting the gate internal resistance in the equivalent circuit Comparing the rising slope of the drain current during the conduction process or the falling slope of the drain current during the turn-off process of the SiC MOSFET in the actual test results and the simulation results, and determining the final resistance value of the gate inner resistance by adjusting the resistance value of the gate inner resistance when the slope comparison results are as expected. the final resistance value of the gate inner resistance.​

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