Method for constructing radiation effect model of digital integrated circuit based on measurement system

Abstract

The present invention discloses a method for constructing a radiation effect model of digital integrated circuits based on a measurement system, which mainly solves the problems of large time overhead and high resource consumption in the existing modeling of radiation effects of digital integrated circuits. The implementation scheme is as follows: select a digital measurement device and build a measurement system thereon; select an irradiated digital device as the original device and determine its buffer interface type; use a controllable voltage source to measure the voltage-current characteristic curves of the power clamp diode and the ground clamp diode of the input buffer respectively; use a controllable voltage source to measure the voltage-current characteristic curves of the pull-up transistor and the pull-down transistor of the output buffer respectively; use an oscilloscope to measure the rising-edge voltage-time waveform and the falling-edge voltage-time waveform of the output end respectively; obtain other data of the IBIS model, and use the measured characteristic curves, waveforms and data to form a radiation effect model of digital integrated circuits. The present invention has small time overhead and low resource consumption, and can be used for simulating the radiation effects of digital integrated circuits.

Description

Technical Field

[0001] The present invention belongs to the technical field of digital devices, and particularly relates to a method for constructing a radiation effect IBIS model, which can be used for simulating the radiation effect of digital integrated circuits. Background Technique

[0002] The IBIS model file is a text file that contains model data such as input / output, buffer, and specification information required for simulating digital integrated circuits. More specifically, the IBIS model is a data list composed of numerical values of the electrical parameters inside the device, and these data can reflect characteristics such as the switching speed and driving ability of the device. It describes how to record different parameters of the driver and receiver of a chip in a standard IBIS file, but does not explain how these recorded parameters are used. These parameters need to be read by the simulation tool of the IBIS model.

[0003] A complete IBIS file describes the threshold level, package parameters, V-I characteristics of the power clamp transistor and ground clamp transistor of the input buffer, which are described by Power_Clamp and Gnd_Clamp respectively; the VI curves of the pull-up transistor and pull-down transistor of the output buffer, the Pullup and Pulldown curves. If the output includes a tri-state, there are also the Power_Clamp and Gnd_Clamp curves of the corresponding power clamp transistor and ground clamp transistor, and also include the VT curve describing the level conversion transient. Different types of buffers contain different data.

[0004] The IBIS model is very suitable for use in circuit simulation tools. It provides a behavioral description of the driver and receiver without leaking the intellectual property details of the internal structure of the circuit. Since IBIS is a simple model, when doing simple load simulation, it saves 10 to 15 times the amount of calculation compared to the transistor-level model simulation of the corresponding general integrated circuit simulator SPICE.

[0005] In recent years, with the rapid development of aerospace technology, the problem of radiation damage to digital devices caused by high-energy charged particles in space has become increasingly serious. The main irradiation effects include total dose effect, single particle effect, instantaneous dose rate effect, and displacement damage effect, etc. These irradiation effects will cause the electrical and functional characteristics of digital integrated circuits on spacecraft to degrade, thus affecting the normal operation of spacecraft. Therefore, using computer simulation methods to model and simulate digital integrated circuits before and after radiation, so as to carry out radiation hardening of digital integrated circuits is the focus of current research.

[0006] In order to study the impact of space radiation on digital circuit systems, it is necessary to first construct an irradiation effect model for digital devices. To better simulate the characteristics of digital devices in an irradiated environment, the device model should not only reflect the electrical characteristics of digital devices but also be convenient for simulation on a computer and incorporate irradiation factors. The IBIS model meets these requirements very well. Currently, there are mainly two methods for constructing the IBIS model of the radiation effect of digital devices. One is obtained through simulation of the SPICE model of general integrated circuit simulators, which has a large time overhead and high resource consumption. The other is obtained through measurement. However, due to the need to build a systematic measurement system and the requirement for precise measurement equipment and software, there is no complete measurement system in the industry yet. The simulation method requires providing the SPICE model of general integrated circuit simulators. Since the SPICE model of general integrated circuit simulators involves the internal principles and manufacturing processes of devices, most device manufacturers do not provide it. Therefore, the IBIS model cannot be obtained through simulation of the SPICE model of general integrated circuit simulators and can only be obtained through measurement. Thus, how to design a method for constructing a radiation effect model of digital integrated circuits based on a measurement system is the most effective way to solve the problem of modeling and simulation of the radiation effect of digital devices. Summary of the Invention

[0007] Aiming at the deficiencies of the above-mentioned existing technologies, the present invention provides a method for constructing a radiation effect model of digital integrated circuits based on a measurement system, so as to build a complete measurement system, construct a radiation effect model of digital integrated circuits, reduce the time overhead, reduce the resource consumption, and realize the simulation of the radiation effect of digital integrated circuits.

[0008] To achieve the above object, the method for constructing a radiation effect model of digital integrated circuits based on a measurement system of the present invention includes the following steps:

[0009] (1) Select a digital measurement device, and build a radiation effect measurement circuit and a control unit for digital integrated circuits on it to form a radiation effect measurement system for digital integrated circuits:

[0010] The radiation effect measurement circuit for digital integrated circuits is composed of a VI characteristic measurement unit for the device input buffer, a VI characteristic measurement unit for the output buffer, and a VT characteristic measurement unit for the output buffer connected together;

[0011] The control unit includes:

[0012] A VI characteristic measurement module, which is used to control the VI characteristic measurement unit for the input buffer and the VI measurement unit for the output buffer, and realize the measurement of the Power Clamp of the power clamping diode VI curve, the GND Clamp of the ground clamping diode VI curve of the input buffer of the digital device, the Pullup of the pull-up transistor VI curve, and the Pulldown of the pull-down transistor VI curve of the output buffer;

[0013] A VT characteristic measurement module is used to control the VT characteristic measurement unit of the output buffer, and realize the measurement of the rising edge waveform RisingWaveform and the falling edge waveform Falling Waveform of the output buffer of the digital device;

[0014] A VT data optimization module is used to filter the measured VT data Rising Waveform and Falling Waveform;

[0015] (2) Determine the data required for the IBIS model of the radiation effect of digital integrated circuits:

[0016] (2a) Select an irradiated digital device as the original device;

[0017] (2b) Determine the buffer interface type of the original device;

[0018] (2c) Determine the curves required for the IBIS model according to the buffer interface type;

[0019] (3) Use the digital integrated circuit radiation effect measurement system to measure the curves required for the IBIS model determined in (2) to obtain the VI data and VT data of the original device;

[0020] (4) Obtain the package parameters of the original device through simulation or querying the data manual, and obtain the silicon chip capacitance of the original device through AC analysis or querying the data manual;

[0021] (5) Integrate and verify the IBIS model data:

[0022] (5a) Write the measured VI data, VT data, device package parameters, and device silicon chip capacitance into a file according to the IBIS specification to form an IBIS model file;

[0023] (5b) Use the IBIS model verification tool IBISCHK4 to verify the legality of the IBIS model file:

[0024] If it is legal, the construction of the IBIS model of the radiation effect of the digital integrated circuit is completed;

[0025] If it is not legal, modify the IBIS file according to the error type prompted by the IBIS model verification tool IBISCHK4 and verify again until it is legal.

[0026] Compared with the prior art, the present invention has the following advantages:

[0027] First, since the present invention constructs a complete digital integrated circuit radiation effect measurement system, by selecting an irradiated digital device as the original device, determining its buffer interface type, and then measuring its input buffer VI data, output buffer VI data, and output buffer VT data, the time overhead can be reduced and the resource consumption can be lowered.

[0028] Second, since the present invention constructs a digital integrated circuit radiation effect model, the measured VI data, VT data, device package parameters, and device silicon capacitance can be used for IBIS modeling, written into a file according to the IBIS specification to form an IBIS model file, and the IBIS model verification tool IBISCHK4 can be used to verify the legality of the IBIS model file, thus realizing the modeling of the radiation effect of digital devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] To more clearly illustrate the technical solutions of the present invention, the drawings required for the present invention will be briefly introduced below. Obviously, the following described drawings are only some embodiments of the present invention, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts.

[0030] Figure 1 is the implementation flowchart of the present invention;

[0031] Figure 2 is the architecture block diagram of the digital integrated circuit radiation effect measurement system constructed in the present invention;

[0032] Figure 3 is Figure 2 the schematic diagram of the Power Clamp measurement of the device input buffer in the measurement system;

[0033] Figure 4 is Figure 2 the schematic diagram of the GND Clamp measurement of the device input terminal in the measurement system;

[0034] Figure 5 is Figure 2 the schematic diagram of the Pullup measurement of the output buffer in the measurement system;

[0035] Figure 6 is Figure 2 the schematic diagram of the Pulldown measurement of the output terminal in the measurement system;

[0036] Figure 7 is Figure 2 the schematic diagram of the Rising Waveform measurement of the output buffer load connected to the power supply in the measurement system.

[0037] Figure 8 isFigure 2 Schematic diagram of measuring the ground of the output buffer load in the measurement system for the Falling Waveform measurement. Specific implementation manners

[0038] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0039] Refer to Figure 1 , the implementation steps of this embodiment are as follows:

[0040] Step 1, construct a measurement system for the radiation effect of digital integrated circuits.

[0041] Refer to Figure 2 , the implementation of this step is as follows:

[0042] 1.1) Select the digital measurement device NI PXIe, and build a measurement circuit and a control unit for the radiation effect of digital integrated circuits thereon:

[0043] The measurement circuit for the radiation effect of digital integrated circuits is composed of a VI characteristic measurement unit for the input buffer of the device, a VI characteristic measurement unit for the output buffer, and a VT characteristic measurement unit for the output buffer connected together;

[0044] The control unit includes:

[0045] A VI characteristic measurement module, which is used to control the VI characteristic measurement unit for the input buffer and the VI measurement unit for the output buffer, and realize the measurement of the Power Clamp of the power clamping diode of the input buffer of the digital device, the GND Clamp of the ground clamping diode, the Pullup of the pull-up transistor of the output buffer, and the Pulldown of the pull-down transistor;

[0046] A VT characteristic measurement module, which is used to control the VT characteristic measurement unit for the output buffer, and realize the measurement of the RisingWaveform and Falling Waveform of the output buffer of the digital device;

[0047] A VT data optimization module, which is used to filter the measured VT data Rising Waveform and Falling Waveform;

[0048] 1.2) Cascade the measurement circuit for the radiation effect of digital integrated circuits and the control unit to form a measurement system for the radiation effect of digital integrated circuits.

[0049] Step 2, select an irradiated digital device as the original device.

[0050] During the use of digital devices, they will be damaged by the radiation of high-energy charged particles in space. In this example, a irradiated digital device is selected as the original device.

[0051] Step 3: Determine the device buffer interface type.

[0052] Determine the device buffer interface type by querying the device data sheet, and use the existing table to determine the type and number of curves required for the IBIS model according to the device buffer interface type. The results are shown in Table 1.

[0053] Table 1: Table of the type and number of curves required for the original device interface

[0054]

[0055]

[0056] Step 4: Measure the VI characteristic curve Power_clamp of the input buffer power clamp diode with a controllable voltage source.

[0057] According to the digital integrated circuit radiation effect measurement system established in Step 1, refer to Figure 3 Connect the measurement circuit and perform measurements through the measurement circuit. The specific implementation is as follows:

[0058] Based on the NI PXIe device, use the constant voltage source of its controllable voltage source to supply power to the device. Connect the positive pole of the scanning voltage source of its controllable voltage source to the pin to be measured at the input end of the device, and the negative pole to the input VCC pin of the device. At this time, the power clamp diode D1 conducts, and the ground clamp diode D2 cuts off. Set the start voltage, end voltage, and scanning step parameters of the scanning voltage through the upper computer;

[0059] Apply the scanning voltage according to the set parameters and record the corresponding current values. The obtained data is the VI characteristic curve Power Clamp of the power clamp diode.

[0060] Step 5: Measure the VI characteristic curve GND_clamp of the input buffer ground clamp diode with a controllable voltage source.

[0061] According to the digital integrated circuit radiation effect measurement system established in Step 1, refer to Figure 4 Connect the measurement circuit and perform measurements through the measurement circuit. The specific implementation is as follows:

[0062] Based on the NI PXIe device, use the constant voltage source of its controllable voltage source to supply power to the device. Connect the positive pole of the scanning voltage source to the GND pin at the input end of the device, and the negative pole to the pin to be measured at the input end of the device. At this time, the ground clamp diode D2 conducts, and the power clamp diode D1 cuts off. Set parameters such as the start voltage, end voltage, and scanning step of the scanning voltage through the upper computer;

[0063] Apply the scanning voltage according to the set parameters and record the corresponding current values. The obtained data is the VI characteristic curve GND Clamp of the ground clamp diode.

[0064] Step 6: Measure the VI characteristic curve Pullup of the pull-up transistor in the output buffer with a controllable voltage source.

[0065] According to the digital integrated circuit radiation effect measurement system established in Step 1, refer to Figure 5 Connect the measurement circuit and perform measurements through the measurement circuit. The specific implementation is as follows:

[0066] Based on the NI PXIe device, use the constant voltage source of its controllable voltage source to supply power to the device. Connect the positive pole of the scanning voltage source to the VCC pin of the device output terminal, and the negative pole to the pin to be measured at the device output terminal. At this time, the pull-up transistor T1 is turned on and the pull-down transistor T2 is turned off. Set parameters such as the starting voltage, ending voltage, and scanning step of the scanning voltage through the upper computer;

[0067] Apply the scanning voltage according to the set parameters and record the corresponding current values. Subtract the PowerClamp current value from the recorded current value to obtain the VI characteristic curve Pullup of the pull-up transistor.

[0068] Step 7: Measure the VI characteristic curve Pulldown of the pull-down transistor in the output buffer with a controllable voltage source;

[0069] According to the digital integrated circuit radiation effect measurement system established in Step 1, refer to Figure 6 Connect the measurement circuit and perform measurements through the measurement circuit. The specific implementation is as follows:

[0070] Based on the NI PXIe device, use the constant voltage source of its controllable voltage source to supply power to the device. Connect the positive pole of the scanning voltage source to the pin to be measured at the device output terminal, and the negative pole to the GND pin of the device output terminal. At this time, the pull-down transistor T2 is turned on and the pull-up transistor T1 is turned off. Set parameters such as the starting voltage, ending voltage, and scanning step of the scanning voltage through the upper computer;

[0071] Apply the scanning voltage according to the set parameters and record the corresponding current values. Subtract the GNDClamp current value from the recorded current value to obtain the VI characteristic curve Pulldown of the pull-down transistor;

[0072] Step 8: Measure the rising edge and falling edge VT waveforms RisingWaveform and Falling Waveform of the pull-up transistor in the output buffer with an oscilloscope.

[0073] According to the digital integrated circuit radiation effect measurement system established in Step 1, refer to Figure 7Connect the measurement circuit and perform measurements through the measurement circuit as follows:

[0074] Based on the NI PXIe device, power the device with the constant voltage source of its controllable voltage source, and connect a load resistor between the pins to be measured at the output end of the device and the VCC at the output end of the device;

[0075] Apply a "high level - low level" falling edge excitation and a "low level - high level" rising edge excitation to the input end of the device respectively. Use the oscilloscope of the NI device to measure the VT curves at both ends of the load resistor respectively, and display and save them through the host computer software. Optimize the measured VT data RisingWaveform and FallingWaveform using the wavelet decomposition filtering method.

[0076] Step 9, use the oscilloscope to measure the rising edge and falling edge VT waveforms Rising Waveform and Falling Waveform of the pull - down transistor at the output end.

[0077] According to the digital integrated circuit radiation effect measurement system established in Step 1, refer to Figure 8 Connect the measurement circuit and perform measurements through the measurement circuit as follows:

[0078] First, based on the NI PXIe device, power the device with the constant voltage source of its controllable voltage source, and connect a load resistor between the pins to be measured at the output end of the device and the GND at the output end of the device;

[0079] Then apply a "high level - low level" falling edge excitation and a "low level - high level" rising edge excitation to the input end of the device respectively. Use the oscilloscope of the NI device to measure the VT curves at both ends of the load resistor respectively, and display and save them through the host computer software. Optimize the measured VT data RisingWaveform and FallingWaveform using the wavelet decomposition filtering method.

[0080] Step 10, obtain other data of the IBIS model;

[0081] Obtain the package parasitic parameters of the device to be measured through simulation methods or by querying the data manual. The simulation method is to use the three - dimensional field modeling tool PakSI - E embedded in the electronic design automation software Cadence APD / SIP SI to extract the lumped or matrix - form RLCG package parameters as the package parameters of the original device.

[0082] Obtain the silicon capacitance of the device to be measured through the AC analysis method as follows:

[0083] Add a sinusoidal AC power supply at the external node of the buffer, and perform an AC sweep using the scripting languages.AC and.NET statements to obtain the impedance Z = Z(R) + Z(I) of this node to the ground, where Z(R) and Z(I) are the real and imaginary parts of the impedance respectively;

[0084] According to the imaginary part Z(I) = -i / 2πfC, the silicon chip capacitance C_comp = abs(1 / 2πfZ(I)) is obtained, where abs is to take the absolute value and f is the frequency of the AC signal.

[0085] Step Eleven, IBIS model data integration and model verification.

[0086] Write the data measured in Steps Four to Ten into a file according to the IBIS model specification, and use the verification tool IBISCHK4 parser to verify the legality of the IBIS file:

[0087] If the verification tool prompts "Fill Success", it means that the IBIS model file is legal;

[0088] If the verification tool prompts "ERROR" or "WARNING", it means that there are abnormalities in the IBIS model file. Modify the IBIS file according to the specific prompt information and re-verify until it is legal.

[0089] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any modification, equivalent replacement, and improvement made by those skilled in the art within the technical scope disclosed by the present invention, as long as they are made within the spirit and principle of the present invention, should be covered by the protection scope of the present invention.

Claims

1. A method for constructing an IBIS model of the radiation effect of digital integrated circuits based on measurement, characterized in that It includes the following: (1) Select a digital measurement device and build a digital integrated circuit radiation effect measurement system on it, which consists of a digital integrated circuit radiation effect measurement circuit and a control unit: The digital integrated circuit radiation effect measurement circuit is composed of a device input buffer VI characteristic measurement unit, an output buffer VI characteristic measurement unit, and an output buffer VT characteristic measurement unit connected together; The control unit includes: A VI characteristic measurement module, which is used to control the input buffer VI characteristic measurement unit and the output buffer VI measurement unit to measure the Power Clamp of the power clamping diode of the input buffer of the digital device, the GNDClamp of the ground clamping diode, the Pullup of the pull-up transistor of the output buffer, and the Pulldown of the pull-down transistor of the output buffer; A VT characteristic measurement module, which is used to control the output buffer VT characteristic measurement unit to measure the Rising Waveform and the Falling Waveform of the output buffer of the digital device; A VT data optimization module, which is used to filter the measured VT data Rising Waveform and Falling Waveform; (2) Determine the data required for the IBIS model of the digital integrated circuit radiation effect: (2a) Select an irradiated digital device as the original device; (2b) Determine the buffer interface type of the original device; (2c) Determine the curves required for the IBIS model according to the buffer interface type; (3) Use the digital integrated circuit radiation effect measurement system to measure the curves required for the IBIS model determined in (2) to obtain the VI data and VT data of the original device; (4) Obtain the package parameters of the original device through simulation or by querying the data manual, and obtain the silicon chip capacitance of the original device through AC analysis or by querying the data manual; (5) Integrate and verify the IBIS model data: (5a) Write the measured VI data, VT data, device package parameters, and device silicon chip capacitance into a file according to the IBIS specification to form an IBIS model file; (5b) Use the IBIS model verification tool IBISCHK4 to verify the legality of the IBIS model file: If it is legal, the construction of the IBIS model of the digital integrated circuit radiation effect is completed; If it is not legal, modify the IBIS file according to the error type prompted by the IBIS model verification tool IBISCHK4 and re-verify until it is legal.

2. The method according to claim 1, characterized in that, The structures of the units in the digital integrated circuit radiation effect measurement circuit in step (1) are as follows: The VI characteristic measurement unit of the device input buffer includes a VI curve Power Clamp measurement circuit for the input buffer power clamping diode and a VI curve GND Clamp measurement circuit for the input buffer ground clamping diode. Both of these measurement circuits include a first controllable voltage source and a first original device. The first controllable voltage source is used to supply power to the first original device and provide a scanning voltage. The positive pole of the scanning voltage of the Power Clamp measurement circuit is connected to the input pin to be measured of the first original device, and the negative pole is connected to the power supply pin VCC of the first original device; the positive pole of the scanning voltage of the GND Clamp measurement circuit is connected to the ground pin GND of the first original device, and the negative pole is connected to the input pin to be measured of the first original device. The VI characteristic measurement unit of the output buffer includes a VI characteristic curve Pullup measurement circuit for the pull-up transistor of the output buffer and a VI characteristic curve Pulldown measurement circuit for the pull-down transistor. Both of these measurement circuits include a second controllable voltage source and a second original device. The second controllable voltage source is used to supply power to the second original device and provide a scanning voltage. The positive pole of the scanning voltage of the Pullup measurement circuit is connected to the power supply pin VCC of the second original device, and the negative pole is connected to the output pin to be measured of the second original device; the positive pole of the scanning voltage of the Pulldown measurement circuit is connected to the output pin to be measured of the second original device, and the negative pole is connected to the ground pin GND of the second original device. The VT characteristic measurement unit of the output terminal includes a rising edge waveform Rising Waveform measurement circuit and a falling edge waveform Falling Waveform measurement circuit. Both of these measurement circuits include a controllable voltage source, an oscilloscope, and an original device. The controllable voltage source is used to supply power to the original device, and the oscilloscope is used to measure the VT data across the load resistor of the original device.

3. The method according to claim 1, characterized in that, In step (1), the module structures in the digital integrated circuit radiation effect control unit are as follows: The VI characteristic measurement module is designed by the laboratory virtual instrument engineering platform LabVIEW. By controlling the controllable voltage source in the measurement circuit, it realizes the measurement of the VI curve PowerClamp of the power clamping diode of the input buffer, the VI curve GND Clamp of the ground clamping diode, the VI curve Pullup of the pull-up transistor of the output buffer, and the VI curve Pulldown of the pull-down transistor of the original device. The VT characteristic measurement module is designed by the laboratory virtual instrument engineering platform LabVIEW. By controlling the controllable voltage source and the oscilloscope in the measurement circuit, it realizes the measurement of the rising edge waveform RisingWaveform and the falling edge waveform Falling Waveform of the output buffer of the original device. The VT data optimization module uses the wavelet decomposition filtering method to optimize the measured VT data Rising Waveform and Falling Waveform. The controllable voltage sources in the above VI characteristic measurement module and VT characteristic measurement module both include two channels. The first channel is a constant voltage source for powering the original device, and the second channel is a scanning voltage for setting the starting voltage, ending voltage, and scanning step parameters of the scanning voltage. Finally, the measurement results are displayed on the LabVIEW interface and saved.

4. The method according to claim 1, wherein In step (2b), the type of the original device buffer interface is determined by querying the device data manual, that is, among all the known device buffer interfaces Input, Output, I / O, 3-State, Open_drain, I / O_open_drain, Open_sink, I / O_open_sink, Open_source, I / O_open_source, Input_ECL, 3-state-ECL, and Terminator, the type of the buffer interface included in the original device is found by querying the device data manual.

5. The method according to claim 1, characterized in that, In step (2c), the curves required for the IBIS model are determined according to the buffer interface type, and the implementation is as follows: If the buffer interface type is Input, two types of VI curves, namely the Power Clamp curve and the GND Clamp curve, need to be measured. If the buffer interface type is Output, two types of VI curves, namely the Pullup curve and the Pulldown curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform, need to be measured. If the buffer interface type is I / O or 3-State, four types of VI curves, namely the Power Clamp curve, the GND Clamp curve, the Pullup curve, and the Pulldown curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve, need to be measured. If the buffer interface type is Open_drain or Open_sink, one type of VI curve, namely the Pulldown curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve, need to be measured. If the buffer interface type is I / O_open_drain, three types of VI curves, namely Pulldown, Power Clamp curve, and GND Clamp curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve, need to be measured. If the buffer interface type is I / O_open_sink, three types of VI curves, namely the Power Clamp curve, the GND Clamp curve, and the Pulldown curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve, need to be measured. If the buffer interface type is Open_source, it is necessary to measure one type of VI curve, namely the Pullup curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve; If the buffer interface type is I / O_open_source, it is necessary to measure three types of VI curves, namely the Power Clamp curve, the GND Clamp curve, and the Pullup curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve; If the buffer interface type is Input_ECL, it is necessary to measure two types of VI curves, namely the Power Clamp curve and the GND Clamp curve; If the buffer interface type is 3-state-ECL, it is necessary to measure four types of VI curves, namely the Power Clamp curve, the GND Clamp curve, the Pullup curve, and the Pulldown curve, and two types of VT curves, namely the Rising Waveform curve and the Falling Waveform curve; If the buffer interface type is Terminator, it is necessary to measure two types of VI curves, namely the Power Clamp curve and the GND Clamp curve.

6. The method according to claim 1, wherein In step (3), the IBIS model curves to be determined are measured using the digital integrated circuit radiation effect measurement system as follows: If it is necessary to measure the Power Clamp curve, the original device needs to be connected to the Power Clamp circuit to measure the VI curve of the power clamp diode. That is, first, the first channel of the controllable voltage source is used to supply power to the original device, the positive pole of the second channel of the controllable voltage source is connected to the input pin to be measured of the original device, and the negative pole is connected to the power pin VCC of the original device; then, the VI characteristic measurement module in the control unit is used to apply a scanning voltage to the second channel of the controllable voltage source to make the power clamp diode in the input buffer of the device conduct and the ground clamp diode cut off, and record the corresponding voltage and current values at this time. The obtained data is the VI characteristic curve Power Clamp of the power clamp diode; If it is necessary to measure the GND Clamp curve, the original device needs to be connected to the GND Clamp measurement circuit to measure the VI curve of the ground clamp diode. That is, first, the first channel of the controllable voltage source is used to supply power to the original device, the positive pole of the second channel of the controllable voltage source is connected to the ground pin GND of the device, and the negative pole is connected to the input pin to be measured of the device; then, the VI characteristic measurement module in the control unit is used to apply a scanning voltage to the second channel of the controllable voltage source to make the power clamp diode in the input buffer cut off and the ground clamp diode conduct, and record the corresponding voltage and current values at this time. The obtained data is the VI characteristic curve GND Clamp of the ground clamp diode; If it is necessary to measure the Pullup curve, the original device needs to be connected to the Pullup measurement circuit to measure the VI characteristic curve of the pull-up transistor in the output buffer. That is, first, the first channel of the controllable voltage source is used to supply power to the original device. The positive pole of the second channel is connected to the device power supply pin VCC, and the negative pole is connected to the device output pin to be measured. Then, a scanning voltage is applied to the second channel of the controllable voltage source to turn on the pull-up transistor and turn off the pull-down transistor, and the corresponding current value is recorded at this time. Then, subtract the Power Clamp current value from the recorded current value, and the obtained data is the Pullup of the VI characteristic curve of the pull-up transistor. If it is necessary to measure the Pulldown curve, the original device needs to be connected to the Pulldown measurement circuit to measure the VI characteristic curve of the pull-down transistor in the output buffer. That is, first, the first channel of the controllable voltage source is used to supply power to the original device. The positive pole of the second channel is connected to the device output pin to be measured, and the negative pole is connected to the device ground pin GND. Then, the VI characteristic measurement module in the control unit is used to apply a scanning voltage to the second channel of the controllable voltage source to turn off the pull-up transistor and turn on the pull-down transistor, and the corresponding current value is recorded at this time. Then, subtract the GND Clamp current value from the recorded current value, and the obtained data is the Pulldown of the VI characteristic curve of the pull-up transistor. If it is necessary to measure the Rising Waveform curve, the original device needs to be connected to the RisingWaveform measurement circuit for the rising edge waveform of the buffer. That is, first, the first channel of the controllable voltage source is used to supply power to the original device, and load resistors are connected between the device output pin to be measured and the device VCC and between the device output pin to be measured and the device GND respectively. Then, an excitation from "high level - low level" is applied to the device input terminal, and the VT characteristic measurement module in the control unit is used to measure the VT curve across the load resistor, and it is displayed and saved through the VT characteristic measurement module. The data of the obtained VT curve is the Rising Waveform of the VT waveform at the rising edge of the output buffer when the load is connected to the power supply and the load is grounded. If it is necessary to measure the Falling Waveform curve, the original device needs to be connected to the FallingWaveform measurement circuit for the falling edge waveform of the buffer. That is, first, the first channel of the controllable voltage source is used to supply power to the original device, and load resistors are connected between the device output pin to be measured and the device VCC and between the device output pin to be measured and the device GND respectively. Then, an excitation from "low level - high level" is applied to the device input terminal, and the VT characteristic measurement module in the control unit is used to measure the VT curve across the load resistor, and it is displayed and saved through the VT characteristic measurement module. The data of the obtained VT curve is the Falling Waveform of the VT waveform at the falling edge of the output buffer when the load is connected to the power supply and the load is grounded.

7. The method according to claim 1, wherein In step (4), the package parameters of the original device are obtained by simulation. The lumped or matrix-form RLCG package parameters are extracted using the 3D field modeling tool PakSI-E embedded in the electronic design automation software Cadence APD / SIP SI as the package parameters of the original device.

8. The method according to claim 1, characterized in that, In step (4), the silicon chip capacitance of the original device is obtained by AC analysis as follows: Add a sinusoidal AC power supply at the external node of the buffer, and perform an AC sweep using the scripting languages.AC and.NET statements to obtain the impedance Z = Z(R) + Z(I) of this node to the ground, where Z(R) and Z(I) are the real and imaginary parts of the impedance, respectively. According to the imaginary part Z(I) = -i / 2πfC, the silicon chip capacitance C_comp = abs(1 / 2πfZ(I)) is obtained, where abs is the absolute value and f is the frequency of the AC signal.

9. The method according to claim 1, wherein (5b) The legality of the IBIS model file is verified using the IBIS model verification tool IBISCHK4 as follows: Load the constructed IBIS model into the IBIS model verification tool IBISCHK4, run the detection program included in the verification tool, and view the detection results: If the verification tool prompts "Fill Success", it means the IBIS model file is legal. If the verification tool prompts "ERROR", it means there are errors in the IBIS model file, and modifications are made according to the specific prompt information. If the verification tool prompts "WARNING", it means there are warnings in the IBIS model file, and modifications are made according to the specific prompt information.

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