A driving device for a power switching device and a control method thereof

Abstract

The present invention discloses a drive device for a power switch device and a control method thereof. The device includes a drive circuit and an auxiliary shutdown circuit. When the drive circuit receives a high level and the auxiliary shutdown circuit receives a low level, the drive circuit connects a positive power supply to the control terminal of the power switch device, turning the power switch device on. When the drive circuit receives a low level and the auxiliary shutdown circuit receives a low level, the power switch device is negatively shut down. The auxiliary shutdown circuit is disposed between the control terminal of the power switch device and a ground terminal. When the power switch device is negatively shut down and the auxiliary shutdown circuit receives a high level, the auxiliary shutdown circuit itself is turned on, forming a loop between the auxiliary shutdown circuit and the control terminal of the power switch device, thereby pulling the voltage at the control terminal of the power switch device down to the ground voltage. This solution suppresses crosstalk voltage in the drive loop by disposing the auxiliary shutdown circuit between the control terminal and the ground terminal of the power switch device.

Description

Technical Field

[0001] The present invention belongs to the technical field of power switching devices, and specifically relates to a driving device for a power switching device and a control method thereof, and more particularly to a multi-level driving circuit and a control method thereof, such as a multi-level driving circuit for a silicon carbide MOS transistor (SiC MOS transistor) and a control method thereof. Background Art

[0002] In order to properly turn on a power switch device (such as a MOS transistor, IGBT, or transistor), a drive signal must be sent to the control terminal of the power switch device (such as the gate of the MOS transistor, the gate of the IGBT, or the base of the transistor). This drive signal then drives the power switch device, turning it on. The drive signal for a power switch device (such as a MOS transistor, IGBT, or transistor) is typically generated by a driver chip. This drive signal is sent to the control terminal of the power switch device (such as the gate of the MOS transistor, the gate of the IGBT, or the base of the transistor), and then to a connection terminal of the power switch device (such as the source of the MOS transistor, the emitter of the IGBT, or the emitter of the transistor). This circuit constitutes the drive circuit for the power switch device (such as a MOS transistor, IGBT, or transistor).

[0003] Power switching tube devices (such as MOS tubes, IGBTs, triodes, etc.) operate normally based on the driving signal emitted by the driving chip in the driving circuit (i.e., the circuit used to drive the power switching device to operate normally). However, since the power supply of the driving chip of the power switching device (such as MOS tubes, IGBTs, triodes, etc.) includes a positive power supply (such as a DC power supply VCC) and a negative power supply (such as a DC power supply VEE), this will cause the negative power supply voltage to crosstalk in the driving circuit of the power switching device (such as MOS tubes, IGBTs, triodes, etc.) when the driving power switching device (such as MOS tubes, IGBTs, triodes, etc.) is turned off, affecting the ground network GND, thereby affecting the normal operation of other circuits sharing the common ground network GND.

[0004] The above content is only used to assist in understanding the technical solution of the present invention and does not constitute an admission that the above content is prior art. Summary of the Invention

[0005] The object of the present invention is to provide a driving device for a power switching device and a control method thereof, so as to solve the problem that the power supply of the driving chip of the power switching device (such as a MOS tube, an IGBT, a transistor, etc.) includes a positive power supply (such as a DC power supply VCC) and a negative power supply (such as a DC power supply VEE), so that in the driving circuit of the power switching device (such as a MOS tube, an IGBT, a transistor, etc.), when the driving power switching device (such as a MOS tube, an IGBT, a transistor, etc.) is turned off, voltage crosstalk of the negative power supply occurs, thereby affecting the ground network GND, thereby affecting the normal operation of other circuits sharing the common ground network GND, thereby achieving the goal of achieving the goal of achieving the goal of achieving the goal of achieving the goal of achieving the goal of achieving the goal of achieving the goal of An auxiliary shutdown circuit consisting of a diode (such as diode D) and a MOS transistor (such as MOS transistor S1) is provided between the control terminal and the ground terminal (such as the source of the MOS transistor, the emitter of the IGBT, the emitter of the transistor, etc.) of a switching device (such as a MOS transistor, an IGBT, a transistor, etc.). This circuit can suppress the crosstalk voltage of the drive circuit of the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.), thereby preventing the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) from affecting the normal operation of other circuits in the common ground network GND due to the crosstalk voltage of the drive circuit, thereby reducing the failure rate of other circuits in the common ground network with the driving power switching device (such as a MOS transistor, an SiC MOS transistor, an IGBT, a transistor, etc.).

[0006] The present invention provides a driving device for a power switching device, comprising: a driving circuit for the power switching device, and an auxiliary shutdown circuit for the power switching device; a power supply for the driving circuit for the power switching device, comprising: a positive power supply and a negative power supply; wherein the driving circuit for the power switching device is arranged at a control end of the power switching device; within a driving cycle of the power switching device, when a first control signal received by the driving circuit for the power switching device is at a high level and a second control signal received by the auxiliary shutdown circuit for the power switching device is at a low level, the driving circuit for the power switching device connects to the positive power supply to supply power to the control end of the power switching device, thereby turning on the power switching device; when the control signal received by the driving circuit for the power switching device becomes at a low level and the second control signal received by the auxiliary shutdown circuit for the power switching device is at a low level, the positive power supply is turned on. When the second control signal is still at a low level, the driving circuit of the power switching device is connected to the negative power supply to use the negative power supply to supply power to the control terminal of the power switching device, so that the power switching device is negatively shut down; the voltage of the control terminal of the power switching device is clamped to the voltage provided by the negative power supply; the auxiliary shutdown circuit of the power switching device is arranged between the control terminal of the power switching device and the ground terminal of the power switching device; within a driving cycle of the power switching device, when the power switching device is negatively shut down, when the second control signal received by the auxiliary shutdown circuit of the power switching device becomes a high level, the auxiliary shutdown circuit of the power switching device itself is turned on, so that a loop is formed between the auxiliary shutdown circuit of the power switching device and the control terminal of the power switching device, so that the voltage of the control terminal of the power switching device is clamped to 0V.

[0007] In some embodiments, the driving circuit of the power switching device includes: a driving chip and a driving resistance module; the driving chip includes: a first switching tube and a second switching tube; wherein the positive power supply is connected to the first connection end of the first switching tube; the second connection end of the first switching tube is connected to the first connection end of the second switching tube; the second connection end of the first switching tube is also connected to the control end of the power switching device through the driving resistance module; the second connection end of the second switching tube is connected to the negative power supply; the control end of the first switching tube is connected to the control end of the second switching tube, and the control end of the first switching tube and the control end of the second switching tube are both used to receive the first control signal.

[0008] In some embodiments, the first switch tube and the second switch tube are both MOS tubes; the control ends of the first switch tube and the second switch tube are both gates of the MOS tube; the first connection ends of the first switch tube and the second switch tube are both drains of the MOS tube; and the second connection ends of the first switch tube and the second switch tube are both sources of the MOS tube.

[0009] In some embodiments, the auxiliary shutdown circuit of the power switching device includes: a diode module and a third switch tube; wherein the second connection end of the first switch tube is also connected to the cathode of the diode module after passing through the driving resistance module; the control end of the third switch tube is used to receive the second control signal; the first connection end of the third switch tube is grounded; and the second connection end of the third switch tube is connected to the anode of the diode module.

[0010] In some embodiments, the third switch tube is a MOS tube; the control end of the third switch tube is the gate of the MOS tube, the first connection end of the third switch tube is the source of the MOS tube, and the second connection end of the third switch tube is the drain of the MOS tube.

[0011] In some embodiments, it further includes: a driving capacitor module; the driving capacitor module is arranged between the control terminal and the ground terminal of the power switching device; the cathode of the diode module is connected to the common terminal of the driving resistor module and the driving capacitor module.

[0012] In some embodiments, the power switching device includes: a SiC MOS transistor; the control terminal of the power switching device is the gate of the SiC MOS transistor; the two connection terminals of the power switching device are the drain and source of the SiC MOS transistor; the ground terminal of the power switching device is the source of the SiC MOS transistor; and the drain of the SiC MOS transistor is connected to a power supply of the SiC MOS transistor.

[0013] Matching the above-mentioned driving device of the power switching device, the present invention provides, in another aspect, a control method for the driving device of the power switching device, comprising: in a driving cycle of the power switching device, in a first time period after the start of the driving cycle, sending a first control signal to the driving circuit of the power switching device, and the first control signal is at a high level; simultaneously, sending a second control signal to the auxiliary shutdown circuit of the power switching device, and the second control signal is at a low level; in a second time period after the start of the driving cycle, sending the first control signal to the driving circuit of the power switching device, and the first control signal becomes low; simultaneously, sending a second control signal to the auxiliary shutdown circuit of the power switching device, and the second control signal remains low; in a third time period after the start of the driving cycle, sending the first control signal to the driving circuit of the power switching device, and the first control signal remains low; simultaneously, sending a second control signal to the auxiliary shutdown circuit of the power switching device, and the second control signal becomes high; after the end of the driving cycle, starting the next driving cycle, and repeating the cycle.

[0014] Therefore, the solution of the present invention is to provide a driving circuit for the control terminal of a driving power switching device (such as a MOS transistor, an IGBT, a transistor, etc.), wherein the power supply of the driving chip in the driving circuit includes a positive power supply VCC and a negative power supply VEE; and an auxiliary shutdown circuit composed of a diode (such as a diode D) and a MOS transistor (such as a MOS transistor S1) is provided between the control terminal of the driving power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) and a ground terminal (such as the source of the MOS transistor, the emitter of the IGBT, the emitter of the transistor, etc.). In a driving cycle, when the control signal PWM1 of the driving chip is at a high level and the control chip PWM2 of the MOS transistor S1 is at a low level, the driving chip controls the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) to turn on. If the control signal PWM1 of the driving chip changes to a low level and the control chip PWM2 of the MOS transistor S1 is still at a low level, the driving chip controls the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) to turn off. ) is turned off, when the control chip PWM2 of the MOS tube S1 becomes high level, the auxiliary shutdown circuit composed of the diode (such as diode D) and the MOS tube (such as MOS tube S1) is turned on, and the voltage of the control end of the power switch device (such as MOS tube, IGBT, transistor, etc.) is clamped at 0V to suppress the reverse voltage crosstalk of the negative power supply VEE; thereby, by connecting the control end of the driving power switch device (such as MOS tube, IGBT, transistor, etc.) and the ground end (such as the source of the MOS tube, the emitter of the IGBT, the emitter of the transistor, etc.) An auxiliary shutdown circuit consisting of a diode (such as diode D) and a MOS transistor (such as MOS transistor S1) is provided between the emitter of the power switching device (such as a MOS transistor, IGBT, or transistor). This circuit can suppress the crosstalk voltage in the drive circuit of the power switching device (such as a MOS transistor, IGBT, or transistor), preventing the crosstalk voltage in the drive circuit of the power switching device (such as a MOS transistor, IGBT, or transistor) from affecting the normal operation of other circuits in the common ground network GND, thereby reducing the failure rate of other circuits in the common ground network with the power switching device (such as a MOS transistor, IGBT, or transistor). At the same time, at the beginning of the next drive cycle, the voltage at the control terminal of the power switching device (such as a MOS transistor, IGBT, or transistor) directly rises from 0V to the voltage provided by the positive power supply VCC, without having to rise from the voltage provided by the negative power supply VEE to the voltage provided by the positive power supply VCC. This can reduce the switching loss of the power switching device (such as a MOS transistor, IGBT, or transistor).

[0015] Other features and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention.

[0016] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Schematic diagram of the structure of an embodiment of a driving device for a power switch device of the present invention;

[0018] Figure 2 1 is a schematic structural diagram of an embodiment of a multi-level driving circuit, specifically a schematic structural diagram of an embodiment of a driving circuit for a silicon carbide MOS transistor (SiC MOS transistor);

[0019] Figure 3 1 is a timing logic diagram of an embodiment of a multi-level driving circuit, specifically a timing logic diagram of an embodiment of a driving circuit for a silicon carbide MOS transistor (SiC MOS transistor);

[0020] Figure 4 FIG. 1 is a flow chart of an embodiment of a method for controlling a driving device of a power switching device of the present invention. DETAILED DESCRIPTION

[0021] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present invention and corresponding drawings. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0022] Considering that power switching tube devices (such as MOS tubes, IGBTs, triodes, etc.) operate normally based on the driving signal emitted by the driving chip in the driving circuit, however, since the power supply of the driving chip of the power switching device (such as MOS tubes, IGBTs, triodes, etc.) includes a positive power supply (such as a DC power supply VCC) and a negative power supply (such as a DC power supply VEE), this will cause the driving circuit of the power switching device (such as MOS tubes, IGBTs, triodes, etc.) to turn off when the driving power switching device (such as MOS tubes, IGBTs, triodes, etc.) is turned off. There will be voltage crosstalk from the negative power supply, affecting the ground network GND, thereby affecting the normal operation of other circuits with the common ground network GND. For example: when a power switching device (such as a MOS tube, IGBT, transistor, etc.) is turned on and then turned off, the negative power supply (such as a DC power supply VEE) will affect the voltage of the ground signal in the drive circuit (such as the voltage at the ground terminal), thereby forming a crosstalk voltage in the drive circuit, affecting the stability of the ground signal in the drive circuit, and may also affect the normal operation of other circuits in the common ground network GND, and also increase the turn-on loss of the power switching device (such as a MOS tube, IGBT, transistor, etc.) when it is turned on again after being turned off by negative voltage.

[0023] Therefore, the solution of the present invention provides a driving device for a power switching device, specifically a multi-level driving circuit, such as a multi-level driving circuit for a silicon carbide MOS transistor (SiC MOS transistor), to suppress the crosstalk voltage in the driving circuit of a power switching device (such as a MOS transistor, IGBT, triode, etc.); at the same time, reduce the impedance of the driving circuit of the power switching device (such as a MOS transistor, IGBT, triode, etc.), improve the switching speed of the SiC MOS transistor, and reduce the switching loss of the SiC MOS transistor.

[0024] According to an embodiment of the present invention, a driving device for a power switch device is provided. Figure 1 The schematic diagram of the structure of an embodiment of the device of the present invention is shown. The driving device of the power switch device may include: a driving circuit of the power switch device, and an auxiliary shutdown circuit of the power switch device; the power supply of the driving circuit of the power switch device includes: a positive power supply and a negative power supply; specifically, Figure 2 FIG1 is a schematic diagram of a structure of an embodiment of a multi-level driving circuit, specifically a schematic diagram of a structure of an embodiment of a driving circuit of a silicon carbide MOS tube (SiC MOS tube). Figure 2 Taking the SiC MOS tube Q in the example, the positive power supply is as follows Figure 2 The positive power supply VCC and negative power supply are Figure 2 Negative power supply VEE in.

[0025] Wherein, the driving circuit of the power switch device is arranged at the control end of the power switch device (such as Figure 2 The gate G of the SiC MOS transistor Q in the power switch device). During a driving cycle of the power switch device, when the first control signal received by the driving circuit of the power switch device is at a high level and the second control signal received by the auxiliary shutdown circuit of the power switch device is at a low level, the driving circuit of the power switch device connects to the positive power supply to supply power to the control terminal of the power switch device using the positive power supply, so that the power switch device is turned on; when the control signal received by the driving circuit of the power switch device becomes low and the second control signal received by the auxiliary shutdown circuit of the power switch device is still at a low level, the driving circuit of the power switch device connects to the negative power supply to supply power to the control terminal of the power switch device using the negative power supply, so that the power switch device is negatively shut down; the voltage of the control terminal of the power switch device is clamped to the voltage provided by the negative power supply. The first control signal received by the driving circuit of the power switch device is as follows: Figure 2 and Figure 3 The control signal PWM1 in the power switching device, the second control signal received by the auxiliary shutdown circuit is as follows Figure 2 and Figure 3 The control signal PWM2 in.

[0026] In some embodiments, the driving circuit of the power switch device includes: a driving chip and a driving resistor module, the driving chip is as follows: Figure 2 The driver IC and driver resistor module are as follows Figure 2 The gate drive resistor Rg in the drive chip includes: a first switch tube and a second switch tube, the first switch tube is such as a MOS tube Q1, and the second switch tube is such as a MOS tube Q2.

[0027] Wherein, the positive power supply is connected to the first connection terminal of the first switch tube (such as Figure 2 the drain of the MOS tube Q1); the second connection end of the first switch tube (such as Figure 2 The source of the MOS tube Q1 is connected to the first connection end of the second switch tube (such as Figure 2 The drain of the MOS tube Q2 in the middle); the second connection end of the first switch tube is also connected to the control end of the power switch device after passing through the driving resistor module; the second connection end of the second switch tube (such as Figure 2 The source of the MOS tube Q2 in the middle is connected to the negative power supply; the control end of the first switch tube (such as Figure 2 The gate of the MOS tube Q1 in the middle) and the control terminal of the second switch tube (such as Figure 2 The gate of the MOS tube Q2 is connected to the first switch tube), and the control end of the first switch tube and the control end of the second switch tube are both used to receive the first control signal.

[0028] Preferably, the first switching tube and the second switching tube are both MOS tubes; the control ends of the first switching tube and the second switching tube are both gates of the MOS tubes; the first connection ends of the first switching tube and the second switching tube are both drains of the MOS tubes; and the second connection ends of the first switching tube and the second switching tube are both sources of the MOS tubes.

[0029] Specifically, if Figure 2As shown, a multi-level drive circuit for a SiC MOS transistor includes: a SiC MOS transistor Q, a drive circuit for SiC MOS transistor Q, and an auxiliary shutdown circuit disposed between the gate G and source S of SiC MOS transistor Q. The drive circuit for SiC MOS transistor Q includes: a driver chip (driver IC) and a gate drive resistor Rg. The driver chip (driver IC) includes MOS transistors Q1 and Q2. The drain of MOS transistor Q1 is connected to the positive power supply VCC, the source of MOS transistor Q2 is connected to the negative power supply VEE, and the source of MOS transistor Q1 is connected to the drain of MOS transistor Q2. The source of MOS transistor Q1 is connected to the gate of SiC MOS transistor Q through gate drive resistor Rg. The drain of SiC MOS transistor Q is connected to the power supply of SiC MOS transistor Q, and the drain of SiC MOS transistor Q is connected to ground GND. A first control signal (such as control signal PWM1) sent by a controller (such as an MCU) is output as a drive signal after passing through a driver chip (driver IC). The drive signal is input to the gate of the SiC MOS transistor Q through a gate drive resistor Rg to turn the SiC MOS transistor Q on or off.

[0030] The auxiliary shutdown circuit of the power switch device is arranged between the control terminal of the power switch device and the ground terminal of the power switch device; the two connection terminals of the power switch device are as follows: Figure 2 The source S and drain D of the SiC MOS tube Q in the power switch device are connected to the ground, which is called the ground terminal. Figure 2 The source electrode S of the SiC MOS transistor Q in the power switch device is connected to the other of the two connection terminals of the power switch device, and the other connection terminal is connected to the power supply of the power switch device. During a driving cycle of the power switch device, when the power switch device is negatively shut down, if the second control signal received by the auxiliary shutdown circuit of the power switch device becomes high, the auxiliary shutdown circuit of the power switch device turns on itself, forming a loop between the auxiliary shutdown circuit of the power switch device and the control terminal of the power switch device, so that the voltage of the control terminal of the power switch device is pulled down to ground GND, that is, the voltage of the control terminal of the power switch device is clamped at 0V, thereby suppressing reverse voltage crosstalk from the negative power supply.

[0031] The present invention proposes a multi-level drive circuit, such as a multi-level drive circuit for a silicon carbide MOS transistor (such as a SiC MOS transistor). An auxiliary shutdown circuit consisting of a diode D and a MOS transistor S1 is provided between the gate G and source S of the SiC MOS transistor to form a multi-level combined drive circuit with the drive circuit of the SiC MOS transistor. This circuit can suppress the crosstalk voltage of the drive circuit of a power switching device (such as a MOS transistor, an IGBT, a triode, etc.), that is, suppress forward voltage crosstalk and reverse voltage crosstalk. Thus, by suppressing the crosstalk voltage of the drive circuit of the power switching device (such as a MOS transistor, an IGBT, a triode, etc.), the problem of heat generation caused by forward and reverse voltage crosstalk during the process of driving the SiC power device (such as a SiC MOS transistor) is solved. Furthermore, the present invention can improve the switching speed of the SiC MOS transistor. Thus, by improving the switching speed of the SiC MOS transistor, the problem that the drive circuit of the SiC power device (such as a SiC MOS transistor) in related solutions cannot meet the requirements of the SiC The present invention solves the problem of faster turn-on speed of MOS; and the solution of the present invention can reduce the impedance of the drive circuit of the power switching device (such as MOS tube, IGBT, triode, etc.) and reduce the switching loss of the SiC MOS tube. In this way, by reducing the impedance of the drive circuit of the power switching device (such as MOS tube, IGBT, triode, etc.) and reducing the switching loss of the SiC MOS tube, the switching loss of the SiC power device (such as SiC MOS tube) is reduced.

[0032] In some embodiments, the auxiliary shutdown circuit of the power switch device includes: a diode module and a third switch tube, the diode module is as follows: Figure 2 The diode D in the third switch tube is as follows Figure 2 The second connection end of the first switch tube is connected to the cathode of the diode module after passing through the driving resistor module; the control end of the third switch tube (such as Figure 2 The gate of the MOS transistor S1 in the middle is used to receive the second control signal; the first connection terminal of the third switch tube (such as Figure 2 The drain D of the MOS tube S1 is grounded; the second connection terminal of the third switch tube (such as Figure 2 The source S of the MOS transistor S1 is connected to the anode of the diode module.

[0033] Preferably, the third switch tube is a MOS tube; the control end of the third switch tube is the gate of the MOS tube, the first connection end of the third switch tube is the source of the MOS tube, and the second connection end of the third switch tube is the drain of the MOS tube.

[0034] Specifically, if Figure 2As shown, the auxiliary shutdown circuit for the SiC MOS transistor Q includes a diode D and an auxiliary MOS transistor S1. The common terminal of the gate drive resistor Rg and the capacitor Cgs is connected to the cathode of the diode D. The anode of the diode D is connected to the drain D of the MOS transistor S1, and the source S of the MOS transistor S1 is grounded GND. A second control signal (such as control signal PWM2) issued by a controller (such as an MCU) is input to the gate G of the MOS transistor S1. Compared with the drive circuit with negative voltage shutdown in related solutions, the multi-level combination drive circuit proposed in the solution of the present invention adds an auxiliary shutdown circuit consisting of the diode D and the MOS transistor S1. This auxiliary shutdown circuit can clamp the gate of the SiC MOS transistor to 0V when the auxiliary MOS transistor S1 is turned on, thereby effectively suppressing the reverse crosstalk voltage of the SiC power device (such as the SiC MOS transistor) and reducing the failure rate of other circuits in the network sharing the same ground as the SiC MOS transistor. An auxiliary shutdown circuit consisting of a diode D and a MOS transistor S1 is provided between the gate G and the source S of the SiC MOS transistor to form a multi-level combination drive circuit together with the drive loop of the SiC MOS transistor.

[0035] In some embodiments, the driving device of the power switch device according to the solution of the present invention further includes: a driving capacitor module, such as Figure 2 the capacitor Cgs in the drive capacitor module; the drive capacitor module is arranged between the control terminal and the ground terminal of the power switching device; the cathode of the diode module is connected to the common terminal of the drive resistor module and the drive capacitor module.

[0036] Specifically, if Figure 2 As shown, a multi-level drive circuit for a SiC MOS transistor includes: a SiC MOS transistor Q, a drive circuit for the SiC MOS transistor Q, an auxiliary shutdown circuit disposed between the gate G and source S of the SiC MOS transistor Q, and a capacitor Cgs disposed between the gate G and source S of the SiC MOS transistor Q. The capacitor Cgs is connected between the gate G and source S of the SiC MOS transistor Q. By disposing the capacitor Cgs between the gate G and source S of the SiC MOS transistor Q, the capacitance of the capacitor Cgs is greater than the parasitic capacitance between the gate G and source S of the SiC MOS transistor Q. The capacitor Cgs is connected in parallel with the parasitic capacitance between the gate G and source S of the SiC MOS transistor Q to form a very low impedance branch, thereby reducing the impedance of the gate drive circuit of the SiC MOS transistor Q.

[0037] In some embodiments, the power switch device includes: a SiC MOS tube, such as Figure 2The SiC MOS tube Q in the power switch device; the control end of the power switch device is the gate of the SiC MOS tube; the two connection ends of the power switch device are the drain and source of the SiC MOS tube; the ground end of the power switch device is the source of the SiC MOS tube; the drain of the SiC MOS tube is connected to the power supply of the SiC MOS tube.

[0038] Specifically, Figure 3 The present invention is a timing logic diagram of an embodiment of a multi-level driving circuit, specifically a timing logic diagram of an embodiment of a driving circuit of a silicon carbide MOS transistor (SiC MOS transistor). Figure 3 The driving timing of the multi-level combination driving circuit can be shown as an example. Figure 3 Therefore, the driving timing of the multi-level combination drive circuit primarily includes the control signal PWM1 of the driver chip (driver IC) of the SiC MOS transistor Q, the control signal PWM2 of the auxiliary MOS transistor S1, and the gate drive voltage Vgs of the SiCMOS transistor Q. By sequentially controlling the timing logic of the control signals PWM1 and PWM2, the multi-level drive of the multi-level combination drive circuit of the SiC MOS transistor Q can be achieved.

[0039] In one driving cycle (i.e., a cycle from one time t0 to the next time t0), the driving modes of the multi-level combination driving circuit of the SiC MOS transistor Q are divided into three modes in total: mode 1, i.e., a normal conduction mode of the SiC MOS transistor Q; mode 2, i.e., a negative voltage shutdown mode of the SiC MOS transistor Q; and mode 3, i.e., a zero voltage shutdown mode of the SiC MOS transistor Q.

[0040] Specifically, mode 1 corresponds to the time period between time t0 and time t1 in a drive cycle: at time t0, the control signal PWM2 of MOS transistor S1 is low, turning MOS transistor S1 off. The control signal PWM1 of the driver chip (driver IC) of SiC MOS transistor Q is high, turning on MOS transistor Q1 in the driver chip (driver IC) of SiC MOS transistor Q. The gate of SiC MOS transistor Q (i.e., gate G of SiC MOS transistor Q) is connected to the positive power supply VCC. The gate drive voltage of SiC MOS transistor Q is the voltage provided by the positive power supply VCC, which charges the gate capacitor Cgs through the gate drive resistor Rg. At this time, the gate voltage Vgs of SiC MOS transistor Q rises to the gate drive voltage VCC, and SiC MOS transistor Q is in the on state.

[0041] Mode 2 corresponds to the period between time t1 and time t2 in a drive cycle: At time t1, the control signal PWM2 of MOS transistor S1 is still at a low level, and the control signal PWM1 of the driver chip (driver IC) of SiC MOS transistor Q is also at a low level. MOS transistor Q2 in the driver chip (driver IC) of SiC MOS transistor Q is turned on, and the gate of SiC MOS transistor Q (i.e., the gate G of SiC MOS transistor Q) is connected to the negative power supply VEE. At this time, the gate capacitance Cgs of SiC MOS transistor Q begins to discharge, and the gate voltage of SiC MOS transistor Q drops to the voltage provided by the negative power supply VEE, and SiC MOS transistor Q is turned off.

[0042] Mode 3 corresponds to the period from time t2 in one drive cycle to time t0 in the next drive cycle. At time t2, the control signal PWM1 of the driver IC for SiC MOS transistor Q remains low, while the control signal PWM2 of MOS transistor S1 is high, turning on MOS transistor S1. With MOS transistor S1 conducting, the current flows from GND to MOS transistor S1, through diode D, through gate drive resistor Rg, and finally through negative power supply VEE. At this point, the gate voltage of SiC MOS transistor Q is clamped at 0V, and SiC MOS transistor Q remains off, effectively suppressing reverse voltage crosstalk from negative power supply VEE.

[0043] Specifically, in Mode 2, SiC MOS transistor Q is in the off state, and its gate-source voltage Vgs is clamped to the voltage provided by the negative power supply VEE. This negative voltage is negative, and for SiC MOS transistor Q, the reference ground network GND of the voltage provided by the negative power supply VEE is a reverse voltage. Due to this negative voltage, interference, namely reverse voltage crosstalk, may occur in the ground network GND, affecting the normal operation of the drive circuit. In Mode 3, SiC MOS transistor Q is in the off state, MOS transistor S1 is on, and the gate voltage of SiC MOS transistor Q is clamped to 0V. SiC MOS transistor Q remains in the off state, thereby effectively suppressing the reverse voltage crosstalk from the negative power supply VEE.

[0044] During the next cycle (i.e., the time period from time t0 to time t1 is repeated), the turn-on gate voltage Vgs of the SiC MOS transistor Q rises from 0V to the voltage provided by the positive power supply VCC. Compared with the related solution in which the turn-on gate voltage Vgs of the SiC MOS transistor Q sequentially rises from the voltage provided by the negative power supply VEE to the voltage provided by the positive power supply VCC during the next cycle, the gate drive circuit of the SiC MOS transistor Q, i.e., the multi-level combination drive circuit of the SiC MOS transistor Q, switches in an orderly manner, thereby improving the turn-on speed of the SiC MOS transistor Q.

[0045] The solution of the present invention provides an auxiliary shutdown circuit consisting of a diode D and a MOS transistor S1 between the gate G and the source S of the SiC MOS transistor to form a multi-level combination drive circuit with the drive circuit of the SiC MOS transistor. This effectively suppresses forward voltage crosstalk and reverse voltage crosstalk, while increasing the turn-on speed of the SiC power device (such as the SiC MOS transistor) and reducing the switching loss of the SiC power device (such as the SiC MOS transistor).

[0046] The technical solution of the present invention comprises a driving circuit for driving the control terminal of a power switching device (such as a MOS transistor, an IGBT, a transistor, etc.), wherein the power supply of the driving chip in the driving circuit comprises a positive power supply VCC and a negative power supply VEE; an auxiliary shutdown circuit consisting of a diode (such as a diode D) and a MOS transistor (such as a MOS transistor S1) is provided between the control terminal of the driving power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) and a ground terminal (such as the source of the MOS transistor, the emitter of the IGBT, the emitter of the transistor, etc.); when the control signal PWM1 of the driving chip is high and the control chip PWM2 of the MOS transistor S1 is low, the driving chip controls the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) to turn on; and when the control signal PWM1 of the driving chip changes to a low level and the control chip PWM2 of the MOS transistor S1 is still low, the driving chip controls the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) to turn off; and when the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) is turned off, In this case, when the control chip PWM2 of the MOS tube S1 becomes high level, the auxiliary shutdown circuit composed of the diode (such as diode D) and the MOS tube (such as MOS tube S1) is turned on, and the voltage of the control terminal of the power switch device (such as MOS tube, IGBT, triode, etc.) is clamped at 0V to suppress the reverse voltage crosstalk of the negative power supply VEE; thereby, by connecting the control terminal of the driving power switch device (such as MOS tube, IGBT, triode, etc.) and the ground terminal (such as the source of the MOS tube, the emitter of the IGBT, the emitter of the triode, etc.) An auxiliary shutdown circuit composed of a diode (such as diode D) and a MOS transistor (such as MOS transistor S1) is provided between the emitter, etc., to suppress the crosstalk voltage of the drive circuit of the power switching device (such as MOS transistor, IGBT, triode, etc.), thereby preventing the power switching device (such as MOS transistor, IGBT, triode, etc.) from affecting the normal operation of other circuits in the common ground network GND due to the crosstalk voltage of the drive circuit, thereby reducing the failure rate of other circuits in the common ground network with the driving power switching device (such as MOS transistor, IGBT, triode, etc.).

[0047] According to an embodiment of the present invention, a control method for a driving device of a power switching device corresponding to the driving device of the power switching device is also provided, such as Figure 4FIG2 is a flow chart of an embodiment of the method of the present invention. The control method of the driving device of the power switch device may include: steps S110 to S140.

[0048] At step S110, in a driving cycle of the power switch device, in a first time period (eg, Figure 3 During the period from time t0 to time t1, a first control signal is sent to the drive circuit of the power switching device, and the first control signal is at a high level; at the same time, a second control signal is sent to the auxiliary shutdown circuit of the power switching device, and the second control signal is at a low level.

[0049] At step S120, in the second period (eg Figure 3 During the period from time t1 to time t2 in the power switching device, a first control signal is sent to the driving circuit of the power switching device, and the first control signal becomes a low level; at the same time, a second control signal is sent to the auxiliary shutdown circuit of the power switching device, and the second control signal is still a low level.

[0050] At step S130, in the third period (eg Figure 3 During the period from time t2 to the time before the next driving cycle begins, that is, before the time t0 of the next driving cycle arrives, a first control signal is sent to the driving circuit of the power switching device, and the first control signal remains at a low level; at the same time, a second control signal is sent to the auxiliary shutdown circuit of the power switching device, and the second control signal becomes a high level;

[0051] At step S140 , after the driving cycle ends, the next driving cycle begins, and the cycle continues.

[0052] Specifically, see Figure 3 In the example shown, within a driving cycle (i.e., a cycle from one time t0 to the next time t0), the driving modes of the multi-level combination driving circuit of the SiC MOS transistor Q are divided into three modes in total, specifically: Mode 1, i.e., the normal conduction mode of the SiC MOS transistor Q; Mode 2, i.e., the negative voltage shutdown mode of the SiC MOS transistor Q; and Mode 3, i.e., the zero voltage shutdown mode of the SiC MOS transistor Q.

[0053] Specifically, mode 1 corresponds to the time period between time t0 and time t1 in a drive cycle: at time t0, the control signal PWM2 of MOS transistor S1 is low, turning MOS transistor S1 off. The control signal PWM1 of the driver chip (driver IC) of SiC MOS transistor Q is high, turning on MOS transistor Q1 in the driver chip (driver IC) of SiC MOS transistor Q. The gate of SiC MOS transistor Q (i.e., gate G of SiC MOS transistor Q) is connected to the positive power supply VCC. The gate drive voltage of SiC MOS transistor Q is the voltage provided by the positive power supply VCC, which charges the gate capacitor Cgs through the gate drive resistor Rg. At this time, the gate voltage Vgs of SiC MOS transistor Q rises to the gate drive voltage VCC, and SiC MOS transistor Q is in the on state.

[0054] Mode 2 corresponds to the period between time t1 and time t2 in a drive cycle: At time t1, the control signal PWM2 of MOS transistor S1 is still at a low level, and the control signal PWM1 of the driver chip (driver IC) of SiC MOS transistor Q is also at a low level. MOS transistor Q2 in the driver chip (driver IC) of SiC MOS transistor Q is turned on, and the gate of SiC MOS transistor Q (i.e., the gate G of SiC MOS transistor Q) is connected to the negative power supply VEE. At this time, the gate capacitance Cgs of SiC MOS transistor Q begins to discharge, and the gate voltage of SiC MOS transistor Q drops to the voltage provided by the negative power supply VEE, and SiC MOS transistor Q is turned off.

[0055] Mode 3 corresponds to the period from time t2 in one drive cycle to time t0 in the next drive cycle. At time t2, the control signal PWM1 of the driver IC for SiC MOS transistor Q remains low, while the control signal PWM2 of MOS transistor S1 is high, turning on MOS transistor S1. With MOS transistor S1 conducting, the current flows from GND to MOS transistor S1, through diode D, through gate drive resistor Rg, and finally through negative power supply VEE. At this point, the gate voltage of SiC MOS transistor Q is clamped at 0V, and SiC MOS transistor Q remains off, effectively suppressing reverse voltage crosstalk from negative power supply VEE.

[0056] Specifically, in Mode 2, SiC MOS transistor Q is in the off state, and its gate-source voltage Vgs is clamped to the voltage provided by the negative power supply VEE. This negative voltage is negative, and for SiC MOS transistor Q, the reference ground network GND of the voltage provided by the negative power supply VEE is a reverse voltage. Due to this negative voltage, interference, namely reverse voltage crosstalk, may occur in the ground network GND, affecting the normal operation of the drive circuit. In Mode 3, SiC MOS transistor Q is in the off state, MOS transistor S1 is on, and the gate voltage of SiC MOS transistor Q is clamped to 0V. SiC MOS transistor Q remains in the off state, thereby effectively suppressing the reverse voltage crosstalk from the negative power supply VEE.

[0057] During the next cycle (i.e., the time period from time t0 to time t1 is repeated), the turn-on gate voltage Vgs of the SiC MOS transistor Q rises from 0V to the voltage provided by the positive power supply VCC. Compared with the related solution in which the turn-on gate voltage Vgs of the SiC MOS transistor Q sequentially rises from the voltage provided by the negative power supply VEE to the voltage provided by the positive power supply VCC during the next cycle, the gate drive circuit of the SiC MOS transistor Q, i.e., the multi-level combination drive circuit of the SiC MOS transistor Q, switches in an orderly manner, thereby improving the turn-on speed of the SiC MOS transistor Q.

[0058] The solution of the present invention provides an auxiliary shutdown circuit consisting of a diode D and a MOS transistor S1 between the gate G and the source S of the SiC MOS transistor to form a multi-level combination drive circuit with the drive circuit of the SiC MOS transistor. This effectively suppresses forward voltage crosstalk and reverse voltage crosstalk, while increasing the turn-on speed of the SiC power device (such as the SiC MOS transistor) and reducing the switching loss of the SiC power device (such as the SiC MOS transistor).

[0059] Since the processing and functions implemented by the method of this embodiment basically correspond to the embodiments, principles and examples of the driving device of the power switching device described above, for any details not fully described in this embodiment, please refer to the relevant descriptions in the above embodiments and will not be repeated here.

[0060] According to the technical solution of this embodiment, a driving circuit for driving the control terminal of a power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) is provided. The power supply of the driving chip in the driving circuit includes a positive power supply VCC and a negative power supply VEE. An auxiliary shutdown circuit composed of a diode (such as a diode D) and a MOS transistor (such as a MOS transistor S1) is provided between the control terminal of the driving power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) and a ground terminal (such as the source of the MOS transistor, the emitter of the IGBT, the emitter of the transistor, etc.). When the control signal PWM1 of the driving chip is at a high level and the control signal PWM2 of the MOS transistor S1 is at a low level, the driving chip controls the power switching device (such as a MOS transistor, an IGBT, a transistor, etc.) to be turned on. If the control signal PWM1 of the driver chip changes to a low level and the control chip PWM2 of the MOS transistor S1 is still at a low level, the driver chip controls the power switch device (such as a MOS transistor, IGBT, or transistor) to turn off. When the power switch device (such as a MOS transistor, IGBT, or transistor) is turned off and the control chip PWM2 of the MOS transistor S1 changes to a high level, an auxiliary shutdown circuit composed of a diode (such as diode D) and a MOS transistor (such as MOS transistor S1) is turned on, clamping the voltage at the control terminal of the power switch device (such as a MOS transistor, IGBT, or transistor) to 0V, thereby suppressing reverse voltage crosstalk of the negative power supply VEE. This can effectively suppress forward voltage crosstalk and reverse voltage crosstalk, while increasing the turn-on speed of the SiC power device (such as a SiC MOS transistor) and reducing the switching loss of the SiC power device (such as a SiC MOS transistor).

[0061] In summary, it is easy for those skilled in the art to understand that, under the premise of no conflict, the above-mentioned advantageous methods can be freely combined and superimposed.

[0062] The foregoing description is merely an embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of the claims.

Claims

1. A driving device for a power switching device, characterized in that: include: A driving circuit for the power switching device, and an auxiliary shutdown circuit for the power switching device; The power supply of the driving circuit of the power switch device includes: a positive power supply and a negative power supply; wherein, The driving circuit of the power switching device is provided at the control terminal of the power switching device; within a driving cycle of the power switching device, when the first control signal received by the driving circuit of the power switching device is at a high level and the second control signal received by the auxiliary shutdown circuit of the power switching device is at a low level, the driving circuit of the power switching device connects to the positive power supply to supply power to the control terminal of the power switching device using the positive power supply, thereby turning on the power switching device; when the control signal received by the driving circuit of the power switching device changes to a low level and the second control signal received by the auxiliary shutdown circuit of the power switching device is still at a low level, the driving circuit of the power switching device connects to the negative power supply to supply power to the control terminal of the power switching device using the negative power supply, thereby turning off the power switching device at a negative voltage; the voltage at the control terminal of the power switching device is clamped to the voltage provided by the negative power supply; The auxiliary shutdown circuit of the power switching device is arranged between the control terminal of the power switching device and the ground terminal of the power switching device; during a driving cycle of the power switching device, when the power switching device is negatively shut down, when the second control signal received by the auxiliary shutdown circuit of the power switching device becomes a high level, the auxiliary shutdown circuit of the power switching device itself is turned on, so that a loop is formed between the auxiliary shutdown circuit of the power switching device and the control terminal of the power switching device, so that the voltage of the control terminal of the power switching device is clamped at 0V.

2. The driving device of the power switch device according to claim 1, characterized in that: The driving circuit of the power switch device includes: a driving chip and a driving resistance module; the driving chip includes: a first switching tube and a second switching tube; wherein, The positive power supply is connected to the first connection terminal of the first switching tube; the second connection terminal of the first switching tube is connected to the first connection terminal of the second switching tube; the second connection terminal of the first switching tube is further connected to the control terminal of the power switching device after passing through the driving resistor module; The second connection end of the second switch tube is connected to the negative power supply; the control end of the first switch tube is connected to the control end of the second switch tube, and the control end of the first switch tube and the control end of the second switch tube are both used to receive the first control signal.

3. The driving device of the power switch device according to claim 2, characterized in that: in, The first switching tube and the second switching tube are both MOS tubes; the control ends of the first switching tube and the second switching tube are both gates of the MOS tubes; the first connection ends of the first switching tube and the second switching tube are both drains of the MOS tubes; and the second connection ends of the first switching tube and the second switching tube are both sources of the MOS tubes.

4. The driving device of the power switch device according to claim 2, characterized in that: The auxiliary shutdown circuit of the power switch device includes: a diode module and a third switch tube; wherein, The second connection end of the first switch tube is further connected to the cathode of the diode module after passing through the driving resistor module; The control end of the third switch tube is used to receive the second control signal; the first connection end of the third switch tube is grounded; and the second connection end of the third switch tube is connected to the anode of the diode module.

5. The driving device of the power switch device according to claim 4, characterized in that: The third switch tube is a MOS tube; the control end of the third switch tube is the gate of the MOS tube, the first connection end of the third switch tube is the source of the MOS tube, and the second connection end of the third switch tube is the drain of the MOS tube.

6. The driving device of the power switch device according to claim 4, characterized in that: Also includes: Driving capacitor module; The driving capacitor module is arranged between the control terminal and the ground terminal of the power switch device; the cathode of the diode module is connected to the common terminal of the driving resistor module and the driving capacitor module.

7. The driving device of a power switch device according to any one of claims 1 to 6, characterized in that: The power switch device includes: a SiC MOS tube; the control terminal of the power switch device is the gate of the SiC MOS tube; the ground terminal of the power switch device is the source of the SiC MOS tube; and the drain of the SiC MOS tube is connected to the power supply of the SiCMOS tube.

8. A method for controlling a driving device of a power switching device according to any one of claims 1 to 7, characterized in that: include: During a driving cycle of the power switching device, in a first time period after the start of the driving cycle, a first control signal is sent to a driving circuit of the power switching device, and the first control signal is at a high level; at the same time, a second control signal is sent to an auxiliary shutdown circuit of the power switching device, and the second control signal is at a low level; In a second period after the start of the driving cycle, a first control signal is sent to the driving circuit of the power switching device, and the first control signal changes to a low level; at the same time, a second control signal is sent to the auxiliary shutdown circuit of the power switching device, and the second control signal remains at a low level; In a third period after the start of the driving cycle, a first control signal is sent to the driving circuit of the power switching device, and the first control signal remains at a low level; at the same time, a second control signal is sent to the auxiliary shutdown circuit of the power switching device, and the second control signal becomes a high level; After the driving cycle ends, the next driving cycle begins, and the cycle continues.

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