High-performance block cipher construction method and device, electronic equipment and storage medium
By designing a lightweight key scheduling algorithm and a 4-bit S-box block cipher construction method, the problems of high hardware resource consumption and low software efficiency in block cipher algorithms are solved, realizing a block cipher with low hardware latency and high software efficiency, which is suitable for multiple platforms.
Patent Information
- Application Number
- CN202310259518.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-13
- Publication Date
- 2026-02-10
- Estimated Expiration
- 2043-03-13
AI Technical Summary
Existing block cipher algorithms have high resource consumption when implemented in hardware, low efficiency when implemented in software, and are difficult to apply flexibly on different platforms.
A high-performance block cipher construction method is designed, which adopts a lightweight key scheduling algorithm and a 4-bit S-box. The 32 4-bit positions are permuted by a 128-bit key scheduling algorithm. Combined with S-box substitution, column mixing and round key addition operations, four rounds of full diffusion are achieved, and the software efficiency is improved by SIMD instructions.
It implements a block cipher algorithm with low hardware resource consumption and low latency, which can resist differential and linear attacks, is suitable for multiple operating platforms, is compatible with 128 and 256 key lengths, and has high software implementation efficiency.
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Figure CN116318631B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of information security technology, and in particular to a high-performance block cipher construction method, apparatus, electronic device and storage medium. Background Technology
[0002] Block ciphers are one of the most important classes of symmetric cryptography algorithms, widely used in network communication. The AES block cipher is an international standard algorithm with a block length of 128 bits and key lengths of 128, 192, and 256 bits. my country has also introduced the SM4 block cipher standard, with both block and key lengths of 128 bits. These algorithms have high hardware implementation resource consumption or significant latency. With the increasing demands of applications such as the Internet of Things (IoT) and 5G, lightweight block ciphers such as Midori, Prince, Skinny, and PRESENT have been proposed. Midori and Prince are designed for low latency and low power consumption, while PRESENT and Skinny are designed for low area requirements. Some lightweight block cipher algorithms have reduced security requirements; for example, PRESENT has a key length of only 80 bits and provides a maximum security strength of 2. 80 This operation is performed once. Prince has a block size of 64 bits and a key length of 128 bits. Considering the need for low power consumption, Midori only provides security strength under a single key and is not resistant to related key attacks.
[0003] A good block cipher should not only have high security strength and resist existing attacks, but also be flexible in implementation and have excellent implementation performance in software platforms, hardware platforms and embedded devices.
[0004] Modern block cipher algorithms follow the confusion and diffusion principles proposed by Shannon in 1949, employing multiple iterations of simple round functions to ensure security. SPN (Split-Negative) is one of the most commonly used structures; the international standard AES algorithm uses this structure. However, the AES algorithm, based on an 8-bit S-box, has relatively high hardware resource consumption. Based on this structure, a series of lightweight algorithms have been proposed, such as Midori and Skinny. These algorithms are structurally similar to AES, dividing the block size into 16 units arranged in a 4x4 matrix. A 64-bit block is divided into 16 4-bit units, while a 128-bit block is divided into 16 byte units. The nonlinear layer uses either a 4-bit or 8-bit S-box, determined by the unit size. The linear layer includes simple operations such as unit position permutations and MDS-like codes. Block ciphers based on 128-bit blocks use a 4-bit S-box as the nonlinear layer. These algorithms typically involve complex linear operations, such as uBlock and FESH, resulting in high overall hardware resource consumption.
[0005] For block cipher algorithms with a block length of 128 bits, a 4-bit S-box is used. The 128-bit state can be divided into 32 4-bit groups. The challenge is to design a linear layer based on these 32 4-bit groups that provides good diffusivity while minimizing resource consumption. Orthros, a permutation cipher, uses a 4-bit S-box and a 32-bit 4-bit design. However, the introduction of a 128-bit bit permutation, while generating strong diffusivity, complicates security proofs and hinders software implementation, resulting in low efficiency. Summary of the Invention
[0006] This application provides a high-performance block cipher construction method, apparatus, electronic device, and storage medium to solve the problems of high resource consumption and low software implementation efficiency when implementing existing block cipher algorithms in hardware.
[0007] The first aspect of this application provides a high-performance block cipher construction method, comprising the following steps: encryption process: encrypting plaintext using a preset round function generation algorithm to obtain ciphertext, wherein the round key in the preset round function generation algorithm is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm; decryption process: decrypting the ciphertext using a decryption algorithm to obtain the plaintext.
[0008] Optionally, in one embodiment of this application, the decryption process is the inverse operation of the encryption process.
[0009] Optionally, in one embodiment of this application, the step of encrypting plaintext using a preset round function generation algorithm to obtain ciphertext includes: generating an initial state of the round function by bitwise XORing the plaintext into a whitening key; replacing each of the 32 S-box units of the round function with a 4-bit S-box; XORing the replaced round function into a multi-bit constant after bit grouping, and permuting the 32 positions of the round function with S-box units, so that there is no impossible difference for 9 rounds of iteration based on the round function, and there is no valid difference path for 9 rounds; multiplying each column of the intermediate state matrix of the round function by a preset matrix to perform column mixing, and XORing the column-mixed round function bitwise with the round key, and after multiple rounds of iteration, obtaining the ciphertext encrypted by the round function.
[0010] Optionally, in one embodiment of this application, the round key length is equal to the bit block length of the round function, and the round key is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm, including: iteratively generating the round key using a position permutation function.
[0011] Optionally, in one embodiment of this application, the method further includes: obtaining the round key in the preset round function generation algorithm by performing 4-bit substitution and position permutation of 32 positions in 4-bit units using a 256-bit key scheduling algorithm.
[0012] Optionally, in one embodiment of this application, the round key length is twice the bit block length of the round function. The round key in the preset round function generation algorithm is obtained by performing 4-bit substitution and position permutation of 32 positions in 4-bit units using a 256-bit key scheduling algorithm. This includes: dividing the master key into two round keys using a 256-bit key scheduling algorithm, and performing composite calculation using a position permutation function and a 4-bit substitution function to obtain the round key.
[0013] A second aspect of this application provides a high-performance block cipher construction apparatus, comprising: an encryption module for encrypting plaintext using a preset round function generation algorithm to obtain ciphertext, wherein the round key in the preset round function generation algorithm is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm; and a decryption module for decrypting the ciphertext using a decryption algorithm to obtain the plaintext.
[0014] Optionally, in one embodiment of this application, the encryption module is further configured to: XOR the plaintext blocks bit-by-bit with the whitening key to generate the initial state of the round function; replace each of the 32 S-box units of the round function with a 4-bit S-box; XOR the replaced round function with a multi-bit constant after bit-by-bit grouping, and perform position permutation on the 32 positions of the round function with S-box units, so that there is no impossible difference for 9 rounds of iteration based on the round function, and there is no valid difference path for 9 rounds; multiply each column of the intermediate state matrix of the round function by a preset matrix to perform column mixing, and XOR the column-mixed round function bit-by-bit with the round key, and after multiple rounds of iteration, obtain the ciphertext encrypted by the round function.
[0015] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to perform the high-performance block cipher construction method as described in the above embodiments.
[0016] A fourth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which is executed by a processor to perform the high-performance block cipher construction method as described in the above embodiments.
[0017] This application discloses a high-performance block cipher construction method, apparatus, electronic device, and storage medium. It designs a lightweight key scheduling algorithm and constructs a lightweight, high-performance block cipher algorithm. The round function uses a 4-bit S-box, and the linear diffusion layer is refined. The proposed round function provides sufficient confusion diffusion; four rounds can achieve full diffusion. Furthermore, the block cipher algorithm constructed based on this round function facilitates security proofs against differential and linear attacks. The algorithm has low hardware resource consumption, employing a low-latency S-box to achieve low latency. It is also easy to implement using SIMD instructions, exhibiting high software implementation efficiency and supporting multiple operating platforms, offering strong flexibility. The key scheduling algorithm is simple, involving only linear operations compatible with both 128 and 256 key lengths.
[0018] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0019] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:
[0020] Figure 1 This is a flowchart of a high-performance block cipher construction method provided according to an embodiment of this application;
[0021] Figure 2 This is an example diagram of a high-performance block cipher construction apparatus according to an embodiment of this application;
[0022] Figure 3 A schematic diagram of the structure of the electronic device provided in the application embodiment. Detailed Implementation
[0023] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.
[0024] Figure 1 This is a flowchart of a high-performance block cipher construction method provided according to an embodiment of this application.
[0025] like Figure 1 As shown, this high-performance block cipher construction method includes the following steps:
[0026] In step S101, the encryption process is as follows: the plaintext is encrypted using a preset round function generation algorithm to obtain ciphertext. The round key in the preset round function generation algorithm is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm.
[0027] The S-box can be a 4-bit S-box or an 8-bit S-box.
[0028] As a specific implementation, taking a 4-bit S-box as an example, the algorithm in this embodiment adopts a substitution-permutation network (SPN) structure as the overall algorithm structure. The SPN structure is implemented through multiple iterative round functions, with each round function using a 128-bit block length. During encryption, the plaintext blocks are first XORed bit by bit with the whitening key RK0. The key lengths are 128 bits and 256 bits. The algorithm has a total of N rounds, with a 128-bit key length of N=24 and a 256-bit key length of N=30. The pseudocode for the encryption algorithm is as follows:
[0029]
[0030] C = X N
[0031] First, the plaintext is encrypted using a round function. Optionally, in one embodiment of this application, the plaintext is encrypted using a preset round function generation algorithm to obtain ciphertext, including: generating an initial state of the round function by bitwise XORing the plaintext into blocks and a whitening key; replacing each of the 32 S-box units of the round function with a 4-bit S-box; XORing the replaced round function into a multi-bit constant after bit grouping, and permuting the 32 positions of the round function with S-box units, so that there is no impossible difference for 9 rounds of iteration based on the round function, and there is no effective difference path for 9 rounds; multiplying each column of the intermediate state matrix of the round function by a preset matrix to perform column mixing, and XORing the column-mixed round function bitwise with the round key, and after multiple rounds of iteration, obtaining the ciphertext encrypted by the round function.
[0032] A 128-bit block can be represented as 32 4-bit blocks, as shown in the matrix below:
[0033]
[0034] Round functions include: S-box substitution (SubByte), byte permutation (PosPerm), column mixing (MixColumn), and round key addition operations, where RK1, RK2, ..., RK... N The round key is generated by a key scheduling algorithm. The final output is ciphertext C.
[0035] Specifically, the S-box (SubByte) is searched, specifically the 32 four-bit S-boxes. S-boxes offer high security; they are permutations, satisfy balance, have optimal difference probability, optimal linear deviation probability, and algebraic degree of 3. The expression for each output bit is non-linear. S-boxes can be selected based on their area or delay, depending on the needs. The replacement table for the selected S-boxes is shown in Table 1.
[0036] Table 1 S-box Replacement Table
[0037] enter 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Output 11 8 10 0 15 14 2 1 9 12 13 4 3 6 5 7
[0038] The round function in the above embodiment is designed based on 128-bit groups and 4-bit S-boxes. If the S-box is extended by 8 bits, the group length becomes 32*8=256, which can satisfy the conditions of 4 rounds of full diffusion and the phenomena of 9 rounds of impossible differential and 9 rounds of differential. This is equivalent to extending the round function.
[0039] As a specific implementation, this application utilizes a 32-bit, relatively optimal constant XOR method to XOR the first two columns of the round function with the 32-bit constant c = {c0, c1, c2, c3, c4, c5, c6, c7}, constructing a feedback polynomial based on a 6-bit LFSR. The corresponding wheel constants for (c0, c1) are shown in Table 2:
[0040] Table 2 Values of constants plus the first two bytes
[0041] Number of rounds 0 1 2 3 4 5 6 7 8 9 10 constant 0x80 0xc0 0xe0 0xf0 0xf8 0x7c 0xbc 0xdc 0xec 0xf4 0x78 Number of rounds 11 12 13 14 15 16 17 18 19 20 21 constant 0x3c 0x9c 0xcc 0xe4 0x70 0xb8 0x5c 0xac 0xd4 x68 0x34 Number of rounds 22 23 24 25 26 27 28 29 30 31 constant 0x18 0xc 0x84 0x40 0xa0 0xd0 0xe8 0x74 0x38 0x1c
[0042] When the key length is 128 bits, (c2,c3,c4,c5) = 0x5a5a; when the key length is 256 bits, (c2,c3,c4,c5) = 0xa3a3. This is used to distinguish the algorithm version corresponding to different key lengths.
[0043] The round constants corresponding to (c6, c7) consist of the fractional part of pi, as shown in Table 3.
[0044] Table 3. Values of constants plus the last two bytes
[0045]
[0046]
[0047] Z = AddConst(Y), where z i =y i ⊕c i i = 0, 1, 2, 3. i =y i ,i=4,5,…,31.
[0048] The row permutation (PosPerm) replaces the 32 4-bit states obtained after replacing the S-box. The positions of these 32 cells are then permuted in each row, and the permutation order is shown in Table 4.
[0049] Table 4: Position Transformation of Each Row
[0050]
[0051] U = PosPerm(Z) = {u0, u1, ..., u} 31},u i =z p(i) ,i=0,1,…,31.
[0052] The properties of permutation operations for positional permutations are as follows:
[0053] 1) Replace each row;
[0054] 2) After a single positional swap, elements in the same column will be moved to different columns;
[0055] 3) After two positional permutations, elements in the same column are moved to different columns;
[0056] 4) After 4 rounds of the algorithm, one active S-box input can affect all S-box units of the output, that is, full diffusion is generated after 4 rounds.
[0057] MixColumn (MC) is a 4×4 matrix M that left-multiplies each column of the intermediate state matrix. Matrix M is shown below:
[0058]
[0059] Where matrix M -1 =M.
[0060] W = {w0, w1, ..., w 31} = MixColumn(U), that is:
[0061]
[0062] In the encryption process of the r-th round (r = 1, 2, ..., N), the state W after column mixing operation is XORed bit by bit with the round key RK. r , obtain the output status.
[0063] The permutation matrix parameters of the key scheduling algorithm can be adjusted as required. The position permutation using S-boxes as units in the round function is based on row permutation construction and can be further extended to any 32-bit position permutation. New position permutations can be selected using the same design requirements. In the constant addition, constants can be combined with the key scheduling algorithm for parameter replacement. The number of rounds can be adjusted as needed, while ensuring security.
[0064] It should be noted that in this step, if no constant is added, that is, if the constant addition operation is not performed, or if the constant addition does not meet the conditions, the embodiments of this application can achieve the same effect as in this step by adding a constant to the round key RKi.
[0065] In step S102, the decryption process involves using a decryption algorithm to decrypt the ciphertext to obtain the plaintext.
[0066] Optionally, in one embodiment of this application, the decryption process is the inverse operation of the encryption process.
[0067] The decryption algorithm is the inverse operation of the encryption algorithm. It involves N rounds (round function) of iterative computation, including: adding the decryption round key, and performing the column mixing inverse operation (MixColumn). -1 ), the inverse of row transformation (PosPerm) -1 S-box substitution inverse operation (SubByte) -1 Finally, the output is XORed with the whitening key RK0 to obtain the plaintext. The pseudocode for the decryption algorithm is as follows:
[0068]
[0069] The decryption round key is added. During decryption, the initial state is the ciphertext. In the r-th round (r = 1, 2, ..., N) of decryption, the state is XORed bit by bit with the round key RK. N-r+1 The last state is XORed with the whitening key RK0 to obtain the plaintext output.
[0070] MixColumn Inverse Operation -1 Mixed columns (MC) are created because M... -1 =M, multiply the intermediate state matrix by a 4×4 matrix M on the left.
[0071] Inverse row operations (PosPerm) -1 The state consists of 32 4-bit states. The positions of these 32 cells are permuted in each row. The permutation order for these 32 cells is shown in Table 5.
[0072] Table 5 Inverse Operations of Row Transformations
[0073]
[0074] AddConst: XOR the first two columns with a 32-bit constant c = {c0, c1, c2, c3, c4, c5, c5, c7}. The constant values are in the reverse order of the encryption.
[0075] S-box substitution inverse operation (SubByte) -1 The S-box substitution inverse operation is based on a 4-bit non-linear substitution. The inverse of the S-box is queried one by one using 32 4-bit bits, and the new value is used to replace the original value, resulting in the output state X = SubByte. -1 (Y).
[0076] Optionally, in one embodiment of this application, the round key length is equal to the bit block length of the round function, and the round key is obtained by permuting the 32 positions in 4-bit units using a 128-bit key scheduling algorithm, including: iteratively generating the round key using the position permutation function.
[0077] Optionally, in one embodiment of this application, the method further includes: obtaining the round key in the preset round function generation algorithm by performing 4-bit substitution and position permutation of 32 positions in 4-bit units using a 256-bit key scheduling algorithm.
[0078] Optionally, in one embodiment of this application, the round key length is twice the bit block length of the round function. The round key in the preset round function generation algorithm is obtained by performing 4-bit substitution and position permutation of 32 positions in 4-bit units using a 256-bit key scheduling algorithm. This includes: dividing the master key into two round keys using a 256-bit key scheduling algorithm, and performing composite calculation using a position permutation function and a 4-bit substitution function to obtain the round key.
[0079] To reduce area and improve efficiency, the key scheduling algorithm uses a 128-bit key scheduling algorithm that employs position permutations in 32 positions, each in 4-bit units. The 256-bit key scheduling algorithm is slightly more complex than the 128-bit algorithm, adding an f-function for 4 bits and constructing it based on an LFSR with a period of 15.
[0080] For algorithm CLB-128, the key length is equal to the block length. Its key scheduling algorithm uses function F and key K to generate round key RK. i (i = 0, 1, ..., N).
[0081] RK0=K
[0082] RK i =F(RK) i-1 ), i = 1, ..., N
[0083] The F function is a permutation of 32 units. The 128-bit state is divided into 32 four-bit units, forming a 4x8 matrix based on 4-bit units. The permutations of the 4-bit units are shown in Table 6. The input and output of the F function are X = {x0, x1, ..., x...} 31} and Y = {y0, y1, ..., y 31 The division method is as described above, and then the position permutation operation is performed.
[0084] The pseudocode for the round function Y = F(X) is as follows:
[0085] Y[i] = X[Perm_K[i]]
[0086] Table 6. 4-bit permutation table Perm_K corresponding to position permutations
[0087]
[0088] For algorithm CLB-128-256, the key length is twice the block length. The key scheduling algorithm first divides the 2n-bit master key K into two n-bit round keys K = K0||K1. Then, the round keys are generated using the F function and the f function. The f function is for the transformation of 4-bit units, and the F function is the same as 128, performing position permutation of 32 units.
[0089]
[0090]
[0091] f is constructed based on a 4-bit LFSR, with the feedback polynomial (a0,a1,a2,a3)->(a0⊕a3,a0,a1,a2). Its corresponding inputs and outputs are shown in Table 7.
[0092] Table 7. Table based on 4-bit substitution
[0093] enter 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Output 0 8 1 9 2 10 3 11 12 4 13 5 14 6 15 7
[0094] The high-performance block cipher construction method proposed in the embodiments of this application includes a round function that adds lightweight key scheduling. The lightweight key scheduling algorithm is compatible with 128 and 256 key lengths. The algorithm generates full diffusion in 4 rounds, and differential, linear, and impossible differential paths all take 8 rounds. The algorithm has the ability to resist existing attacks, and it is easy to implement with SIMD, AVX, and other instructions. It can be used in computer communication networks, Internet of Things, mobile communication networks, etc.
[0095] Next, a high-performance block cipher construction apparatus according to an embodiment of this application is described with reference to the accompanying drawings.
[0096] Figure 2This is an example diagram of a high-performance block cipher construction apparatus according to an embodiment of this application.
[0097] like Figure 2 As shown, the high-performance block cipher construction device 10 includes an encryption module 100 and a decryption module 200.
[0098] The encryption module 100 is used to encrypt plaintext to obtain ciphertext using a preset round function generation algorithm. The round key in the preset round function generation algorithm is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm. The decryption module 200 is used to decrypt the ciphertext to obtain plaintext using a decryption algorithm.
[0099] Optionally, in one embodiment of this application, the decryption process of the decryption module is the inverse operation of the encryption process of the decryption module.
[0100] Optionally, in one embodiment of this application, the encryption module 100 is further configured to: XOR the plaintext blocks bit by bit with the whitening key to generate the initial state of the round function; replace each of the 32 S-box units of the round function with a 4-bit S-box; XOR the replaced round function with a multi-bit constant after bit grouping; and perform position permutation on the 32 positions of the round function with S-box units, so that there is no impossible difference for 9 rounds of iteration based on the round function, and there is no effective difference path for 9 rounds; multiply each column of the intermediate state matrix of the round function by a preset matrix to perform column mixing, and XOR the column-mixed round function bit by bit with the round key; and after multiple rounds of iteration, obtain the ciphertext encrypted by the round function.
[0101] Optionally, in one embodiment of this application, the round key length is equal to the bit block length of the round function, and the round key is obtained by permuting the 32 positions in 4-bit units using a 128-bit key scheduling algorithm, including: iteratively generating the round key using the position permutation function.
[0102] Optionally, in one embodiment of this application, the encryption module is further used to obtain the round key in the preset round function generation algorithm by performing 4-bit substitution and position permutation of 32 positions in 4-bit units through a 256-bit key scheduling algorithm.
[0103] Optionally, in one embodiment of this application, the round key length is twice the bit block length of the round function. The round key in the preset round function generation algorithm is obtained by performing 4-bit substitution and position permutation of 32 positions in 4-bit units using a 256-bit key scheduling algorithm. This includes: dividing the master key into two round keys using a 256-bit key scheduling algorithm, and obtaining the round key by performing a composite calculation using a position permutation function and a 4-bit substitution function.
[0104] It should be noted that the foregoing explanation of the embodiment of the high-performance block cipher construction method also applies to the high-performance block cipher construction apparatus of this embodiment, and will not be repeated here.
[0105] Based on the high-performance block cipher construction device proposed in the embodiments of this application, a lightweight key scheduling algorithm is designed, and a lightweight high-performance block cipher algorithm is constructed. The round function uses a 4-bit S-box, and the linear diffusion layer is refined. The proposed round function provides sufficient confusion diffusion; four rounds can achieve full diffusion. Furthermore, the block cipher algorithm constructed based on this round function facilitates security proofs against differential and linear attacks. The algorithm has low hardware resource consumption, employing a low-latency S-box to achieve low latency. Simultaneously, the algorithm is easily implemented using SIMD instructions, exhibiting high implementation efficiency in software and supporting multiple operating platforms, demonstrating strong flexibility. The key scheduling algorithm is simple, involving only linear operations compatible with both 128 and 256 key lengths.
[0106] Figure 3 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include:
[0107] The memory 301, the processor 302, and the computer program stored on the memory 301 and capable of running on the processor 302.
[0108] When the processor 302 executes the program, it implements the high-performance block cipher construction method provided in the above embodiments.
[0109] Furthermore, electronic devices also include:
[0110] Communication interface 303 is used for communication between memory 301 and processor 302.
[0111] The memory 301 is used to store computer programs that can run on the processor 302.
[0112] The memory 301 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.
[0113] If the memory 301, processor 302, and communication interface 303 are implemented independently, then the communication interface 303, memory 301, and processor 302 can be interconnected via a bus to complete communication between them. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of representation, Figure 3 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.
[0114] Optionally, in a specific implementation, if the memory 301, processor 302, and communication interface 303 are integrated on a single chip, then the memory 301, processor 302, and communication interface 303 can communicate with each other through an internal interface.
[0115] Processor 302 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.
[0116] This embodiment also provides a computer-readable storage medium storing a computer program thereon, characterized in that the program, when executed by a processor, implements the high-performance block cipher construction method described above.
[0117] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0118] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0119] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.
[0120] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0121] Those skilled in the art will understand that all or part of the steps of the methods described in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it includes one or a combination of the steps of the method embodiments.
Claims
1. A method for constructing a high-performance block cipher, characterized in that, Includes the following steps: Encryption process: The plaintext is encrypted using a preset round function generation algorithm to obtain ciphertext. The round key in the preset round function generation algorithm is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm. The encryption of the plaintext using the preset round function generation algorithm to obtain ciphertext includes: XORing the plaintext bit by bit with the whitening key to generate the initial state of the round function, and replacing the 32 S-box units of the round function one by one using 4-bit S-boxes. The replaced round function is bit-grouped and XORed with a multi-bit constant. Then, the 32 positions of the round function, each in an S-box, are permuted to ensure that there are no impossible 9-round differential iterations based on the round function, and no 9-round valid differential paths. The permutation operation properties of the position permutation include: Replace each row; After a single positional swap, elements in the same column are moved to different columns. After two positional permutations, elements in the same column are moved to different columns; After 4 rounds of the algorithm, one active S-box input can affect all S-box units of the output, that is, full diffusion is generated after 4 rounds; The column mixing is performed by left-multiplying each column of the intermediate state matrix of the round function using a preset matrix, and then XORing the column-mixed round function bit by bit with the round key. After multiple rounds of iteration, the encrypted ciphertext of the round function is obtained. Decryption process: The ciphertext is decrypted using a decryption algorithm to obtain the plaintext.
2. The method according to claim 1, characterized in that, The decryption process is the inverse operation of the encryption process.
3. The method according to claim 1, characterized in that, The round key length is equal to the bit block length of the round function. The round key is obtained by permuting 32 positions (4-bit units) using a 128-bit key scheduling algorithm, including: The round key is generated iteratively using a position permutation function.
4. The method according to claim 3, characterized in that, Also includes: The round key in the preset round function generation algorithm is obtained by performing 4-bit substitutions and position permutations at 32 positions in 4-bit units using a 256-bit key scheduling algorithm.
5. The method according to claim 4, characterized in that, The round key length is twice the bit block length of the round function. The round key in the preset round function generation algorithm is obtained through a 256-bit key scheduling algorithm, involving 4-bit substitutions and 32 position permutations in 4-bit units. This includes: The master key is divided into two round keys using a 256-bit key scheduling algorithm, and the round keys are obtained by combining a position permutation function and a 4-bit substitution function.
6. A high-performance block cipher construction device, characterized in that, include: An encryption module is used to encrypt plaintext to obtain ciphertext using a preset round function generation algorithm. The round key in the preset round function generation algorithm is obtained by permuting 32 positions in 4-bit units using a 128-bit key scheduling algorithm. The step of encrypting plaintext to obtain ciphertext using the preset round function generation algorithm includes: XORing the plaintext into blocks bit by bit with the whitening key to generate the initial state of the round function, and replacing the 32 S-box units of the round function one by one using 4-bit S-boxes. The replaced round function is bit-grouped and XORed with a multi-bit constant. Then, the 32 positions of the round function, each in an S-box, are permuted to ensure that there are no impossible 9-round differential iterations based on the round function, and no 9-round valid differential paths. The permutation operation properties of the position permutation include: Replace each row; After a single positional swap, elements in the same column are moved to different columns. After two positional permutations, elements in the same column are moved to different columns; After 4 rounds of the algorithm, one active S-box input can affect all S-box units of the output, that is, full diffusion is generated after 4 rounds; The column mixing is performed by left-multiplying each column of the intermediate state matrix of the round function using a preset matrix, and then XORing the column-mixed round function bit by bit with the round key. After multiple rounds of iteration, the encrypted ciphertext of the round function is obtained. The decryption module is used to decrypt the ciphertext to obtain the plaintext using a decryption algorithm.
7. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the program to implement the high-performance block cipher construction method as described in any one of claims 1-5.
8. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the high-performance block cipher construction method as described in any one of claims 1-5.
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