A Cache System for Multi-channel 2711 Image Data

By designing a cache system for multi-channel 2711 image data, using row head detection and camera identification word detection, the problem of camera identification word not being detected in the image data cache system is solved, and the correct update of image data and normal recovery of multi-spectral transmission is achieved.

CN116320237BActive Publication Date: 2025-04-25CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202310297278.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-03-24
Publication Date
2025-04-25
Estimated Expiration
2043-03-24

AI Technical Summary

Technical Problem

The existing image data cache system may not detect it when detecting camera identifiers representing the beginning of a row of data, resulting in the problem that the image data does not update the output.

Method used

A multi-channel 2711 image data cache system is designed, including receiving 2711 groups, row head detection module, cross-clock domain FIFO, full color FIFO, multi-spectral FIFO, image data analysis module and image data transmission control module. By detecting the line header flag and camera identification words, the position of the starting valid data is determined, and the first segment identification is detected during the write operation, avoiding the situation of false detection and continuous writing of auxiliary data.

Benefits of technology

It effectively avoids the error detection of the same content in the image data, ensures the correct update output of the image data, and avoids the continuous writing of auxiliary data during multi-spectral transmission, ensuring the normal recovery of the image data.

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Abstract

A multi-channel 2711 image data cache system relates to an image data cache method, which solves the problem that the camera identification word representing the start of a line of data cannot be detected at a specified position in the existing image data cache, and the image data is not updated and output. The cache system includes multiple groups of receiving 2711 groups, multiple groups of line head detection modules, multiple groups of cross-clock domain FIFOs, multiple groups of full-color FIFOs, multiple groups of multi-spectral FIFOs, image data parsing modules, and image data sending control modules; the image data cache is started after each line head is detected, and in the process of detecting the camera identification word, if the first spectrum segment of the multi-spectrum is detected and the write operation stage has not yet been entered, the write operation of the first spectrum segment is started; and if the first spectrum segment identification is detected during the write operation, this operation is ignored. At the same time, the highest application line frequency in different working modes is estimated according to the storage cache amount.
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Description

Technical Field

[0001] The present invention relates to a cache method for image data, and in particular to a cache system for multi-channel 2711 image data. Background Art

[0002] For multi-channel 2711 images, it is necessary to process the images of several channels as one processing unit and then output them in the form of a single-channel 2711. Each 2711 channel image contains full-color image and multi-spectral image data, which need to be split and output as independent full-color image and multi-spectral image. In order to reduce the image buffering amount of the processing unit, FIFO is used to continuously buffer the data of each channel, and the image data of each channel is read according to the set buffering threshold. Since the input full-color and multi-spectral image data share the image auxiliary data, the image data of the multi-spectral channel only uses the auxiliary data corresponding to the first spectrum segment. In the process of caching image data, if the multi-spectral image continuously detects the auxiliary data corresponding to the first spectrum segment, or the length of the cached image data is incorrect, it may happen that the digital transmission fails to detect the camera identification word representing the start of a line of data at the specified position and the image data is not updated and output. Summary of the invention

[0003] The present invention provides a multi-channel 2711 image data caching system to solve the problem that a camera identification word representing the start of a row of data cannot be detected at a specified position and the image data is not updated and output.

[0004] A multi-channel 2711 image data cache system, the cache system includes multiple groups of receiving 2711 groups, multiple groups of line head detection modules, multiple groups of cross-clock domain FIFOs, multiple groups of full-color FIFOs, multiple groups of multi-spectral FIFOs, image data parsing modules and image data sending control modules;

[0005] Each group receives 2711 groups of output companion clocks, low-order masks, high-order masks and parallel data, and sends them to the line head detection module; the line head detection module detects the low-order mask, high-order mask and parallel data based on the companion clock, and when the specified high and low levels and code values ​​are met, it combines the working mode signal to generate a FIFO write enable signal of a specified length, and at the same time sends the parallel data after the line head is detected to the cross-clock domain FIFO;

[0006] The image data parsing module starts the read operation of the cross-clock domain FIFO after detecting that the cross-clock domain FIFO is empty according to the working mode signal; then performs bit width conversion on the parallel data, takes the global clock CLK2 as the synchronization clock, and writes the parsed full-color image data and multi-spectral data into the full-color FIFO and the multi-spectral FIFO respectively;

[0007] The image data transmission control module uses the global clock CLK1 as the synchronous clock, and reads out the data in each FIFO in turn according to the working mode signal, the status signal of the full-color FIFO and the multi-spectral FIFO, and finally sends 2711 groups of outputs.

[0008] Beneficial effects of the present invention: With the cache system described in the present invention, the cache of image data is started each time after the line head is detected. In the process of detecting the camera identification word, if the first spectrum segment of the multi-spectral is detected and the write operation stage has not yet been entered, the write operation of the first spectrum segment is started; and if the first spectrum segment identification is detected during the write operation, this operation is ignored. At the same time, the highest application line frequency in different working modes is estimated according to the storage cache amount. It has the following specific advantages:

[0009] 1. By detecting the line header mark and camera identification word, the position of the starting valid data is determined to avoid the situation where the image data has the same content and causes false detection.

[0010] 2. By judging the previous state, avoid writing auxiliary data twice in succession when transmitting multi-spectral data;

[0011] 3. After each set of multispectral images is written, the new first spectrum segment is re-detected to ensure that if an abnormality occurs on track, there is only one row and subsequent images can return to normal. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a structural diagram of the cache system for multi-channel 2711 image data described in the present invention. DETAILED DESCRIPTION

[0013] Combination Figure 1 To illustrate this embodiment, the system structure of the cache system for multi-channel 2711 image data is as follows: Figure 1 As shown, it includes receiving 2711 groups 1 to receiving 2711 groups 3, line head detection modules 1 to line head detection module groups 3, cross-clock domain FIFO1 to cross-clock domain FIFO3, image data parsing module, full-color FIFO1 to full-color FIFO3, multi-spectral FIFO1 to multi-spectral FIFO3, image data sending control module and sending 2711 groups.

[0014] Taking the first group as an example, the receiving 2711 group 1 outputs the accompanying clock, the low-order mask, the high-order mask and the parallel data, and sends them to the head of line detection module 1. The head of line detection module 1 detects the low-order mask LSB1, the high-order mask MSB1 and the parallel data DATA1 based on the accompanying clock CLK1. When the specified high and low levels and code values ​​are met, the FIFO write enable signal of the specified length is generated in combination with the working mode signal, and the parallel data DATA1 after the head of line is detected is sent to the cross-clock domain FIFO1.

[0015] The image data parsing module starts the read operation of the cross-clock domain FIFO1 after detecting that the cross-clock domain FIFO1 is empty according to the content of the working mode signal; then, after the bit width of the parallel data is converted, the parsed full-color image data and multi-spectral data are written into the full-color FIFO1 and multi-spectral FIFO1 respectively using the global clock CLK2 as the synchronization clock.

[0016] The image data transmission control module uses the global clock CLK1 as the synchronous clock, reads out the data in each FIFO in turn according to the working mode signal and the FIFO status signals of the full-color FIFO1 and the multi-spectrum FIFO1, and outputs them through 2711 groups.

[0017] In this embodiment, the working mode signals include four types: (1) only outputting full-color image data, the full-color pixel size is aμm, and the effective data length is 4l; (2) simultaneously outputting full-color and multi-spectral image data, the full-color pixel size is aμm, and the effective data length is 4l; the multi-spectral pixel size is 4aμm, and the effective data length of a single spectrum segment is l; (3) only outputting full-color image data, the full-color pixel size is 2aμm, and the effective data length is 2l; (4) simultaneously outputting full-color and multi-spectral image data, the full-color pixel size is 2aμm, and the effective data length is 2l; the multi-spectral pixel size is 4aμm, and the effective data length of a single spectrum segment is l.

[0018] In this embodiment, the line head detection module is controlled by a state machine, and the state machine includes a state of waiting for line head detection and a state of detecting line head. When in the state of waiting for line head detection, it is detected that the low-order mask LSB and the high-order mask MSB are both high level, and the parallel data DATA is a specified line head such as 5CFB, then the line head detection state is entered; in the state of detecting the line head, the line head detection is not performed, as long as the count length reaches the length of valid data, it returns to the state of waiting for line head detection. In the state of detecting the line head, the FIFO write enable signal is set to a valid high level. In working mode (3), the duration of the valid high level of the FIFO write enable signal is 2aμm, which is the full-color image data length (2l+m), where m is the length of the auxiliary data; in working mode (4), the duration of the valid high level of the FIFO write enable signal is 2aμm, which is the full-color + two-band 4aμm multi-spectral image data length (4l+m); in the same state of working mode (1) and working mode (2), the duration of the valid high level of the FIFO write enable signal is aμm, which is the full-color image data length 4l+m, and the effective data length of the full-color image is 4l.

[0019] In this embodiment, the read operation of the cross-clock domain FIFO is delayed after the falling edge of the empty state signal of the cross-clock domain FIFO is detected, and the number of delayed clocks is greater than 1 clock. In working mode (3), the duration of the effective high level of the FIFO read enable signal is 2aμm full-color image data length (2l+m); in working mode (4), the duration of the effective high level of the FIFO read enable signal is 2aμm full-color + two-spectral 4aμm multi-spectral image data length (4l+m); 2l is the length of the full-color image effective data, and the other 2l is the length of the multi-spectral image effective data of the two spectral segments; in the same state of working mode (1) and working mode (2), the duration of the effective high level of the FIFO read enable signal is aμm full-color image data length (4l+m). The reset operation of the cross-clock domain FIFO is sufficient after at least one clock after the read operation is completed.

[0020] In this implementation, the image data parsing module detects the camera identification word for the first three data read out of each row of the cross-clock domain FIFO. If the detection result is not equal to the camera identification word, the read operation is invalid. If the highest bit of the detected identification word is 1, such as the detected identification word is 80B180E280FB, it is considered that this row contains image data of the first spectrum segment of the multi-spectrum. If the highest bit of the detected identification word is 0, such as the detected identification word is 00B100E200FB, it is considered that this row does not contain image data of the first spectrum segment of the multi-spectrum.

[0021] For full-color FIFO1 to full-color FIFO3, as long as the first three data read out of each row of the cross-clock domain FIFO are camera identification words, the read data is converted from 12bit to 16bit, and then the global clock CLK2 is used as the synchronization clock to write the converted data into full-color FIFO1 to full-color FIFO3 respectively. In working mode (3) and working mode (4), the duration of the high level of the full-color FIFO write enable signal is 3 / 4 of the length of the auxiliary data plus 2aμm full-color image data, that is, (3l / 2+m); in working mode (1) and working mode (2), the duration of the high level of the full-color FIFO write enable signal is 3 / 4 of the length of the auxiliary data plus aμm full-color image data, that is, (3l+m).

[0022] For multi-spectral FIFO1~multi-spectral FIFO3, if the working mode is to output only the image data of the full spectral segment, multi-spectral FIFO1~multi-spectral FIFO3 will not perform a write operation; if the working mode is to output the image data of all spectral segments, the global clock CLK2 is used as the synchronization clock, and the multi-spectral image data is converted into 16-bit data before a write operation is performed.

[0023] The duration of the high level of the multi-spectral FIFO write enable signal is valid. For working mode (4), the first spectrum segment is the auxiliary data plus 3 / 4 of the length of the two-spectral multi-spectral image data, that is, (3l / 2+m); the remaining spectrum segments are 3 / 4 of the length of the two-spectral multi-spectral image data, that is, 3l / 2. For working mode (2), the first spectrum segment is the auxiliary data plus 3 / 4 of the length of the multi-spectral image data, that is, (3l / 4+m); the remaining spectrum segments are 3 / 4 of the length of the multi-spectral image data, that is, 3l / 4.

[0024] For multi-spectral FIFO1 to multi-spectral FIFO3, if the highest bit of the detected identification word is 1, such as the detected identification word is 80B180E280FB, it is considered that this row contains the image data of the first spectrum segment of the multi-spectrum. If the write operation of the last spectrum segment of the multi-spectrum has been completed at this time (the multi-spectral write operation status is marked as low), the multi-spectral write operation status identification signal is set to a high level, and the auxiliary data write operation and the image data write operation are started; if the write operation of the last spectrum segment of the multi-spectrum has not been completed at this time (the multi-spectral write operation status is marked as high), it is considered that the identification word state is incorrect, and only the image data write operation is performed according to the image data of the non-first spectrum segment of the multi-spectrum. If the highest bit of the detected identification word is 0, such as the detected identification word is 00B100E200FB, it is considered that this row does not contain the image data of the first spectrum segment of the multi-spectrum, and only the image data write operation is performed.

[0025] In this implementation, the image data sending control module uses the global clock CLK1 as the synchronous clock, reads out the data in each FIFO in turn according to the working mode signal and the FIFO status signals of the full-color FIFO1~full-color FIFO3 and the multi-spectrum FIFO1~multi-spectrum FIFO3, and outputs them through sending 2711 groups.

[0026] In working mode (3), the data length qs_lenth_7um after RS ​​(239, 255) encoding is required to be greater than or equal to 255 (3l / 2 + m) / 239, and an integer multiple of 255; the minimum line return time is not less than 300 clocks. Then the time length of 3-channel transmission is 3 (qs_lenth_7um + 300) / 100us, and the corresponding line frequency is 100 / 3 / (qs_lenth_7um + 300). When qs_lenth_7um is 3315, the time length of 3-channel transmission is 108.45us, and the corresponding line frequency is 9.22kHz.

[0027] In working mode (4), the data length qs_lenth_7um of the full-color image after being encoded by RS(239,255) is required to be greater than or equal to 255(3l / 2+m) / 239, and is an integer multiple of 255; the minimum line-reverse time is not less than 300 clocks; the data length mul_lenth of the multispectral image after being encoded by RS(255,239) is required to be greater than or equal to 255((3l / 4+m) / 239, and is an integer multiple of 255; the minimum line-reverse time is not less than 300 clocks. Two lines of full-color image Corresponding to a line of multispectral image. The time length for 3 channels to transmit 2 lines is 3(2qs_lenth_7um+900+mul_lenth) / 100us, and the corresponding line frequency is 100 / 3 / (2qs_lenth_7um+900+mul_lenth). When qs_lenth_7um is 3315 and mul_lenth is 6630, the time length for 3 channels to transmit 2 lines is 424.8us, and the corresponding line frequency is 2.35kHz, while the line frequency for a single line is 4.7kHz.

[0028] In working mode (1), the data length qs_lenth_3.5um after RS ​​(255, 239) encoding is required to be greater than or equal to 255 (3l / 4 + m) / 239, and an integer multiple of 255; the minimum line return time is not less than 300 clocks. Then the time length of 3-channel transmission is 3 (qs_lenth_3.5um + 300) / 100us, and the corresponding line frequency is 100 / 3 / (qs_lenth_3.5um + 300). When qs_lenth_3.5um is 6630, the time length of 3-channel transmission is 207.9us, and the corresponding line frequency is 4.81kHz.

[0029] In working mode (2), the data length qs_lenth_3.5um of the full-color image after RS ​​(239, 255) encoding is required to be greater than or equal to 255 ((3l / 4+m) / 239, and an integer multiple of 255; the minimum line-reverse time is not less than 300 clocks; the data length mul_lenth of the multispectral image after RS ​​(255, 239) encoding is required to be greater than or equal to 255 ((3l / 4+m) / 239, and an integer multiple of 255; the minimum line-reverse time is not less than 300 clocks. Four lines of full-color image correspond to one line Multispectral image. The time length for 3 channels to transmit 2 lines is 3(4qs_lenth_3.5um+1500+mul_lenth) / 100us, and the corresponding line frequency is 100 / 3 / (4qs_lenth_3.5um+1500+mul_lenth). When qs_lenth_3.5um is 6630 and mul_lenth is 6630, the time length for 3 channels to transmit 4 lines is 1,039.5us, and the corresponding line frequency is 0.962kHz, while the line frequency of a single line is 3.848kHz.

[0030] In this implementation, receiving group 2711 1 to receiving group 2711 3 use the American TLK2711 chip; line head detection module 1 to line head detection module group 3, cross-clock domain FIFO1 to cross-clock domain FIFO3, image data analysis module, full-color FIFO1 to full-color FIFO3, multi-spectral FIFO1 to multi-spectral FIFO3, and image data sending control module use Virtex 5 series FPGA; sending group 2711 uses the American TLK2711 chip.

Claims

1. A multi-channel 2711 image data cache system, characterized by: The cache system includes multiple groups of receiving 2711 groups, multiple groups of line head detection modules, multiple groups of cross-clock domain FIFOs, multiple groups of full-color FIFOs, multiple groups of multi-spectral FIFOs, image data parsing modules and image data sending control modules; multiple groups of receiving 2711 groups use TLK2711 chips; Each group receives 2711 groups of output companion clocks, low-order masks, high-order masks and parallel data, and sends them to the line head detection module; the line head detection module detects the low-order mask, high-order mask and parallel data based on the companion clock, and when the specified high and low levels and code values ​​are met, it combines the working mode signal to generate a FIFO write enable signal of a specified length, and at the same time sends the parallel data after the line head is detected to the cross-clock domain FIFO; The image data parsing module starts the read operation of the cross-clock domain FIFO after detecting that the cross-clock domain FIFO is empty according to the working mode signal; then performs bit width conversion on the parallel data, takes the global clock CLK2 as the synchronization clock, and writes the parsed full-color image data and multi-spectral data into the full-color FIFO and the multi-spectral FIFO respectively; The image data transmission control module uses the global clock CLK1 as the synchronization clock, and reads out the data in each FIFO in turn according to the working mode signal, the status signal of the full-color FIFO and the multi-spectral FIFO, and finally sends 2711 groups of outputs; The working mode signal includes four working modes: The first working mode: only output full-color image data, the full-color pixel size is a μm, and the effective data length is 4 l ; The second working mode: output full-color and multi-spectral image data at the same time, the pixel size of full-color is a μm, and the effective data length is 4 l ; The pixel size of the multispectral is 4a μm, and the effective data length of a single spectrum segment is l ; The third working mode: only output full-color image data, the full-color pixel size is 2a μm, and the effective data length is 2 l ; The fourth working mode: output full-color image data and multi-spectral image data at the same time, the pixel size of full-color is 2a μm, and the effective data length is 2 l ; The pixel size of the multispectral is 4a μm, and the effective data length of a single spectrum segment is l ; The image data analysis module detects the camera identification word of the first three data read out of each row of the cross-clock domain FIFO. If the detection result is not equal to the camera identification word, the read operation is invalid; if the highest bit of the detected identification word is 1, this row includes image data of the first spectral band of the multi-spectrum; if the highest bit of the detected identification word is 0, this row does not include image data of the first spectral band of the multi-spectrum.

2. The multi-channel 2711 image data caching system according to claim 1, characterized in that: Each group of line head detection modules is controlled by a state machine, which includes a state of waiting for line head detection and a state of detecting line head; When in the state of waiting for line head detection, if the low-order mask LSB and the high-order mask MSB are detected to be high at the same time, the state of detecting the line head is entered; in the state of detecting the line head, the line head detection is not performed, and when the count length reaches the length of valid data, the state of waiting for line head detection is returned; When the head of line is detected, the FIFO write enable signal is set to a valid high level. In the third working mode, the duration of the FIFO write enable signal being a valid high level is 2 l +m; full-color image data length is 2 l , where m is the length of the auxiliary data; In the fourth working mode, the duration of the FIFO write enable signal being a valid high level is 4 l +m, where 2 l is the length of the full-color image valid data, and the other 2 l is the effective data length of the multispectral image of two spectral bands; The states in the first and second working modes are the same, and the duration of the FIFO write enable signal being a valid high level is 4 l +m, effective data length of full-color image 4 l .

3. The multi-channel 2711 image data caching system according to claim 1, characterized in that: The read operation of each group of cross-clock domain FIFOs is delayed and started after the falling edge of the status signal that the cross-clock domain FIFO is empty is detected, and the number of delayed clocks is greater than 1 clock; In the third working mode, the duration of the FIFO read enable signal being a valid high level is 2 l +m, where 2 l is the effective data length of the full-color image, and m is the auxiliary data length; In the fourth operating mode, the duration of the FIFO read enable signal being a valid high level is 4 l +m, where 2 l is the length of the full-color image valid data, and the other 2 l The two spectral bands are the effective data length of the multispectral image; The states in the first and second working modes are the same. The duration of the FIFO read enable signal being a valid high level is 4 l +m; The reset operation of each group of cross-clock domain FIFOs takes at least one clock after the read operation ends.

4. The multi-channel 2711 image data caching system according to claim 1, characterized in that: For each group of full-color FIFO, as long as the first three data read out of each row of the cross-clock domain FIFO are camera identification words, the read data is converted from 12 bits to 16 bits, and then the global clock CLK2 is used as the synchronization clock to write the converted data into the full-color FIFO respectively; In the third and fourth working modes, the duration of the high level of the full-color FIFO write enable signal is valid for the full-color image valid data length 2 l 3 / 4 plus auxiliary data length m; In the first and second working modes, the duration of the high level of the full-color FIFO write enable signal is effective for a μm full-color image data length 4 l 3 / 4 plus auxiliary data length m; For each group of multi-spectral FIFO, if it works in the first or third working mode, the multi-spectral FIFO does not perform a write operation; if the working mode is the second working mode or the fourth working mode, the image data of all spectral bands is output, and the global clock CLK2 is used as the synchronization clock to convert the multi-spectral image data into 16-bit data before the write operation; The duration of the high level of the multi-spectral FIFO write enable signal is valid. For the fourth working mode, the multi-spectral image data of four spectral bands is transmitted twice, each time corresponding to two spectral bands; the first time is 3 / 4 of the length of the multi-spectral image data of two spectral bands plus the length of the auxiliary data; the second time is 3 / 4 of the length of the multi-spectral image data of two spectral bands; For the second working mode, the multispectral image data of four spectral bands is transmitted four times, each time corresponding to one spectral band; the first time is 3 / 4 of the length of the multispectral image data plus the length of the auxiliary data; the remaining times are 3 / 4 of the length of the multispectral image data.

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