Power supply device and method for checking a field effect transistor of such a power supply device

Abstract

The present invention provides a method for inspecting at least one field-effect transistor (11) connected as an active diode, the field-effect transistor (11) being connected downstream of the output terminal of a power supply unit (1) within a power supply device. The method comprises the following steps: - generating a partially turned-on, particularly turned-off, state of the at least one field-effect transistor (11); - detecting a first value of a voltage drop (ΔU) on the switching path of the at least one field-effect transistor (11) at a set first voltage of the power supply unit (1); - setting a second voltage of the power supply unit (1); - detecting a second value of a voltage drop (ΔU) on the switching path of the at least one field-effect transistor (11) at the set second voltage of the power supply unit (1); - if both the first value of the voltage drop (ΔU) and the second value of the voltage drop (ΔU) are respectively less than a predetermined positive first threshold (U1) in absolute value, or if the first value of the voltage drop (ΔU) and / or the second value of the voltage drop (ΔU) are greater than a predetermined positive second threshold (U1). n If the second threshold is greater than the first threshold, then the at least one field-effect transistor (11) is confirmed to be faulty and a signal is issued. The present invention also relates to a power supply device with a power supply unit (1), wherein at least one field-effect transistor (11) connected as an active diode is connected downstream of the power supply unit.

Description

Technical Field

[0001] This invention relates to a power supply device with a power supply unit, wherein at least one field-effect transistor connected as an active diode is connected downstream of the power supply unit. The invention also relates to a method for inspecting at least one field-effect transistor connected as an active diode in the power supply device. Background Technology

[0002] To prevent backflow current in the power supply, a diode is typically connected in series with the load. This diode is particularly important when two or more power supplies are connected in parallel with their outputs to power the load. In practice, when a higher current than a single available power supply can provide is required, the load is often powered by power supplies connected in parallel. Another reason could be the desired redundancy in power supply, through which the load can operate safely even if one of the power supplies fails.

[0003] The diode is typically already integrated within the power supply unit. The diode is then connected downstream of the actual power supply unit that establishes the output voltage and provides the output current. Due to its described function—that this and / or another power supply unit can supply power to the load in parallel—the diode is also known as an "ORing diode."

[0004] Because these ORing diodes are in the power path of the load, they carry all the current supplied by the power supply. When the voltage drop in the forward direction of a silicon diode is approximately 0.7 volts (V), this results in a non-negligible power loss in power supplies with higher output currents of several amperes or tens of amperes (A).

[0005] To reduce these power losses, it is known to replace passive silicon diodes with one or more connected field-effect transistors (FETs) equipped with additional drive circuitry, which in turn depends on the magnitude of the voltage applied to the output terminal of the power supply unit relative to the set output voltage of the power supply unit. When using suitable FETs, particularly MOSFETs (metal-oxide-semiconductor FETs), contact resistance in the milliohm range can be achieved in the on-state, thereby reducing the voltage drop to a few millivolts (mV) or tens of mV and correspondingly reducing power losses, while simultaneously providing the function of a diode when properly driven.

[0006] Especially in power supply configurations intended for redundant use, it is desirable and meaningful to check the proper functioning of field-effect transistors (FETs) to ensure power supply redundancy. When power supply units are no longer decoupled from each other, for example through continuously conducting FETs, the failure of one power supply unit can also impede the others.

[0007] Document US 7,038,433 B2 describes a driving circuit for a field-effect transistor (FET) used as an active diode. In addition to driving the FET to achieve active diode function, the circuit includes a test circuit that issues a warning signal when the voltage on the FET's switching path drops below a predetermined value, even when the FET is off. An excessively small voltage drop is considered an indication that the transistor's switching path has melted and has a permanently low resistance.

[0008] The described method provides reliable results for independently operating power supplies. However, when at least two power supplies connected together at the output side are operating in parallel, the measured voltage drop, which is below the threshold, is due to the fact that the voltages supplied by the two power supplies are coordinated in magnitude to the point that the voltage drop cannot be measured. In this case, it would be incorrect to conclude that the ORing FET is faulty. Summary of the Invention

[0009] Therefore, an object of the present invention is to provide a test method for such an ORing FET that provides reliable test results and eliminates the possibility of identifying a correctly functioning field-effect transistor as faulty. Another object is to provide a power supply device configured to perform this test method.

[0010] This objective is achieved by a test method or power supply device that incorporates the features of the corresponding independent claim. Advantageous and extended solutions are the subject of the dependent claims.

[0011] According to the invention, a method for inspecting at least one field-effect transistor (FET) connected as an active diode, the FET being connected downstream of the output terminal of a power supply unit within a power supply device, comprises the following steps: setting the transistor to a state that is not fully on, particularly off, and measuring a first value of the voltage drop across the switching path of the FET at a first voltage set in the power supply unit. Immediately following, setting a second voltage in the power supply unit deviating from the first voltage, and measuring a second value of the voltage drop across the switching path of the FET at this second voltage. If both the first and second voltage drops are less than a predetermined positive first threshold in their absolute values, or if the first and / or second voltage drops are greater than a predetermined positive second threshold, wherein the second threshold is greater than the first threshold, then a fault in the FET is confirmed and a signal is issued accordingly.

[0012] If the voltage drop is between the first and second threshold values, this indicates that the load current has switched from the switching path to the body diode. The body diode is the intrinsic diode of the field-effect transistor connected in parallel with the switching path. In the forward direction of the body diode, it receives current even when the field-effect transistor is not conducting. Switching transistors, typically used as active diodes, are arranged in power supply devices in such a way that the body diode has ORing functionality, but subsequently has a voltage drop typically found in silicon diodes, such as about 0.7V, rather than the advantageously smaller voltage drop achievable with a conducting field-effect transistor.

[0013] Even when referring to a single field-effect transistor within the scope of this application, this refers to a structure of multiple synchronously driven transistors. In terms of their switching paths, parallel-connected field-effect transistors can be used to achieve higher current-carrying capacity. In terms of their switching paths, series-connected field-effect transistors can be used to achieve safer switching characteristics.

[0014] Instead of an intrinsic body diode, or in addition to an intrinsic body diode, a diode with the relative field-effect transistor arranged externally, particularly a Schottky diode, can also be used. The method according to the invention can also be used, if necessary, to examine a structure with a field-effect transistor that does not have an intrinsic diode and is not equipped with an external diode, by utilizing a matched threshold size.

[0015] The threshold value can be determined, for example, to be 0.3V or 2V, particularly for examining structures with intrinsic diodes or external diodes connected in parallel with the field-effect transistor. If the second-mentioned condition is met in one of the two measurements, it means that the field-effect transistor is off as expected, but its body diode is not conducting. This is a rare but possible fault condition detected in this way. In an advantageous embodiment of the method, the first threshold value is approximately 0.3V. Further advantageously, the second threshold value is at least approximately 1.5V, and particularly approximately 2V.

[0016] If the voltage drop does not exceed the first threshold in the first measurement, this may be due to a short circuit in the switching path of the field-effect transistor (FET). However, the current may also not have been switched to the body diode because the voltage at the output is maintained externally, for example, through another power supply connected in parallel. However, changing the nominal voltage before the second voltage drop measurement will result in a different output voltage from the power supply involved. If the FET is subsequently correctly turned off and the load current has been switched to the body diode, this will manifest as a correspondingly larger voltage difference. However, if a voltage drop above the first threshold is also not measured in this second measurement, a faulty FET can be identified and signaled according to the invention.

[0017] The power supply unit of the power supply device according to the present invention can be, for example, an alternating current (AC) / direct current (DC) converter, also often referred to as a power adapter. Within the scope of this application, the term power supply unit also includes, but is not limited to, DC / DC converters and batteries and buffer modules for uninterrupted power supply.

[0018] In an advantageous embodiment of the method, the second voltage is approximately 1V higher than the first voltage. This fixed change in the nominal voltage of the power supply unit is technically simple to implement and is generally sufficient to make a conclusion after measuring the second value of the voltage drop, namely whether the measured first value of the voltage drop is below the first threshold solely due to an externally applied voltage or actually due to a failure of the field-effect transistor.

[0019] In one alternative variation of the method, the second voltage is approximately a second threshold greater than the voltage measured at the output terminal of the power supply device. Under these measurement conditions, the correct transfer of current to the intrinsic diode or an external parallel diode can be detected with particular reliability.

[0020] In another advantageous approach, the measurements and evaluations of the two voltage drops are repeatedly performed to reliably detect potential transistor failures. It can be specified that a fault signal for the at least one field-effect transistor is issued only after a predetermined number of repetitions, for example, until a failure is confirmed after three or more repetitions. This achieves high determinism in fault detection.

[0021] Preferably, a waiting time is provided between two consecutive repetitions of the method, and this waiting time is particularly significant because its length includes a random component. This random component can be calculated, for example, by means of a unique identifier of the power supply, particularly a serial number.

[0022] The random component prevents the assumed detection of a field-effect transistor failure in the case of at least two identical power supplies connected in parallel on the output side, because the two power supplies implement the aforementioned method and correspondingly change their nominal voltages precisely and synchronously while running this method to measure the second voltage drop. This is not impossible if two identical power supplies are redundantly connected together on the output side but also on the input side and apply the input voltage at the same time, i.e., simultaneously turned on. With the simultaneous startup of the power supplies, the method according to this application also operates synchronously from the outset. The random component prevents the power supplies from performing their measurements with the same time structure during repeated measurements.

[0023] The power supply device according to the invention of the type described at the beginning of this document is characterized by a control unit configured to perform the aforementioned method. This achieves the advantages described in conjunction with the method. The control unit implementing the method may herein be part of the control device of the power supply unit.

[0024] The at least one field-effect transistor is part of the ORing module, wherein the power supply unit and the ORing module may be arranged in a separate housing or in a common housing. Attached Figure Description

[0025] The invention will now be explained in more detail with reference to the embodiments and accompanying drawings. In the drawings:

[0026] Figure 1 It is a schematic block diagram of the power supply device;

[0027] Figure 2 This is a flowchart of a first embodiment of a test method for inspecting ORing field-effect transistors; and

[0028] Figure 3 This is a flowchart of a second embodiment of a monitoring method for ORing field-effect transistors. Detailed Implementation

[0029] Figure 1 The block diagram shows a power supply unit, which includes a power supply unit 1 and a so-called ORing module 10. It should be noted that the two units, namely the power supply unit 1 and the ORing module 10, can be arranged either integrated within a single housing of the power supply unit or in separate housings.

[0030] Power supply unit 1 converts the input voltage into an output voltage, wherein the input voltage, depending on the model, can be DC voltage and / or AC voltage. The AC voltage of the mains lighting grid is often used as the input voltage. In this case, power supply unit 1 is also referred to as a power adapter. The output DC voltage, normally adjusted to a predetermined value, i.e., the so-called nominal voltage, is set as the output voltage. During normal operation of power supply unit 1, the output voltage deviates significantly from the nominal voltage only when the output current of the power supply unit exceeds its maximum value.

[0031] The power supply unit has an input connector 2, which is also the input terminal of the power supply unit 1 and through which the input current for the power supply unit 1 is supplied. In the current example, there are two input connectors 2 because the power supply unit 1 is supplied with, for example, single-phase AC power on the input side. The number of input connectors 2 may also be more than two, for example, when the power supply unit is connected to a three-phase AC power grid.

[0032] The output voltage of power supply unit 1 is available at the two-pole output terminal 3. The power supply device has an output connector 4, on which a load powered by power supply unit 1 can be connected.

[0033] An ORing module 10 is connected between the power supply unit 1 and the output terminal 4, i.e., the load. This ORing module 10 has a field-effect transistor 11, hereinafter referred to as FET 11, through which the entire load current flows in the switching path of the field-effect transistor (i.e., between the source terminal S and the drain terminal D). In the illustrated embodiment, FET 11 is an N-channel enhancement-mode transistor, which is off without drive control. In principle, other types of field-effect transistors or combinations of one or more field-effect transistors can also be used.

[0034] In the example shown, the negative output terminal of power supply unit 1 is directly connected to the negative output terminal 4 of the power supply device, while the positive output terminal 3 is led to the positive output terminal 4 of the power supply device via FET 11. In an alternative embodiment, the positive output terminal 4 can be directly connected to power supply unit 1, while the negative output terminal 4 is connected to power supply unit 1 via a field-effect transistor. In this case, a threshold with a matching size may be necessary.

[0035] The ORing module 10 has a control unit 12, which controls the FET 11 via the gate input G of the FET. To ensure the ORing function of the ORing module 10, the control unit 12 compares the voltage at the output terminal 4 with the voltage at the output terminal 3 of the power supply unit 1. These voltages... Figure 1 China as U i and U o As shown. Voltage U i This represents the output voltage of power supply unit 1 and is therefore the input voltage used for the ORing module. Voltage U o This is the voltage applied to output connector 4. If voltage U o It becomes greater than the voltage U i Therefore, control unit 12 shuts down FET 11 to prevent current from flowing back from output connector 4 to power supply unit 1. The corresponding measurement lines leading to control unit 12 are not shown in the figure for the sake of simplicity.

[0036] In the circuit symbol of FET 11, a diode is drawn between the source terminal S and the drain terminal D of FET 11. This diode is also called a body diode and is intrinsic in a field-effect transistor. The diode is oriented such that FET 11 also has ORing functionality without driving its gate terminal G, but subsequently has the typical voltage drop of about 0.7 volts for a silicon diode, and does not have the advantageous smaller voltage drop that can be achieved with a conducting FET 11.

[0037] In addition to the gate of the drive FET 11, the control unit 12 in the illustrated embodiment also has a control connector 13, which is connected to the power supply unit 1 and through which the output voltage U of the power supply unit 1 can be changed. i These functions are used within the scope of the test methods described below. Alternatively, it is conceivable that the control unit 12, located in the ORing module 10, drives the FET 11 for the ORing function, wherein the control connector 13 allows the switching state of the FET 11 to be influenced independently within the scope of the test methods described below. It should be noted that, especially when the ORing module 10 is integrated with the power supply unit 1, the functions of the control unit 12 can also be wholly or partially assumed by the control unit of the power supply unit 1.

[0038] exist Figure 2 The diagram illustrates one embodiment of a method for checking the functionality of a field-effect transistor used as an active diode in an ORing module, presented in flowchart form. The method can be used, for example, in... Figure 1 Performed in the power supply device, and for example by according to Figure 1 The structure is explained using the reference numerals given therein.

[0039] Assuming that the power supply unit 1 is operating normally when the method is executed, and that a preset voltage, i.e., the nominal voltage, is provided at its output terminal 3 as voltage U. i The method is not based on any other prerequisites. The power supply to be checked can operate under no-load conditions, or operate alone or in parallel with at least one other power supply. If the power supply actively participates in supplying current to the load, then the FET 11 of the ORing module 10 is electrically driven by the control unit 12 via the gate junction G. In an alternative to the method, this can also be queried in advance by appropriate measurements.

[0040] In the first step S1 of the method, FET 11 is placed in the off state, for example, by no longer being driven by the gate connector G by the control unit 12. This can be achieved directly by the corresponding drive logic within the control unit 12. If the power supply is operating in parallel connection, the off state of FET 11 can also be achieved by dropping the nominal voltage of power supply unit 1, for example, by 1 volt or a few volts. The ORing module 10 thus recognizes an operating condition in which the field-effect transistor 11 is turned off to avoid backflow current. In this case, the control unit 12 turns off FET 11 through its ORing function. In the subsequent step S2, the voltage drop ΔU = U on the switching path (source-drain path) of FET 11 is determined. i -U o For example, by a single voltage U i and U o The measurement is ΔU, which is then referred to as the voltage difference or voltage drop.

[0041] The next step, S3, checks whether the absolute value of the measured voltage difference ΔU, |ΔU|, is greater than or equal to a positive first threshold U1 in the range of approximately 0.3 volts. If so, turning off FET 11 will cause the load current to now flow through the body diode of FET 11, which is associated with the corresponding voltage drop, or the body diode will prevent current from flowing into power supply unit 1. This indicates that the original switching path of FET 11 is functioning correctly and, in particular, does not indicate any short-circuit behavior that would occur after FET 11 melts (also known as alloying).

[0042] If the absolute value |ΔU| >= U1 is detected, the method then branches to step S4, in which it is shown that FET 11 is operating well. The method then continues to step S9, in which the field-effect transistor 11 is turned on again, and thus its switching path accordingly carries the load current with low loss.

[0043] If, in step S3, it is confirmed that the measured voltage difference ΔU is less than a predetermined first threshold U1 in absolute value, then a conclusion regarding the correct functioning of FET 11 cannot be made initially. According to the invention, in the subsequent step S5, in this case, the nominal voltage of power supply unit 1 and the output voltage U of that power supply unit are... i For example, by controlling output terminal 13, a specific quantity is changed and, in particular, increased, such as 1 volt.

[0044] If necessary, power supply unit 1 requires this waiting time after the initial waiting period in order to correctly provide the required, modified output voltage U. iIn step S6, the measurement from step S2 is repeated, i.e., the voltage difference ΔU on the switching path of FET 11 is determined again. Then, it is checked again whether this voltage difference is greater than a predetermined positive first threshold U1. If so, the method branches back to step S4 to signal that FET 11 is functioning correctly.

[0045] The background is that the difference in measurement results in steps S2 and S6 indicates that no current transfer to the body diode occurred in steps S2 / S3 because the voltage U at the output terminal... o It is maintained externally, for example, by another power supply connected in parallel. However, after the nominal voltage is boosted, the output voltage of the power supply involved is different. If FET 11 is properly turned off and the load current is switched to the body diode, this is reflected in a voltage difference ΔU whose absolute value is not less than the first threshold, so the method branches to step S4 in this case.

[0046] If, in step S6, despite the nominal voltage increase, a voltage difference ΔU exceeding the first threshold in absolute value cannot be obtained—that is, despite the nominal voltage increase, current transfer to the body diode cannot be completed—this indicates a short circuit in the switching path of the field-effect transistor 11, which can be considered a fault accordingly. This is signaled in subsequent step S8 after the voltage difference ΔU is evaluated in step S7.

[0047] In the subsequent step S8, in addition to issuing a signal that the FET is faulty, the nominal voltage of the power supply unit 1 is also reset to the previous nominal voltage set at the beginning of the method, and the method ends at step S9, in which the field-effect transistor 11 is driven again.

[0048] The signal emitted in step S8 can be displayed, for example, as a signal display, such as a corresponding light-emitting diode, on the ORing module 10 or the power supply device. Alternatively, the transmission of data messages via a communication network connected to the power supply device can also be considered as the emitted signal.

[0049] In a corresponding embodiment of the method, steps S1 to S8 can advantageously be performed within a few milliseconds (ms) to a maximum of 10 ms. This is advantageous when the power supply is used to power industrial equipment. This industrial equipment is often constructed according to standard IEC 61131-2, which requires the equipment to operate unrestricted for a period of 10 ms even without voltage supply. When the described test cycle is faster than the specified 10 ms, the test cycle therefore does not affect the functionality of the connected equipment.

[0050] Correspondingly, it may be advantageous to set a smooth transition from step S1 to S8 without waiting time and / or to consider the output voltage U of power supply unit 1 according to its time response. i The expected upward slope.

[0051] exist Figure 3 Another embodiment of the inspection method for field-effect transistors used in the ORing module is also shown in flowchart form. The flowchart further refers to... Figure 1 The power supply device is illustrated schematically.

[0052] Similarly, as in combination Figure 2 As explained, the method is initiated under the premise that the power supply unit 1 is set to a predetermined nominal voltage, which is applied to the output terminal 3 of the power supply unit 1.

[0053] In order to enable the method to be started by connecting the power supply, a certain start-up delay is first achieved in step S11 through a loop structure. After a predetermined time T > T 启动 Then, the method continues in step S12. A time delay T is applied. 启动 The startup delay allows the power supply unit to start and reach its stable operation if the power supply unit has just been connected.

[0054] In step S12, the voltage U is measured before or after the ORing module 10. i and U o Furthermore, it is checked whether the voltage at the output terminal 4 of the power supply unit itself, taking into account a measurement accuracy of, for example, 0.05V, is greater than the voltage at the output terminal of the power supply unit 1. Regarding the voltage difference ΔU = U... i -U o Then check if |ΔU| is greater than 0.05V. This could be caused, for example, by another parallel power supply unit that, despite having the same nominal voltage, has a slightly higher output voltage. However, the voltage U... o Greater than U i It has been shown that FET 11 does not have a short circuit. The method then branches to step S16, in which FET 11 is considered to be functioning normally.

[0055] From step S16, the method continues in step S17, in which FET 11 is turned on again if necessary and the time memory variable is set to zero again. The method then branches back to step S11, in which it waits for a waiting time T. 启动 This continues until step S12 is re-executed. Correspondingly, time T can also be used... 启动 Determine the repetition frequency of the method.

[0056] If the condition is not met in step S12, for example, if the voltage at output terminal 3 is exactly the same as the voltage at output terminal 4, then the method branches to step S13, where the voltage U is checked. i Is the voltage greater than the nominal voltage set by power supply unit 1? If so, this indicates that a higher voltage is applied to the power supply unit at its output terminal 4, and this voltage is also reproduced at the output terminal 3 of power supply unit 1. This is a sign of a short circuit in FET 11, therefore the method branches to step S23, in which the variable used to count the number of detected fault conditions is incremented by 1, and the time when the test occurred is stored in the variable T. 测试 middle.

[0057] After a fault is detected in step S23, the method branches to step S25, where it checks whether a specific number of fault conditions have been met, for example, three. If not, the program branches to the next step S26, where FET 11 is turned on again (if the FET was previously turned off), and the test time point is (again, if necessary) stored in variable T. 测试 In step S26, the voltage at the output terminal 3 of the power supply unit 1 will be reset to the rated value again if necessary.

[0058] Therefore, a waiting loop is implemented in the next step S27, which allows the method to rebranch to step S12 after a certain waiting time. The significance of this waiting time in step S27 will be explained more precisely below.

[0059] If the condition is not met in step S13, the method continues to step S14, in which FET 11 is turned off. The time point at which this occurs is again stored as the test time point, and the current flowing before the turn-off is also stored. The current value is typically available within power supply unit 1, as it is measured by power supply unit 1 within the scope of the overcurrent protection circuit. The turn-off of FET 11 in step S14 corresponds to... Figure 2 In step S1 of the embodiment, the field-effect transistor is turned off.

[0060] In a subsequent step S15, the voltage drop ΔU across the FET 11 is measured and evaluated. Here, in the present embodiment, three cases are distinguished: In the first case, the voltage at the output terminal 4 is smaller than the voltage at the output 3 of the power supply unit 1 by more than a predetermined voltage value, that is, ΔU > U2, where U2 is a positive value of a few volts, for example 2V. If this condition is met, then this means that the FET 11 is cut off and its body diode is also not conducting. This is a very rare but possible fault case, which is detected and counted in step S24. After step S24, this fault is processed in steps S25 and subsequent steps in the same way as the short - circuit fault of the FET 11 in step S23.

[0061] Another case that may occur in step S15 is that the absolute value of the voltage difference ΔU is less than the said further threshold U2 or equal to this threshold, but greater than or equal to a positive first threshold U1 of about 0.3V in absolute value, and this first threshold U1 is also the object of interrogation in step 3 in Figure 2 In this case, the method branches to step S16, in which the field - effect transistor 11 is considered to be functioning properly. The method then also comes to a restart after waiting time T through steps S17 and step S11 启动 afterwards.

[0062] In the third case of step S15, the absolute value of the voltage difference ΔU is less than the first threshold U1, that is, |ΔU| < U1, and thus the method continues with step S18.

[0063] In step S18, the current flowing at the output of the power supply unit 1 is determined again. If it is confirmed that the current was greater than a predetermined threshold before the FET​​If the condition in step S18 is not met, this may be due to the time between steps S14 and S18 being too short, such a short time distorting the result of the current measurement in step S18, for example. Thus, until the minimum waiting time is reached, the method branches back to step S19 in order to run steps S15 and S18 again and thus again have the possibility of considering FET 11 to be functional in step S16. If this is not the case even during repeated runs and it is confirmed in step S19 that the turn-off time of FET 11 in step S14 has been long enough so that correct measurement can be assumed even taking into account the measurement time constants of steps S15 and S18, then the method branches to step S20.

[0065] In step S20, the voltage at the output 3 of the power supply unit 1 is increased by a predetermined amount, for example by 1 V again. This is followed by steps S21 and S22, which are similar to steps S15 and S19: In step S21, three different cases are again distinguished for the voltage difference ΔU, which exactly correspond to the distinction in step S15. The method branches to step S24 in the first of the cases illustrated there (ΔU > U2) and to step S16 in the second case illustrated there (U1 < |ΔU| <= U2). After a sufficient waiting time, in the third case, i.e., when the voltage difference is below the first threshold in both the measurement in step S15 and the measurement in step S22 (ΔU < U1), the method branches to step S23, in which a short circuit of FET 11 is diagnosed and counted as a fault.

[0066] If it is then confirmed in step S25 that this fault condition occurs reproducibly more frequently, for example more than twice, then a signal is also sent out in step S28 reporting this fault. The method then ends.

[0067] After a fault has been confirmed in step S23 starting from step S22, in principle there is still the possibility that the fault has been recognized only because: A second parallel power adapter has been run, which is equipped with the same fault recognition according to the invention for the field effect transistor of its ORing module, and correspondingly the nominal voltage has been increased exactly synchronously when this method is run in step S20. In this case, both power supply devices measure the voltage difference ΔU < U1 in their methods in step S15 and in step S21, respectively.

[0068] This case is not impossible when two identical power supply devices are connected redundantly on the output side, but also on the input side, and are loaded with the input voltage at the same time point, i.e., are switched on simultaneously. With the simultaneous start of the power supply devices, the monitoring method is also started synchronously.

[0069] To prevent the two power supply devices from performing their measurements with the same time structure during repeated measurements, the aforementioned waiting time is provided with a random component in step S27.

[0070] This random component is preferably not purely computationally (quasi-random), but rather utilizes different characteristics of the power adapter in its algorithm, such as its unique serial number for each power adapter. The state of the least significant bit of the analog-to-digital converter can also be used as a truly random component in the random number generator's algorithm.

[0071] List of reference numerals

[0072] 1 Power Supply Unit

[0073] 2 Input connector

[0074] 3 Output terminal

[0075] 4 Output connectors

[0076] 10 ORing module

[0077] 11. Field-Effect Transistor (FET)

[0078] 12 Control Units

[0079] 13 Control Connection

[0080] U i Voltage at the output terminal of the power supply unit

[0081] U o Voltage at the output connector of the power supply unit

[0082] SFET source junction

[0083] Drain junction of D FET

[0084] G FET gate junction

[0085] S1-S8 Method Steps

[0086] S11-S28 Method Steps

Claims

1. A method for inspecting at least one field-effect transistor (11) connected as an active diode, the field-effect transistor (11) being connected downstream of the output terminal of a power supply unit (1) within a power supply device, comprising the following steps: This generates a partially turned-on state for the at least one field-effect transistor (11); A first value of the voltage drop (ΔU) on the switching path of the at least one field-effect transistor (11) is detected under a first voltage set by the power supply unit (1); Set the second voltage of the power supply unit (1); A second value of the voltage drop (ΔU) on the switching path of the at least one field-effect transistor (11) is detected under the set second voltage of the power supply unit (1); If both the first value of the voltage drop (ΔU) and the second value of the voltage drop (ΔU) are less than a predetermined positive first threshold (U1) in absolute value, or if the first value of the voltage drop (ΔU) and / or the second value of the voltage drop (ΔU) are greater than a predetermined positive second threshold (U2), wherein the second threshold is greater than the first threshold, then the at least one field-effect transistor (11) is confirmed to be faulty and a signal is issued.

2. The method according to claim 1, wherein the first threshold (U1) is 0.3V.

3. The method according to claim 1, wherein the at least one field-effect transistor (11) is in a cut-off state.

4. The method according to any one of claims 1 to 3, wherein the second threshold (U2) is at least 1.5V.

5. The method according to claim 4, wherein the second threshold (U2) is 2V.

6. The method according to any one of claims 1 to 3, wherein the second voltage is 1V greater than the first voltage.

7. The method according to any one of claims 1 to 3, wherein the second voltage is greater than a second threshold (U2) than the voltage measured at the output connector (4) of the power supply device.

8. The method according to any one of claims 1 to 3, wherein the method is repeated.

9. The method according to claim 8, wherein a fault signal for the at least one field-effect transistor (11) is issued only when a fault of the at least one field-effect transistor (11) is confirmed in a predetermined number of repetitions.

10. The method of claim 9, wherein the predetermined number of repetitions is followed by a fault signal being issued at least three times.

11. The method of claim 8, wherein a waiting time is provided between two consecutive repetitions of the method.

12. The method of claim 11, wherein the waiting time includes a random component.

13. The method of claim 12, wherein the random component is calculated using a unique identifier of the power supply device.

14. The method of claim 13, wherein the random component is calculated using the serial number of the power supply device.

15. A power supply device having a power supply unit (1), wherein at least one field-effect transistor (11) connected as an active diode is connected downstream of the power supply unit (1), characterized in that, A control unit (12) is provided, the control unit (12) being configured to perform the method according to any one of claims 1 to 14.

16. The power supply device according to claim 15, wherein the at least one field-effect transistor (11) is part of an ORing module (10).

17. The power supply device according to claim 16, wherein the power supply unit and the ORing module (10) are arranged in a separate housing.

18. The power supply device according to claim 16, wherein the power supply unit and the ORing module (10) are arranged in a common housing.

19. The power supply device according to claim 18, wherein the control unit (12) performing the method is part of the control device of the power supply unit (1).

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