Touch display device

Abstract

A touch display device comprises: a substrate; a thin film transistor above the substrate; a planarization layer above the thin film transistor; a touch line above the planarization layer; a touch insulating layer above the touch line; a touch electrode above the touch insulating layer; and a pixel electrode above the touch electrode and connected to the thin film transistor, wherein the planarization layer has a first hole corresponding to a drain electrode of the thin film transistor, and the touch insulating layer has a second hole corresponding to the drain electrode, and wherein the second hole comprises a first hole portion and a second hole portion connected to each other along a first direction, the first hole is arranged in the first hole portion, and the touch electrode contacts the touch line through the second hole portion.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2021-0187595 filed on December 24, 2021, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device, and more particularly, to a touch display device having a touch screen. Background Art

[0004] As the information society develops, demands for display devices that display images in various forms have increased, and flat panel display devices (FPDs) such as liquid crystal display devices (LCDs) and organic light emitting diode display devices (OLEDs) have been developed and applied to various fields.

[0005] Among flat panel display devices, liquid crystal display devices are widely used due to their small size, light weight, thin thickness, low driving power, etc.

[0006] The liquid crystal display device utilizes the optical anisotropy and dielectric anisotropy of liquid crystals, and includes two substrates, a liquid crystal layer between the two substrates, and pixel electrodes and common electrodes for driving liquid crystal molecules of the liquid crystal layer. The liquid crystal display device controls the arrangement of liquid crystal molecules by an electric field generated by applying voltage to the pixel electrode and the common electrode, and displays images by correspondingly changing light transmittance. Liquid crystal display devices have been widely used in portable devices such as mobile phones or multimedia devices, monitors of laptops or computers, and large televisions.

[0007] Recently, a touch display device including a touch panel attached to a display panel of such a liquid crystal display device has attracted attention.

[0008] A touch display device is used as an output device for displaying an image, and is also used as an input device for receiving instructions from a user by touching a specific position of the displayed image. The touch panel of the touch display device is classified into various types according to different methods of detecting position information, including resistive, capacitive, infrared, and surface acoustic wave.

[0009] That is, when the user touches the touch panel while viewing an image displayed by the display panel, the touch panel detects position information about the touched point and compares the detected position information with position information of the image, thereby executing an instruction from the user.

[0010] The touch display device may be manufactured by attaching a separate touch panel to a display panel or integrally forming the touch panel on a substrate of a display panel.

[0011] In particular, in order to thin portable terminals such as smartphones and tablet computers (PCs), there is an increasing demand for in-cell touch display devices in which touch electrodes and touch lines included in a touch panel are integrally formed on a substrate of a display panel.

[0012] Meanwhile, a high-definition touch display device is required to achieve clearer image quality, and thus, the pixel size is reduced to have more pixels within the same area.

[0013] However, in the in-cell touch display device, since the touch line is further provided on the substrate of the display panel and a contact portion for connecting the touch line and the touch electrode is further required, there is a limitation in reducing the pixel size, thus limiting the improvement of the resolution. Summary of the invention

[0014] Therefore, the present disclosure relates to a touch display device capable of improving resolution.

[0015] Additional features and aspects will be set forth in the following description, and in part will be apparent from the description, or may be learned through the practice of the disclosure provided herein. Other features and aspects of the inventive concept may be realized and obtained through the structures specifically pointed out in the written description or its derivatives, its claims, and the drawings.

[0016] To achieve these and other aspects of the present disclosure, as embodied and generally described herein, a touch display device includes: a substrate; a thin film transistor, above the substrate; a planarization layer, above the thin film transistor; a touch line, above the planarization layer; a touch insulating layer, above the touch line; a touch electrode, above the touch insulating layer; a pixel electrode, above the touch electrode and connected to the thin film transistor, wherein the planarization layer has a first hole corresponding to the drain of the thin film transistor, and the touch insulating layer has a second hole corresponding to the drain, and wherein the second hole includes a first hole portion and a second hole portion connected to each other along a first direction, the first hole is arranged in the first hole portion, and the touch electrode contacts the touch line through the second hole portion.

[0017] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the inventive concepts as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present disclosure includes the accompanying drawings to provide a further understanding of the present disclosure, and the accompanying drawings are incorporated in and constitute a part of this application, illustrate various aspects of the present disclosure, and together with the description serve to explain various principles of the present disclosure.

[0019] In the attached picture:

[0020] Figure 1is a schematic diagram of a touch display device according to an embodiment of the present disclosure;

[0021] Figure 2 is a schematic plan view of a touch display device according to an embodiment of the present disclosure;

[0022] Figure 3 is along Figure 2 A cross-sectional view taken along line II';

[0023] Figure 4 yes Figure 2 An enlarged plan view of area A1;

[0024] Figure 5 is along Figure 4 A cross-sectional view taken along line II-II';

[0025] Figure 6 is a diagram schematically illustrating a first hole, a second hole, and a first opening according to an embodiment of the present disclosure;

[0026] Figure 7 is a diagram schematically showing a pixel pitch of a touch display device according to an embodiment of the present disclosure;

[0027] Figure 8 is a diagram schematically showing a pixel pitch of a touch display device according to a comparative example. DETAILED DESCRIPTION

[0028] Reference will now be made in detail to aspects of the present disclosure, exemplary embodiments of which are illustrated in the accompanying drawings.

[0029] Figure 1 is a schematic diagram of a touch display device according to an embodiment of the present disclosure.

[0030] Reference Figure 1 , a touch display device according to an embodiment of the present disclosure includes a touch display panel TDP and a touch display driving part DIC.

[0031] The touch display panel TDP displays an image and senses a touch. The touch display panel TDP includes a plurality of touch electrodes TE and a plurality of touch lines TL for sensing a touch.

[0032] The plurality of touch electrodes TE are divided into sensing blocks, and the plurality of touch lines TL are respectively connected to the plurality of touch electrodes TE, thereby connecting the plurality of touch electrodes TE to the touch display driving unit DIC. For example, the plurality of touch electrodes TE may be arranged in a matrix form. The number of touch electrodes TE is not limited to the figure and may be changed.

[0033] The touch display panel TDP may be a liquid crystal panel. The touch display panel TDP may include a first substrate, a second substrate, and a liquid crystal layer interposed therebetween to display an image. A plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, and a common electrode may be disposed on the first substrate, and a color filter layer and a black matrix may be disposed on the second substrate.

[0034] Here, the common electrode may be used as the touch electrode TE.

[0035] The touch display driving part DIC provides a signal for displaying an image and sensing a touch to the touch display panel TDP.

[0036] For example, during a display period for displaying an image, the touch display driving part DIC supplies gate voltages and data voltages to gate lines and data lines of the touch display panel TDP, respectively, and provides a common voltage to the touch electrodes TE through the touch lines TL of the touch display panel TDP.

[0037] Therefore, the touch display device displays an image using the gate voltage and the data voltage.

[0038] In addition, during a touch period for detecting a touch, the touch display driving part DIC supplies a touch voltage to the touch electrode TE through the touch line TL of the touch display panel TDP.

[0039] Therefore, the touch display device detects a touch by analyzing a change in a touch voltage.

[0040] Will refer to Figure 2 and Figure 3 The configuration of sub-pixels of a touch display device is described in detail.

[0041] Figure 2 is a schematic plan view of a touch display device according to an embodiment of the present disclosure, and Figure 3 is along Figure 2 A cross-sectional view taken along line II'. Figure 2 and Figure 3 One pixel is shown.

[0042] exist Figure 2 and Figure 3 In the embodiment, a gate line 122 and a gate electrode 124 of a conductive material are formed on a transparent insulating substrate 110. The substrate 110 may be formed of glass or plastic.

[0043] The gate line 122 extends in the X direction (i.e., the first direction), and the gate 124 is connected to the gate line 122. The gate 124 extends in the Y direction (i.e., the second direction) from the gate line 122. Alternatively, the gate 124 may be a portion of the gate line 122, in which case the gate 124 may have a wider width than other portions of the gate line 122.

[0044] The gate line 122 and the gate electrode 124 may be formed of aluminum (Al), molybdenum (Mo), nickel (Ni), chromium (Cr), copper (Cu), neodymium (Nd), titanium (Ti), or alloys thereof, and may have a single layer structure or a multi-layer structure.

[0045] The gate insulating layer 130 is formed on and covers the gate line 122 and the gate 124. The gate insulating layer 130 may be formed over substantially the entire surface of the substrate 110, and may be formed of silicon nitride (SiNx) or silicon oxide (SiO2).

[0046] The semiconductor layer 132 is formed on the gate insulating layer 130 above the gate 124. The semiconductor layer 132 may be formed of an oxide semiconductor. In this case, an etch stopper layer may be further formed on the semiconductor layer 132 to correspond to the gate 124.

[0047] Alternatively, the semiconductor layer 132 may be formed of amorphous silicon. In this case, the semiconductor layer 132 may include an active layer of intrinsic amorphous silicon and an ohmic contact layer of doped amorphous silicon on the active layer, and the ohmic contact layer may be divided into two parts to expose the top surface of the active layer.

[0048] In addition, the semiconductor pattern 134 is formed on the gate insulating layer 130 and is formed of the same material as the semiconductor layer 132 .

[0049] Next, a source electrode 144 and a drain electrode 146 of a conductive material are formed on the semiconductor layer 132. The source electrode 144 and the drain electrode 146 are spaced apart from each other above the semiconductor layer 132 relative to the gate 124, and the semiconductor layer 132 between the source electrode 144 and the drain electrode 146 is exposed.

[0050] Here, both side surfaces of the source 144 facing each other in the first direction may be disposed directly above the gate 124. Alternatively, only one side surface of the source 144 adjacent to the drain 146 may be disposed directly above the gate 124 so that the source 144 partially overlaps the gate 124.

[0051] In addition, the data line 142 is formed on the semiconductor pattern 134 and is formed of the same material as the source electrode 144 and the drain electrode 146. The data line 142 extends substantially in the second direction and crosses the gate line 122, thereby defining a sub-pixel. The data line 142 is connected to the source electrode 144, and the source electrode 144 may be a part of the data line 142. Alternatively, the source electrode 144 may extend from the data line 142 in the first direction.

[0052] The source and drain electrodes 144 and 146 and the data line 142 may be formed of aluminum (Al), molybdenum (Mo), nickel (Ni), chromium (Cr), copper (Cu), neodymium (Nd), titanium (Ti) or alloys thereof, and may have a single-layer structure or a multi-layer structure.

[0053] The gate electrode 124 , the semiconductor layer 132 , the source electrode 144 and the drain electrode 146 constitute a thin film transistor, and a portion of the semiconductor layer 132 exposed between the source electrode 144 and the drain electrode 146 becomes a channel of the thin film transistor.

[0054] Here, the semiconductor layer 132, the source electrode 144, the drain electrode 146, and the data line 142 may be formed by a photolithography process using one mask. Therefore, the semiconductor layer 132 has substantially the same shape as the source electrode 144 and the drain electrode 146 except for a portion between the source electrode 144 and the drain electrode 146. At this time, the semiconductor pattern 134 is formed together, and the semiconductor pattern 134 has the same shape as the data line 142.

[0055] Alternatively, the semiconductor layer 132, the source electrode 144, the drain electrode 146, and the data line 142 may be formed by two photolithography processes using two masks. In this case, the side surface of the semiconductor layer 132 may be covered by the source electrode 144 and the drain electrode 146, and the semiconductor pattern 134 under the data line 142 may be omitted.

[0056] Next, a protective layer 150 of an insulating material is formed on the source 144 and the drain 146. The protective layer 150 may be formed over substantially the entire surface of the substrate 110 and may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiO2). However, the present disclosure is not limited thereto. The protective layer 150 may be omitted.

[0057] A planarization layer 160 of an insulating material is formed on the protective layer 150. The planarization layer 160 may be formed over substantially the entire surface of the substrate 110 and may be formed of an organic insulating material. For example, the planarization layer 160 may be formed of photo acrylic having photosensitive properties. Alternatively, the planarization layer 160 may be formed of benzocyclobutene (BCB), polyimide (PI), or polyamide (PA), without being limited thereto.

[0058] The planarization layer 160 has a flat top surface and removes a step difference caused by the underlying layer. The thickness of the planarization layer 160 is thicker than that of the underlying layer. Specifically, the planarization layer 160 has a thickness thicker than the protective layer 150.

[0059] Meanwhile, the planarization layer 160 has a first hole 160a corresponding to a portion of the drain electrode 146. Therefore, a top surface of the protection layer 150 is exposed through the first hole 160a.

[0060] A buffer layer 170 of an insulating material is formed on the planarization layer 160. The buffer layer 170 may be formed over substantially the entire surface of the substrate 110 and may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiO2). The buffer layer 170 may be omitted.

[0061] A touch line 172 of a conductive material is formed on the buffer layer 170. The touch line 172 extends substantially along the second direction. The touch line 172 crosses the gate line 122 and overlaps the data line 142. The touch line 172 has a wider width than the data line 142, and both side surfaces of the data line 142 are disposed between both side surfaces of the touch line 172.

[0062] The touch line 172 may be formed of aluminum (Al), molybdenum (Mo), nickel (Ni), chromium (Cr), copper (Cu), neodymium (Nd), titanium (Ti), or an alloy thereof. For example, the touch line 172 may have a double-layer structure of molybdenum titanium (MoTi) and copper (Cu). However, the present disclosure is not limited thereto. Alternatively, the touch line 172 may have a single-layer structure or a three-layer structure.

[0063] A touch insulating layer 180 of an insulating material is formed on the touch line 172. The touch insulating layer 180 may be formed over substantially the entire surface of the substrate 110 and may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiO2). However, the present disclosure is not limited thereto.

[0064] The touch insulating layer 180 has a second hole 180a corresponding to the first hole 160a, and the first hole 160a is disposed in the second hole 180a. Therefore, the top surface of the planarization layer 160 is exposed through the second hole 180a. In addition, the second hole 180a exposes a portion of the touch line 172. The second hole 180a is also formed in the buffer layer 170.

[0065] A touch electrode 182 of a conductive material is formed on the touch insulating layer 180. The touch electrode 182 is patterned for each sensing block. The touch electrode 182 may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0066] The touch electrode 182 has a first opening 182a corresponding to the second hole 180a. The first opening 182a partially overlaps the second hole 180a, and the touch electrode 182 contacts the touch line 172 through the second hole 180a. The second hole 180a and the first opening 182a will be described in detail later.

[0067] In addition, the touch electrode 182 has a second opening 182b corresponding to the touch line 172. The second opening 182b extends substantially along the second direction, and the length of the second opening 182b along the second direction is greater than the length along the first direction. The second opening 182b is disposed between two adjacent gate lines 122, and exposes the top surface of the touch insulation layer 180 on the touch line 172. The width of the second opening 182b is greater than the width of the touch line 172, and both side surfaces of the touch line 172 are disposed within the second opening 182b.

[0068] A passivation layer 190 of an insulating material is formed on the touch electrode 182. The passivation layer 190 may be formed over substantially the entire surface of the substrate 110 and may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiO2). However, the present disclosure is not limited thereto.

[0069] The passivation layer 190 contacts the side surface of the planarization layer 160 and has a drain contact hole 190a exposing the drain electrode 146. In this case, the drain contact hole 190a is also formed in the protective layer 150, and the drain contact hole 190a is disposed within the first hole 160a.

[0070] A pixel electrode 192 of a conductive material is formed on the passivation layer 190. The pixel electrode 192 may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0071] The pixel electrode 192 contacts the drain electrode 146 through the drain contact hole 190a in the first hole 160a.

[0072] In the present disclosure, the drain contact hole 190a and the first hole 160a are described as being separately provided, but are not limited thereto. Alternatively, the drain contact hole 190a and the first hole 160a may be one hole. That is, one contact hole exposing the drain electrode 146 may be provided in the passivation layer 190, the planarization layer 160, and the protective layer 150, and in this case, the pixel electrode 192 may be in contact with the side surface of the planarization layer 160.

[0073] A pixel electrode 192 is disposed at each sub-pixel. The pixel electrode 192 may be disposed between adjacent data lines 142 and may overlap a previous gate line 122 corresponding to a sub-pixel of a previous row.

[0074] The pixel electrode 192 includes a plurality of patterns extending substantially in the second direction and spaced apart from each other in the first direction. The plurality of patterns of the pixel electrode 192 may be connected to each other at both ends thereof and may be tilted at a predetermined angle relative to the second direction. In this case, the data line 142 and the touch line 172 may also be tilted at a predetermined angle relative to the second direction, and the plurality of patterns of the pixel electrode 192 may be substantially parallel to the data line 142 and the touch line 172.

[0075] The plurality of patterns of the pixel electrode 192 overlap the touch electrode 182, and when a voltage is applied, an electric field substantially parallel to the substrate 110 is generated between the plurality of patterns of the pixel electrode 192 and the touch electrode 182. The touch electrode 182 serves as a common electrode for driving liquid crystal molecules during a display period for displaying an image.

[0076] As described above, in an embodiment of the present disclosure, the touch insulating layer 180 has the second hole 180a, and the touch electrode 182 contacts the touch line 172 through the second hole 180a. At this time, the second hole 180a may include a portion corresponding to the first hole 160a and a portion corresponding to the touch line 172. Therefore, the area of ​​the second hole 180a is reduced, thereby improving the resolution. This will be described in detail with reference to the accompanying drawings.

[0077] Figure 4 yes Figure 2 An enlarged plan view of area A1. Figure 5 is along Figure 4 A cross-sectional view taken along line II-II'. Figure 6 is a diagram schematically illustrating a first hole, a second hole, and a first opening according to an embodiment of the present disclosure.

[0078] exist Figure 4 , Figure 5 and Figure 6 In the embodiment, the planarization layer 160 has a first hole 160 a exposing a top surface of the protection layer 150 to correspond to a portion of the drain electrode 146 .

[0079] The buffer layer 170 and the touch line 172 are sequentially formed on the planarization layer 160, and the touch insulation layer 180 on the touch line 172 has a second hole 180a. The second hole 180a is also formed in the buffer layer 170, and the side surface of the buffer layer 170 is exposed. In addition, the top surface of the planarization layer 160 is exposed through the second hole 180a, and the top surface of the protective layer 150 is also exposed through the second hole 180a.

[0080] The second hole 180a includes a first hole portion 180a1 corresponding to the first hole 160a and a second hole portion 180a2 corresponding to the touch line 172. The first hole portion 180a1 and the second hole portion 180a2 are disposed in the first direction and connected to each other to be formed as one body.

[0081] The first hole 160a is provided in the first hole portion 180a1, and the second hole portion 180a2 exposes a portion of the touch wire 172. Specifically, the second hole portion 180a2 exposes a portion of the side surface and the top surface of the touch wire 172. The area of ​​the first hole portion 180a1 is greater than that of the second hole portion 180a2.

[0082] The touch electrode 182 on the touch insulating layer 180 having the second hole 180a contacts the touch line 172 through the second hole portion 180a2. Specifically, the touch electrode 182 contacts the side surface of the touch line 172 and contacts a portion of the top surface. Here, it is beneficial that the touch electrode 182 substantially completely covers the top surface of the touch line 172. That is, the edge of the touch electrode 182 is not disposed on the top surface of the touch line 172.

[0083] In addition, the touch electrode 182 also contacts the side surface of the buffer layer 170 and the top surface of the planarization layer 160 .

[0084] The touch electrode 182 has a first opening 182a corresponding to the second hole 180a, and the first opening 182a includes a first opening portion 182a1 corresponding to the first hole portion 180a1 and a pair of second opening portions 182a2 corresponding to the second hole portion 180a2.

[0085] The first opening portion 182a1 has a larger area than the first hole portion 180a1, and the first hole portion 180a1 is disposed in the first opening portion 182a1. A pair of second opening portions 182a2 extend from the upper end and the lower end of the first opening portion 182a1 in the first direction, respectively. The second hole portion 180a2 of the second hole 180a of the sub-pixel adjacent to the corresponding sub-pixel is disposed between the pair of second opening portions 182a2. Therefore, the second hole portion 180a2 of the second hole 180a of the corresponding sub-pixel is disposed between a pair of second opening portions 182a2 of the first opening 182a of another sub-pixel adjacent to the corresponding sub-pixel.

[0086] The top surface of the planarization layer 160 and the top surface of the protection layer 150 are exposed through the first opening 182a. In addition, the top surface and the side surface of the touch insulation layer 180 are exposed through the first opening 182a, and the side surface of the buffer layer 170 is also exposed through the first opening 182a.

[0087] The passivation layer 190 on the touch electrode 182 contacts the top and side surfaces of the planarization layer 160 exposed through the second hole 180a, and also contacts the top surface of the protective layer 150. In addition, the passivation layer 190 contacts the top and side surfaces of the touch insulation layer 180, and also contacts the side surface of the buffer layer 170.

[0088] The passivation layer 190 has a drain contact hole 190a exposing the drain electrode 146. The drain contact hole 190a is also formed in the protection layer 150. The drain contact hole 190 is disposed in the first hole 160a, and thus is also disposed in the first hole portion 180a1 of the second hole 180a.

[0089] Meanwhile, as described above, the drain contact hole 190 a and the first hole 160 a may be provided as one contact hole exposing the drain electrode 146 , and the one contact hole may be provided within the first hole portion 180 a 1 of the second hole 180 a .

[0090] Thus, in the touch display device according to the embodiment of the present disclosure, the second hole 180a of the touch insulating layer 180 includes a first hole portion 180a1 corresponding to the first hole 160a and the drain contact hole 190a to contact the pixel electrode 192 and the drain electrode 146, and a second hole portion 180a2 contacting the touch electrode 182 and the touch line 172. The first hole portion 180a1 and the second hole portion 180a2 are connected to each other to form a whole.

[0091] Therefore, the pixel pitch can be reduced, so that an ultra high definition (UHD) touch display device having a resolution of 300 ppi or more can be realized.

[0092] Figure 7 is a diagram schematically showing a pixel pitch of a touch display device according to an embodiment of the present disclosure. Figure 8 Schematically shows the pixel pitch of a touch display device according to a comparative example. Figure 4 and Figure 5 .

[0093] like Figure 7 As shown, in the touch display device according to the embodiment of the present disclosure, the second hole 180a provided in the touch insulation layer 180 includes a first hole portion 180a1 corresponding to the first hole 160a of the planarization layer 160 and a second hole portion 180a2 corresponding to the touch electrode 182. The first hole portion 180a1 and the second hole portion 180a2 are provided along the first direction and connected to each other.

[0094] Therefore, the length of the first direction corresponding to the second hole 180 a may be reduced, and thus the area of ​​the second hole 180 a may be reduced.

[0095] The touch display device according to the embodiment of the present disclosure has a first pitch p1 along the first direction. The first pitch p1 may be defined as the distance between the side surfaces of two adjacent touch lines 172, that is, the distance from one side surface of a touch line 172 to one side surface of another touch line 172 adjacent thereto.

[0096] On the other hand, Figure 8As shown, in the touch display device according to the comparative example, the second hole 280a provided in the touch insulating layer includes a first hole portion 280a1 corresponding to the first hole 260a of the planarization layer and a second hole portion 280a2 corresponding to the touch electrode 282 and the touch line 272. Here, the first hole portion 280a1 and the second hole portion 280a2 are provided along the first direction and are spaced apart from each other.

[0097] The touch display device according to the comparative embodiment has a second pitch p2 along the first direction, and the second pitch p2 is greater than the first pitch p1.

[0098] In the touch display device according to the comparative embodiment, since the second hole portion 280a2 exposes the top surface of the touch line 272 and the touch electrode 282 contacts the top surface of the touch line 272 exposed through the second hole portion 280a2, the area where the touch line 272 and the touch electrode 282 overlap each other should be larger than the area of ​​the second hole portion 280a2. In addition, in order to prevent a short circuit with the pixel electrode, the touch line 272 and the touch electrode 282 overlapping each other should be spaced apart from the first hole portion 280a1.

[0099] Therefore, the second pitch p2 must be greater than the first pitch p1. For example, the first pitch p1 may be 25 μm, and the second pitch p2 may be 32 μm, but is not limited thereto.

[0100] Meanwhile, in order to reduce the second pitch p2, if the first and second holes 280a1 and 280a2 are disposed in the second direction, the width of the black matrix for shielding the first and second holes 280a1 and 280a2 will increase, thereby reducing transmittance.

[0101] Thus, in the embodiment of the present disclosure, the second hole 180a of the touch insulating layer 180 includes the first hole portion 180a1 and the second hole portion 180a2 formed as one body, so that the pixel pitch can be minimized, thereby realizing a UHD touch display device.

[0102] Since the first hole portion 180a1 and the second hole portion 180a2 of the second hole 180a are arranged in the first direction, higher transmittance can be obtained compared to a case where the first hole portion and the second hole portion are arranged in the second direction.

[0103] In addition, the touch electrode 182 contacts the top and side surfaces of the touch line 172 through the second hole portion 180a2. Therefore, the overlapping area of ​​the touch electrode 182 and the touch line 172 can be reduced, the parasitic capacitance can be reduced, and thus the touch load can be reduced.

[0104] In the present disclosure, the common electrode is used as a touch electrode, so that the thickness of the touch display device can be reduced.

[0105] In addition, since the first hole portion of the touch insulating layer for contacting the pixel electrode and the drain electrode and the second hole portion of the touch insulating layer for contacting the touch electrode and the touch line are configured to form a whole, the pixel pitch can be reduced without reducing the transmittance, thereby realizing a UHD touch display device.

[0106] In addition, the overlapping area between the touch electrode and the touch line is reduced, so that the touch load can be reduced.

[0107] It is obvious to those skilled in the art that various modifications and changes can be made to the display device of the present disclosure without departing from the technical concept or scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and changes of the present disclosure as long as they fall within the scope of the attached claims and their equivalents.

Claims

1. A touch display device, comprising: substrate; a thin film transistor, over the substrate; a planarization layer, above the thin film transistor; a touch line, above the planarization layer; A touch insulating layer, above the touch line; A touch electrode, located above the touch insulating layer; a pixel electrode, above the touch electrode and connected to the thin film transistor; as well as a gate line connected to the thin film transistor, The planarization layer has a first hole exposing the drain electrode of the thin film transistor, and the touch insulating layer has a second hole corresponding to the drain electrode, and wherein the second hole includes a first hole portion and a second hole portion connected to each other along a first direction, the first hole is disposed in the first hole portion, and the touch electrode contacts the touch line through the second hole portion, Wherein, the first direction is the direction in which the gate line extends.

2. The touch display device according to claim 1, wherein: The touch electrodes contact a top surface and a side surface of the touch wire.

3. The touch display device according to claim 2, wherein: The touch electrode contacts the top surface of the planarization layer through the second hole portion.

4. The touch display device according to claim 1, wherein: An area of ​​the first hole portion is greater than an area of ​​the second hole portion.

5. The touch display device according to claim 1, wherein: The touch electrode includes a first opening corresponding to the second hole, and The first opening includes a first opening portion and a pair of second opening portions connected to each other along the first direction, and the pair of second opening portions extend from an upper end and a lower end of the first opening portion along the first direction.

6. The touch display device according to claim 5, wherein: The first hole portion is provided in the first opening portion, and the second hole portion is provided between a pair of second opening portions of another first opening adjacent to the first opening.

7. The touch display device according to claim 5, further comprising a data line connected to the thin film transistor, in, The touch electrode further includes a second opening located between adjacent gate lines and corresponding to the touch line.

8. The touch display device according to claim 1, further comprising a passivation layer located between the touch electrode and the pixel electrode, in, The passivation layer has a drain contact hole exposing the drain electrode, and the drain contact hole is disposed in the first hole.

9. The touch display device according to claim 8, wherein: The passivation layer contacts a side surface of the planarization layer.

10. The touch display device according to claim 8, wherein: The drain contact hole is the first hole.

11. The touch display device according to claim 5, wherein: A top surface of the planarization layer and a top surface and side surfaces of the touch insulation layer are exposed through the first opening.

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