Architecture-level fault injection system and method based on systolic array accelerator reliability analysis

Abstract

The application relates to a system and method for architecture-level fault injection based on systolic array accelerator reliability analysis, relates to the technical field of CNN accelerator analysis, and solves the problems that, in the existing CNN reliability analysis method, the reliability analysis of the software level and the architecture level produces contradictory conclusions, and the analysis from the software level alone cannot meet the actual reliability characteristics of the underlying hardware application, and the like, the system comprises an execution simulator, a fault injection module and an analysis module; the execution simulator is responsible for calculation simulation, the fault injection module customizes and simulates fault generation, and the analysis module performs data analysis and result recording; by adopting the method, period-accurate fault injection can be performed on three types of registers under different systolic array sizes, a plurality of different fault types are supported, and the analysis framework can generate detailed intermediate process data information and result record information; the application is simple to implement, cross-platform, has good expansibility, and meets the application requirements.

Description

Technical Field

[0001] This invention relates to the field of CNN accelerator analysis technology, and more specifically to an architecture-level fault injection framework (Saca-FI) based on pulsating array accelerator reliability analysis. Background Technology

[0002] Currently, methods for analyzing the reliability of CNNs can generally be categorized into three types: modeling analysis, software fault injection, and beamforming testing. Modeling analysis is fast and low-cost, but its results are relatively inaccurate with a high upper bound. Hardware beamforming testing is characterized by high accuracy but high cost, and is only applicable to manufactured chips, thus it cannot be applied in the early design stages. As a relatively low-cost and high-precision method, fault injection is often used for reliability analysis at different levels. However, fault injection reliability analysis can provide misleading conclusions. Papadimitriou et al. compared error rate assessment results under software-level and architecture-level fault injection, pointing out that software-level and architecture-level reliability analysis are likely to produce contradictory analytical conclusions. Therefore, analyzing only from the software level is insufficient to grasp the actual reliability characteristics of the underlying hardware.

[0003] Based on the understanding of CNN accelerator reliability, many studies on CNN accelerator reliability improvement mechanisms have emerged in the field. Pandey et al. proposed GreenTPU, which can identify the patterns of fault-causing activation sequences in systolic arrays and intermittently increase the operating voltage to improve existing timing fault mitigation techniques. Zhang et al. analyzed the performance degradation of TPU through gate circuit simulation and proposed improvement strategies, such as removing the connection of faulty cells through pruning and bypassing circuits. Cho et al. proposed a systolic array redundancy architecture based on the segmentation and rearrangement of the connections of systolic array elements, allowing for offline and online repair.

[0004] Currently, there is no architecture-level fault injection framework for systolic array-based CNN accelerators. Comprehensive reliability analysis at the architecture level helps identify vulnerable architectural features and guides hardware architects in designing corresponding highly reliable accelerators. Saca-FI is a fault injection framework for systolic array-based CNN accelerators. It includes an architecture-level simulator that performs PE (processing engine) level operations on the systolic array in each cycle of the CNN layer, a fault injector that randomly injects faults at the PE register level, and a reliability analysis framework. Saca-FI can perform reliability analysis under different CNN, systolic array, and fault type options.

[0005] Therefore, this invention proposes an architecture-level fault injection framework, saca-FI, based on a CNN accelerator with a pulsating array, for efficient reliability analysis. Summary of the Invention

[0006] This invention addresses the problems of conflicting conclusions drawn from software-level and architecture-level reliability analysis in existing CNN reliability analysis methods, and the inability of software-level analysis alone to meet the actual reliability characteristics of the underlying hardware. It provides an architecture-level fault injection system and method based on pulsating array accelerator reliability analysis.

[0007] An architecture-level fault injection system based on reliability analysis of pulsating array accelerators is proposed. The system includes an execution simulator, a fault injection module, and an analysis module. The execution simulator is responsible for calculation and simulation, the fault injection module customizes and simulates fault generation, and the analysis module performs data analysis and records results.

[0008] The execution simulator simulates three registers for each PE in the systolic array: an input register, a weight register, and a partial sum register.

[0009] The actual real data of the target layer in the CNN model is obtained by using the Keras framework and TensorFlow backend. The mapping information between the real data and the PE is obtained by using the ScaleSim simulator. The real data of the target layer is stored in the PE according to the mapping information, and the real data is used to perform MAC operation in the PE. That is, in each cycle, the value of the input register in each PE is multiplied by the value in the weight register, and the calculation result is added to the value in the partial sum register.

[0010] Then, at the end of the cycle, the data is transmitted to the adjacent PE according to the data flow strategy;

[0011] During the simulator simulation, the fault injection module interrupts the simulator's operation and injects a fault message into a data bit in a register during a certain cycle. The simulator then performs the simulation operation after the fault message is injected and sends the simulation output feature map (Ofmap) to the Keras framework for processing. The Keras framework then outputs the prediction result.

[0012] The analysis module is used to store standard prediction results, compare the prediction results output by the Keras framework with the standard prediction results, and generate statistical results for reliability analysis as well as a complete record of information during the experimental process.

[0013] This invention also provides an architecture-level fault injection method based on the reliability analysis of a pulsating array accelerator, which is implemented by the following steps:

[0014] Step 1: The user inputs the configuration parameters of the experiment through the interface, and then the configuration information is passed to the execution simulator. The execution simulator generates the input feature map, weight matrix and mapping coordinates of PEs, and at the same time sends the relevant configuration parameters to the fault injection module to generate the configuration information of the fault to be injected in the current experiment.

[0015] Step 2: Run the execution simulator to simulate the pulsating array; when the specified period is calculated, generate experimental configuration parameters through the fault injection module to trigger fault injection; after the calculation is completed, obtain the output feature map Ofmap, and send the output feature map Ofmap to the Keras framework for processing to obtain the prediction result;

[0016] Step 3: Transmit the prediction results obtained in Step 2 to the analysis framework, and compare them with the standard prediction results of fault-free operation. If they are the same, it proves that the fault is masked; if they are different, record an SDC result.

[0017] The beneficial effects of this invention are as follows: The method for reliability analysis of systolic arrays described in this invention enables periodic and precise fault injection on three types of registers (weight, input, psum) under different systolic array sizes, such as three data streams (fixed weights, fixed input, fixed output (OS, outputstationary), and supports multiple neural network models (LeNet-5, CIFAR-10CNN, VGG-16, and can be extended to other models). The fault injection module supports experimental customization and extension, and supports various fault types, such as transient faults (single-bit transient faults, transient multi-bit faults, multiple transient faults) and persistent faults (faults stuck at 0 and stuck at 1). The analysis framework can generate detailed experimental intermediate process data information (fault injection location coordinates, flip values, number of cycles, etc. for each fault injection) and result recording information. Results show that the layer failure rate converges after a sufficient number of experiments with small errors. This invention is simple to implement, cross-platform, has good scalability, and meets application requirements. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the architecture-level fault injection system based on reliability analysis of pulsating array accelerators as described in this invention.

[0019] Figure 2 This is a flowchart of the architecture-level fault injection method based on reliability analysis of pulsating array accelerators as described in this invention. Detailed Implementation

[0020] Specific Implementation Method 1: Combination Figure 1This embodiment describes an architecture-level fault injection system (SACA-FI fault injection simulator) based on reliability analysis of a pulsating array accelerator. It mainly comprises three modules: an execution simulator, a fault injection module, and an analysis module (analysis framework). The execution simulator is responsible for computational simulation, the fault injection module customizes and simulates fault generation, and the analysis framework performs data analysis and processing. The execution simulator simulates three registers for each PE in the pulsating array: an input register, a weight register, and a partial sum register. The fault injection module and analysis framework are not hardware entity simulations but assist the system in performing reliability analysis. Their functional responsibilities and the interaction process between modules are as follows:

[0021] Execution Simulator: First, a periodically accurate simulator was built to simulate the microarchitecture-level execution behavior of a systolic array-based CNN accelerator. Saca-FI first needs to obtain the mapping relationship (information) between the input matrix, weight matrix, and PEs (processing engines) in the systolic array. This mapping information can be obtained using an open-source simulator—the ScaleSim simulator. ScaleSim is a periodically accurate CNN accelerator simulator that models the data movement process under a given data stream. ScaleSim generates mappings between data locations and PEs in the systolic array for different data streams. For example, which specific PE in the array the input data and weights are used for. However, ScaleSim does not implement the microarchitecture structure and cannot store any data values ​​(it cannot perform convolution calculations, etc.); it only generates mapping information for computation coordinates. Therefore, in this work, the ScaleSim simulator is extended to perform periodically accurate PE-level multiply-accumulate (MAC) computation operations. The simulator simulates three registers for each PE in the systolic array: an input register, a weight register, and a partial sum (psum) register. In each cycle, a PE multiplies the value in the input register by the value in the weight register and adds the result to the value in the psum register.

[0022] Data is transmitted to adjacent PEs according to a dataflow strategy. For example, for dataflow strategies with fixed weights (WS) and fixed inputs (IS), the value in the psum register of one PE is vertically transmitted to the next adjacent PE after the MAC calculation is completed. The Keras framework and TensorFlow backend are used to obtain the actual input feature maps (ifmaps) and weight data for each layer in the CNN model. The ScaleSim simulator is used to obtain the mapping of the input feature maps (ifmaps) and weight data to the PEs.

[0023] Then, the real Keras data is stored in the PE and used for MAC operations at the PE level. This simulation is performed at the layer level of the CNN model, using the Keras framework to directly compute the preceding and succeeding layers of the target network layer to improve computational speed. The layer output feature maps (Ofmap) computed by the simulator are then fed into the Keras framework for processing, which outputs the prediction results.

[0024] Fault Injection Module: Based on the execution simulator, a fault injection framework is implemented at the PE register level. This module can inject different types of software and hardware faults into the PE in the execution simulator. To inject a specific type of fault (such as a single-bit flip) at a specific location within a certain cycle, the target location is first located in the execution simulator. Then, the validity of the target location is checked. If the target location does not contain an active value or is idle, it is considered invalid. For example, during the data replacement cycle of the WS and IS data streams, even if some registers contain values, they are not active because they will be replaced by the new computation process. Furthermore, if the computation size is smaller than the systolic array size, the locations in the unused registers within the systolic array are idle. Faults occurring at invalid locations will not propagate to other data and can be considered masked. In such scenarios, the execution simulator skips the entire simulation computation, directly treating the fault injection as masked and unaffected by the output results, thus speeding up program execution.

[0025] If the target location is valid, the fault injection process will execute normally. For transient fault injection, the system flips the target location to generate an erroneous data value and then simulates the fault with the erroneous value. For permanent fault injection, the simulation keeps the data bits in the target PE register permanently fixed to 0 or 1 throughout the entire execution process to simulate a "stuck" fault.

[0026] Analysis Module (Analysis Framework): This framework analyzes and compares the predicted results obtained through the Keras framework after fault injection by the fault injection module with the standard predicted results (without fault injection). It generates statistical results for reliability analysis and a complete record of information during the experimental process. After each complete simulation execution, it records the process and results to a log file. Therefore, after x number of experimental executions, the log file will contain x records of all historical executions.

[0027] In this implementation, Saca-FI performs fault injection under given settings and generates statistical results of the systolic array failure rate after running. The simulation settings of Saca-FI are obtained from the user interface, including CNN parameters (i.e., CNN model and layer information), systolic array parameters (i.e., PE size and data flow), fault injection parameters (i.e., number of experiments and fault type information), etc.

[0028] After the user provides simulation settings as input, saca-FI automatically performs fault injection experiments. In each run, at least one fault is injected into the systolic array structure. The fault is randomly generated at the PE level (i.e., which PE), register level (i.e., input, weight, or partial sum register), bit level (i.e., which bit in the register), or cycle level (i.e., which simulation cycle it executes; this parameter is used for transient faults, not permanent faults). For permanent faults, the target location is fixed at a constant value throughout the execution of a single layer or all layers in a CNN model, i.e., fixed at a specific bit in the register of the same PE.

[0029] After the fault injection simulation is completed, the output is compared with the standard prediction result (i.e., the normal prediction result without fault injection). If different results are produced, it indicates that the injected fault led to an incorrect final output (i.e., Silent Data Corruption, SDC); conversely, identical results mean the fault was masked. The systolic array only includes numerical computation and only considers storage faults because CNN accelerators almost never crash under fault injection. Therefore, only SDC faults are considered in the framework. Once all injection runs are complete, the final results for reliability analysis and the recorded information from each experimental run are generated.

[0030] like Figure 1As shown, the fault information in the fault injection module indicates that a single-bit flip fault needs to be injected into the data of the PE at coordinate (2,2) in the systolic array and the register (psum). The target bit is 28 bits (machine number), and the fault injection is triggered when the simulator reaches the 1057th calculation cycle. After the fault injection is completed, the simulator continues to perform systolic array simulation calculations. The calculated execution result is sent back to the Keras framework as Ofmap for subsequent inference to obtain the final prediction result (dog 0.94, fox 0.03, cat 0.02, etc.). This prediction result will be passed to the analysis framework for comparison with the standard prediction result, and a record of the complete fault injection process will be generated.

[0031] Specific Implementation Method Two: Combination Figure 2 This embodiment describes the injection method of the architecture-level fault injection system based on the reliability analysis of a pulsating array accelerator as described in Specific Embodiment 1. This method is implemented through the following steps:

[0032] 1. The user inputs the experiment configuration parameters (CNN parameters, Systolicarray parameters, fault injection parameters) through the interface. This configuration information is then passed to the ScaleSim extension module, which generates the input feature map (ifamp), the mapping coordinates of the weights (weights) and the physical parameters (PEs). Subsequently, the fault injection parameters are passed to the fault injection module, and the system generates the configuration information for the faults to be injected in this experiment.

[0033] 2. The simulation executor begins running, simulating the pulsating array computation process. Fault injection is triggered when a specified period is reached; this is handled by the fault injection module. After fault injection, the computation cycle continues until the result (Ofmap) is obtained. This result is then passed to the Keras framework to generate the final prediction result.

[0034] 3. The prediction results are then transferred into the analysis framework and compared with the standard prediction results from fault-free operation. If the results are the same, it proves that the fault has been masked and the simulation execution is accurate. If they differ, an SDC result is recorded, and the fault configuration and result information during the process are saved to the file used for recording.

[0035] This implementation also includes setting an exit condition: determining whether the specified number of experiments has been reached. If not, the program re-enters the simulation executor for calculation, and the fault injection framework generates new customized fault injection information for this new experiment. Here, it is no longer necessary to call the ScaleSim module to read the mapping information, as this data is saved after the first read. The above process is repeated until the set number of experiments is reached, at which point the program exits.

[0036] This implementation utilizes the mapping information between ifmap, weight, and systolic arrays (PEs) provided by ScaleSim to achieve a periodically accurate execution simulator. A complete systolic array simulation calculation process is performed on the target layer to which faults are to be injected, and various customized experiments for fault injection are conducted on top of this. Results from other layers are executed and retrieved using the Keras framework. High-precision fault injection is achieved by simulating the systolic array operation at the periodic level. It also supports multiple fault types and allows for flexible expansion of experiments and network models.

[0037] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0038] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. An architecture-level fault injection system based on systolic array accelerator reliability analysis, characterized by: The system includes an execution simulator, a fault injection module, and an analysis module; The execution simulator is responsible for calculation and simulation, the fault injection module is customized and simulates fault generation, and the analysis module performs data analysis and records results. The execution simulator simulates three registers for each PE in the systolic array: an input register, a weight register, and a partial sum register. The actual real data of the target layer in the CNN model is obtained by using the Keras framework and TensorFlow backend. The mapping information between the real data and the PE is obtained by using the ScaleSim simulator. The real data of the target layer is stored in the PE according to the mapping information, and the MAC operation is performed in the PE using the real data. That is, in each cycle, the value in the input register of each PE is multiplied by the value in the weight register, and the result is added to the value in the partial sum register; Then, at the end of the cycle, the data is transmitted to the adjacent PE according to the data flow strategy; During the simulator simulation, the fault injection module interrupts the simulator's operation and injects a fault message into a data bit in a register during a certain cycle. The simulator then performs the simulation operation after the fault message is injected and sends the simulation output feature map (Ofmap) to the Keras framework for processing. The Keras framework then outputs the prediction result. The analysis module is used to store standard prediction results, compare the prediction results output by the Keras framework with the standard prediction results, and generate statistical results for reliability analysis as well as a complete record of information during the experimental process.

2. The architecture-level fault injection system based on systolic array accelerator reliability analysis of claim 1, wherein: The actual data includes the input feature map (ifmap) and weight data.

3. An architecture-level fault injection method based on reliability analysis of pulsating array accelerators, characterized by: This method is implemented using the architecture-level fault injection system based on reliability analysis of a pulsating array accelerator as described in claim 1 or 2, and the method is implemented by the following steps: Step 1: The user inputs the configuration parameters of the experiment through the interface, and then the configuration information is passed to the execution simulator. The execution simulator generates the input feature map, weight matrix and PE mapping coordinates, and at the same time transmits the relevant configuration parameters to the fault injection module to generate the configuration information of the fault to be injected in the current experiment. Step 2: Run the execution simulator to simulate the pulsating array; when a certain period is calculated, the experimental configuration parameters are generated by the fault injection module to trigger fault injection. After the calculation is completed, the output feature map Ofmap is sent to the Keras framework for processing, and the Keras framework outputs the prediction results. Step 3: Transmit the prediction results obtained in Step 2 to the analysis module. The analysis module compares the prediction results with the standard prediction results of fault-free operation. If the results are the same, it proves that the fault has been masked. If the results are different, record an SDC result.

4. The architecture-level fault injection method based on reliability analysis of pulsating array accelerators according to claim 3, characterized in that: In step two, the fault injection module injects a specified type of fault at a certain data location in a certain period; First, the target location is located in the simulator. Then, the validity of the target location is checked. If it is invalid, the simulator skips the entire simulation calculation and treats the fault injection as masked and does not affect the output results. If the target location is valid, the fault injection will execute normally.

5. The architecture-level fault injection method based on reliability analysis of pulsating array accelerators according to claim 4, characterized in that: For transient fault injection, the system will flip the target position to generate erroneous data values ​​and then perform simulations with the erroneous values ​​in the future. For permanent fault injection, the simulation keeps the data bits in the target PE register permanently fixed to 0 or 1 throughout the entire execution process to simulate a stuck fault.

6. The architecture-level fault injection method based on pulsating array accelerator reliability analysis according to claim 3, characterized in that: The analysis module records fault configuration information in real time and saves it to the corresponding file.

7. The architecture-level fault injection method based on reliability analysis of pulsating array accelerators according to claim 3, characterized in that: It also includes setting exit conditions: determining whether the number of experiments set in the system has been reached. If not, the simulation executor will be entered again for calculation, and the fault injection module will generate new fault injection customized information for this new experiment; if so, it will exit.

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