Organic light emitting diode display device including selection unit and driving method thereof

Abstract

The present application relates to an organic light emitting diode display device including a selection unit and a driving method thereof. An organic light emitting diode display device includes a timing control unit generating image data, a data control signal, and a gate control signal; a data driving unit generating a data voltage using the image data and the data control signal and including an output channel outputting one of the data voltage and a pre-charge voltage; a gate driving unit generating a gate 1 voltage, a gate 2 voltage, a gate 3 voltage, a light emitting 1 voltage, and a light emitting 2 voltage using the gate control signal; a display panel including a sub-pixel, a gate line, a data line, and a reset line, the sub-pixel including a first to seventh transistors, a storage capacitor, and a light emitting diode; and a selection unit connecting the output channel to one of the data line and the reset line.

Description

TECHNICAL FIELD

[0001] The disclosure relates to an organic light emitting diode display apparatus, and more particularly, to an organic light emitting diode display apparatus including a selection unit in which deterioration of a light emitting diode and a sampling transistor is compensated for by selectively connecting a data driving unit and a sub-pixel using the selection unit, and a method of driving the organic light emitting diode display apparatus. BACKGROUND

[0002] Recently, as an information-oriented society has come and as interest in information displays for processing and displaying a large amount of information and demand for portable information media have increased, the display field has rapidly developed. Accordingly, various thin flat panel display apparatuses have been developed and are receiving attention.

[0003] Among various flat panel display apparatuses, an organic light emitting diode (OLED) display apparatus is a light emitting type apparatus and does not include a backlight unit used in a non-light emitting type apparatus such as a liquid crystal display (LCD) apparatus. As a result, the OLED display apparatus has advantages in terms of a viewing angle, contrast, and power consumption to be applied to various fields.

[0004] The OLED display apparatus includes various structures of compensation units for compensating for deterioration such as threshold voltage variation of a driving transistor.

[0005] When the OLED display apparatus is applied to a flexible display apparatus such as a foldable display apparatus, a rollable display apparatus, and a bendable display apparatus, the number of times of partial driving of a display panel increases, and the degree of deterioration of a light emitting diode and a sampling transistor of a portion displaying an image and a portion not displaying an image differs. As a result, a displayed image has a stain and uniformity of the displayed image is reduced. SUMMARY

[0006] Accordingly, the disclosure relates to an organic light emitting diode display apparatus and a method of driving the organic light emitting diode display apparatus that substantially obviate one or more problems due to limitations and disadvantages of the related art.

[0007] An object of the disclosure is to provide an organic light emitting display apparatus including a selection unit in which deterioration of a light emitting diode and a sampling transistor is compensated for by using the selection unit to transmit a signal from a data driving unit to a sub-pixel or to transmit a signal from a sub-pixel to a data driving unit, and a method of driving the organic light emitting diode display apparatus.

[0008] Another object of the present disclosure is to provide an organic light emitting diode display apparatus including a selection unit and a method of driving the same, in which characteristics of a sampling transistor and a light emitting diode that are partially driven are selectively detected and compensated for by using the selection unit, thereby minimizing deterioration such as a defect and improving uniformity of an image.

[0009] Additional features and advantages of the present disclosure will be set forth in the description below, and in part will be apparent from the description, or can be learned by practice of the present disclosure. These and other advantages of the present disclosure will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

[0010] To achieve these and other advantages and in accordance with the purpose of the present disclosure, as embodied and broadly described herein, an organic light emitting diode display apparatus includes a timing control unit generating image data, a data control signal, and a gate control signal; a data driving unit generating a data voltage using the image data and the data control signal, and including an output channel outputting one of the data voltage and a pre-charge voltage; a gate driving unit generating a gate 1 voltage, a gate 2 voltage, a gate 3 voltage, a light emitting 1 voltage, and a light emitting 2 voltage using the gate control signal; a display panel including a sub-pixel, a gate line, a data line, and a reset line, the sub-pixel including a first transistor to a seventh transistor, a storage capacitor, and a light emitting diode, the gate line transmitting the gate 1 voltage, the gate 2 voltage, the gate 3 voltage, the light emitting 1 voltage, and the light emitting 2 voltage to the sub-pixel, and the reset line transmitting the pre-charge voltage to the sub-pixel; and a selection unit connecting the output channel to one of the data line and the reset line.

[0011] On the other hand, a method of driving an organic light emitting diode display apparatus includes, during a first time period of a light emitting compensation frame, transmitting, by a selection unit, a pre-charge voltage of a data driving unit to an anode of a light emitting diode of a sub-pixel of a display panel, and during a second time period of the light emitting compensation frame, transmitting, by the selection unit, a voltage of the anode of the light emitting diode to an analog-to-digital converter of the data driving unit.

[0012] It is to be understood that both the foregoing general description and the following detailed description are explanatory and are intended to provide further explanation of the present disclosure as claimed.

[0013] ADDENDA:

[0014] ADDENDUM 1. An organic light emitting diode display apparatus comprising:

[0015] a data driving unit generating a data voltage using image data and a data control signal, and including an output channel outputting one of the data voltage and a pre-charge voltage;

[0016] A gating driving unit, wherein the gating driving unit uses a gating control signal to generate a gating voltage and a light emission voltage;

[0017] A display panel, comprising sub-pixels, gating lines, data lines, and a reset line, wherein each sub-pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a driving transistor, a storage capacitor, and a light-emitting diode (LED). The gating lines transmit a gating voltage and a light-emitting voltage to the sub-pixels, and the reset line transmits a pre-charge voltage to the sub-pixels.

[0018] The selection unit connects the output channel to one of the data line and the reset line.

[0019] Appendix 2. The organic light-emitting diode display device according to Appendix 1, wherein the data driving unit includes a first switch, a second switch and an analog-to-digital converter, the first switch being connected between the pre-charge voltage and the output channel, and the second switch being connected between the common node of the first switch and the output channel and the analog-to-digital converter.

[0020] Note 3. The organic light-emitting diode display device according to Note 2, wherein the selection unit includes a first multiplexed transistor connected to the anode reset voltage and a second multiplexed transistor and a third multiplexed transistor connected to the output channel.

[0021] Appendix 4. In the organic light-emitting diode display device according to Appendix 3, the selection voltage includes selection voltage 1, selection voltage 2, and selection voltage 3, and the light-emitting voltage includes light-emitting voltage 1 and light-emitting voltage 2.

[0022] The driving transistor switches on and off according to the voltage of the first electrode of the storage capacitor, and is connected to the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the storage capacitor.

[0023] The first transistor switches according to the gate voltage 1 and is connected to the driving transistor, the fourth transistor, the fifth transistor, and the storage capacitor.

[0024] The second transistor switches according to the selected voltage 2 and is connected to the data line, the drive transistor, and the third transistor.

[0025] The third transistor switches on and off according to the light-emitting voltage, and is connected to the driving transistor, the second transistor, the storage capacitor, and the high-level voltage.

[0026] wherein the fourth transistor is switched according to the emission 1 voltage and connected to the driving transistor and the first transistor, the fifth transistor, the sixth transistor, and the seventh transistor,

[0027] wherein the fifth transistor is switched according to the gate 3 voltage and connected to the driving transistor, the first transistor, and the fourth transistor, and an initial voltage,

[0028] wherein the sixth transistor is switched according to the gate 2 voltage and connected to the reset line, the fourth transistor, and the seventh transistor, and an anode reset capacitor, and

[0029] wherein the seventh transistor is switched according to the emission 2 voltage and connected to the fourth transistor and the sixth transistor, and the light emitting diode.

[0030] Note 5. The organic light emitting diode display device of Note 3, wherein during a first time period of the emission compensation frame,

[0031] the first switch is in an on state and the second switch is in an off state,

[0032] the first multiplex transistor and the third multiplex transistor are off and the second multiplex transistor is on,

[0033] the second transistor, the sixth transistor, and the seventh transistor are on and the first transistor, the third transistor, the fourth transistor, and the fifth transistor are off, and

[0034] the pre-charge voltage is transferred to the anode of the light emitting diode, and

[0035] wherein during a second time period of the emission compensation frame,

[0036] the first switch is in an off state and the second switch is in an on state,

[0037] the first multiplex transistor and the third multiplex transistor are off and the second multiplex transistor is on,

[0038] the second transistor, the sixth transistor, and the seventh transistor are on and the first transistor, the third transistor, the fourth transistor, and the fifth transistor are off, and

[0039] the voltage of the anode of the light emitting diode is transferred to the analog-to-digital converter.

[0040] Note 6. The organic light emitting diode display device of note 3, wherein during a third time period of the sample compensation frame,

[0041] the first switch and the second switch are in an off state,

[0042] the first multiplex transistor and the second multiplex transistor are off and the third multiplex transistor is on,

[0043] the first transistor and the fifth transistor are on and the second transistor, the third transistor, the fourth transistor, the sixth transistor and the seventh transistor are off, and

[0044] an initial voltage is transferred to the gate electrode of the drive transistor and the first electrode of the storage capacitor,

[0045] wherein during a fourth time period of the sample compensation frame,

[0046] the first switch and the second switch are in an off state,

[0047] the first multiplex transistor and the second multiplex transistor are off and the third multiplex transistor is on,

[0048] the first transistor, the second transistor and the sixth transistor are on and the third transistor, the fourth transistor, the fifth transistor and the seventh transistor are off, and

[0049] the data voltage is transferred to the gate electrode of the drive transistor and the first electrode of the storage capacitor, and

[0050] wherein during a fifth time period of the sample compensation frame,

[0051] the first switch is in an off state and the second switch is in an on state,

[0052] the first multiplex transistor and the third multiplex transistor are off and the second multiplex transistor is on,

[0053] the second transistor, the third transistor, the fourth transistor and the sixth transistor are on and the first transistor, the fifth transistor and the seventh transistor are off, and

[0054] a current of the drive transistor is transferred to the analog-to-digital converter.

[0055] Note 7. The organic light emitting diode display device of note 3, wherein during a third time period of the drive compensation frame,

[0056] the first switch and the second switch are in an off state,

[0057] the first multiplex transistor and the second multiplex transistor are off, and the third multiplex transistor is on,

[0058] the first transistor and the fifth transistor are on, and the second transistor, the third transistor, the fourth transistor, the sixth transistor, and the seventh transistor are off, and

[0059] an initial voltage is transmitted to a gate electrode of the driving transistor and a first electrode of the storage capacitor,

[0060] wherein, during a fourth time period of the driving compensation frame,

[0061] the first switch and the second switch are in an off state,

[0062] the first multiplex transistor and the second multiplex transistor are off, and the third multiplex transistor is on,

[0063] the first transistor, the second transistor, and the sixth transistor are on, and the third transistor, the fourth transistor, the fifth transistor, and the seventh transistor are off, and

[0064] the data voltage is transmitted to the gate electrode of the driving transistor and the first electrode of the storage capacitor, and

[0065] wherein, during a sixth time period of the driving compensation frame,

[0066] the first switch and the second switch are in an off state,

[0067] the first multiplex transistor and the second multiplex transistor are off, and the third multiplex transistor is on,

[0068] the third transistor, the fourth transistor, and the seventh transistor are on, and the first transistor, the second transistor, the fifth transistor, and the sixth transistor are off, and

[0069] a current of the driving transistor is transmitted to the light emitting diode, and the light emitting diode emits light.

[0070] Note 8. The organic light emitting diode display device of Note 3, wherein, during a seventh time period of the anode reset frame,

[0071] the first switch and the second switch are in an off state,

[0072] the second multiplexing transistor and the third multiplexing transistor are turned off, and the first multiplexing transistor is turned on,

[0073] the second transistor, the fifth transistor, the sixth transistor, and the seventh transistor are turned on, and the first transistor, the third transistor, and the fourth transistor are turned off, and

[0074] the anode reset voltage is transmitted to an anode of the light emitting diode.

[0075] 5Paragraph 9. The organic light emitting diode display apparatus of paragraph 1, further comprising:

[0076] a timing control unit that generates the image data, the data control signal, and the gate control signal.

[0077] Paragraph 10. A method of driving an organic light emitting diode display apparatus, the method comprising the steps of: transmitting, by a selection unit, a precharge voltage of a data driving unit to an anode of a light emitting diode of a sub-pixel of a display panel during a first time period of a light emission compensation frame; and

[0078] transmitting, by the selection unit, a voltage of the anode of the light emitting diode to an analog-to-digital converter of the data driving unit during a second time period of the light emission compensation frame.

[0079] Paragraph 11. The method of paragraph 10, further comprising the steps of: transmitting, during a third time period of a sampling compensation frame, an initial voltage to a gate electrode of a driving transistor and a first electrode of a storage capacitor in the sub-pixel of the display panel;

[0080] transmitting, by the selection unit, a data voltage of the data driving unit to the gate electrode of the driving transistor and the first electrode of the storage capacitor during a fourth time period of the sampling compensation frame; and

[0081] transmitting, by the selection unit, a current of the driving transistor to the analog-to-digital converter during a fifth time period of the sampling compensation frame.

[0082] Paragraph 12. The method of paragraph 10, further comprising the steps of:

[0083] transmitting, during a third time period of a driving compensation frame, an initial voltage to a gate electrode of a driving transistor and a first electrode of a storage capacitor in the sub-pixel of the display panel;

[0084] during a fourth time period of the driving compensation frame, transmitting, by the selection unit, a data voltage of the data driving unit to the gate electrode of the driving transistor and the first electrode of the storage capacitor; and

[0085] during a sixth time period of the driving compensation frame, transmitting, to the light emitting diode, a current of the driving transistor.

[0086] Addendum 13. The method of addendum 10, further comprising the steps of:

[0087] during a seventh time period of the anode reset frame, transmitting, to the anode of the light emitting diode, an anode reset voltage. BRIEF DESCRIPTION OF DRAWINGS

[0088] The accompanying drawings, which are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0089] Figure 1 is a diagram illustrating an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0090] Figure 2 is a circuit diagram illustrating a data driving unit, a selection unit, and a sub-pixel of an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0091] Figure 3 is a diagram illustrating a plurality of signals of a light emission compensation frame of an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0092] Figure 4A and Figure 4B are diagrams respectively illustrating operations of a first time period and a second time period of an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0093] Figure 5A and Figure 5B is a diagram illustrating a threshold voltage variation of a light emitting diode of an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0094] Figure 6 is a diagram illustrating a plurality of signals of a sampling compensation frame of an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0095] Figures 7A to 7C are diagrams respectively illustrating operations of a third time period to a fifth time period of an organic light emitting diode display apparatus according to an embodiment of the present disclosure;

[0096] Figure 8is a diagram of a plurality of signals of a driving compensation frame of an organic light emitting diode display apparatus according to an embodiment of the disclosure;

[0097] Figure 9 is a diagram illustrating an operation of a sixth time period of an organic light emitting diode display apparatus according to an embodiment of the disclosure;

[0098] Figure 10 is a diagram of a plurality of signals of an anode reset frame of an organic light emitting diode display apparatus according to an embodiment of the disclosure; and

[0099] Figure 11 is a diagram illustrating an operation of a seventh time period of an organic light emitting diode display apparatus according to an embodiment of the disclosure. DETAILED DESCRIPTION

[0100] The advantages and features of the present disclosure and a method of achieving the same will be clarified by the example embodiments described below with reference to the accompanying drawings. However, the present disclosure can be implemented in different forms and should not be construed as being limited to the example embodiments set forth herein. Rather, the example embodiments are provided so that the present disclosure can be sufficiently thorough and complete to assist one of ordinary skill in the art in fully understanding the scope of the present disclosure. Also, the present disclosure is defined only by the scope of the claims.

[0101] The shapes, sizes, ratios, angles, and numbers disclosed in the accompanying drawings for describing the embodiments of the present disclosure are merely examples. Therefore, the present disclosure is not limited to the illustrated details. Like reference numerals refer to like elements throughout the drawings.

[0102] In the following description, detailed descriptions of known functions or configurations incorporated herein can be omitted when it is determined that such detailed description can unnecessarily obscure the point of the present disclosure. In the case where the terms "include", "have", and "comprise" are used in the description of the specification, unless a more restrictive meaning is explicitly used in such terms,

[0103] Another part can be added unless stated otherwise. Unless stated otherwise, the singular form of a term can include the plural form. In interpreting the elements, the element is interpreted to include an error or tolerance range even if such an error or tolerance range is not explicitly described.

[0104] In describing the positional relationship, when the positional relationship between two components is described as, for example, "upper", "above", "lower", or "beside", one or more other components can be disposed between the two components unless a more restrictive term such as "just" or "directly" is used.

[0105] "lower", or "beside", one or more other components can be disposed between the two components unless a more restrictive term such as "just" or "directly" is used.

[0106] 5It will be understood that, although the terms "first", "second", etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure.

[0107] The term unit as used herein includes a circuit, a functional block, a module in a circuit, or a system including one or more circuits or functional elements.

[0108] As a person of ordinary skill in the art can fully understand, the features of various embodiments of the present disclosure can be partially or wholly coupled or combined with each other, and can be inter-operable and technically driven in various ways. The embodiments of the present disclosure can be implemented independently of each other, or can be implemented together in a mutually dependent relationship.

[0109] Hereinafter, an organic light emitting diode display apparatus including a selection unit according to an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. In the following description, like drawing reference numerals denote like elements. When it is determined that a detailed description of well-known functions or configurations related to the present document unnecessarily obscures the gist of the present disclosure, a detailed description thereof will be omitted or will be simply made.

[0110] Figure 1 FIG. 1 is a view illustrating an organic light emitting diode display apparatus according to an embodiment of the present disclosure.

[0111] In Figure 1 In FIG. 1, an organic light emitting diode (OLED) display apparatus 110 according to an embodiment of the present disclosure includes a timing control unit 120, a data driving unit 130, a gate driving unit 140, a selection unit 150, and a display panel 160. Each of the timing control unit 120, the data driving unit 130, the gate driving unit 140, and the selection unit 150 can include a circuit or a part of a circuit.

[0112] The timing control unit 120 generates image data, a data control signal, and a gate control signal using an image signal transmitted from an external system such as a graphic card or a television system and a plurality of timing signals including a data enable signal, a horizontal synchronization signal, a vertical synchronization signal, and a clock signal. The image data and the data control signal are transmitted to the data driving unit 130 on a line 125, and the gate control signal is transmitted to the gate driving unit 140 on a line 127.

[0113] The data driving unit 130 generates a data voltage (a data signal) using the data control signal and the image data transmitted from the timing control unit 120 and transmits the data voltage to a data line DL of the display panel 160.

[0114] The gating drive unit 140 generates a gating control signal transmitted from the timing control unit 120 on line 127 using the gating control signal. Figure 2 The gate 1 voltage (gate1 signal) Scan1, ( Figure 2 The gate 2 voltage (gate2 signal) Scan2, ( Figure 2 The gate 3 voltage (gate3 signal) Scan3, ( Figure 2 The emission 1 voltage (emission 1 signal) Em1 and ( Figure 2 The emission 2 voltage (emission 2 signal) Em2 is applied to the gate line GL of the display panel 160, and the gating voltage Scan1, gating voltage Scan2, gating voltage Scan3, emission 1 voltage Em1, and emission 2 voltage Em2 are applied to the gate line GL of the display panel 160. However, it should be noted that various gating voltages other than Scan1, Scan2, and Scan3, and various emission voltages other than Em1 and Em2, can be generated by the gating driving unit to drive the sub-pixels of the display device, and the embodiments of this disclosure are not limited thereto.

[0115] The gating drive unit 140 may have an in-panel gating (GIP) type, formed in the non-display area NDA of the substrate of the display panel 160 having gating lines GL, data lines DL and sub-pixels SP.

[0116] Selection unit 150 selectively connects the sub-pixels SP of data driving unit 130 and display panel 160. (Refer to...) Figures 2 to 10 The detailed structure of selection unit 150 is shown below.

[0117] Display panel 160 includes a display area DA in its central portion and a non-display area NDA surrounding the display area DA. Display panel 160 uses gating voltage, light emission voltage, and data voltage to display images. In order to display images, display panel 160 includes multiple sub-pixels SP, multiple gating lines GL, and multiple data lines DL in the display area DA.

[0118] For example, multiple sub-pixels SP can include red sub-pixels, green sub-pixels, and blue sub-pixels.

[0119] The gate line GL and the data line DL intersect each other to define the sub-pixel SP, and the sub-pixel SP is connected to the gate line GL and the data line DL.

[0120] The data driving unit 130, selection unit 150, and sub-pixels of the display panel 160 of the OLED display device 110 will be illustrated with reference to the accompanying drawings.

[0121] Figure 2This is a circuit diagram illustrating the data driving unit, selection unit, and sub-pixels of an organic light-emitting diode display device according to an embodiment of the present disclosure.

[0122] exist Figure 2 In this embodiment of the present disclosure, the OLED display device 110 includes a data driving unit 130, a selection unit 150, and sub-pixels SP.

[0123] The data drive unit 130 includes a first switch SW1 and a second switch SW2, an analog-to-digital converter (ADC), and an output channel CH.

[0124] The first switch SW1 is connected between the pre-charge voltage Vpr, the second switch SW2, and the output channel CH, while the second switch SW2 is connected between the first switch SW1, the analog-to-digital converter (ADC), and the output channel CH. For example, the first switch SW1 is connected between the pre-charge voltage Vpr and the output channel CH, and the second switch SW2 is connected between the common node of the first switch SW1 and the output channel CH and the analog-to-digital converter (ADC). Figure 2 As shown.

[0125] The analog-to-digital converter (ADC) is connected to the second switch SW2 and ( Figure 1 The timing control unit 120 is connected between the first switch SW1 and the second switch SW2 and the selection unit 150. The output channel CH is connected between the first switch SW1 and the second switch SW2 and the selection unit 150.

[0126] Selection unit 150 includes a first multiplexed transistor Tm1, a second multiplexed transistor Tm2, ​​and a third multiplexed transistor Tm3.

[0127] The first multiplexed transistor Tm1 is connected to the first selection signal Se1, the anode reset voltage Var, and the reset line RL, and switches the connection between the anode reset voltage Var and the reset line RL according to the first selection signal Se1.

[0128] The second multiplexing transistor Tm2 is connected to the second selection signal Se2, the output channel CH, and the reset line RL, and switches the connection between the output channel CH and the reset line RL according to the second selection signal Se2.

[0129] The third multiplexing transistor Tm3 is connected to the third selection signal Se3, the output channel CH, and the data line DL, and switches the connection between the output channel CH and the data line DL according to the third selection signal Se3.

[0130] The sub-pixel SP includes a driving transistor Td, a first transistor T1 to a seventh transistor T7, a storage capacitor Cst, an anode reset capacitor Car, and a light-emitting diode De.

[0131] For example, the driver transistor Td and the second to seventh transistors T2 to T7 can be positive-type polycrystalline silicon thin film transistors (TFTs), and the first transistor T1 can be a negative-type oxide semiconductor TFT.

[0132] The driver transistor Td is switched (turned on and off) in accordance with the voltage of the first electrode of the storage capacitor Cst. The gate electrode of the driver transistor Td is connected to the first electrode of the storage capacitor Cst and the drain electrode of the first transistor T1, the source electrode of the driver transistor Td is connected to the drain electrode of the second transistor T2 and the source electrode of the third transistor T3, and the drain electrode of the driver transistor Td is connected to the source electrode of the first transistor T1, the source electrode of the fourth transistor T4, and the drain electrode of the fifth transistor T5.

[0133] The first transistor T1 of the sampling transistor is switched in accordance with the gate 1 voltage Scan1. The gate electrode of the first transistor T1 is connected to the gate 1 voltage Scan1, the source electrode of the first transistor T1 is connected to the drain electrode of the driver transistor Td, the source electrode of the fourth transistor T4, and the drain electrode of the fifth transistor T5, and the drain electrode of the first transistor T1 is connected to the first electrode of the storage capacitor Cst and the gate electrode of the driver transistor Td.

[0134] The second transistor T2 of the switching transistor is switched in accordance with the gate 2 voltage Scan2. The gate electrode of the second transistor T2 is connected to the gate 2 voltage Scan2, the source electrode of the second transistor T2 is connected to the data line DL (data voltage Vdata), and the drain electrode of the second transistor T2 is connected to the source electrode of the driver transistor Td and the source electrode of the third transistor T3.

[0135] The third transistor T3 is switched in accordance with the emission 1 voltage Em1. The gate electrode of the third transistor T3 is connected to the emission 1 voltage Em1, the source electrode of the third transistor T3 is connected to the source electrode of the driver transistor Td and the drain electrode of the second transistor T2, and the drain electrode of the third transistor T3 is connected to the high-level voltage Vdd and the second electrode of the storage capacitor Cst.

[0136] The fourth transistor T4 of the emission transistor is switched in accordance with the emission 1 voltage Em1. The gate electrode of the fourth transistor T4 is connected to the emission 1 voltage Em1, the source electrode of the fourth transistor T4 is connected to the drain electrode of the driver transistor Td, the source electrode of the first transistor T1, and the drain electrode of the fifth transistor T5, and the drain electrode of the fourth transistor T4 is connected to the source electrode of the sixth transistor T6 and the source electrode of the seventh transistor T7.

[0137] The fifth transistor T5 is switched according to the gate 3 voltage Scan3. The gate electrode of the fifth transistor T5 is connected to the gate 3 voltage Scan3, the source electrode of the fifth transistor T5 is connected to the initial voltage Vini, and the drain electrode of the fifth transistor T5 is connected to the drain electrode of the driving transistor Td, the source electrode of the first transistor T1, and the source electrode of the fourth transistor T4.

[0138] The sixth transistor T6 is switched according to the gate 2 voltage Scan2. The gate electrode of the sixth transistor T6 is connected to the gate 2 voltage Scan2, the source electrode of the sixth transistor T6 is connected to the drain electrode of the fourth transistor T4 and the source electrode of the seventh transistor T7, and the drain electrode of the sixth transistor T6 is connected to the reset line RL (reset voltage Var) and the first electrode of the anode reset capacitor Car.

[0139] The seventh transistor T7 of the light emitting transistor is switched according to the light emission 2 voltage Scan2. The gate electrode of the seventh transistor T7 is connected to the light emission 2 voltage Scan2, the source electrode of the seventh transistor T7 is connected to the drain electrode of the fourth transistor T4 and the source electrode of the sixth transistor T6, and the drain electrode of the seventh transistor T7 is connected to the anode of the light emitting diode De.

[0140] The storage capacitor Cst stores the data voltage Vdata and the threshold voltage Vtht of the driving transistor Td. The first electrode of the storage capacitor Cst is connected to the gate electrode of the driving transistor Td and the drain electrode of the first transistor T1, and the second electrode of the storage capacitor Cst is connected to the drain electrode of the third transistor T3 and the high level voltage Vdd.

[0141] The anode reset capacitor Car stores the anode reset voltage Var. The first electrode of the anode reset capacitor Car is connected to the reset line RL (reset voltage Var) and the drain electrode of the sixth transistor T6, and the second electrode of the anode reset capacitor Car is connected to the ground voltage GND.

[0142] The light emitting diode De is connected between the seventh transistor T7 and the low level voltage Vss and emits light whose brightness is proportional to the current of the driving transistor Td. The anode of the light emitting diode De is connected to the drain electrode of the seventh transistor T7, and the cathode of the light emitting diode De is connected to the low level voltage Vss.

[0143] In the OLED display device 110 according to the embodiment of the disclosure, the selection unit 150 transmits the pre-charge voltage Vpr to the reset line RL and transmits the threshold voltage Vthd of the light emitting diode De to the analog-to-digital converter ADC to compensate for the deterioration of the light emitting diode De.

[0144] Figure 3FIG. 1 is a diagram illustrating a plurality of signals of an emission compensation frame of an organic light emitting diode display apparatus according to an embodiment of the present disclosure, Figure 4A and Figure 4B are diagrams illustrating operations of a first time period and a second time period of an organic light emitting diode display apparatus according to an embodiment of the present disclosure, respectively, and Figure 5A and Figure 5B are diagrams illustrating a threshold voltage variation of a light emitting diode of an organic light emitting diode display apparatus according to an embodiment of the present disclosure.

[0145] In Figure 3 , an emission compensation frame ECF for compensating for a light emitting diode De includes a first time period TP1 of applying a pre-charge voltage Vpr to the light emitting diode De and a second time period TP2 of detecting a threshold voltage Vthd of the light emitting diode De.

[0146] In Figure 3 and Figure 4A , during the first time period TP1, since the first switch SW1 of the data driving unit 130 has an on state and the second switch SW2 of the data driving unit 130 has an off state, the pre-charge voltage Vpr is connected to the output channel CH.

[0147] Since the first selection signal Se1 and the third selection signal Se3 become a high level voltage and the second selection signal Se2 becomes a low level voltage, the first multiplex transistor Tm1 and the third multiplex transistor Tm3 are cut off and the second multiplex transistor Tm2 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the reset line RL of the sub-pixel SP.

[0148] Since the emission 1 voltage Em1, the gate 1 voltage Scan1, and the gate 3 voltage Scan3 of the sub-pixel SP become a high level voltage Vh and the emission 2 voltage Em2 and the gate 2 voltage Scan2 of the sub-pixel SP become a low level voltage Vl, the first transistor T1, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are cut off and the second transistor T2, the sixth transistor T6, and the seventh transistor T7 are turned on. In addition, the initial voltage Vini becomes the first voltage V1.

[0149] Accordingly, the pre-charge voltage Vpr of the data driving unit 130 is transmitted to the anode of the light emitting diode De of the sub-pixel SP.

[0150] In Figure 3 and Figure 4B , during the second time period TP2, since the first switch SW1 of the data driving unit 130 has an off state and the second switch SW2 of the data driving unit 130 has an on state, the analog-to-digital converter ADC is connected to the output channel CH.

[0151] Since the first selection signal Se1 and the third selection signal Se3 of the selection unit 150 become a high-level voltage and the second selection signal Se2 of the selection unit 150 becomes a low-level voltage, the first multiplex transistor Tm1 and the third multiplex transistor Tm3 are turned off and the second multiplex transistor Tm2 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the reset line RL of the sub-pixel SP.

[0152] Since the emission 1 voltage Em1, the gate 1 voltage Scan1, and the gate 3 voltage Scan3 of the sub-pixel SP become a high-level voltage Vh and the emission 2 voltage Em2 and the gate 2 voltage Scan2 of the sub-pixel SP become a low-level voltage Vl, the first transistor T1, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned off, and the second transistor T2, the sixth transistor T6, and the seventh transistor T7 are turned on. In addition, the initial voltage Vini becomes the first voltage V1.

[0153] Therefore, the anode voltage of the light emitting diode De is transmitted to the analog-to-digital converter ADC of the data driving unit 130.

[0154] The voltage of the anode of the light emitting diode De can be interpreted as the threshold voltage Vthd.

[0155] In the first time period TP1, the light emitting diode De is charged by applying the pre-charge voltage Vpr to the anode of the light emitting diode De. Figure 5A In the first time period TP1, the light emitting diode De is charged by applying the pre-charge voltage Vpr to the anode of the light emitting diode De. When the light emitting diode De is charged during the first time period TP1 by applying the pre-charge voltage Vpr to the anode of the light emitting diode De, a current flows through the light emitting diode De at a voltage equal to or greater than the threshold voltage Vthd. As the use time of the light emitting diode De increases, the current capacity of the light emitting diode De decreases and the threshold voltage Vthd of the light emitting diode De increases.

[0156] For example, the current of the light emitting diode De can decrease from the first current I1 through the second current I2 to the third current I3, and the threshold voltage Vthd of the light emitting diode De can increase from the first threshold voltage Vthd1 through the second threshold voltage Vthd2 to the third threshold voltage Vthd3.

[0157] In the second time period TP2, the light emitting diode De is discharged by stopping the application of the pre-charge voltage Vpr to the light emitting diode De. Figure 5B In the second time period TP2, the light emitting diode De is discharged by stopping the application of the pre-charge voltage Vpr to the light emitting diode De. When the light emitting diode De is discharged during the second time period TP2 by stopping the application of the pre-charge voltage Vpr to the light emitting diode De, a current flows through the light emitting diode De until the voltage of the anode of the light emitting diode De becomes the threshold voltage Vthd (during the discharge time tpr), and then the light emitting diode De becomes an off state. As the use time of the light emitting diode De increases, the threshold voltage Vthd of the light emitting diode De increases.

[0158] For example, the threshold voltage Vthd of the light emitting diode De can increase from the first threshold voltage Vthd1 to the third threshold voltage Vthd3 through the second threshold voltage Vthd2.

[0159] The pre-charge voltage Vpr is applied to the anode of the light emitting diode De during the first time period TP1, and the light emitting diode De is discharged and the voltage of the anode of the light emitting diode De becomes the threshold voltage Vthd during the second time period TP2.

[0160] In order to obtain a sufficient application time of the pre-charge voltage Vpr and a sufficient discharge time tpr of the light emitting diode De, the sum of the first time period TP1 and the second time period TP2 can be equal to or greater than 1000 times of one horizontal period 1H for image display, and each of the first time period TP1 and the second time period TP2 can be in the range of about 40% to about 60% of the sum of the first time period TP1 and the second time period TP2.

[0161] In the OLED display device 110 according to the embodiment of the disclosure, the pre-charge voltage Vpr of the data driving unit 130 is applied to the anode of the light emitting diode De of the sub-pixel SP through the selection unit 150 during the first time period TP1 of the light emission compensation frame ECF, and the threshold voltage Vthd of the light emitting diode De is transmitted to the analog-to-digital converter ADC of the data driving unit 130 through the selection unit 150 during the second time period TP2 of the light emission compensation frame ECF.

[0162] Further, the analog-to-digital converter ADC of the data driving unit 130 converts the threshold voltage Vthd of the analog type into the threshold voltage Vthd of the digital type to output the threshold voltage Vthd of the digital type to the timing control unit 120 via the line 125. The timing control unit 120 adjusts the image data based on the threshold voltage Vthd of the light emitting diode De to generate compensated image data and output the compensated image data to the data driving unit 130. The data driving unit 130 generates a compensated data voltage Vdata using the compensated image data and applies the compensated data voltage Vdata to the data line DL of the display panel 160. The display panel 160 displays an image using the compensated data voltage Vdata.

[0163] As a result, the degradation such as the threshold voltage Vthd variation of the light emitting diode De is compensated for, and the display quality of the image is improved. In addition, the degradation such as the flaw is reduced or minimized, and the uniformity of the image is improved.

[0164] In the OLED display device 110 according to the embodiment of the disclosure, the selection unit 150 transmits the current of the driving transistor Td to the analog-to-digital converter ADC to compensate for the deterioration of the first transistor T1 of the sampling transistor.

[0165] Figure 6 FIG. 1 is a diagram illustrating a plurality of signals of a sampling compensation frame of an organic light emitting diode display device according to an embodiment of the disclosure, Figures 7A to 7C FIGS. 2 to 4 are diagrams each illustrating an operation of a third to fifth time period of an organic light emitting diode display device according to an embodiment of the disclosure.

[0166] In Figure 6 , the sampling compensation frame SCF for compensating for the first transistor T1 of the sampling transistor includes a third time period TP3 in which an initial voltage Vini is applied to a gate electrode of the driving transistor Td, a fourth time period TP4 in which a data voltage Vdata and a threshold voltage Vtht are applied to the gate electrode of the driving transistor Td, and a fifth time period TP5 in which a current of the driving transistor Td is detected.

[0167] In Figure 6 and Figure 7A , during the third time period TP3, since the first and second switches SW1 and SW2 of the data driving unit 130 have an off state, the data voltage Vdata is connected to the output channel CH.

[0168] Since the first and second selection signals Se1 and Se2 of the selection unit 150 become a high-level voltage and the third selection signal Se3 of the selection unit 150 becomes a low-level voltage, the first and second multiplexing transistors Tm1 and Tm2 are cut off, and the third multiplexing transistor Tm3 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the data line DL of the sub-pixel SP.

[0169] Since the emission 1 voltage Em1, the emission 2 voltage Em2, the gate 1 voltage Scan1, and the gate 2 voltage Scan2 of the sub-pixel SP become a high-level voltage Vh and the gate 3 voltage Scan3 of the sub-pixel SP becomes a low-level voltage Vl, the first and fifth transistors T1 and T5 are turned on, and the second, third, fourth, sixth, and seventh transistors T2, T3, T4, T6, and T7 are cut off. In addition, the initial voltage Vini becomes the first voltage V1.

[0170] Accordingly, the data voltage Vdata of the data driving unit 130 is transmitted to the data line DL of the display panel 160, and the initial voltage Vini is applied to the gate electrode of the driving transistor Td and the first electrode of the storage capacitor Cst, so that the gate electrode of the driving transistor Td and the first electrode of the storage capacitor Cst are initialized.

[0171] exist Figure 6 and Figure 7B During the fourth time period TP4, the data voltage Vdata is connected to the output channel CH because the first switch SW1 and the second switch SW2 of the data drive unit 130 are in the off state.

[0172] Since the first selection signal Se1 and the second selection signal Se2 of the selection unit 150 become high-level voltages and the third selection signal Se3 of the selection unit 150 becomes low-level voltages, the first multiplexed transistor Tm1 and the second multiplexed transistor Tm2 are turned off, and the third multiplexed transistor Tm3 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the data line DL of the sub-pixel SP.

[0173] Because the emission voltages Em1 (1), Em2 (2), Scan1 (1), and Scan3 (3) of sub-pixel SP become high-level voltages Vh and the scan2 (2) of sub-pixel SP becomes low-level voltage Vl, the first transistor T1, the second transistor T2, and the sixth transistor T6 are turned on, while the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off. Furthermore, the initial voltage Vini becomes a second voltage V2, which is greater than the first voltage V1.

[0174] Therefore, the sum of the data voltage Vdata and the threshold voltage Vtht of the driving transistor Td (Vdata+Vtht) is applied and stored in the gate electrode of the driving transistor Td and the first electrode of the storage capacitor Cst.

[0175] exist Figure 6 and Figure 7C During the fifth time period TP5, since the first switch SW1 of the data driving unit 130 is in the off state and the second switch SW2 of the data driving unit 130 is in the on state, the analog-to-digital converter ADC is connected to the output channel CH.

[0176] Since the first selection signal Se1 and the third selection signal Se3 of the selection unit 150 become high-level voltages and the second selection signal Se2 of the selection unit 150 becomes low-level voltages, the first multiplexed transistor Tm1 and the third multiplexed transistor Tm3 are turned off, and the second multiplexed transistor Tm2 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the reset line RL of the sub-pixel SP.

[0177] Since the emission 1 voltage Em1, the gate 1 voltage Scan1, and the gate 2 voltage Scan2 of the sub-pixel SP become the low-level voltage Vl and the emission 2 voltage Em2 and the gate 3 voltage Scan3 of the sub-pixel SP become the high-level voltage Vh, the first transistor T1, the fifth transistor T5, and the seventh transistor T7 are turned off and the second transistor T2, the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are turned on. Further, the initial voltage Vini becomes the first voltage V1.

[0178] Accordingly, the current flows from the high-level voltage Vdd through the drive transistor Td turned on by the sum (Vdata+Vtht) of the data voltage Vdata and the threshold voltage Vtht of the drive transistor Td, and the current of the drive transistor Td of the sub-pixel SP is transferred to the analog-to-digital converter ADC of the data driving unit 130.

[0179] Here, the current of the drive transistor Td reflects the deterioration such as the characteristic degradation of the first transistor T1 which is the sampling transistor.

[0180] When the OLED display device 110 is driven for a relatively long time, the element characteristics of the first transistor T1 can be deteriorated due to voltage stress. When the element characteristics of the first transistor T1 connected to the gate electrode and the drain electrode of the drive transistor Td are deteriorated, the current characteristics of the drive transistor Td can be deteriorated.

[0181] For example, when the element characteristics of the first transistor T1 are deteriorated, the current of the drive transistor Td can be reduced.

[0182] In the OLED display device 110 according to the embodiment of the disclosure, the initial voltage Vini is applied to the first electrode of the storage capacitor Cst and the gate electrode of the drive transistor Td during the third time period TP3 of the sampling compensation frame SCF, the data voltage Vdata of the data driving unit 130 and the threshold voltage Vtht of the drive transistor Td are applied to the first electrode of the storage capacitor Cst of the sub-pixel SP and the gate electrode of the drive transistor Td through the selection unit 150 during the fourth time period TP4 of the sampling compensation frame SCF, and the current of the drive transistor Td is transferred to the analog-to-digital converter ADC of the data driving unit 130 through the selection unit 150 during the fifth time period TP5 of the sampling compensation frame SCF.

[0183] Further, an analog-to-digital converter ADC of the data driving unit 130 converts the analog type current into a digital type current to output the digital type current to the timing control unit 120. The timing control unit 120 adjusts the image data based on the current of the driving transistor Td corresponding to the degree of deterioration of the first transistor T1 of the sampling transistor to generate compensated image data and output the compensated image data to the data driving unit 130. The data driving unit 130 generates a compensated data voltage Vdata using the compensated image data and applies the compensated data voltage Vdata to the data line DL of the display panel 160. The display panel 160 displays an image using the compensated data voltage Vdata.

[0184] As a result, deterioration such as element characteristic deterioration of the first transistor T1 of the sampling transistor is compensated for, and the display quality of the image is improved. In addition, deterioration such as a flaw is reduced or minimized, and the uniformity of the image is improved.

[0185] In the OLED display device 110 according to the embodiment of the disclosure, the selection unit 150 transmits the data voltage Vdata to the driving transistor Td to compensate for deterioration of the driving transistor Td and display an image.

[0186] Figure 8 FIG. 1 is a diagram illustrating a plurality of signals of a driving compensation frame of an organic light emitting diode display device according to an embodiment of the disclosure, Figure 9 FIG. 1 is a diagram illustrating a plurality of signals of a driving compensation frame of an organic light emitting diode display device according to an embodiment of the disclosure,

[0187] In Figure 8 , the driving compensation frame DCF for compensating for the driving transistor Td and displaying an image includes a third period TP3 of applying an initial voltage Vini to a gate electrode of the driving transistor Td, a fourth period TP4 of applying a data voltage Vdata and a threshold voltage Vtht to the gate electrode of the driving transistor Td, and a sixth period TP6 of emitting light by the light emitting diode De.

[0188] Since Figure 8 the third period TP3 and the fourth period TP4 of Figure 6 are the same as the third period TP3 and the fourth period TP4 of Figure 7A and Figure 7B will be exemplified.

[0189] In Figure 8 and Figure 7ADuring the third time period TP3, the data voltage Vdata is connected to the output channel CH because the first switch SW1 and the second switch SW2 of the data drive unit 130 are in the off state.

[0190] Since the first selection signal Se1 and the second selection signal Se2 of the selection unit 150 become high-level voltages and the third selection signal Se3 of the selection unit 150 becomes low-level voltages, the first multiplexed transistor Tm1 and the second multiplexed transistor Tm2 are turned off, and the third multiplexed transistor Tm3 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the data line DL of the sub-pixel SP.

[0191] Because the emission voltages Em1 (1), Em2 (2), Scan1 (1), and Scan2 (2) of sub-pixel SP become high-level voltages Vh and the scan3 (3) of sub-pixel SP becomes low-level voltage Vl, the first transistor T1 and the fifth transistor T5 are turned on, while the second transistor T2, the third transistor T3, the fourth transistor T4, the sixth transistor T6, and the seventh transistor T7 are turned off. Furthermore, the initial voltage Vini becomes the first voltage V1.

[0192] Therefore, the data voltage Vdata of the data driving unit 130 is transmitted to the data line DL of the display panel 160, and the initial voltage Vini is applied to the gate electrode of the driving transistor Td and the first electrode of the storage capacitor Cst, so that the gate electrode of the driving transistor Td and the first electrode of the storage capacitor Cst are initialized.

[0193] exist Figure 8 and Figure 7B During the fourth time period TP4, the data voltage Vdata is connected to the output channel CH because the first switch SW1 and the second switch SW2 of the data drive unit 130 are in the off state.

[0194] Since the first selection signal Se1 and the second selection signal Se2 of the selection unit 150 become high-level voltages and the third selection signal Se3 of the selection unit 150 becomes low-level voltages, the first multiplexed transistor Tm1 and the second multiplexed transistor Tm2 are turned off, and the third multiplexed transistor Tm3 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the data line DL of the sub-pixel SP.

[0195] Since the emission 1 voltage Em1, the emission 2 voltage Em2, the gate-on 1 voltage Scan1, and the gate-on 3 voltage Scan3 of the sub-pixel SP become the high-level voltage Vh and the gate-on 2 voltage Scan2 of the sub-pixel SP becomes the low-level voltage Vl, the first transistor T1, the second transistor T2, and the sixth transistor T6 are turned on, and the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off. Further, the initial voltage Vini becomes the second voltage V2 which is larger than the first voltage V1.

[0196] Therefore, the sum (Vdata+Vtht) of the data voltage Vdata and the threshold voltage Vtht of the drive transistor Td is applied and stored in the gate electrode of the drive transistor Td and the first electrode of the storage capacitor Cst.

[0197] In the sixth time period TP6, since the first switch SW1 and the second switch SW2 of the data driving unit 130 have the off state, the data voltage Vdata is connected to the output channel CH. Figure 8 and Figure 9 In the sixth time period TP6, since the first switch SW1 and the second switch SW2 of the data driving unit 130 have the off state, the data voltage Vdata is connected to the output channel CH.

[0198] Since the first selection signal Se1 and the second selection signal Se2 of the selection unit 150 become the high-level voltage and the third selection signal Se3 of the selection unit 150 becomes the low-level voltage, the first multiplex transistor Tm1 and the second multiplex transistor Tm2 are turned off, and the third multiplex transistor Tm3 is turned on. As a result, the output channel CH of the data driving unit 130 is connected to the data line DL of the sub-pixel SP.

[0199] Since the emission 1 voltage Em1, the emission 2 voltage Em2, and the gate-on 1 voltage Scan1 of the sub-pixel SP become the low-level voltage Vl and the gate-on 2 voltage Scan2 and the gate-on 3 voltage Scan3 of the sub-pixel SP become the high-level voltage Vh, the first transistor T1, the second transistor T2, the fifth transistor T5, and the sixth transistor T6 are turned off, and the third transistor T3, the fourth transistor T4, and the seventh transistor T7 are turned on.

[0200] Therefore, the current flows from the high-level voltage Vdd through the drive transistor Td which is turned on by the sum (Vdata+Vtht) of the data voltage Vdata and the threshold voltage Vtht of the drive transistor Td, and the current of the drive transistor Td of the sub-pixel SP is transmitted to the light emitting diode De. As a result, the light emitting diode De emits light to display an image.

[0201] Here, since the current of the driving transistor Td is proportional to the square of a value obtained by subtracting the threshold voltage Vtht from the gate-source voltage Vgs (Vgs-Vtht = Vdata+Vtht-Vdd-Vth = Vdata-Vdd), a factor corresponding to the threshold voltage Vtht is removed from the current of the driving transistor Td, and degradation such as a change in the threshold voltage Vtht of the driving transistor Td is compensated for.

[0202] In the OLED display device 110 according to the embodiment of the disclosure, the initial voltage Vini is applied to the first electrode of the storage capacitor Cst and the gate electrode of the driving transistor Td during the third time period TP3 of the driving compensation frame DCF, the data voltage Vdata of the data driving unit 130 and the threshold voltage Vtht of the driving transistor Td are applied to the first electrode of the storage capacitor Cst and the gate electrode of the driving transistor Td of the sub-pixel SP through the selection unit 150 during the fourth time period TP4 of the driving compensation frame DCF, and the light-emitting diode De emits light in a state in which degradation such as a change in the threshold voltage Vtht of the driving transistor Td is compensated for to display an image during the sixth time period TP6 of the driving compensation frame DCF.

[0203] As a result, degradation such as a change in the threshold voltage Vtht of the driving transistor Td is compensated for, and the display quality of the image is improved. Further, degradation such as a flaw is reduced or minimized, and the uniformity of the image is improved.

[0204] In the OLED display device 110 according to the embodiment of the disclosure, the anode reset voltage Var is transmitted to the light-emitting diode to reset the anode of the light-emitting diode De.

[0205] Figure 10 FIG. 7 is a diagram illustrating a plurality of signals of an anode reset frame of an organic light-emitting diode display device according to an embodiment of the disclosure, Figure 11 FIG. 8 is a diagram illustrating an operation of a seventh time period of an organic light-emitting diode display device according to an embodiment of the disclosure.

[0206] In Figure 10 In the anode reset frame ARF for resetting the anode of the light-emitting diode De, the initial voltage Vini is applied to the drain electrode and the source electrode of the driving transistor Td, and the anode reset voltage Var is applied to the anode of the light-emitting diode De during the seventh time period TP7.

[0207] In Figure 10 and Figure 11 In the seventh time period TP7, the first switch SW1 and the second switch SW2 of the data driving unit 130 have an off state.

[0208] Since the first selection signal Se1 of the selection unit 150 becomes a low-level voltage and the second selection signal Se2 and the third selection signal Se3 of the selection unit 150 become a high-level voltage, the first multiplexing transistor Tm1 is turned on, and the second multiplexing transistor Tm2 and the third multiplexing transistor Tm3 are turned off. As a result, the anode reset voltage Var is connected to the reset line RL of the sub-pixel SP.

[0209] Since the emission 1 voltage Em1 of the sub-pixel SP becomes a high-level voltage Vh and the emission 2 voltage Em2, the gate 1 voltage Scan1, the gate 2 voltage Scan2, and the gate 3 voltage Scan3 of the sub-pixel SP become a low-level voltage Vl, the first transistor T1, the third transistor T3, and the fourth transistor T4 are turned off, and the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on. In addition, the initial voltage Vini becomes a second voltage V2 that is greater than the first voltage V1.

[0210] Accordingly, the initial voltage Vini is applied to the drain electrode and the source electrode of the driving transistor Td, so that the drain electrode and the source electrode of the driving transistor Td are pre-charged, and the anode reset voltage Var is applied to the anode of the light-emitting diode De, so that the anode of the light-emitting diode De is reset.

[0211] In the OLED display device 110 according to the embodiment of the disclosure, during the seventh time period TP7 of the anode reset frame ARF, the initial voltage Vini is applied to the drain electrode and the source electrode of the driving transistor Td, and the drain electrode and the source electrode of the driving transistor Td are pre-charged with the initial voltage Vini. In addition, the anode reset voltage Var is applied to the anode of the light-emitting diode De of the sub-pixel SP using the selection unit 150, and the anode of the light-emitting diode De is reset.

[0212] Since the driving transistor Td is pre-charged and the anode of the light-emitting diode De is reset, the driving speed is improved.

[0213] Thus, in the OLED display device 110 according to the embodiment of the disclosure, since the signal is transmitted from the data driving unit 130 to the sub-pixel SP or from the sub-pixel SP to the data driving unit 130 using the selection unit 150, the degradation of the light-emitting diode De and the sampling transistor T1 is compensated.

[0214] In addition, since the characteristics of the sampling transistor T1 and the light-emitting diode De that are partially driven are selectively detected and compensated using the selection unit 150, the degradation such as a flaw is reduced or minimized, and the uniformity of an image is improved.

[0215] It will be apparent to those skilled in the art that various modifications and variations can be made in the present disclosure without departing from the scope of the disclosure. Thus, it is intended that the present disclosure cover the modifications and variations of this disclosure provided they come within the scope of the appended claims and their equivalents.

[0216] Cross Reference to Related Applications

[0217] This application claims the benefit of priority of Korean Patent Application No. 10-2021-0187520, filed on December 24, 2021, in the Republic of Korea, the disclosure of which is incorporated herein in its entirety by reference.

Claims

1. An organic light-emitting diode (OLED) display device, the OLED display device comprising: A data driving unit that generates a data voltage using image data and data control signals and includes an output channel that outputs the data voltage and a pre-charge voltage in two different operations, respectively. A gating driving unit, which generates a gating voltage and a light emission voltage based on a gating control signal; The display panel includes sub-pixels, gating lines, data lines, and reset lines. Each sub-pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a driving transistor, a storage capacitor, and a light-emitting diode. The gating lines transmit the gating voltage and the light-emitting voltage to the sub-pixels, and the reset lines transmit the pre-charge voltage to the sub-pixels. as well as A selection unit connects the output channel to one of the data line and the reset line. The selection unit includes a first multiplexed transistor, a second multiplexed transistor, and a third multiplexed transistor. During the first time period of the light emission compensation frame, the second multiplexed transistor is configured to connect the pre-charge voltage to the anode of the light emission diode via the reset line. During the second time period of the light-emitting compensation frame, the second multiplexed transistor is configured to connect the anode of the light-emitting diode to the data driving unit via the reset line, and During the third time period of the sampling compensation frame, the third multiplexed transistor is configured to connect the data voltage to the data line.

2. The organic light-emitting diode display device according to claim 1, wherein, The data driving unit includes a first switch, a second switch, and an analog-to-digital converter. The first switch is connected between the pre-charge voltage and the output channel, and the second switch is connected between the common node of the first switch and the output channel and the analog-to-digital converter.

3. The organic light-emitting diode display device according to claim 2, wherein, The first multiplexed transistor is connected to the anode reset voltage, and the second and third multiplexed transistors are connected to the output channel.

4. The organic light-emitting diode display device according to claim 1, wherein, The gating voltages include gating voltage 1, gating voltage 2, and gating voltage 3, and the light-emitting voltages include light-emitting voltage 1 and light-emitting voltage 2. The driving transistor switches on and off according to the voltage of the first electrode of the storage capacitor, and is connected to the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the storage capacitor. The first transistor switches according to the gate voltage 1 and is connected to the driving transistor, the fourth transistor, the fifth transistor, and the storage capacitor. The second transistor switches according to the selected voltage 2 and is connected to the data line, the drive transistor, and the third transistor. The third transistor switches on and off according to the light-emitting voltage, and is connected to the driving transistor, the second transistor, the storage capacitor, and the high-level voltage. The fourth transistor switches on and off according to the light-emitting voltage, and is connected to the driving transistor, the first transistor, the fifth transistor, the sixth transistor, and the seventh transistor. The fifth transistor switches according to the selection voltage 3 and is connected to the driving transistor, the first transistor, the fourth transistor, and the initial voltage. The sixth transistor switches according to the gate 2 voltage and is connected to the reset line, the fourth transistor, the seventh transistor, and the anode reset capacitor. The seventh transistor switches on and off according to the voltage of the light-emitting diode 2, and is connected to the fourth transistor, the sixth transistor, and the light-emitting diode.

5. The organic light-emitting diode display device according to claim 3, wherein, During the first time period of the luminescence compensation frame The first switch is in the ON state, and the second switch is in the OFF state. The first and third multiplexed transistors are off, and the second multiplexed transistor is on. The second transistor, the sixth transistor, and the seventh transistor are turned on, and the first transistor, the third transistor, the fourth transistor, and the fifth transistor are turned off. The pre-charge voltage is transferred to the anode of the light-emitting diode, and During the second time period of the light emission compensation frame. The first switch is in the off state, and the second switch is in the on state. The first and third multiplexed transistors are off, and the second multiplexed transistor is on. The second transistor, the sixth transistor, and the seventh transistor are turned on, and the first transistor, the third transistor, the fourth transistor, and the fifth transistor are turned off. The voltage at the anode of the light-emitting diode is transmitted to the analog-to-digital converter.

6. The organic light-emitting diode display device according to claim 3, wherein, During the third time period of the sampling compensation frame, The first switch and the second switch are in the off state. The first and second multiplexed transistors are off, and the third multiplexed transistor is on. The first transistor and the fifth transistor are turned on, while the second transistor, the third transistor, the fourth transistor, the sixth transistor, and the seventh transistor are turned off. The initial voltage is transmitted to the gate electrode of the driving transistor and the first electrode of the storage capacitor. During the fourth time period of the sampling compensation frame, The first switch and the second switch are in the off state. The first and second multiplexed transistors are off, and the third multiplexed transistor is on. The first transistor, the second transistor, and the sixth transistor are turned on, while the third transistor, the fourth transistor, the fifth transistor, and the seventh transistor are turned off. The data voltage is transmitted to the gate electrode of the driving transistor and the first electrode of the storage capacitor, and During the fifth time period of the sampling compensation frame, The first switch is in the off state, and the second switch is in the on state. The first and third multiplexed transistors are off, and the second multiplexed transistor is on. The second transistor, the third transistor, the fourth transistor, and the sixth transistor are turned on, and the first transistor, the fifth transistor, and the seventh transistor are turned off. The current from the driving transistor is transmitted to the analog-to-digital converter.

7. The organic light-emitting diode display device according to claim 3, wherein, During the third time period of the driving compensation frame, The first switch and the second switch are in the off state. The first and second multiplexed transistors are off, and the third multiplexed transistor is on. The first transistor and the fifth transistor are turned on, while the second transistor, the third transistor, the fourth transistor, the sixth transistor, and the seventh transistor are turned off. The initial voltage is transmitted to the gate electrode of the driving transistor and the first electrode of the storage capacitor. During the fourth time period of the drive compensation frame, The first switch and the second switch are in the off state. The first and second multiplexed transistors are off, and the third multiplexed transistor is on. The first transistor, the second transistor, and the sixth transistor are turned on, while the third transistor, the fourth transistor, the fifth transistor, and the seventh transistor are turned off. The data voltage is transmitted to the gate electrode of the driving transistor and the first electrode of the storage capacitor, and During the sixth time period of the drive compensation frame, The first switch and the second switch are in the off state. The first and second multiplexed transistors are off, and the third multiplexed transistor is on. The third, fourth, and seventh transistors are turned on, while the first, second, fifth, and sixth transistors are turned off. The current from the driving transistor is transmitted to the light-emitting diode, and the light-emitting diode emits light.

8. The organic light-emitting diode display device according to claim 3, wherein, During the seventh time period of the anode reset frame, The first switch and the second switch are in the off state. The second and third multiplexed transistors are off, and the first multiplexed transistor is on. The second transistor, the fifth transistor, the sixth transistor, and the seventh transistor are turned on, and the first transistor, the third transistor, and the fourth transistor are turned off. The anode reset voltage is transmitted to the anode of the light-emitting diode.

9. The organic light-emitting diode display device according to claim 1, further comprising: A timing control unit that generates the image data, the data control signal, and the gating control signal.

10. A method for driving an organic light-emitting diode (OLED) display device, the OLED display device comprising: A data driving unit that generates a data voltage using image data and data control signals and includes an output channel that outputs the data voltage and a pre-charge voltage in two different operations, respectively. A gating driving unit generates a gating voltage and a light-emitting voltage based on a gating control signal; a display panel includes sub-pixels, gating lines, data lines, and a reset line. Each sub-pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a driving transistor, a storage capacitor, and a light-emitting diode. The gating lines transmit the gating voltage and the light-emitting voltage to the sub-pixels, and the reset line transmits the pre-charge voltage to the sub-pixels. The method includes the following steps: and a selection unit that connects the output channel to one of the data line and the reset line. During the first time period of the light emission compensation frame, the pre-charge voltage of the data driving unit is transmitted to the anode of the light emission diode of the sub-pixel of the display panel through the selection unit; During the second time period of the light-emitting compensation frame, the voltage of the anode of the light-emitting diode is transmitted to the analog-to-digital converter of the data driving unit via the selection unit; and During the third time period of the sampling compensation frame, an initial voltage is transmitted to the gate electrode of the driving transistor in the sub-pixel of the display panel and the first electrode of the storage capacitor.

11. The method according to claim 10, further comprising the step of: During the fourth time period of the sampling compensation frame, the data voltage of the data driving unit is transmitted to the gate electrode of the driving transistor and the first electrode of the storage capacitor through the selection unit; as well as During the fifth time period of the sampling compensation frame, the current of the driving transistor is transmitted to the analog-to-digital converter through the selection unit.

12. The method according to claim 10, further comprising the step of: During the third time period of the driving compensation frame, an initial voltage is transmitted to the gate electrode of the driving transistor in the sub-pixel of the display panel and the first electrode of the storage capacitor; During the fourth time period of the drive compensation frame, the data voltage of the data drive unit is transmitted to the gate electrode of the drive transistor and the first electrode of the storage capacitor through the selection unit; as well as During the sixth time period of the drive compensation frame, current is transmitted to the light-emitting diode from the drive transistor.

13. The method according to claim 10, further comprising the following step: During the seventh time period of the anode reset frame, an anode reset voltage is transmitted to the anode of the light-emitting diode.

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