Audio modulation amplification circuit

Abstract

An audio modulation amplification circuit includes a common mode potential controller, a carrier signal generator, and a plurality of channel circuits. The common mode potential controller is configured to generate at least one first common mode potential and a plurality of different second common mode potentials. The carrier signal generator is configured to generate a carrier signal based on the first common mode potential. The plurality of channel circuits includes a filter, a comparison circuit, and a drive circuit. The filter is configured to filter an input signal and generate a filtered signal based on the second common mode potential corresponding to the channel circuit. The comparison circuit is configured to compare a potential reference of the carrier signal and the filtered signal to generate a pulse width modulation signal. The drive circuit is configured to turn on or off in response to the pulse width modulation signal to output a load driving signal.

Description

TECHNICAL FIELD

[0001] The present application relates to a modulation amplification circuit, and in particular, to a modulation amplification circuit for generating an audio device driving signal. BACKGROUND

[0002] At present, class-D power amplifiers are gradually becoming the mainstream choice of audio power amplifiers, and are widely used in various audio demand devices, such as mobile phones, tablets, televisions, and sound systems. Generally, a digital power amplifier is used in a class-D power amplifier, and the output thereof is prone to electromagnetic interference (EMI) problems at signal edges, such as rising edges or falling edges, due to the instantaneous switching of switches.

[0003] In particular, for a multi-channel stereo class-D power amplifier, simultaneous switching of switches in each channel makes the EMI problem more serious. SUMMARY

[0004] In view of this, the present application provides an audio modulation amplification circuit. According to some embodiments, an audio modulation amplification circuit includes a common-mode potential controller, a carrier signal generator, and a plurality of channel circuits. The common-mode potential controller is configured to generate a first common-mode potential and a plurality of second common-mode potentials, each of which is different. The carrier signal generator is adapted to receive the first common-mode potential and configured to generate a carrier signal based on the first common-mode potential. The plurality of channel circuits correspond to each of the second common-mode potentials, and each channel circuit includes a filter, a comparison circuit, and a driving circuit. The filter is adapted to receive an input signal and configured to filter the input signal to generate a filtered signal based on the second common-mode potential corresponding to the channel circuit. The comparison circuit is configured to compare the potential reference of the carrier signal and the filtered signal to generate a pulse width modulation (PWM) signal. The driving circuit is configured to turn on or off in response to the pulse width modulation signal to output a load driving signal.

[0005] According to some embodiments, the common-mode potential controller is configured to generate a first common-mode potential and a second common-mode potential. The carrier signal generator is configured to receive the first common-mode potential and to generate a carrier signal based on the first common-mode potential. The channel circuit is configured to receive an input signal and to filter the input signal based on the second common-mode potential to generate a filtered signal. The comparator is configured to compare a potential reference of the carrier signal and the filtered signal to generate a pulse width modulation signal. The driver is configured to turn on or off in response to the pulse width modulation signal to output a load driving signal. BRIEF DESCRIPTION OF DRAWINGS

[0006] Figure 1 FIG. 1 is a functional block diagram of an audio modulation amplification circuit according to a first embodiment.

[0007] Figure 2 FIG. 2 is a circuit schematic diagram of an audio modulation amplification circuit according to a second embodiment.

[0008] Figures 3A-3B FIG. 3 is a schematic diagram of a carrier signal and a filtered signal according to some embodiments.

[0009] Figure 3C FIG. 4 is a schematic diagram of a pulse width modulation signal according to some embodiments.

[0010] Figure 4 FIG. 5 is a functional block diagram of an audio modulation amplification circuit according to a third embodiment.

[0011] Figures 5A-5B FIG. 6 is a schematic diagram of a carrier signal and a filtered signal according to some embodiments.

[0012] Figure 5C FIG. 7 is a schematic diagram of a pulse width modulation signal according to some embodiments.

[0013] LEGEND

[0014] 10, 20, 30: audio modulation amplification circuit

[0015] 11, 21, 31: common-mode potential controller

[0016] 12, 22, 32: carrier signal generator

[0017] 13a, 13b, 23a, 33a, 33b: channel circuit

[0018] 131a, 131b, 231, 331a, 331b: filter

[0019] 132a, 132b, 232, 332a, 332b: comparison circuit

[0020] 2321: first comparison circuit

[0021] 2322: second comparison circuit

[0022] 133a, 133b, 233, 333a, 333b: drive circuit

[0023] 234: switching circuit

[0024] 2341: first switching circuit

[0025] 2342: second switching circuit

[0026] 235, 2351, 2352: power supply

[0027] 2361, 2362: gate drive circuit

[0028] A carrier : carrier signal amplitude

[0029] A LF : filtered signal amplitude

[0030] L: load

[0031] Pa, Pb, P1, P2: output point

[0032] PWM P , PWM N : pulse width modulation signal

[0033] S a , S b , S INP , S INN : input signal

[0034] S carrier : carrier signal

[0035] S LFP , S LFN : filtered signal

[0036] T Ch1_H , T Ch2_H : rise edge trigger time

[0037] T1, T2, T3, T4: transistor

[0038] VCM _carrier : first common mode potential

[0039] VCM _LF : second common mode potential DETAILED DESCRIPTION

[0040] Figure 1 is a functional block diagram of an audio modulation amplification circuit according to the first embodiment of the present application. Please refer to Figure 1 The audio modulation amplification circuit 10 is suitable for devices with audio functions, such as mobile phones, tablets, televisions, and audio systems, to drive at least one load, such as a speaker.

[0041] In the first embodiment, the audio modulation amplification circuit 10 includes a common mode potential controller 11, a carrier signal generator 12, and multiple channel circuits 13a, 13b. The channel circuit 13a includes a filter 131a, a comparison circuit 132a, and a driving circuit 133a, and the channel circuit 13b includes a filter 131b, a comparison circuit 132b, and a driving circuit 133b. The common mode potential controller 11 is signal-coupled to the carrier signal generator 12 and each of the channel circuits 13a, 13b. The carrier signal generator 12 is signal-coupled to the comparison circuits 132a, 132b of each of the channel circuits 13a, 13b, the filters 131a, 131b of each of the channel circuits 13a, 13b are signal-coupled to the comparison circuits 132a, 132b, and the comparison circuits 132a, 132b are signal-coupled to the driving circuits 133a, 133b.

[0042] The common mode potential controller 11 is used to generate multiple common mode signals with different time points but the same potential. The multiple common mode signals are not limited to direct current or alternating current signals. For example, the common mode potential controller 11 can include a rectifier circuit and / or a voltage stabilizing circuit to generate a direct current potential, or a transistor or diode circuit, such as but not limited to an amplification circuit, a clamping circuit, or a voltage doubling circuit, to adjust the common mode potential; or, the common mode potential controller 11 can include an oscillation circuit, such as but not limited to a feedback type operational amplifier, an RC oscillator, or a crystal oscillator, to generate an alternating current potential. The common mode signal can be a component of a single transmission signal, or a common mode component of two signals in a differential transmission.

[0043] The carrier signal generator 12 is used to generate a carrier signal. The carrier signal is a periodic alternating current signal, such as but not limited to a triangular wave, a sawtooth wave, a string wave, or a square wave. In an embodiment, the oscillation circuit of the carrier signal generator 12 generates a periodic signal, and then generates a carrier signal according to multiple first common mode potentials V CM_carrierA plurality of carrier signals with the same phase are generated. In one embodiment, the carrier signals are set to have an oscillation frequency of 250 kHz or higher to avoid distortion of the output audio signal, considering the upper limit of the human ear's hearing frequency of 20 kHz. The carrier signal generator 12 receives the common mode signal generated by the common mode potential controller 11 and generates the carrier signal based on the common mode signal. For example, the common mode potential controller 11 generates a 3V DC potential, and the carrier signal generator 12 generates a triangular wave carrier signal with a peak voltage of 5V, a valley voltage of 1V, and an amplitude of 2V based on the 3V DC potential. The carrier signal generator 12 can generate a single carrier signal or a plurality of carrier signals with the same phase and different potentials. In the first embodiment, the carrier signal generator 12 outputs carrier signals with the same potential to each channel circuit 13a, 13b.

[0044] The channel circuit 13a, 13b can be an integrated circuit or a single chip that integrates the filter 131a, 131b, the comparison circuit 132a, 132b, and the drive circuit 133a, 133b. The audio modulation amplification circuit 10 includes a plurality of channel circuits 13a, 13b, each of which corresponds to one or more common mode potentials generated by the common mode potential controller 11. For example, the common mode potential controller 11 generates two DC common mode potentials with voltages of 2V and 3V, which are provided to the loop filters 131a and 131b of the channel circuit 13a and the channel circuit 13b, respectively.

[0045] The filter 131a, 131b is adapted to receive an input signal S a , S b and filter the input signal S a , S b . In addition, the reference of the output signal of the filter 131a, 131b is controlled by the common mode potential generated by the common mode potential controller 11. The frequency band of the filter 131a, 131b can be adjusted according to different requirements, such as the frequency range of the audio device using the audio modulation amplification circuit 10. To avoid signal distortion, in one embodiment, the filter 131a, 131b uses a low-pass filter to filter out the high-frequency components of the input signal S a , S b to avoid aliasing with the carrier signal. In one embodiment, the filter 131a, 131b uses a loop filter to provide a loop gain by feeding back the output points Pa, Pb of the drive circuit 133a, 133b to the input of the filter 131a, 131b. In one embodiment, each channel circuit 13a, 13b receives the same input signal S a or the input signal S b . In one embodiment, the input signal S a , S b is pre-filtered, and the filter 131a, 131b of the channel circuit 13a, 13b receives the input signal Sa ,S b The signal reference is adjusted based on the common-mode potential, and the bandwidth of filters 131a and 131b covers the input signal S. a ,S b The frequency range.

[0046] Filters 131a and 131b output filtered signals to comparator circuits 132a and 132b. Comparator circuits 132a and 132b compare the carrier signal with the potential reference of the filtered signal to generate a pulse-width modulation (PWM) signal. Specifically, in one embodiment, when the potential of the filtered signal is higher than the potential of the carrier signal, the comparator outputs a high level; conversely, when the potential of the carrier signal is higher than the potential of the filtered signal, the comparator outputs a low level.

[0047] The drive circuits 133a and 133b turn on or off in response to the PWM signal, outputting a load drive signal to drive the load. The drive circuits 133a and 133b may include a switching circuit composed of one or more transistors, such as a push-pull amplifier or a totem pole amplifier. The switching circuit may employ a half-bridge configuration, or, for differential PWM drive, a full-bridge configuration. To address the matching issue of the preceding stage current output capability, in one embodiment, the PWM signal modulates the gate drive circuit of the drive circuits 133a and 133b to drive the switching circuit. In one embodiment, the drive circuits 133a and 133b may include a demodulation circuit, such as an RC filter to restore the PWM signal, or an LC filter to reduce demodulation power consumption. The following detailed description uses a single-channel circuit as an example.

[0048] Figure 2 This is a circuit diagram of the audio modulation and amplification circuit according to the second embodiment of this case. Please refer to it. Figure 2 The second embodiment uses a differential form of the input signal S. INP ,S INN As an illustrative example, the common-mode potential controller 21 of the audio modulation amplifier circuit 20 generates a first common-mode potential V. CM_carrier The output is sent to carrier signal generator 22 to generate various second common-mode potentials V. CM_LF Filters 231 that output to each channel circuit respectively Figure 2 The single-channel circuit 23a is illustrated only as an example. It should be understood that, depending on the implementation, the first common-mode potential V CM_carrier Or the second common-mode potential V CM_LF It can be one or more, and the first common-mode potential V CM_carrier With the second common-mode potential V CM_LF They can be the same or different. Input signal SINP S INN Input to filter 231, filter 231 outputs filtered signal S LFP , S LFN Comparison circuit 232 can include first comparison circuit 2321 and second comparison circuit 2322, first comparison circuit 2321 receives filtered signal S LFP and carrier signal S carrier to generate pulse width modulation signal PWM P ; second comparison circuit 2322 receives inverted filtered signal S LFN and carrier signal S carrier to generate pulse width modulation signal PWM N .

[0049] Figures 3A-3B is a schematic diagram of carrier signal and filtered signal according to some embodiments of the present application; Figure 3C is a schematic diagram of pulse width modulation signal according to some embodiments of the present application, please refer to Figure 3A and Figure 3C waveform diagram of channel 1. When comparison circuit 232 judges that potential of filtered signal S LFP is higher than potential of carrier signal S carrier , comparison circuit 232 outputs high level. Figure 3A filtered signal S LFP is converted from positive half cycle to negative half cycle of the sine wave, potential of filtered signal S LFP is higher than potential of carrier signal S carrier in most time of positive half cycle, potential of carrier signal S carrier is higher than potential of filtered signal S LFP in most time of negative half cycle. Based on this, Figure 3C pulse width modulation signal PWM P of channel 1, pulse width is converted from wide to narrow. Conversely, Figure 3A filtered signal S LFN is converted from negative half cycle to positive half cycle of the sine wave, Figure 3C pulse width modulation signal PWM N of channel 1, pulse width is converted from narrow to wide. In other words, duty cycle of pulse width modulation signal PWM P , PWM N is modulated by difference between potential of filtered signal S LFP , S LFN and potential of carrier signal S carrier .

[0050] The driving circuit 233 includes a power supply 235, a switching circuit 234, and a gate driving circuit. In the second embodiment, the switching circuit 234 includes a full-bridge configuration composed of a first switching circuit 2341 and a second switching circuit 2342. The first switching circuit 2341 and the second switching circuit 2342 can be coupled to the same power supply 235, or respectively coupled to independent power supplies 2351 and 2352. The first switching circuit 2341 includes a P-type field-effect transistor T1 and an N-type field-effect transistor T2, and the second switching circuit 2342 includes a P-type field-effect transistor T3 and an N-type field-effect transistor T4. The drains of transistors T1 and T2 are coupled to each other, and the drains of transistors T3 and T4 are coupled to each other. The first comparator circuit 2321 outputs a pulse width modulation signal (PWM). P The first gate drive circuit 2361 is coupled to the gates of transistors T1 and T2; the second comparator circuit 2322 outputs a pulse width modulation (PWM) signal. N The second gate drive circuit 2362 is coupled to the gates of transistors T3 and T4. The series connection (drain terminals) of the field-effect transistors T1 and T2 in the first switching circuit 2341 forms output point P1, and the series connection (drain terminals) of the field-effect transistors T3 and T4 in the second switching circuit 2342 forms output point P2. The load L is bridged between output points P1 and P2. Based on this, the pulse width modulation signal PWM... P High potential and pulse width modulation signal PWM N At a low potential, current flows from power supply 2352 into the source of transistor T3, passes through output point P2, load L, and output point P1, and then flows to the source of transistor T2; this is in response to the pulse width modulation (PWM) signal. P Low potential and pulse width modulation signal PWM N At a high potential, current flows from power supply 2351 into the source of transistor T1, passes through output point P1, load L, and output point P2, and then flows to the source of transistor T4. In the second embodiment, output point P1 is the positive input of negative feedback filter 231, and output point P2 is the negative input of negative feedback filter 231 to achieve cyclic filtering.

[0051] Please refer to the above as well. Figure 3A and Figure 3B In this embodiment, the common-mode potential controller 21 generates a first common-mode potential V. CM_carrier and multiple second common-mode potentials V CM_LF ,in, Figure 3A The second common-mode potential V CM_LF Higher than Figure 3B The second common-mode potential V CM_LF , Figure 3A The second common-mode potential V CM_LFThe channel circuit for input channel 1, Figure 3B The second common-mode potential V CM_LF The channel circuit for input channel 2. Due to the second common-mode potential V CM_LF The reference is reduced, and the filtered signal S LFP (Based on the second common-mode potential V) CM_LF The generated potential is higher than the carrier signal S. carrier (Based on the first common-mode potential V) CM_carrier The duration of the generated potential is shortened. Therefore, the pulse width modulation (PWM) signal of channel 2... P PWM N The duty cycle of the pulse width modulation signal (PWM) is less than that of channel 1. P PWM N The duty cycle. In addition, the pulse width modulation (PWM) signals for channels 1 and 2. P PWM N The signal edges are out of sync. Figure 3C For example, the rising edge trigger time T of channel 1 Ch1_H The rising edge trigger time T of channel 2 Ch2_H There is a time difference between them, so that after the switching circuit 234 of channel 1 is turned on for a period of time, the switching circuit 234 of channel 2 is turned on. Conversely, after the switching circuit 234 of channel 2 is turned off for a period of time, the switching circuit 234 of channel 1 is turned off. In this way, the switching times of the switching circuits 234 of each channel circuit are staggered to avoid electromagnetic interference caused by simultaneous switching.

[0052] Figure 4 This is a functional block diagram of the audio modulation and amplification circuit according to the third embodiment of this case. Please refer to it. Figure 4 In the third embodiment, the audio modulation amplifier circuit 30 includes a common-mode potential controller 31, a carrier signal generator 32, and multiple channel circuits 33a and 33b. Channel circuit 33a includes a filter 331a, a comparator circuit 332a, and a driver circuit 333a; channel circuit 33b includes a filter 331b, a comparator circuit 332b, and a driver circuit 333b. The common-mode potential controller 31 is signal-coupled to the carrier signal generator 32 and each channel circuit 33a and 33b. The carrier signal generator 32 is signal-coupled to the comparator circuits 332a and 332b of each channel circuit 33a and 33b; the filter signals 331a and 331b of each channel circuit 33a and 33b are coupled to the comparator circuits 332a and 332b; and the comparator circuits 332a and 332b are signal-coupled to the driver circuits 333a and 333b. In the third embodiment, the common-mode potential controller 31 generates multiple first common-mode potentials V. CM_carrier Output to carrier signal generator 32, and generate one or more second common-mode potentials V CM_LFThe filters 331a and 331b, which are respectively output to the channel circuits 33a and 33b, and the carrier signal generator 32 outputs carrier signals S with different potentials. carrier To each channel circuit 33a, 33b.

[0053] Figures 5A-5B These are schematic diagrams of carrier signals and filtered signals according to other embodiments of this case, please refer to them as well. Figure 5A and Figure 5B In this embodiment, the common-mode potential controller 31 generates multiple first common-mode potentials V. CM_carrier and a second common-mode potential V CM_LF ,in, Figure 5B First common-mode potential V CM_carrier Higher than Figure 5A First common-mode potential V CM_carrier , Figure 5A First common-mode potential V CM_carrier The input carrier signal generator 32 generates a first carrier signal S. carrier And input the channel circuit of channel 1, Figure 5B First common-mode potential V CM_carrier Input carrier signal generator 32, carrier signal generator 32 generates second carrier signal S carrier And input to channel 2's channel circuit. Due to the first common-mode potential V CM_carrier The benchmark boost, the filtered signal S LFP (Based on the second common-mode potential V) CM_LF The generated potential is higher than the carrier signal S. carrier (Based on the first common-mode potential V) CM_carrier The duration of the generated potential is shortened. Therefore, please refer to... Figure 5C Pulse Width Modulation (PWM) signal of channel 2 P PWM N The duty cycle of the pulse width modulation signal (PWM) is less than that of channel 1. P PWM N The duty cycle. In addition, the pulse width modulation (PWM) signals for channels 1 and 2. P PWM N The signal edges are out of sync.

[0054] Refer again Figure 3A and Figure 3B The filtered signal S LFP (Based on the second common-mode potential V) CM_LF The amplitude of the generated signal is less than that of the carrier signal S. carrier (Based on the first common-mode potential V) CM_carrier The amplitude of the generated wave, when the first common-mode potential V CM_carrier and the second common-mode potential VCM_LF the filtered signal S LFP the peak (valley) of the filtered signal S carrier the peak (valley) of the filtered signal S LFP the peak (valley) of the filtered signal S carrier the peak (valley) of the filtered signal S CM_LF the peak (valley) of the filtered signal S CM_carrier the peak (valley) of the filtered signal S carrier the peak (valley) of the filtered signal S LF the peak (valley) of the filtered signal S LF the peak (valley) of the filtered signal S LFP the peak (valley) of the filtered signal S carrier the peak (valley) of the filtered signal S CM_carrier the peak (valley) of the filtered signal S CM_LF the peak (valley) of the filtered signal S CM_carrier the peak (valley) of the filtered signal S CM_carrier the peak (valley) of the filtered signal S carrier the peak (valley) of the filtered signal S carrier the peak (valley) of the filtered signal S CM_LF the peak (valley) of the filtered signal S CM_LF the peak (valley) of the filtered signal S

[0055] In one embodiment, the common-mode potential controller 31 generates two or more first common-mode potentials V CM_carrier (or second common-mode potentials V CM_LF ), and any two second common-mode potentials V CM_LFThe difference between the absolute values is greater than or equal to 10 mV. Thus, the common-mode potentials generated by the common-mode potential controller 31 are separated by a minimum difference, so that the signal edges of the pulse width modulation signals generated by the respective channel circuits 33a, 33b are separated by at least 10 ns. In this way, the opening or closing of the respective channel switching circuits is delayed by at least the potential rise time, so that electromagnetic interference is reduced. In an embodiment, considering that the common-mode potentials have a minimum difference, one of the first common-mode potentials V CM_carrier (or the second common-mode potentials V CM_LF ) is the same as the second common-mode potential V CM_LF (or the first common-mode potential V CM_carrier ), the signal range of the carrier signal S carrier is sufficient to cover the most filtered signals.

[0056] In summary, in an embodiment, when the input signals of the respective channel circuits are the same, the common-mode potential controller generates a plurality of common-mode potentials, so that the common-mode potentials of the filtered signals generated by the filters of the respective channel circuits are different, or so that the common-mode potentials of the carrier signals received by the respective channel circuits are different. In this way, the comparators of the respective channel circuits generate out-of-sync pulse width modulation signals according to the filtered signals and the carrier signals with different references, so that the effect of reducing electromagnetic interference is achieved. In addition, because the error generated by adjusting the common-mode potential is a common-mode error, in the differential transmission mode, the differential signals of the respective channel circuits are not affected, and the common-mode error is not corrected by the loop filter, so that the output differential signal spectrum of the respective channel circuits remains consistent.

[0057] Although the embodiments of the present application are described above, these embodiments are not intended to limit the present application, and those skilled in the art can make changes to the technical features of the present application according to the explicit or implicit content of the present application. Any such changes may fall within the scope of the patent protection sought by the present application, in other words, the scope of patent protection of the present application shall be subject to the scope defined by the claims of the present application.

Claims

1. An audio modulating amplification circuit, characterized by, The audio modulation amplification circuit comprises: a common-mode potential controller configured to generate at least one first common-mode potential and a plurality of second common-mode potentials, each of the second common-mode potentials being different from each other; a carrier signal generator adapted to receive the first common-mode potential and configured to generate a carrier signal based on the first common-mode potential; a plurality of channel circuits corresponding to each of the second common-mode potentials, each of the channel circuits comprising: a filter adapted to receive an input signal and configured to filter the input signal and generate a filtered signal based on the second common-mode potential corresponding to the channel circuit; a comparison circuit configured to compare a potential reference of the carrier signal and the filtered signal to generate a pulse width modulation (PWM) signal; and a driving circuit configured to be turned on or off in response to the PWM signal to output a load driving signal, wherein the driving circuit comprises a power supply, a gate driving circuit, and a switching circuit, the power supply is coupled to the switching circuit, the switching circuit comprises two field effect transistors, the comparison circuit is coupled to the gate driving circuit, the gate driving circuit is coupled to gates of the two field effect transistors, and the two field effect transistors are connected in series and form an output point to output the load driving signal. The absolute value of the second common-mode potential is less than the difference between the amplitude of the carrier signal and the maximum amplitude of the filtered signal. One of the second common-mode potentials is the same as the first common-mode potential.

2. The audio modulation amplification circuit of claim 1, wherein, The absolute value of any two second common-mode potentials is greater than or equal to 10 mV.

3. The audio modulation amplification circuit of claim 2, wherein, The comparison circuit comprises a first comparator and a second comparator, the driving circuit comprises a first switching circuit and a second switching circuit, the filter generates a first filtered signal and a second filtered signal which are opposite to each other, and the first filtered signal and the second filtered signal are output to the first comparator and the second comparator respectively, the first comparator is coupled to the first switching circuit, the second comparator is coupled to the second switching circuit, and the output point of the first switching circuit and the output point of the second switching circuit are adapted to bridge a load.

4. The audio modulation amplification circuit of claim 1, wherein, The filter is a loop filter, and the output point is coupled to an input end of the loop filter.

5. The audio modulation amplification circuit of claim 1, wherein, The audio modulation amplification circuit comprises:

6. The audio modulation amplification circuit of claim 1, wherein, a common-mode potential controller configured to generate a plurality of first common-mode potentials and a second common-mode potential, each of the first common-mode potentials being different from each other; 7. An audio modulating amplification circuit, characterized by, a carrier signal generator adapted to receive the plurality of first common-mode potentials and configured to generate a plurality of carrier signals based on the plurality of first common-mode potentials; a plurality of channel circuits corresponding to each of the carrier signals, each of the channel circuits comprising: a filter adapted to receive an input signal and configured to filter the input signal and generate a filtered signal based on the second common-mode potential; a comparison circuit configured to compare a potential reference of the carrier signal corresponding to the channel circuit and the filtered signal to generate a pulse width modulation (PWM) signal; and a driving circuit configured to be turned on or off in response to the PWM signal to output a load driving signal, wherein the driving circuit comprises a power supply, a gate driving circuit, and a switching circuit, the power supply is coupled to the switching circuit, the switching circuit comprises two field effect transistors, the comparison circuit is coupled to the gate driving circuit, the gate driving circuit is coupled to gates of the two field effect transistors, and the two field effect transistors are connected in series and form an output point to output the load driving signal. ​ ​ A driving circuit is turned on or off in response to the pulse width modulation signal to output a load driving signal, The driving circuit includes a power supply, a gate driving circuit and a switching circuit, the power supply is coupled to the switching circuit, the switching circuit includes two field effect transistors, the comparison circuit is coupled to the gate driving circuit, the gate driving circuit is coupled to the gates of the two field effect transistors, the two field effect transistors are connected in series and form an output point to output the load driving signal.

8. The audio modulation amplification circuit of claim 7, wherein, The difference between the absolute value of the second common mode potential and the absolute value of the first common mode potential is less than the difference between the carrier signal amplitude and the maximum amplitude of the filtered signal.

9. The audio modulation amplification circuit of claim 8, wherein, One of the plurality of first common mode potentials is the same as the second common mode potential.

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